Search results for "ASP-DAC"

Hits ?▲	Authors	Title	Venue	Year	Link
1	Kassan Unda, Chung-Han Chou, Shih-Chieh Chang, Cheng Zhuo, Yiyu Shi 0001	CN-SIM: A cycle-accurate full system power delivery noise simulator.	ASP-DAC	2017	DBLP DOI BibTeX RDF
1	Chao-Hung Wang, Yen-Yi Wu, Jianli Chen, Yao-Wen Chang, Sy-Yen Kuo, Wenxing Zhu, Genghua Fan	An effective legalization algorithm for mixed-cell-height standard cells.	ASP-DAC	2017	DBLP DOI BibTeX RDF
1	Muhammad Yasin, Bodhisatwa Mazumdar, Ozgur Sinanoglu, Jeyavijayan Rajendran	Security analysis of Anti-SAT.	ASP-DAC	2017	DBLP DOI BibTeX RDF
1	Youngchan Kim, Taewhan Kim	Algorithm for synthesis and exploration of clock spines.	ASP-DAC	2017	DBLP DOI BibTeX RDF
1	Qiao Li 0001, Liang Shi, Chun Jason Xue, Qingfeng Zhuge, Edwin Hsing-Mean Sha	Improving LDPC performance via asymmetric sensing level placement on flash memory.	ASP-DAC	2017	DBLP DOI BibTeX RDF
1	Joshua Marxen, Alex Orailoglu	Ensuring system security through proximity based authentication.	ASP-DAC	2017	DBLP DOI BibTeX RDF
1	Ye Tian 0010, Qiang Xu 0001, Jason Xue	On efficient message passing in energy harvesting based distributed system.	ASP-DAC	2017	DBLP DOI BibTeX RDF
1	Adam Kostrzewa, Sebastian Tobuschat, Leonardo Ecco, Rolf Ernst	Adaptive load distribution in mixed-critical Networks-on-Chip.	ASP-DAC	2017	DBLP DOI BibTeX RDF
1	John Rogers	ASP-DAC 2017 keynote speech I-2: Electronics for the human body.	ASP-DAC	2017	DBLP DOI BibTeX RDF
1	Nhut-Minh Ho, Elavarasi Manogaran, Weng-Fai Wong, Asha Anoosheh	Efficient floating point precision tuning for approximate computing.	ASP-DAC	2017	DBLP DOI BibTeX RDF
1	Kei Ikeda, Atsuki Kobayashi, Kazuo Nakazato, Kiichi Niitsu	A scalable time-domain biosensor array using logarithmic cyclic time-attenuation-based TDC for high-resolution and large-scale bio-imaging.	ASP-DAC	2017	DBLP DOI BibTeX RDF
1	Sina Asadi, Amir Mahdi Hosseini Monazzah, Hamed Farbeh, Seyed Ghassem Miremadi	WIPE: Wearout Informed Pattern Elimination to Improve the Endurance of NVM-based Caches.	ASP-DAC	2017	DBLP DOI BibTeX RDF
1	Simon J. Bale, James Alfred Walker, Martin A. Trefzer, Andy M. Tyrrell	Variability mapping at runtime using the PAnDA multi-reconfigurable architecture.	ASP-DAC	2017	DBLP DOI BibTeX RDF
1	Zhe Wang 0003, Zhongyuan Tian, Jiang Xu 0001, Rafael K. V. Maeda, Haoran Li 0002, Peng Yang 0003, Zhehui Wang, Luan H. K. Duong, Zhifei Wang, Xuanqi Chen	Modular reinforcement learning for self-adaptive energy efficiency optimization in multicore system.	ASP-DAC	2017	DBLP DOI BibTeX RDF
1	Xin He, Guihai Yan, Faqiang Sun, Yinhe Han 0001, Xiaowei Li 0001	ApproxEye: Enabling approximate computation reuse for microrobotic computer vision.	ASP-DAC	2017	DBLP DOI BibTeX RDF
1	Arunkumar Vijayan, Saman Kiamehr, Fabian Oboril, Krishnendu Chakrabarty, Mehdi Baradaran Tahoori	Workload-aware static aging monitoring of timing-critical flip-flops.	ASP-DAC	2017	DBLP DOI BibTeX RDF
1	Asit K. Mishra, Eriko Nurvitadhi, Ganesh Venkatesh, Jonathan Pearce, Debbie Marr	Fine-grained accelerators for sparse machine learning workloads.	ASP-DAC	2017	DBLP DOI BibTeX RDF
1	Andreas Grimmer, Qin Wang 0005, Hailong Yao, Tsung-Yi Ho, Robert Wille	Close-to-optimal placement and routing for continuous-flow microfluidic biochips.	ASP-DAC	2017	DBLP DOI BibTeX RDF
1	Amir Charif, Alexandre Coelho, Nacer-Eddine Zergainoh, Michael Nicolaidis	Detailed and highly parallelizable cycle-accurate network-on-chip simulation on GPGPU.	ASP-DAC	2017	DBLP DOI BibTeX RDF
1	Keita Yogosawa, Hideki Shinohara, Kousuke Miyaji	A 13.56MHz CMOS active diode full-wave rectifier achieving ZVS with voltage-time-conversion delay-locked loop for wireless power transmission.	ASP-DAC	2017	DBLP DOI BibTeX RDF
1	Yu-Min Lee, Chi-Han Lee, Yan-Cheng Zhu	Yield-driven redundant power bump assignment for power network robustness.	ASP-DAC	2017	DBLP DOI BibTeX RDF
1	Hye-Yeon Yoon, Gwang-Ho Lee, Tae-Hwan Kim	A 686Mbps 1.85mm2 near-optimal symbol detector for spatial modulation MIMO systems in 0.18μm CMOS.	ASP-DAC	2017	DBLP DOI BibTeX RDF
1	Alessandra Melani, Maria A. Serrano, Marko Bertogna, Isabella Cerutti, Eduardo Quiñones, Giorgio C. Buttazzo	A static scheduling approach to enable safety-critical OpenMP applications.	ASP-DAC	2017	DBLP DOI BibTeX RDF
1	Wenqin Huangfu, Lixue Xia, Ming Cheng, Xiling Yin, Tianqi Tang 0001, Boxun Li, Krishnendu Chakrabarty, Yuan Xie 0001, Yu Wang 0002, Huazhong Yang	Computation-oriented fault-tolerance schemes for RRAM computing systems.	ASP-DAC	2017	DBLP DOI BibTeX RDF
1	Li-Wei Shieh, Kun-Chih Chen, Hsueh-Chun Fu, Po-Han Wang 0001, Chia-Lin Yang	Enabling fast preemption via Dual-Kernel support on GPUs.	ASP-DAC	2017	DBLP DOI BibTeX RDF
1	Gregg J. Suaning	Strategic circuits for neuromodulation of the visual system.	ASP-DAC	2017	DBLP DOI BibTeX RDF
1	Bruno de O. Schmitt, Alan Mishchenko, Victor N. Kravets, Robert K. Brayton, André Inácio Reis	Fast-extract with cube hashing.	ASP-DAC	2017	DBLP DOI BibTeX RDF
1	Shanshan Liu 0001, Liyi Xiao, Xuebing Cao, Zhigang Mao	Reliability analysis of memories suffering MBUs for the effect of negative bias temperature instability.	ASP-DAC	2017	DBLP DOI BibTeX RDF
1	Qian Zhang 0020, Ting Wang 0008, Qiang Xu 0001	On resilient task allocation and scheduling with uncertain quality checkers.	ASP-DAC	2017	DBLP DOI BibTeX RDF
1	Sudarshan Sargur, Roman Lysecky	Non-intrusive dynamic profiler for multicore embedded systems.	ASP-DAC	2017	DBLP DOI BibTeX RDF
1	Shunti Yin, Deepak Kadetotad, Bonan Yan, Chang Song 0001, Yiran Chen 0001, Chaitali Chakrabarti, Jae-sun Seo	Low-power neuromorphic speech recognition engine with coarse-grain sparsity.	ASP-DAC	2017	DBLP DOI BibTeX RDF
1	Debjyoti Bhattacharjee, Arvind Easwaran, Anupam Chattopadhyay	Area-constrained technology mapping for in-memory computing using ReRAM devices.	ASP-DAC	2017	DBLP DOI BibTeX RDF
1	Omayma Matoussi, Frédéric Pétrot	Loop aware IR-level annotation framework for performance estimation in native simulation.	ASP-DAC	2017	DBLP DOI BibTeX RDF
1	Naveen Katam, Alireza Shafaei, Massoud Pedram	Design of multiple fanout clock distribution network for rapid single flux quantum technology.	ASP-DAC	2017	DBLP DOI BibTeX RDF
1	Po-Kai Chuang, Ya-Shu Chen, Po-Hao Huang	An adaptive on-line CPU-GPU governor for games on mobile devices.	ASP-DAC	2017	DBLP DOI BibTeX RDF
1	Masaharu Imai, Yoshinori Takeuchi, Jun Ohta, Gregg Jørgen Suaning, Chung-Yu Wu, Napoleon Torres-Martinez	Emerging technologies for biomedical applications: Artificial vision systems and brain machine interface.	ASP-DAC	2017	DBLP DOI BibTeX RDF
1	Yan Li, Chen Yang, Wei Zhong, Zhiwei Li, Song Chen 0001	High throughput hardware architecture for accurate semi-global matching.	ASP-DAC	2017	DBLP DOI BibTeX RDF
1	Mohsen Imani, Yeseong Kim, Tajana Rosing	MPIM: Multi-purpose in-memory processing using configurable resistive memory.	ASP-DAC	2017	DBLP DOI BibTeX RDF
1	Ying-Yu Chen, Morteza Gholipour, Deming Chen	Flexible transition metal dichalcogenide field-effect transistors: A circuit-level simulation study of delay and power under bending, process variation, and scaling.	ASP-DAC	2016	DBLP DOI BibTeX RDF
1	Islam A. K. M. Mahfuzul, Hidetoshi Onodera	On-chip monitoring and compensation scheme with fine-grain body biasing for robust and energy-efficient operations.	ASP-DAC	2016	DBLP DOI BibTeX RDF
1	Wandi Liu, Hai Wang 0002, Hengyang Zhao, Shujuan Wang, Hai-Bao Chen, Yuzhuo Fu, Jian Ma 0002, Xin Li 0001, Sheldon X.-D. Tan	Thermal modeling for energy-efficient smart building with advanced overfitting mitigation technique.	ASP-DAC	2016	DBLP DOI BibTeX RDF
1	Chak-Fong Cheang, Ka-Fai Un, Pui-In Mak, Rui Paulo Martins	Time-domain I/Q-LOFT compensator using a simple envelope detector for a sub-GHz IEEE 802.11af WLAN transmitter.	ASP-DAC	2016	DBLP DOI BibTeX RDF
1	Mingyu Wang, Zhaolin Li	STLAC: A spatial and temporal locality-aware cache and network-on-chip codesign for tiled many-core systems.	ASP-DAC	2016	DBLP DOI BibTeX RDF
1	Chio-In Ieong, Pui-In Mak, Mang I Vai, Rui Paulo Martins	Sub-µW QRS detection processor using quadratic spline wavelet transform and maxima modulus pair recognition for power-efficient wireless arrhythmia monitoring.	ASP-DAC	2016	DBLP DOI BibTeX RDF
1	Lu Wang 0019, Sheng Ma, Zhiying Wang 0003	A high performance reliable NoC router.	ASP-DAC	2016	DBLP DOI BibTeX RDF
1	Liangzhen Lai, Puneet Gupta 0001	Hardware Reliability margining for the dark silicon era.	ASP-DAC	2016	DBLP DOI BibTeX RDF
1	Fedor G. Pikus, Andres J. Torres	Advanced multi-patterning and hybrid lithography techniques.	ASP-DAC	2016	DBLP DOI BibTeX RDF
1	Abhronil Sengupta, Karthik Yogendra, Deliang Fan, Kaushik Roy 0001	Prospects of efficient neural computing with arrays of magneto-metallic neurons and synapses.	ASP-DAC	2016	DBLP DOI BibTeX RDF
1	Tiansong Cui, Shuang Chen 0001, Yanzhi Wang, Qi Zhu 0002, Shahin Nazarian, Massoud Pedram	Optimal co-scheduling of HVAC control and battery management for energy-efficient buildings considering state-of-health degradation.	ASP-DAC	2016	DBLP DOI BibTeX RDF
1	Tao Luo 0014, Wei Zhang 0012, Bingsheng He, Douglas L. Maskell	A racetrack memory based in-memory booth multiplier for cryptography application.	ASP-DAC	2016	DBLP DOI BibTeX RDF
1	Kiichi Niitsu, Atsuki Kobayashi, Yudai Ogawa, Matsuhiko Nishizawa, Kazuo Nakazato	Design of an energy-autonomous, disposable, supply-sensing biosensor using bio fuel cell and 0.23-V 0.25-µm zero-Vth all-digital CMOS supply-controlled ring oscillator with inductive transmitter.	ASP-DAC	2016	DBLP DOI BibTeX RDF
1	Jingyang Zhu, Zhiliang Qian, Chi-Ying Tsui	LRADNN: High-throughput and energy-efficient Deep Neural Network accelerator using Low Rank Approximation.	ASP-DAC	2016	DBLP DOI BibTeX RDF
1	Yuan Xue, Patrick Cronin, Chengmo Yang, Jingtong Hu	Routing path reuse maximization for efficient NV-FPGA reconfiguration.	ASP-DAC	2016	DBLP DOI BibTeX RDF
1	Inhak Han, Daijoon Hyun, Youngsoo Shin	Buffer insertion to remove hold violations at multiple process corners.	ASP-DAC	2016	DBLP DOI BibTeX RDF
1	Jason Cong, Hui Huang 0001, Mohammad Ali Ghodrat	A scalable communication-aware compilation flow for programmable accelerators.	ASP-DAC	2016	DBLP DOI BibTeX RDF
1	Qing Lu, Chiu-Wing Sham, Francis C. M. Lau 0002	Rapid prototyping of multi-mode QC-LDPC decoder for 802.11n/ac standard.	ASP-DAC	2016	DBLP DOI BibTeX RDF
1	Hoda Pahlevanzadeh, Jaya Dofe, Qiaoyan Yu	Assessing CPA resistance of AES with different fault tolerance mechanisms.	ASP-DAC	2016	DBLP DOI BibTeX RDF
1	Rickard Ewetz, Cheng-Kok Koh	MCMM clock tree optimization based on slack redistribution using a reduced slack graph.	ASP-DAC	2016	DBLP DOI BibTeX RDF
1	Lei Jiang 0001, Wujie Wen, Danghui Wang, Lide Duan	Improving read performance of STT-MRAM based main memories through Smash Read and Flexible Read.	ASP-DAC	2016	DBLP DOI BibTeX RDF
1	Tao Liu, Hui Guo 0001, Sri Parameswaran, Xiaobo Sharon Hu	Improving tag generation for memory data authentication in embedded processor systems.	ASP-DAC	2016	DBLP DOI BibTeX RDF
1	Tatsuya Kamakari, Jun Shiomi, Tohru Ishihara, Hidetoshi Onodera	A closed-form stability model for cross-coupled inverters operating in sub-threshold voltage region.	ASP-DAC	2016	DBLP DOI BibTeX RDF
1	Zigang Xiao, Chun-Xun Lin, Martin D. F. Wong, Hongbo Zhang 0001	Contact layer decomposition to enable DSA with multi-patterning technique for standard cell based layout.	ASP-DAC	2016	DBLP DOI BibTeX RDF
1	Chenjie Yang, Fan Yang 0001, Xuan Zeng 0001, Dian Zhou	An efficient trajectory-based algorithm for model order reduction of nonlinear systems via localized projection and global interpolation.	ASP-DAC	2016	DBLP DOI BibTeX RDF
1	Seong-I Lei, Wai-Kei Mak, Chris Chu	Minimum implant area-aware placement and threshold voltage refinement.	ASP-DAC	2016	DBLP DOI BibTeX RDF
1	Paolo Mantovani, Giuseppe Di Guglielmo, Luca P. Carloni	High-level synthesis of accelerators in embedded scalable platforms.	ASP-DAC	2016	DBLP DOI BibTeX RDF
1	Yuan Gao 0002, Lisong Li, Philip K. T. Mok	An AC powered converter-free LED driver with low flicker.	ASP-DAC	2016	DBLP DOI BibTeX RDF
1	Sebastian Steinhorst, Zili Shao, Samarjit Chakraborty, Matthias Kauer, Shuai Li 0002, Martin Lukasiewycz, Swaminathan Narayanaswamy, Muhammad Usman Rafique, Qixin Wang	Distributed reconfigurable Battery System Management Architectures.	ASP-DAC	2016	DBLP DOI BibTeX RDF
1	Chen Liu 0013, Patrick Cronin, Chengmo Yang	A mutual auditing framework to protect IoT against hardware Trojans.	ASP-DAC	2016	DBLP DOI BibTeX RDF
1	Shuo Wang 0009, Yun Liang 0001, Chao Zhang 0007, Xiaolong Xie, Guangyu Sun 0003, Yongpan Liu, Yu Wang 0002, Xiuhong Li	Performance-centric register file design for GPUs using racetrack memory.	ASP-DAC	2016	DBLP DOI BibTeX RDF
1	Qin Wang 0005, Yizhong Ru, Hailong Yao, Tsung-Yi Ho, Yici Cai	Sequence-pair-based placement and routing for flow-based microfluidic biochips.	ASP-DAC	2016	DBLP DOI BibTeX RDF
1	Kyounghoon Kim, Jongeun Lee, Kiyoung Choi	An energy-efficient random number generator for stochastic circuits.	ASP-DAC	2016	DBLP DOI BibTeX RDF
1	Xiong Pan, Wei Jiang 0016, Ke Jiang, Liang Wen, Qi Dong	Energy optimization of stochastic applications with statistical guarantees of deadline and reliability.	ASP-DAC	2016	DBLP DOI BibTeX RDF
1	Yu-Guang Chen, Wan-Yu Wen, Yun-Ting Wang, You-Luen Lee, Shih-Chieh Chang	A novel low-cost dynamic logic reconfigurable structure strategy for low power optimization.	ASP-DAC	2016	DBLP DOI BibTeX RDF
1	Junlong Zhou, Xiaobo Sharon Hu, Yue Ma 0001, Tongquan Wei	Balancing lifetime and soft-error reliability to improve system availability.	ASP-DAC	2016	DBLP DOI BibTeX RDF
1	Seongbo Shim, Youngsoo Shin	Mask optimization for directed self-assembly lithography: Inverse DSA and inverse lithography.	ASP-DAC	2016	DBLP DOI BibTeX RDF
1	Leibin Ni, Yuhao Wang 0002, Hao Yu 0001, Wei Yang, Chuliang Weng, Junfeng Zhao 0003	An energy-efficient matrix multiplication accelerator by distributed in-memory computing on binary RRAM crossbar.	ASP-DAC	2016	DBLP DOI BibTeX RDF
1	Juan Yi, Qian Zhang 0020, Ye Tian 0010, Ting Wang 0008, Weichen Liu, Edwin Hsing-Mean Sha, Qiang Xu 0001	ApproxMap: On task allocation and scheduling for resilient applications.	ASP-DAC	2016	DBLP DOI BibTeX RDF
1	Dimitar Nikolov, Erik Larsson	Maximizing level of confidence for non-equidistant Checkpointing.	ASP-DAC	2016	DBLP DOI BibTeX RDF
1	Yung-Chih Chen, Runyi Wang, Yan-Ping Chang	Fast synthesis of threshold logic networks with optimization.	ASP-DAC	2016	DBLP DOI BibTeX RDF
1	Ke Jiang, Petru Eles, Zebo Peng, Sudipta Chattopadhyay 0001, Lejla Batina	SPARTA: A scheduling policy for thwarting differential power analysis attacks.	ASP-DAC	2016	DBLP DOI BibTeX RDF
1	Dustin Peterson, Oliver Bringmann 0001	SMoSi: A framework for the derivation of sleep mode traces from RTL simulations.	ASP-DAC	2016	DBLP DOI BibTeX RDF
1	Siarhei S. Zalivaka, Alexander V. Puchkov, Vladimir P. Klybik, Alexander A. Ivaniuk, Chip-Hong Chang	Multi-valued Arbiters for quality enhancement of PUF responses on FPGA implementation.	ASP-DAC	2016	DBLP DOI BibTeX RDF
1	Travis Meade, Shaojie Zhang, Yier Jin	Netlist reverse engineering for high-level functionality reconstruction.	ASP-DAC	2016	DBLP DOI BibTeX RDF
1	Roberto Vargas, Sara Royuela, Maria A. Serrano, Xavier Martorell, Eduardo Quiñones	A lightweight OpenMP4 run-time for embedded systems.	ASP-DAC	2016	DBLP DOI BibTeX RDF
1	Hongbin Zhang, Chao Zhang 0007, Xian Zhang 0001, Guangyu Sun 0003, Jiwu Shu	Pin Tumbler Lock: A shift based encryption mechanism for racetrack memory.	ASP-DAC	2016	DBLP DOI BibTeX RDF
1	Shang-Yi Li, Pei-Yuan Chou, Jinn-Shyan Wang	Design of an all-digital temperature sensor in 28 nm CMOS using temperature-sensitive delay cells and adaptive-1P calibration for error reduction.	ASP-DAC	2016	DBLP DOI BibTeX RDF
1	Bingjun Xiao, Jinjun Xiong, Yiyu Shi 0001	Novel applications of deep learning hidden features for adaptive testing.	ASP-DAC	2016	DBLP DOI BibTeX RDF
1	Mohammad Motamedi, Philipp Gysel, Venkatesh Akella, Soheil Ghiasi	Design space exploration of FPGA-based Deep Convolutional Neural Networks.	ASP-DAC	2016	DBLP DOI BibTeX RDF
1	Shih-Chun Chou, Yuan-Hao Chang 0001, Yuan-Hung Kuan, Po-Chun Huang, Che-Wei Tsao	Multi-version checkpointing for flash file systems.	ASP-DAC	2016	DBLP DOI BibTeX RDF
1	Nitin Rathi, Swaroop Ghosh, Anirudh Iyengar, Helia Naeimi	Data privacy in non-volatile cache: Challenges, attack models and solutions.	ASP-DAC	2016	DBLP DOI BibTeX RDF
1	Qiang Zhu 0005, Masato Tatsuoka	High quality IP design using high-level synthesis design flow.	ASP-DAC	2016	DBLP DOI BibTeX RDF
1	Yu-Min Chou, Yung-Chih Chen, Chun-Yao Wang, Ching-Yi Huang	MajorSat: A SAT solver to majority logic.	ASP-DAC	2016	DBLP DOI BibTeX RDF
1	M. Hassan Najafi, David J. Lilja, Marc D. Riedel, Kia Bazargan	Polysynchronous stochastic circuits.	ASP-DAC	2016	DBLP DOI BibTeX RDF
1	Li-Chung Hsu, Junichiro Kadomoto, So Hasegawa, Atsutake Kosuge, Yasuhiro Take, Tadahiro Kuroda	Analytical thruchip inductive coupling channel design optimization.	ASP-DAC	2016	DBLP DOI BibTeX RDF
1	Joonki Hong, Sangjun Park, Naehyuck Chang	Accurate remaining range estimation for Electric vehicles.	ASP-DAC	2016	DBLP DOI BibTeX RDF
1	Ahmed Nassar 0001, Fadi J. Kurdahi	Lattice-based Boolean diagrams.	ASP-DAC	2016	DBLP DOI BibTeX RDF
1	Robert Wille, Oliver Keszöcze, Marcel Walter, Patrick Rohrs, Anupam Chattopadhyay, Rolf Drechsler	Look-ahead schemes for nearest neighbor optimization of 1D and 2D quantum circuits.	ASP-DAC	2016	DBLP DOI BibTeX RDF
1	Wei-Lin Wang, Yuan-Hao Chang 0001, Po-Chun Huang, Chia-Heng Tu, Hsin-Wen Wei, Wei-Kuan Shih	Relay-based key management to support secure deletion for resource-constrained flash-memory storage devices.	ASP-DAC	2016	DBLP DOI BibTeX RDF
1	Donkyu Baek, Joonki Hong, Naehyuck Chang	Minimum-energy driving speed profiles for low-speed electric vehicles.	ASP-DAC	2016	DBLP DOI BibTeX RDF
1	Jian Kuang 0001, Junjie Ye, Evangeline F. Y. Young	Simultaneous template optimization and mask assignment for DSA with multiple patterning.	ASP-DAC	2016	DBLP DOI BibTeX RDF

Publications at "ASP-DAC"( http://dblp.L3S.de/Venues/ASP-DAC )