Search results for "ISMVL"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
1		Message from the Symposium Chairs.	ISMVL	2005	DBLP DOI BibTeX RDF
1	Jacqueline E. Rice, Jon C. Muzio	A Characterization of Antisymmetry in Boolean and Multi-Valued Functions.	ISMVL	2005	DBLP DOI BibTeX RDF
1	Stefano Aguzzoli, Brunella Gerla	Normal Forms for the One-Variable Fragment of Hájek's Basic Logic.	ISMVL	2005	DBLP DOI BibTeX RDF
1	Chris Winstead	Analog Soft Decoding for Multi-Level Memories.	ISMVL	2005	DBLP DOI BibTeX RDF
1	Jovanka Pantovic, Gradimir Vojvodic	On the Partial Hyperclone Lattice.	ISMVL	2005	DBLP DOI BibTeX RDF
1	Masahiro Miyakawa, Ivo G. Rosenberg, Hisayuki Tatsumi	Semirigid Equivalence Relations - A New Proof Method.	ISMVL	2005	DBLP DOI BibTeX RDF
1		List of Reviewers.	ISMVL	2005	DBLP DOI BibTeX RDF
1	Marek A. Perkowski, Tsutomu Sasao, Jong-Hwan Kim, Martin Lukac, Jeff Allen, Stefan Gebauer	Hahoe KAIST Robot Theatre: Learning Rules of Interactive Robot Behavior as a Multiple-Valued Logic Synthesis Problem.	ISMVL	2005	DBLP DOI BibTeX RDF
1	Henning Gundersen, Renè Jensen, Yngvar Berg	A Novel Ternary Switching Element Using CMOS Recharge Semi Floating-Gate Devices.	ISMVL	2005	DBLP DOI BibTeX RDF
1	Barry C. Sanders	Classical vs Quantum Fingerprinting.	ISMVL	2005	DBLP DOI BibTeX RDF
1	Daniel H.-Y. Teng, Ronald J. Bolton	Estimation of Average Multiple-Valued Logic Circuit Size Using Monte Carlo Simulation Technique.	ISMVL	2005	DBLP DOI BibTeX RDF
1	Yukihiro Iguchi, Tsutomu Sasao	Hardware to Compute Walsh Coefficients.	ISMVL	2005	DBLP DOI BibTeX RDF
1	Marina Alexandra Lyshevski	Multi-Valued DNA-Based Electronic Nanodevices.	ISMVL	2005	DBLP DOI BibTeX RDF
1	Claudio Moraga, Rodrigo Salas 0001	A New Aspect for the Optimization of Fuzzy If-Then Rules.	ISMVL	2005	DBLP DOI BibTeX RDF
1	Zoran Majkic	Many-Valued Intuitionistic Implication and Inference Closure in a Bilattice-Based Logic.	ISMVL	2005	DBLP DOI BibTeX RDF
1	Bogdan J. Falkowski, Cheng Fu	Classes of Fastest Quaternary Linearly Independent Transformations.	ISMVL	2005	DBLP DOI BibTeX RDF
1	Radomir S. Stankovic, Claudio Moraga, Jaakko Astola	Remarks on the Structure of Matrix-Valued Spectral Transforms on Finite Non-Abelian Groups.	ISMVL	2005	DBLP DOI BibTeX RDF
1	Sergey Edward Lyshevski	Three Dimensional Multi-Valued Design in Nanoscale Integrated Circuits.	ISMVL	2005	DBLP DOI BibTeX RDF
1	Yngvar Berg, Snorre Aunet, Øivind Næss, Omid Mirmotahari	Basic Multiple-Valued Functions Using Recharge CMOS Logic.	ISMVL	2004	DBLP DOI BibTeX RDF
1		34th IEEE International Symposium on Multiple-Valued Logic (ISMVL 2004), 19-22 May 2004, Toronto, Canada	ISMVL	2004	DBLP BibTeX RDF
1	Yukihiro Iguchi, Tsutomu Sasao, Munehiro Matsuura	A Method to Evaluate Logic Functions in the Presence of Unknown Inputs Using LUT Cascades.	ISMVL	2004	DBLP DOI BibTeX RDF
1	Soo Jin Park, Byoung Hee Yoon, Kwang Sub Yoon, Heung Soo Kim	Design of Quaternary Logic Gate Using Double Pass-Transistor Logic with Neuron MOS Down Literal Circuit.	ISMVL	2004	DBLP DOI BibTeX RDF
1	Shinobu Nagayama, Tsutomu Sasao	On the Minimization of Average Path Lengths for Heterogeneous MDDs.	ISMVL	2004	DBLP DOI BibTeX RDF
1	Viorica Sofronie-Stokkermans	Resolution-Based Decision Procedures for the Positive Theory of Some Finitely Generated Varieties of Algebras.	ISMVL	2004	DBLP DOI BibTeX RDF
1	Svetlana N. Yanushkevich, Vlad P. Shmerko, L. Guy, D. C. Lu	Three Dimensional Multiple Valued Circuits Design Based on Single-Electron Logic.	ISMVL	2004	DBLP DOI BibTeX RDF
1	Hideki Fukuda	Signed Digit CMOS (SD-CMOS) Logic Circuits with Static Operation.	ISMVL	2004	DBLP DOI BibTeX RDF
1	Hajime Machida, Ivo G. Rosenberg	Monoids whose Centralizer is the Least Clone.	ISMVL	2004	DBLP DOI BibTeX RDF	Clone, centralizer, monoid
1	Mozammel H. A. Khan, Marek A. Perkowski, Mujibur R. Khan	Ternary Galois Field Expansions for Reversible Logic and Kronecker Decision Diagrams for Ternary GFSOP Minimization.	ISMVL	2004	DBLP DOI BibTeX RDF
1	Sergiu Rudeanu, Dan A. Simovici	A Graph-Theoretical Approach to Boolean Interpolation of Non-Boolean Functions.	ISMVL	2004	DBLP DOI BibTeX RDF
1	Jovanka Pantovic, Gradimir Vojvodic	Minimal Partial Hyperclones on a Two-Element Set.	ISMVL	2004	DBLP DOI BibTeX RDF
1	Hafiz Md. Hasan Babu, Moinul Islam Zaber, Md. Rafiqul Islam 0001, Md. Mazder Rahman	On the Minimization of Multiple-Valued Input Binary-Valued Output Functions.	ISMVL	2004	DBLP DOI BibTeX RDF	Multiple-Valued Input Two-Valued Output Functions, Sum-of-Products (SOPs), Logic Minimization, Prime Implicant
1	Mostafa I. H. Abd-El-Barr, Louai Al-Awami	Iterative-Based Minimization of Unary 4-Valued Functions for Current-Mode CMOS Realization.	ISMVL	2004	DBLP DOI BibTeX RDF
1	Carlos Ansótegui, Ramón Béjar, Alba Cabiscol, Felip Manyà	The Interface between P and NP in Signed CNF Formulas.	ISMVL	2004	DBLP DOI BibTeX RDF
1	K. J. Adams, J. McGregor	On the Optimisation of Reed-Muller Expressions.	ISMVL	2004	DBLP DOI BibTeX RDF
1	Michiro Kondo	Characterization Theorem of Lattice Implication Algebra.	ISMVL	2004	DBLP DOI BibTeX RDF
1	Grant Pogosyan, Ivo G. Rosenberg	Algebraic Properties of Totally Irreducible Elements of Clone Lattices.	ISMVL	2004	DBLP DOI BibTeX RDF
1	Radomir S. Stankovic, Claudio Moraga, Jaakko Astola	Derivatives for Multiple-Valued Functions Induced by Galois Field and Reed-Muller-Fourier Expressions.	ISMVL	2004	DBLP DOI BibTeX RDF
1	Arnon Avron, Iddo Lev	Non-Deterministic Matrices.	ISMVL	2004	DBLP DOI BibTeX RDF
1	Omid Mirmotahari, Yngvar Berg	A Systolic Parallel Multiplier over GF(3m) Using Neuron-MOS DLC.	ISMVL	2004	DBLP DOI BibTeX RDF
1	Anas N. Al-Rabadi	Reversible Fast Permutation Transforms for Quantum Circuit Synthesi.	ISMVL	2004	DBLP DOI BibTeX RDF
1	Bogdan J. Falkowski, Cicilia C. Lozano, Susanto Rahardja	Spectra Generation for Fixed-Polarity Reed-Muller Transform over GF(5).	ISMVL	2004	DBLP DOI BibTeX RDF
1	Denis V. Popel, Elena I. Popel	Controlling Uncertainty in Discretization of Continuous Data.	ISMVL	2004	DBLP DOI BibTeX RDF	continuous data, knowledge representation, information theory, discretization, multiple-valued logic, decision diagrams
1	Akira Mochizuki, Takashi Takeuchi, Takahiro Hanyu	Intra-Chip Address-Presetting Data-Transfer Scheme Using Four-Valued Encoding.	ISMVL	2004	DBLP DOI BibTeX RDF
1	Lucien Haddad, Dietlinde Lau	On Partial Clones containing Maximal Clones.	ISMVL	2004	DBLP DOI BibTeX RDF
1	Boris A. Romov	Some Properties of Local Partial Clones on an Infinite Set.	ISMVL	2004	DBLP DOI BibTeX RDF
1	D. Michael Miller, Gerhard W. Dueck, Dmitri Maslov	A Synthesis Method for MVL Reversible Logi.	ISMVL	2004	DBLP DOI BibTeX RDF
1	Katsuhiko Degawa, Takafumi Aoki, Tatsuo Higuchi 0001, Hiroshi Inokawa, Yasuo Takahashi	A Single-Electron-Transistor Logic Gate Family and Its Application - Part I: Basic Components for Binary, Multiple-Valued and Mixed-Mode Logic.	ISMVL	2004	DBLP DOI BibTeX RDF
1	Gilles Brassard	Quantum Communication Complexity: A Survey.	ISMVL	2004	DBLP DOI BibTeX RDF
1	Jonathan Rose	Hard vs. Soft: The Central Question of Pre-Fabricated Silicon.	ISMVL	2004	DBLP DOI BibTeX RDF
1	Radomir S. Stankovic, Jaakko Astola	Edge-Valued Decision Diagrams for Multiple-Valued Functions.	ISMVL	2004	DBLP DOI BibTeX RDF
1	Yuki Tsuji, Takao Waho	Multiple-Input Resonant-Tunneling Logic Gates for Flash A/D Converter Applications.	ISMVL	2004	DBLP DOI BibTeX RDF
1	Görschwin Fey, Rolf Drechsler, Maciej J. Ciesielski	Algorithms for Taylor Expansion Diagrams.	ISMVL	2004	DBLP DOI BibTeX RDF
1	Stefano Aguzzoli	Uniform Description of Calculi for All t-Norm Logics.	ISMVL	2004	DBLP DOI BibTeX RDF
1	Bogdan J. Falkowski, Cicilia C. Lozano, Susanto Rahardja	Fast Optimization of Fixed-Polarity Reed-Muller Expansions over GF(5).	ISMVL	2004	DBLP DOI BibTeX RDF
1	Claudio Moraga	A Metasemantics to Refine Fuzzy If-Then Rules.	ISMVL	2004	DBLP DOI BibTeX RDF
1	Mayuka F. Kawaguchi, Masaaki Miyakoshi	Weakly Associative Functions on [0, 1] as Logical Connectives.	ISMVL	2004	DBLP DOI BibTeX RDF
1	Dragan Jankovic, Radomir S. Stankovic, Rolf Drechsler	Reduction of Sizes of Multi-Valued Decision Diagrams by Copy Propertie.	ISMVL	2004	DBLP DOI BibTeX RDF
1	Anas Al-Rabadi	Quantum Circuit Synthesis Using Classes of GF(3) Reversible Fast Spectral Transforms.	ISMVL	2004	DBLP DOI BibTeX RDF
1	Dan Mihai	Optimizing the Defuzzifier Timing for the Fuzzy Control of a Servodrive.	ISMVL	2004	DBLP DOI BibTeX RDF
1	Tomohiro Takahashi, Takahiro Hanyu	Multiple-Valued Multiple-Rail Encoding Scheme for Low-Power Asynchronous Communication.	ISMVL	2004	DBLP DOI BibTeX RDF
1	Omid Mirmotahari, Yngvar Berg	A Novel D-Latch in Multiple-Valued Semi-Floating-Gate Recharged Logic.	ISMVL	2004	DBLP DOI BibTeX RDF
1	Arijit Raychowdhury, Kaushik Roy 0001	A Novel Multiple-Valued Logic Design Using Ballistic Carbon Nanotube FETs.	ISMVL	2004	DBLP DOI BibTeX RDF
1	Daniel H.-Y. Teng, Ronald J. Bolton	A Self-Restored Current-Mode CMOS Multiple-Valued Logic Design Technique and its Applications.	ISMVL	2004	DBLP DOI BibTeX RDF
1	Haque Mohammad Munirul, Michitaka Kameyama	Multiple-Valued Source-Coupled Logic VLSI Based on Adaptive Threshold Control and Its Applications.	ISMVL	2004	DBLP DOI BibTeX RDF
1	Dietmar Schweigert	Polynomial Functions on a Central Relation.	ISMVL	2004	DBLP DOI BibTeX RDF
1	Haque Mohammad Munirul, Michitaka Kameyama	Ultra-Fine-Grain Field-Programmable VLSI Using Multiple-Valued Source-Coupled Logic.	ISMVL	2004	DBLP DOI BibTeX RDF
1	Alioune Ngom, Dan A. Simovici, Ivan Stojmenovic	Evolutionary Strategy for Learning Multiple-Valued Logic Functions.	ISMVL	2004	DBLP DOI BibTeX RDF	Multiple-threshold perceptron, Neural network, Evolution strategy, Multiple-valued logic, Constructive algorithm, Partitioning method
1	Pawel Kerntopf, Marek A. Perkowski, Mozammel H. A. Khan	On Universality of General Reversible Multiple-Valued Logic Gates.	ISMVL	2004	DBLP DOI BibTeX RDF
1	Hiroshi Inokawa, Yasuo Takahashi, Katsuhiko Degawa, Takafumi Aoki, Tatsuo Higuchi 0001	A Single-Electron-Transistor Logic Gate Family and Its Application - Part II: Design and Simulation of a 7-3 Parallel Counter with Linear Summation and Multiple-Valued Latch Functions.	ISMVL	2004	DBLP DOI BibTeX RDF
1	Hiromitsu Kimura, Kostas Pagiamtzis, Ali Sheikholeslami, Takahiro Hanyu	A Study of Multiple-Valued Magnetoresistive RAM (MRAM) Using Binary MTJ Devices.	ISMVL	2004	DBLP DOI BibTeX RDF
1	Brunella Gerla	Automata over MV-Algebra.	ISMVL	2004	DBLP DOI BibTeX RDF
1	Charles G. Morgan	Many Valued Probability Theory.	ISMVL	2004	DBLP DOI BibTeX RDF
1	Elena Dubrova	A Polynomial Time Algorithm for Non-Disjoint Decomposition of Multiple-Valued Functions.	ISMVL	2004	DBLP DOI BibTeX RDF
1	Kazuya Ishida, Naofumi Homma, Takafumi Aoki, Tatsuo Higuchi 0001	Design and Verification of Parallel Multipliers Using Arithmetic Description Language: ARITH.	ISMVL	2004	DBLP DOI BibTeX RDF
1	Anas Al-Rabadi	Iterative Symmetry Indices Decomposition for Ternary Logic Synthesis in Three-Dimensional Space.	ISMVL	2003	DBLP DOI BibTeX RDF
1	Claudio Moraga, Chongfu Huang	Learning subjective probabilities from a small data set.	ISMVL	2003	DBLP DOI BibTeX RDF	subjective probabilities, Information diffusion, sparse data
1	Matthias Baaz, Norbert Preining, Richard Zach	Characterization of the Axiomatizable Prenex Fragments of First-Order Gödel Logics.	ISMVL	2003	DBLP DOI BibTeX RDF
1	Takahiro Hanyu, Tomohiro Takahashi, Michitaka Kameyama	Bidirectional Data Transfer Based Asynchronous VLSI System Using Multiple-Valued Current Mode Logic.	ISMVL	2003	DBLP DOI BibTeX RDF
1	René Krenz, Elena Dubrova, Andreas Kuehlmann	Fast Algorithm for Computing Spectral Transforms of Boolean and Multiple-Valued Functions on Circuit Representation.	ISMVL	2003	DBLP DOI BibTeX RDF
1	Ki-Whan Song, Sang-Hoon Lee, Dae Hwan Kim, Kyung Rok Kim, Jaewoo Kyung, Gwanghyeon Baek, Chun-An Lee, Jong Duk Lee, Byung-Gook Park	Complementary Self-Biased Scheme for the Robust Design of CMOS/SET Hybrid Multi-Valued Logic.	ISMVL	2003	DBLP DOI BibTeX RDF
1	Hiroshi Inokawa, Yasuo Takahashi	Experimental and Simulation Studies of Single-Electron-Transistor-Based Multiple-Valued Logic.	ISMVL	2003	DBLP DOI BibTeX RDF
1	Lucien Haddad, G. E. Simons	On Intervals of Partial Clones of Boolean Partial Functions.	ISMVL	2003	DBLP DOI BibTeX RDF
1	Dan A. Simovici	Several Remarks on Non-Boolean Functions over Boolean Algebras.	ISMVL	2003	DBLP DOI BibTeX RDF
1	Yoshinori Yamamoto	An extension of ternary majority function and its application to evolvable system.	ISMVL	2003	DBLP DOI BibTeX RDF
1	D. Michael Miller, Gerhard W. Dueck	On the Size of Multiple-Valued Decision Diagrams.	ISMVL	2003	DBLP DOI BibTeX RDF
1	Tetsuya Uemura, Masafumi Yamamoto	Proposal of Four-Valued MRAM based on MTJ/RTD Structure.	ISMVL	2003	DBLP DOI BibTeX RDF
1	Omid Mirmotahari, Yngvar Berg	A Novel Multiple-Input Multiple-Valued Semi-Floating-Gate LATC.	ISMVL	2003	DBLP DOI BibTeX RDF
1	Denis V. Popel, Rolf Drechsler	Efficient Minimization of Multiple-valued Decision Diagrams for Incompletely Specified Functions.	ISMVL	2003	DBLP DOI BibTeX RDF
1	Andrei A. Krokhin, Andrei A. Bulatov, Peter Jeavons 0001	Functions of multiple-valued logic and the complexity of constraint satisfaction: A short survey.	ISMVL	2003	DBLP DOI BibTeX RDF
1	Grant Pogosyan, Ivo G. Rosenberg	Generation of the Post Lattice by Irreducible Clones.	ISMVL	2003	DBLP DOI BibTeX RDF
1	E. Kinvi-Boh, M. Aline, Olivier Sentieys, Edgar "Dan" Olson	MVL circuit design and characterization at the transistor level using SUS-LOC.	ISMVL	2003	DBLP DOI BibTeX RDF
1	Hajime Machida, Ivo G. Rosenberg	On the Centralizers of Monoids in Clone Theory.	ISMVL	2003	DBLP DOI BibTeX RDF	Clone, centralizer, monoid
1	Daniel Große, Görschwin Fey, Rolf Drechsler	Modeling Multi-Valued Circuits in SystemC.	ISMVL	2003	DBLP DOI BibTeX RDF
1	Vilém Novák	Towards Fuzzy Type Theory.	ISMVL	2003	DBLP DOI BibTeX RDF
1	Jong-Hak Hwang, Kyung-Jae Moon, Seung-Yong Park, Heung-Soo Kim	A New Construction of the Irreducible Polynomial for parallel multiplier over GF(2m).	ISMVL	2003	DBLP DOI BibTeX RDF	Systolic Multiplier, IPG, Trinomial, Finite Field
1	Shoulie Xie, Susanto Rahardja, Zhenghui Gu	Relationship between UCHT and FFT.	ISMVL	2003	DBLP DOI BibTeX RDF
1	Chol-U Lee, Gi-Young Byun, Bu-Sik Shin, Jae-Hwan Sim, Heung-Soo Kim	The Generation Circulation Method to Generalized Reed-Muller Coefficients over GF(3).	ISMVL	2003	DBLP DOI BibTeX RDF
1	Katsuhiko Degawa, Takafumi Aoki, Tatsuo Higuchi 0001	A Field-Programmable Digital Filter Chip Using Multiple-Valued Current-Mode Logic.	ISMVL	2003	DBLP DOI BibTeX RDF
1	Rusins Freivalds, Masahiro Miyakawa, Ivo G. Rosenberg	Complexity of Decision Trees for Boolean Functions.	ISMVL	2003	DBLP DOI BibTeX RDF	deterministic and nondeter-ministic decision tree, complexity, Boolean function
1	Shinobu Nagayama, Tsutomu Sasao	Compact Representations of Logic Functions using Heterogeneous MDDs.	ISMVL	2003	DBLP DOI BibTeX RDF

Publications at "ISMVL"( http://dblp.L3S.de/Venues/ISMVL )