Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
40 | Noemie Beringuier-Boher, David Hély, Vincent Beroulle, Joel Damiens, Philippe Candelier |
Increasing the security level of analog IPs by using a dedicated vulnerability analysis methodology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: International Symposium on Quality Electronic Design, ISQED 2013, Santa Clara, CA, USA, March 4-6, 2013, pp. 531-537, 2013, IEEE, 978-1-4673-4951-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
40 | Conor O'Sullivan, Peter M. Levine, Siddharth Garg |
Vertically-addressed test structures (VATS) for 3D IC variability and stress measurements. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: International Symposium on Quality Electronic Design, ISQED 2013, Santa Clara, CA, USA, March 4-6, 2013, pp. 96-103, 2013, IEEE, 978-1-4673-4951-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
40 | Jordan Bisasky, Houman Homayoun, Farhang Yazdani, Tinoosh Mohsenin |
A 64-core platform for biomedical signal processing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: International Symposium on Quality Electronic Design, ISQED 2013, Santa Clara, CA, USA, March 4-6, 2013, pp. 368-372, 2013, IEEE, 978-1-4673-4951-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
40 | Matthew Cotter, Huichu Liu, Suman Datta, Vijaykrishnan Narayanan |
Evaluation of tunnel FET-based flip-flop designs for low power, high performance applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: International Symposium on Quality Electronic Design, ISQED 2013, Santa Clara, CA, USA, March 4-6, 2013, pp. 430-437, 2013, IEEE, 978-1-4673-4951-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
40 | Richard Lee, Karim Abdel-Khalek, Samar Abdi, Frederic Risacher |
Early system level modeling of real-time applications on embedded platforms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: International Symposium on Quality Electronic Design, ISQED 2013, Santa Clara, CA, USA, March 4-6, 2013, pp. 558-565, 2013, IEEE, 978-1-4673-4951-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
40 | Nozad Karim |
New electrical design verification approach for 2.5D/3D package signal and power integrity. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: International Symposium on Quality Electronic Design, ISQED 2013, Santa Clara, CA, USA, March 4-6, 2013, pp. 30, 2013, IEEE, 978-1-4673-4951-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
40 | Bahram N. Uchevler, Kjetil Svarstad, Jan Kuper, Christiaan Baaij |
System-level modelling of dynamic reconfigurable designs using functional programming abstractions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: International Symposium on Quality Electronic Design, ISQED 2013, Santa Clara, CA, USA, March 4-6, 2013, pp. 379-385, 2013, IEEE, 978-1-4673-4951-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
40 | Tsang-Chi Kan, Hung-Ming Hong, Ying-Jung Chen, Shanq-Jang Ruan |
Configurable redundant via-aware standard cell design considering multi-via mechanism. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: International Symposium on Quality Electronic Design, ISQED 2013, Santa Clara, CA, USA, March 4-6, 2013, pp. 322-326, 2013, IEEE, 978-1-4673-4951-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
40 | Kentaro Kawakami, Takeshi Shiro, Hironobu Yamasaki, Katsuhiro Yoda, Hiroaki Fujimoto, Kenichi Kawasaki, Yasuhiro Watanabe |
Peak power reduction of a sensor network processor fabricated with Deeply Depleted Channel transistors in 65nm technology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: International Symposium on Quality Electronic Design, ISQED 2013, Santa Clara, CA, USA, March 4-6, 2013, pp. 422-429, 2013, IEEE, 978-1-4673-4951-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
40 | Sadiq M. Sait, Abdalrahman M. Arafeh |
Tabu search based cells placement in nanofabric architectures with restricted connectivity. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: International Symposium on Quality Electronic Design, ISQED 2013, Santa Clara, CA, USA, March 4-6, 2013, pp. 487-493, 2013, IEEE, 978-1-4673-4951-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
40 | Sandeep Koranne |
Analysis of very large resistive networks using low distortion embedding. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: International Symposium on Quality Electronic Design, ISQED 2013, Santa Clara, CA, USA, March 4-6, 2013, pp. 508-515, 2013, IEEE, 978-1-4673-4951-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
40 | Felipe S. Marranghello, André Inácio Reis, Renato P. Ribas |
CMOS inverter delay model based on DC transfer curve for slow input. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: International Symposium on Quality Electronic Design, ISQED 2013, Santa Clara, CA, USA, March 4-6, 2013, pp. 651-657, 2013, IEEE, 978-1-4673-4951-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
40 | Errikos Lourandakis, Stefanos Stefanou, Konstantinos Nikellis, Sotiris Bantas |
RF passive device modeling and characterization in 65nm CMOS technology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: International Symposium on Quality Electronic Design, ISQED 2013, Santa Clara, CA, USA, March 4-6, 2013, pp. 658-664, 2013, IEEE, 978-1-4673-4951-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
40 | Hiromitsu Awano, Hiroshi Tsutsui, Hiroyuki Ochi, Takashi Sato |
Multi-trap RTN parameter extraction based on Bayesian inference. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: International Symposium on Quality Electronic Design, ISQED 2013, Santa Clara, CA, USA, March 4-6, 2013, pp. 597-602, 2013, IEEE, 978-1-4673-4951-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
40 | Jingwei Lu, Chiu-Wing Sham |
LMgr: A low-M emory global router with dynamic topology update and bending-aware optimum path search. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: International Symposium on Quality Electronic Design, ISQED 2013, Santa Clara, CA, USA, March 4-6, 2013, pp. 231-238, 2013, IEEE, 978-1-4673-4951-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
40 | Ku He, Andreas Gerstlauer, Michael Orshansky |
Low-energy digital filter design based on controlled timing error acceptance. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: International Symposium on Quality Electronic Design, ISQED 2013, Santa Clara, CA, USA, March 4-6, 2013, pp. 151-157, 2013, IEEE, 978-1-4673-4951-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
40 | Ivan Ratkovic, Oscar Palomar, Milan Stanic, Osman S. Unsal, Adrián Cristal, Mateo Valero |
On the selection of adder unit in energy efficient vector processing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: International Symposium on Quality Electronic Design, ISQED 2013, Santa Clara, CA, USA, March 4-6, 2013, pp. 143-150, 2013, IEEE, 978-1-4673-4951-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
40 | Yen-Han Lee, Ing-Chao Lin, Sheng-Wei Wang |
Impacts of NBTI and PBTI effects on ternary CAM. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: International Symposium on Quality Electronic Design, ISQED 2013, Santa Clara, CA, USA, March 4-6, 2013, pp. 38-45, 2013, IEEE, 978-1-4673-4951-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
40 | Shivam Priyadarshi, Niket K. Choudhary, Brandon H. Dwiel, Ankita Upreti, Eric Rotenberg, William Rhett Davis, Paul D. Franzon |
Hetero2 3D integration: A scheme for optimizing efficiency/cost of Chip Multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: International Symposium on Quality Electronic Design, ISQED 2013, Santa Clara, CA, USA, March 4-6, 2013, pp. 1-7, 2013, IEEE, 978-1-4673-4951-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
40 | Jiaqi Yan, Zuying Luo, Liang Tang |
Accurate architecture-level thermal analysis methods for MPSoC with consideration for leakage power dependence on temperature. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: International Symposium on Quality Electronic Design, ISQED 2013, Santa Clara, CA, USA, March 4-6, 2013, pp. 178-183, 2013, IEEE, 978-1-4673-4951-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
40 | Yanzhi Wang, Maryam Triki, Xue Lin, Ahmed Chiheb Ammari, Massoud Pedram |
Hierarchical dynamic power management using model-free reinforcement learning. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: International Symposium on Quality Electronic Design, ISQED 2013, Santa Clara, CA, USA, March 4-6, 2013, pp. 170-177, 2013, IEEE, 978-1-4673-4951-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
40 | Nishit Ashok Kapadia, Sudeep Pasricha |
VERVE: A framework for variation-aware energy efficient synthesis of NoC-based MPSoCs with voltage islands. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: International Symposium on Quality Electronic Design, ISQED 2013, Santa Clara, CA, USA, March 4-6, 2013, pp. 603-610, 2013, IEEE, 978-1-4673-4951-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
40 | Dheepakkumaran Jayaraman, Spyros Tragoudas |
Performance validation through implicit removal of infeasible paths of the behavioral description. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: International Symposium on Quality Electronic Design, ISQED 2013, Santa Clara, CA, USA, March 4-6, 2013, pp. 552-557, 2013, IEEE, 978-1-4673-4951-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
40 | Rishik Bazaz, Jianyong Xie, Madhavan Swaminathan |
Electrical and thermal analysis for design exchange formats in three dimensional integrated circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: International Symposium on Quality Electronic Design, ISQED 2013, Santa Clara, CA, USA, March 4-6, 2013, pp. 308-315, 2013, IEEE, 978-1-4673-4951-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
40 | Takashi Imagawa, Hiroshi Tsutsui, Hiroyuki Ochi, Takashi Sato |
High-speed DFG-level SEU vulnerability analysis for applying selective TMR to resource-constrained CGRA. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: International Symposium on Quality Electronic Design, ISQED 2013, Santa Clara, CA, USA, March 4-6, 2013, pp. 538-545, 2013, IEEE, 978-1-4673-4951-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
40 | Oghenekarho Okobiah, Saraju P. Mohanty, Elias Kougianos |
Geostatistics inspired fast layout optimization of nanoscale CMOS phase locked loop. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: International Symposium on Quality Electronic Design, ISQED 2013, Santa Clara, CA, USA, March 4-6, 2013, pp. 546-551, 2013, IEEE, 978-1-4673-4951-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
40 | Nishit Ashok Kapadia, Sudeep Pasricha |
A co-synthesis methodology for power delivery and data interconnection networks in 3D ICs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: International Symposium on Quality Electronic Design, ISQED 2013, Santa Clara, CA, USA, March 4-6, 2013, pp. 73-79, 2013, IEEE, 978-1-4673-4951-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
40 | Zhenzhou Sun, Alberto Bosio, Luigi Dilillo, Patrick Girard 0001, Aida Todri, Arnaud Virazel, Etienne Auvray |
Effect-cause intra-cell diagnosis at transistor level. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: International Symposium on Quality Electronic Design, ISQED 2013, Santa Clara, CA, USA, March 4-6, 2013, pp. 460-467, 2013, IEEE, 978-1-4673-4951-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
40 | Vinod Viswanath, Rajeev Muralidhar, Harinarayanan Seshadri, Jacob A. Abraham |
On a rewriting strategy for dynamically managing power constraints and power dissipation in SoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: International Symposium on Quality Electronic Design, ISQED 2013, Santa Clara, CA, USA, March 4-6, 2013, pp. 128-134, 2013, IEEE, 978-1-4673-4951-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
40 | Ting Yu 0007, Martin D. F. Wong |
A novel and efficient method for power pad placement optimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: International Symposium on Quality Electronic Design, ISQED 2013, Santa Clara, CA, USA, March 4-6, 2013, pp. 158-163, 2013, IEEE, 978-1-4673-4951-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
40 | Jai Narayan Tripathi, Raj Kumar Nagpal, Nitin Kumar Chhabra, Rakesh Malik, Jayanta Mukherjee 0001, Prakash R. Apte |
Power Integrity analysis and discrete optimization of decoupling capacitors on high speed power planes by particle swarm optimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: International Symposium on Quality Electronic Design, ISQED 2013, Santa Clara, CA, USA, March 4-6, 2013, pp. 670-675, 2013, IEEE, 978-1-4673-4951-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
40 | Yuko Hara-Azumi, Hiroyuki Tomiyama |
Cost-efficient scheduling in high-level synthesis for Soft-Error Vulnerability Mitigation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: International Symposium on Quality Electronic Design, ISQED 2013, Santa Clara, CA, USA, March 4-6, 2013, pp. 502-507, 2013, IEEE, 978-1-4673-4951-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
40 | Koji Nii, Makoto Yabuuchi, Hidehiro Fujiwara, Yasumasa Tsukamoto, Yuichiro Ishii, Tetsuya Matsumura, Yoshio Matsuda |
A cost-effective 45nm 6T-SRAM reducing 50mV Vmin and 53% standby leakage with multi-Vt asymmetric halo MOS and write assist circuitry. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: International Symposium on Quality Electronic Design, ISQED 2013, Santa Clara, CA, USA, March 4-6, 2013, pp. 438-441, 2013, IEEE, 978-1-4673-4951-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
40 | Shigetaka Kumashiro |
A predictable compact model for non-monotonous Vth-Pelgrom plot of long channel halo-implanted transistors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: International Symposium on Quality Electronic Design, ISQED 2013, Santa Clara, CA, USA, March 4-6, 2013, pp. 391-397, 2013, IEEE, 978-1-4673-4951-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
40 | Baljit Kaur, Sandeep Miryala, S. K. Manhas, Bulusu Anand |
An efficient method for ECSM characterization of CMOS inverter in nanometer range technologies. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: International Symposium on Quality Electronic Design, ISQED 2013, Santa Clara, CA, USA, March 4-6, 2013, pp. 665-669, 2013, IEEE, 978-1-4673-4951-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
40 | Jinwook Jung, Yohei Nakata, Masahiko Yoshimoto, Hiroshi Kawaguchi 0001 |
Energy-efficient Spin-Transfer Torque RAM cache exploiting additional all-zero-data flags. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: International Symposium on Quality Electronic Design, ISQED 2013, Santa Clara, CA, USA, March 4-6, 2013, pp. 216-222, 2013, IEEE, 978-1-4673-4951-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
40 | Soumyajit Chatterjee, Hafizur Rahaman 0001, Tuhina Samanta |
Multi-objective optimization algorithm for efficient pin-constrained droplet routing technique in digital microfluidic biochip. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: International Symposium on Quality Electronic Design, ISQED 2013, Santa Clara, CA, USA, March 4-6, 2013, pp. 252-256, 2013, IEEE, 978-1-4673-4951-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
40 | Jun Yong Shin, Nikil D. Dutt, Fadi J. Kurdahi |
Vision-inspired global routing for enhanced performance and reliability. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: International Symposium on Quality Electronic Design, ISQED 2013, Santa Clara, CA, USA, March 4-6, 2013, pp. 239-244, 2013, IEEE, 978-1-4673-4951-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
40 | Nan Wang 0003, Song Chen 0001, Takeshi Yoshimura |
Min-cut based leakage power aware scheduling in high-level synthesis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: International Symposium on Quality Electronic Design, ISQED 2013, Santa Clara, CA, USA, March 4-6, 2013, pp. 164-169, 2013, IEEE, 978-1-4673-4951-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
40 | Valeriu Beiu, Azam Beg, Walid Ibrahim, Fekri Kharbash, Massimo Alioto |
Enabling sizing for enhancing the static noise margins. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: International Symposium on Quality Electronic Design, ISQED 2013, Santa Clara, CA, USA, March 4-6, 2013, pp. 278-285, 2013, IEEE, 978-1-4673-4951-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
40 | Hanif Fatemi, Peivand Tehrani |
Crosstalk timing windows overlap in statistical static timing analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: International Symposium on Quality Electronic Design, ISQED 2013, Santa Clara, CA, USA, March 4-6, 2013, pp. 245-251, 2013, IEEE, 978-1-4673-4951-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
40 | Rishi Todani, Ashis Kumar Mal |
A power efficient and digitally assisted CMOS complementary telescopic amplifier with wide input common mode range. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: International Symposium on Quality Electronic Design, ISQED 2013, Santa Clara, CA, USA, March 4-6, 2013, pp. 416-421, 2013, IEEE, 978-1-4673-4951-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
40 | Yanzhi Wang, Shuang Chen 0001, Hadi Goudarzi, Massoud Pedram |
Resource allocation and consolidation in a multi-core server cluster using a Markov decision process model. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: International Symposium on Quality Electronic Design, ISQED 2013, Santa Clara, CA, USA, March 4-6, 2013, pp. 635-642, 2013, IEEE, 978-1-4673-4951-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
40 | Gong Chen 0002, Yu Zhang, Bo Yang 0004, Qing Dong 0002, Shigetoshi Nakatake |
A comparator energy model considering shallow trench isolation stress by geometric programming. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: International Symposium on Quality Electronic Design, ISQED 2013, Santa Clara, CA, USA, March 4-6, 2013, pp. 585-590, 2013, IEEE, 978-1-4673-4951-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
40 | Tuck-Boon Chan, Andrew B. Kahng, Jiajia Li 0002 |
Reliability-constrained die stacking order in 3DICs under manufacturing variability. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: International Symposium on Quality Electronic Design, ISQED 2013, Santa Clara, CA, USA, March 4-6, 2013, pp. 16-23, 2013, IEEE, 978-1-4673-4951-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
40 | Saman Kiamehr, Farshad Firouzi, Mehdi Baradaran Tahoori |
Aging-aware timing analysis considering combined effects of NBTI and PBTI. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: International Symposium on Quality Electronic Design, ISQED 2013, Santa Clara, CA, USA, March 4-6, 2013, pp. 53-59, 2013, IEEE, 978-1-4673-4951-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
40 | Jiyuan Luan, Michael DiVita |
Analysis and reliability test to improve the data retention performance of EPROM circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: International Symposium on Quality Electronic Design, ISQED 2013, Santa Clara, CA, USA, March 4-6, 2013, pp. 273-277, 2013, IEEE, 978-1-4673-4951-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
40 | Yasuhiro Shinozuka, Hiroshi Fuketa, Koichi Ishida, Futoshi Furuta, Kenichi Osada, Kenichi Takeda, Makoto Takamiya, Takayasu Sakurai |
Reducing IR drop in 3D integration to less than 1/4 using Buck Converter on Top die (BCT) scheme. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: International Symposium on Quality Electronic Design, ISQED 2013, Santa Clara, CA, USA, March 4-6, 2013, pp. 210-215, 2013, IEEE, 978-1-4673-4951-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
40 | Yinhe Han 0001, Song Jin, Jibing Qiu, Qiang Xu 0001, Xiaowei Li 0001 |
On predicting NBTI-induced circuit aging by isolating leakage change. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: International Symposium on Quality Electronic Design, ISQED 2013, Santa Clara, CA, USA, March 4-6, 2013, pp. 46-52, 2013, IEEE, 978-1-4673-4951-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
40 | Yue Hu, Shaoming Chen, Lu Peng 0001, Edward Song, Jin-Woo Choi |
Effective thermal control techniques for liquid-cooled 3D multi-core processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: International Symposium on Quality Electronic Design, ISQED 2013, Santa Clara, CA, USA, March 4-6, 2013, pp. 8-15, 2013, IEEE, 978-1-4673-4951-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
40 | Suming Lai, Peng Li 0001 |
A power-efficient on-chip linear regulator assisted by switched capacitors for fast transient regulation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: International Symposium on Quality Electronic Design, ISQED 2013, Santa Clara, CA, USA, March 4-6, 2013, pp. 682-688, 2013, IEEE, 978-1-4673-4951-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
40 | Kwang Sub Yoon, Keon Lee |
A CMOS high dimming ratio power-LED driver with a preloading inductor current method. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: International Symposium on Quality Electronic Design, ISQED 2013, Santa Clara, CA, USA, March 4-6, 2013, pp. 709-713, 2013, IEEE, 978-1-4673-4951-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
40 | Chung-Kai Hsu, Kun-Lin Tsai, Jing-Fu Jheng, Shanq-Jang Ruan, Chung-An Shen |
A low power detection routing method for bufferless NoC. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: International Symposium on Quality Electronic Design, ISQED 2013, Santa Clara, CA, USA, March 4-6, 2013, pp. 364-367, 2013, IEEE, 978-1-4673-4951-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
40 | Ahmet Ceyhan, Azad Naeemi |
Impact of conventional and emerging interconnects on the circuit performance of various post-CMOS devices. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: International Symposium on Quality Electronic Design, ISQED 2013, Santa Clara, CA, USA, March 4-6, 2013, pp. 203-209, 2013, IEEE, 978-1-4673-4951-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
40 | Yi Xiang, Sudeep Pasricha |
Thermal-aware semi-dynamic power management for multicore systems with energy harvesting. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: International Symposium on Quality Electronic Design, ISQED 2013, Santa Clara, CA, USA, March 4-6, 2013, pp. 619-626, 2013, IEEE, 978-1-4673-4951-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
40 | Avijit Dutta, Neil Tuttle, Krishnan Anandh |
Canonical ordering of instances to immunize the FPGA place and route flow from ECO-induced variance. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: International Symposium on Quality Electronic Design, ISQED 2013, Santa Clara, CA, USA, March 4-6, 2013, pp. 359-363, 2013, IEEE, 978-1-4673-4951-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
40 | Wulong Liu, Haixiao Du, Yu Wang 0002, Yuchun Ma, Yuan Xie 0001, Jinguo Quan, Huazhong Yang |
TSV-aware topology generation for 3D Clock Tree Synthesis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: International Symposium on Quality Electronic Design, ISQED 2013, Santa Clara, CA, USA, March 4-6, 2013, pp. 300-307, 2013, IEEE, 978-1-4673-4951-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
40 | Tun Li, Yang Guo 0003, Wanwei Liu, Chiyuan Ma |
Efficient translation validation of high-level synthesis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: International Symposium on Quality Electronic Design, ISQED 2013, Santa Clara, CA, USA, March 4-6, 2013, pp. 516-523, 2013, IEEE, 978-1-4673-4951-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
40 | Shrikanth Ganapathy, Ramon Canal, Antonio González 0001, Antonio Rubio 0001 |
Effectiveness of hybrid recovery techniques on parametric failures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: International Symposium on Quality Electronic Design, ISQED 2013, Santa Clara, CA, USA, March 4-6, 2013, pp. 258-264, 2013, IEEE, 978-1-4673-4951-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
40 | Syed M. A. H. Jafri, Ozan Bag, Ahmed Hemani, Nasim Farahini, Kolin Paul, Juha Plosila, Hannu Tenhunen |
Energy-aware coarse-grained reconfigurable architectures using dynamically reconfigurable isolation cells. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: International Symposium on Quality Electronic Design, ISQED 2013, Santa Clara, CA, USA, March 4-6, 2013, pp. 104-111, 2013, IEEE, 978-1-4673-4951-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
40 | Jinbo Wan, Hans G. Kerkhoff |
An arbitrary stressed NBTI compact model for analog/mixed-signal reliability simulations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: International Symposium on Quality Electronic Design, ISQED 2013, Santa Clara, CA, USA, March 4-6, 2013, pp. 31-37, 2013, IEEE, 978-1-4673-4951-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
40 | Mohammad Shokrolah Shirazi, Brendan Morris, Henry Selvaraj |
Fast FPGA-based fault injection tool for embedded processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: International Symposium on Quality Electronic Design, ISQED 2013, Santa Clara, CA, USA, March 4-6, 2013, pp. 476-480, 2013, IEEE, 978-1-4673-4951-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
40 | Zihao Chen, Hailong Yao, Yici Cai |
SUALD: Spacing uniformity-aware layout decomposition in triple patterning lithography. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: International Symposium on Quality Electronic Design, ISQED 2013, Santa Clara, CA, USA, March 4-6, 2013, pp. 566-571, 2013, IEEE, 978-1-4673-4951-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
40 | Martin D. F. Wong |
Advances in wire routing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: International Symposium on Quality Electronic Design, ISQED 2013, Santa Clara, CA, USA, March 4-6, 2013, pp. 257, 2013, IEEE, 978-1-4673-4951-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
40 | Chih-han Hsu, Shanq-Jang Ruan, Ying-Jung Chen, Tsang-Chi Kan |
Reliability consideration with rectangle- and double-signal through silicon vias insertion in 3D thermal-aware floorplanning. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: International Symposium on Quality Electronic Design, ISQED 2013, Santa Clara, CA, USA, March 4-6, 2013, pp. 316-321, 2013, IEEE, 978-1-4673-4951-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
40 | Bao Liu 0001, Lu Wang |
Input-aware statistical timing analysis-based delay test pattern generation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: International Symposium on Quality Electronic Design, ISQED 2013, Santa Clara, CA, USA, March 4-6, 2013, pp. 454-459, 2013, IEEE, 978-1-4673-4951-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
40 | Shan Cao, Zhaolin Li, Zhixiang Chen 0003, Guoyue Jiang, Shaojun Wei |
Compiler-assisted leakage energy optimization of media applications on stream architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: International Symposium on Quality Electronic Design, ISQED 2013, Santa Clara, CA, USA, March 4-6, 2013, pp. 120-127, 2013, IEEE, 978-1-4673-4951-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
40 | Nicolo Testi, Yang Xu 0017 |
A 0.2nJ/sample 0.01mm2 ring oscillator based temperature sensor for on-chip thermal management. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: International Symposium on Quality Electronic Design, ISQED 2013, Santa Clara, CA, USA, March 4-6, 2013, pp. 696-702, 2013, IEEE, 978-1-4673-4951-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
40 | Hong Zhu 0009, Volkan Kursun |
Impact of process parameter and supply voltage fluctuations on multi-threshold-voltage seven-transistor static memory cells. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: International Symposium on Quality Electronic Design, ISQED 2013, Santa Clara, CA, USA, March 4-6, 2013, pp. 448-453, 2013, IEEE, 978-1-4673-4951-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
40 | Yiqiang Ding, Wei Zhang 0002 |
On the interactions between real-time scheduling and inter-thread cached interferences for multicore processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: International Symposium on Quality Electronic Design, ISQED 2013, Santa Clara, CA, USA, March 4-6, 2013, pp. 627-634, 2013, IEEE, 978-1-4673-4951-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
40 | Dinesh Ganta, Leyla Nazhandali |
Easy-to-build Arbiter Physical Unclonable Function with enhanced challenge/response set. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: International Symposium on Quality Electronic Design, ISQED 2013, Santa Clara, CA, USA, March 4-6, 2013, pp. 733-738, 2013, IEEE, 978-1-4673-4951-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
40 | Na Gong, Jinhui Wang, Ramalingam Sridhar |
Application-driven power efficient ALU design methodology for modern microprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: International Symposium on Quality Electronic Design, ISQED 2013, Santa Clara, CA, USA, March 4-6, 2013, pp. 184-188, 2013, IEEE, 978-1-4673-4951-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
40 | Dimitra Papagiannopoulou, Patipan Prasertsom, R. Iris Bahar |
Flexible data allocation for scratch-pad memories to reduce NBTI effects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: International Symposium on Quality Electronic Design, ISQED 2013, Santa Clara, CA, USA, March 4-6, 2013, pp. 60-67, 2013, IEEE, 978-1-4673-4951-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
40 | Youhua Shi, Hiroaki Igarashi, Nozomu Togawa, Masao Yanagisawa |
Suspicious timing error prediction with in-cycle clock gating. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: International Symposium on Quality Electronic Design, ISQED 2013, Santa Clara, CA, USA, March 4-6, 2013, pp. 335-340, 2013, IEEE, 978-1-4673-4951-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
40 | Yong Zou 0001, Sudeep Pasricha |
Reliability-aware and energy-efficient synthesis of NoC based MPSoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: International Symposium on Quality Electronic Design, ISQED 2013, Santa Clara, CA, USA, March 4-6, 2013, pp. 643-650, 2013, IEEE, 978-1-4673-4951-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
40 | Animesh Datta, Mohamed H. Abu-Rahma, Sachin Dileep Dasnurkar, Hadi Rasouli, Sean Tamjidi, Ming Cai, Samit Sengupta, P. R. Chidambaram, Raghavan Thirumala, Nikhil Kulkarni, Prasanna Seeram, Prasad Bhadri, Prayag Patel, Sei Seung Yoon, Esin Terzioglu |
Analysis, modeling and silicon correlation of low-voltage flop data retention in 28nm process technology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: International Symposium on Quality Electronic Design, ISQED 2013, Santa Clara, CA, USA, March 4-6, 2013, pp. 580-584, 2013, IEEE, 978-1-4673-4951-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
40 | Rahul Krishnan, Wei Wu, Fang Gong, Lei He 0001 |
Stochastic behavioral modeling of analog/mixed-signal circuits by maximizing entropy. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: International Symposium on Quality Electronic Design, ISQED 2013, Santa Clara, CA, USA, March 4-6, 2013, pp. 572-579, 2013, IEEE, 978-1-4673-4951-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
40 | Chenyun Pan, Ahmet Ceyhan, Azad Naeemi |
System-level optimization and benchmarking for InAs nanowire based gate-all-around tunneling FETs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: International Symposium on Quality Electronic Design, ISQED 2013, Santa Clara, CA, USA, March 4-6, 2013, pp. 196-202, 2013, IEEE, 978-1-4673-4951-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
40 | Qiaosha Zou, Jing Xie 0006, Yuan Xie 0001 |
Cost-driven 3D design optimization with metal layer reduction technique. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: International Symposium on Quality Electronic Design, ISQED 2013, Santa Clara, CA, USA, March 4-6, 2013, pp. 294-299, 2013, IEEE, 978-1-4673-4951-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
40 | Shinichi Nishizawa, Tohru Ishihara, Hidetoshi Onodera |
Analysis and comparison of XOR cell structures for low voltage circuit design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: International Symposium on Quality Electronic Design, ISQED 2013, Santa Clara, CA, USA, March 4-6, 2013, pp. 703-708, 2013, IEEE, 978-1-4673-4951-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
40 | Zhi Li 0016, Jingweijia Tan, Xin Fu |
Hybrid CMOS-TFET based register files for energy-efficient GPGPUs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: International Symposium on Quality Electronic Design, ISQED 2013, Santa Clara, CA, USA, March 4-6, 2013, pp. 112-119, 2013, IEEE, 978-1-4673-4951-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
40 | Krishna Srinivasan, Jonathan Rosenfeld |
Design of a 6 Gbps continuous-time adaptive equalizer using a voltage rectifier instead of a power detector. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: International Symposium on Quality Electronic Design, ISQED 2013, Santa Clara, CA, USA, March 4-6, 2013, pp. 386-390, 2013, IEEE, 978-1-4673-4951-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
40 | Jacob Murray, Rajath Hegde, Teng Lu, Partha Pratim Pande, Behrooz A. Shirazi |
Sustainable dual-level DVFS-enabled NoC with on-chip wireless links. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: International Symposium on Quality Electronic Design, ISQED 2013, Santa Clara, CA, USA, March 4-6, 2013, pp. 135-142, 2013, IEEE, 978-1-4673-4951-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
40 | Kasyab P. Subramaniyan, Per Larsson-Edefors |
Manufacturable nanometer designs using standard cells with regular layout. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: International Symposium on Quality Electronic Design, ISQED 2013, Santa Clara, CA, USA, March 4-6, 2013, pp. 398-405, 2013, IEEE, 978-1-4673-4951-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
40 | Mrigank Sharad, Karthik Yogendra, Kon-Woo Kwon, Kaushik Roy 0001 |
Design of ultra high density and low power computational blocks using nano-magnets. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: International Symposium on Quality Electronic Design, ISQED 2013, Santa Clara, CA, USA, March 4-6, 2013, pp. 223-230, 2013, IEEE, 978-1-4673-4951-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
40 | Arunachalam Annamalai, Raghavan Kumar, Arunkumar Vijayakumar, Sandip Kundu |
A system-level solution for managing spatial temperature gradients in thinned 3D ICs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: International Symposium on Quality Electronic Design, ISQED 2013, Santa Clara, CA, USA, March 4-6, 2013, pp. 88-95, 2013, IEEE, 978-1-4673-4951-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
40 | Jing Xie 0006, Yang Du, Yuan Xie 0001 |
CPDI: Cross-power-domain interface circuit design in monolithic 3D technology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: International Symposium on Quality Electronic Design, ISQED 2013, Santa Clara, CA, USA, March 4-6, 2013, pp. 442-447, 2013, IEEE, 978-1-4673-4951-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
40 | Young-Ho Gong, Hyung Beom Jang, Sung Woo Chung |
Performance and cache access time of SRAM-eDRAM hybrid caches considering wire delay. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: International Symposium on Quality Electronic Design, ISQED 2013, Santa Clara, CA, USA, March 4-6, 2013, pp. 524-530, 2013, IEEE, 978-1-4673-4951-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
40 | Alexandra Aguiar, Carlos Moratelli, Marcos Sartori, Fabiano Hessel |
A virtualization approach for MIPS-based MPSoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: International Symposium on Quality Electronic Design, ISQED 2013, Santa Clara, CA, USA, March 4-6, 2013, pp. 611-618, 2013, IEEE, 978-1-4673-4951-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
40 | Debesh Bhatta, Ishita Mukhopadhyay, Suriyaprakash Natarajan, Prashant Goteti, Bin Xue |
Framework for analog test coverage. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: International Symposium on Quality Electronic Design, ISQED 2013, Santa Clara, CA, USA, March 4-6, 2013, pp. 468-475, 2013, IEEE, 978-1-4673-4951-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
40 | Ken Yano, Takanori Hayashida, Toshinori Sato |
Improving timing error tolerance without impact on chip area and power consumption. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: International Symposium on Quality Electronic Design, ISQED 2013, Santa Clara, CA, USA, March 4-6, 2013, pp. 373-378, 2013, IEEE, 978-1-4673-4951-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
40 | Jongpil Jung, Kyungsu Kang, Giovanni De Micheli, Chong-Min Kyung |
Runtime 3-D stacked cache management for chip-multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: International Symposium on Quality Electronic Design, ISQED 2013, Santa Clara, CA, USA, March 4-6, 2013, pp. 68-72, 2013, IEEE, 978-1-4673-4951-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
40 | Satyanarayana Telikepalli, Madhavan Swaminathan, David C. Keezer |
Minimizing simultaneous switching noise at reduced power with constant-voltage power transmission lines for high-speed signaling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: International Symposium on Quality Electronic Design, ISQED 2013, Santa Clara, CA, USA, March 4-6, 2013, pp. 714-718, 2013, IEEE, 978-1-4673-4951-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
40 | Ahish Mysore Somashekar, Spyros Tragoudas |
Diagnosis of small delay defects arising due to manufacturing imperfections using path delay measurements. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: International Symposium on Quality Electronic Design, ISQED 2013, Santa Clara, CA, USA, March 4-6, 2013, pp. 481-486, 2013, IEEE, 978-1-4673-4951-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
40 | Yuriy Shiyanovskii, Christos A. Papachristou, Cheng-Wen Wu |
Analytical modeling and numerical simulations of temperature field in TSV-based 3D ICs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: International Symposium on Quality Electronic Design, ISQED 2013, Santa Clara, CA, USA, March 4-6, 2013, pp. 24-29, 2013, IEEE, 978-1-4673-4951-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
40 | Dhruva Ghai, Saraju P. Mohanty, Garima Thakral |
Fast analog design optimization using regression-based modeling and genetic algorithm: A nano-CMOS VCO case study. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: International Symposium on Quality Electronic Design, ISQED 2013, Santa Clara, CA, USA, March 4-6, 2013, pp. 406-411, 2013, IEEE, 978-1-4673-4951-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
40 | Zheng Wang 0020, Chao Chen, Anupam Chattopadhyay |
Fast reliability exploration for embedded processors via high-level fault injection. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: International Symposium on Quality Electronic Design, ISQED 2013, Santa Clara, CA, USA, March 4-6, 2013, pp. 265-272, 2013, IEEE, 978-1-4673-4951-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
40 | Amaravati Anvesha, Maryam Shojaei Baghini |
A versatile rail to rail current mode instrumentation amplifier with an embedded band-pass filter for bio-potential signal conditioning. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: International Symposium on Quality Electronic Design, ISQED 2013, Santa Clara, CA, USA, March 4-6, 2013, pp. 689-695, 2013, IEEE, 978-1-4673-4951-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
40 | Adrian Evans, Michael Nicolaidis, Shi-Jie Wen, Thiago Asis |
Clustering techniques and statistical fault injection for selective mitigation of SEUs in flip-flops. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: International Symposium on Quality Electronic Design, ISQED 2013, Santa Clara, CA, USA, March 4-6, 2013, pp. 727-732, 2013, IEEE, 978-1-4673-4951-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
40 | Shairfe Muhammad Salahuddin, Hailong Jiao, Volkan Kursun |
A novel 6T SRAM cell with asymmetrically gate underlap engineered FinFETs for enhanced read data stability and write ability. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: International Symposium on Quality Electronic Design, ISQED 2013, Santa Clara, CA, USA, March 4-6, 2013, pp. 353-358, 2013, IEEE, 978-1-4673-4951-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|