Search results for "Look-ahead"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
11	Hsin-Fu Chen, Maw-Shang Chang	An Efficient Exact Algorithm for the Minimum Ultrametric Tree Problem.	ISAAC	2004	DBLP DOI BibTeX RDF
11	Maciej Kalisiak, Michiel van de Panne	Approximate Safety Enforcement using Computed Viability Envelopes.	ICRA	2004	DBLP DOI BibTeX RDF
11	Eryk Laskowski	Program Structuring Algorithms for Dynamically Reconfigurable Parallel Systems Based on Redundant Connection Switches.	ISPDC/HeteroPar	2004	DBLP DOI BibTeX RDF	interconnection networks scheduling, Parallel architectures
11	Peter Celinski, Said F. Al-Sarawi, Derek Abbott, Sorin Cotofana, Stamatis Vassiliadis	Logical Effort Based Design Exploration of 64-bit Adders Using a Mixed Dynamic-CMOS/Threshold-Logic Approach.	ISVLSI	2004	DBLP DOI BibTeX RDF
11	Joe I. Jamp, Lawrence E. Larson	A coding technique for spectral shaping ultra-wideband pulse position modulated signals.	VTC Fall (2)	2004	DBLP DOI BibTeX RDF
11	Eugene Y. C. Wong, Alvin T. S. Chan, Hong Va Leong	Efficient management of XML contents over wireless environment by Xstream.	SAC	2004	DBLP DOI BibTeX RDF	XML, mobile computing, wireless, streaming, fragmentation
11	Paul W. T. Poon	Live Digital Reference Service: Its Present and Future.	ICADL	2004	DBLP DOI BibTeX RDF
11	Kai Chirca, Michael J. Schulte, John Glossner, Haoran Wang, Suman Mamidi, Pablo I. Balzola, Stamatis Vassiliadis	A Static Low-Power, High-Performance 32-bit Carry Skip Adder.	DSD	2004	DBLP DOI BibTeX RDF
11	Xiaoan Dong, Sam Yuan Sung, Wing-Kin Sung, Chew Lim Tan	Constraint Based Method for Finding Motifs in DNA Sequences.	BIBE	2004	DBLP DOI BibTeX RDF
11	Toshihiro Yamaguchi, Hiromitsu Hattori, Takayuki Ito 0001, Toramatsu Shintani	On a web browsing support system with 3d visualization.	WWW (Alternate Track Papers & Posters)	2004	DBLP DOI BibTeX RDF	3D technology, visualization, web browser
11	Shahram Ghandeharizadeh, Shyam Kapadia, Bhaskar Krishnamachari	PAVAN: a policy framework for content availabilty in vehicular ad-hoc networks.	Vehicular Ad Hoc Networks	2004	DBLP DOI BibTeX RDF	C2P2, PAVAN, content availability, utility models, evaluation, VANETs
11	Mário C. B. Osorio, Carlos A. Sampaio, André Inácio Reis, Renato P. Ribas	Enhanced 32-bit carry lookahead adder using multiple output enable-disable CMOS differential logic.	SBCCI	2004	DBLP DOI BibTeX RDF	ECDL, CMOS, adder, digital circuits
11	Ciaran McIvor, Máire McLoone, John V. McCanny	FPGA Montgomery Multiplier Architectures - A Comparison.	FCCM	2004	DBLP DOI BibTeX RDF
11	Mariya Ishutkina, Eric Feron, Marco Casini, Antonio Vicino	An Internet based laboratory for control of a safety critical system.	SMC (3)	2004	DBLP DOI BibTeX RDF
11	Michael Benisch, Amy Greenwald, Victor Naroditskiy, Michael Carl Tschantz	A stochastic programming approach to scheduling in TAC SCM.	EC	2004	DBLP DOI BibTeX RDF	optimization, supply chain management, stochastic programming, trading agent competition
11	Yun-Fei Chen 0005, Chanadio Abdul Fattah, Yushu Liu, Gangway Yan	HDACC: A Heuristic Density-Based Ant Colony Clustering Algorithm.	IAT	2004	DBLP DOI BibTeX RDF
11	Ciaran McIvor, Máire McLoone, John V. McCanny	FPGA Montgomery modular multiplication architectures suitable for ECCs over GF(p).	ISCAS (3)	2004	DBLP DOI BibTeX RDF
11	Michael J. Schulte, Kai Chirca, John Glossner, Haoran Wang, Suman Mamidi, Pablo I. Balzola, Stamatis Vassiliadis	A Low-Power Carry Skip Adder with Fast Saturation.	ASAP	2004	DBLP DOI BibTeX RDF
11	Wei Li 0002	A Hypergraph Separator Based Variable Ordering Heuristic for Solving Real World SAT.	CP	2004	DBLP DOI BibTeX RDF
11	Rosemary Emery-Montemerlo, Geoffrey J. Gordon, Jeff G. Schneider, Sebastian Thrun	Approximate Solutions for Partially Observable Stochastic Games with Common Payoffs.	AAMAS	2004	DBLP DOI BibTeX RDF
11	Vladimir I. Gorodetski, Oleg Karsaev, Victor Konushy	Multi-agent System for Resource Allocation and Scheduling.	CEEMAS	2003	DBLP DOI BibTeX RDF
11	Michael G. Wrighton, André DeHon	Hardware-assisted simulated annealing with application for fast FPGA placement.	FPGA	2003	DBLP DOI BibTeX RDF	field-programmable gate arrays, simulated annealing, placement, reconfigurable computing, design automation
11	Jarmo Laaksolahti, Magnus Boman	Anticipatory Guidance of Plot.	ABiALS	2003	DBLP DOI BibTeX RDF
11	Dmitri Maslov, Gerhard W. Dueck, D. Michael Miller	Fredkin/Toffoli Templates for Reversible Logic Synthesis.	ICCAD	2003	DBLP DOI BibTeX RDF
11	Jörg Reinbothe	European Copyright - Yesterday, Today, Tomorrow.	Digital Rights Management	2003	DBLP DOI BibTeX RDF
11	P. C. Chen, James B. Kuo	Novel sub-1V CMOS domino dynamic logic circuit using a direct bootstrap (DB) technique for low-voltage CMOS VLSI.	ISCAS (5)	2003	DBLP DOI BibTeX RDF
11	Kamran Farzan, David A. Johns	A power-efficient architecture for high-speed D/A converters.	ISCAS (1)	2003	DBLP DOI BibTeX RDF
11	Bhushan A. Shinkre, James E. Stine	A pipelined clock-delayed domino carry-lookahead adder.	ACM Great Lakes Symposium on VLSI	2003	DBLP DOI BibTeX RDF
11	Young-Jun Lee, Jong-Jin Lim, Yong-Bin Kim	A Novel Clocking Strategy for Dynamic Circuits.	ISQED	2003	DBLP DOI BibTeX RDF
11	D. Michael Miller, Dmitri Maslov, Gerhard W. Dueck	A transformation based algorithm for reversible logic synthesis.	DAC	2003	DBLP DOI BibTeX RDF	templates, minimization, reversible logic, quantum circuits
11	Anbulagan, John Thornton 0001, Abdul Sattar 0001	Dynamic Variable Filtering for Hard Random 3-SAT Problems.	Australian Conference on Artificial Intelligence	2003	DBLP DOI BibTeX RDF	Search, Constraints, Problem Solving
11	Stefania Perri, Pasquale Corsonello, Giuseppe Cocorullo	VLSI circuits for low-power high-speed asynchronous addition.	IEEE Trans. Very Large Scale Integr. Syst.	2002	DBLP DOI BibTeX RDF
11	Shantanu Dutt, Wenyong Deng	Cluster-aware iterative improvement techniques for partitioning large VLSI circuits.	ACM Trans. Design Autom. Electr. Syst.	2002	DBLP DOI BibTeX RDF	VLSI circuit partitioning, mincut, physical design/layout, Clusters, iterative-improvement
11	Cheng-Yu Lee, Héctor H. González-Baños, Jean-Claude Latombe	Real-time tracking of an unpredictable target amidst unknown obstacles.	ICARCV	2002	DBLP DOI BibTeX RDF
11	Henry Avetisyan, Richard J. Lorentz	Selective Search in an Amazons Program.	Computers and Games	2002	DBLP DOI BibTeX RDF
11	Rolf Schwitter	English as a Formal Specification Language.	DEXA Workshops	2002	DBLP DOI BibTeX RDF
11	Mohab Anis, Mohamed I. Elmasry	Self-timed MOS current mode logic for digital applications.	ISCAS (5)	2002	DBLP DOI BibTeX RDF
11	George V. Popescu, Zhen Liu	On Scheduling 3D Model Transmission in Network Virtual Environments.	DS-RT	2002	DBLP DOI BibTeX RDF
11	Sanmay Das, Barbara J. Grosz, Avi Pfeffer	Learning and decision: making for intention reconciliation.	AAMAS	2002	DBLP DOI BibTeX RDF	group and organizational dynamics, evolution, adaptation and learning
11	Kenji Itoh, Toshinori Yamaguchi, John Paulin Hansen, Finn R. Nielsen	Risk Analysis of Ship Navigation by Use of Cognitive Simulation.	Cogn. Technol. Work.	2001	DBLP DOI BibTeX RDF	Cognitive simulation, Ship navigation, Cognitive modelling, Risk analysis, Human error, Cognitive task analysis
11	Xiaohua Yu, Bryan S. Morse, Thomas W. Sederberg	Image Reconstruction Using Data-Dependent Triangulation.	IEEE Computer Graphics and Applications	2001	DBLP DOI BibTeX RDF
11	Jeff B. Pelz, Roxanne L. Canosa, Jason S. Babcock, Jenn Barber	Visual perception in familiar, complex tasks.	ICIP (2)	2001	DBLP DOI BibTeX RDF
11	Enric Morancho, José María Llabería, Àngel Olivé	Recovery Mechanism for Latency Misprediction.	IEEE PACT	2001	DBLP DOI BibTeX RDF
11	Marek Tudruj	Embedded Cluster Computing through Dynamic Reconfigurability of Inter-Processor Connections.	IWCC	2001	DBLP DOI BibTeX RDF
11	G. Hariprakash, R. Achutharaman, Amos Omondi	DSTRIDE: Data-Cache Miss-Address-Based Stride Prefetching Scheme for Multimedia Processors.	ACSAC	2001	DBLP DOI BibTeX RDF
11	Chang-Jiun Tsai, Shian-Shyong Tseng, Chih-Yang Lin	A Two-Phase Fuzzy Mining and Learning Algorithm for Adaptive Learning Environment.	International Conference on Computational Science (2)	2001	DBLP DOI BibTeX RDF	Data Mining, Machine Learning, Fuzzy set theory, CAI
11	Chung-Hsun Huang, Jinn-Shyan Wang, Yan-Chao Huang	A high-speed CMOS incrementer/decrementer.	ISCAS (4)	2001	DBLP DOI BibTeX RDF
11	Inseop Lee, W. Kenneth Jenkins	Pipelined implementation of the adaptive canceller-equalizer.	ISCAS (4)	2001	DBLP DOI BibTeX RDF
11	Hong-Yi Huang, Teng-Neng Wang	High-speed CMOS logic circuits in capacitor coupling technique.	ISCAS (4)	2001	DBLP DOI BibTeX RDF
11	Sudhakar Bobba, Ibrahim N. Hajj	Input vector generation for maximum intrinsic decoupling capacitance of VLSI circuits.	ISCAS (5)	2001	DBLP DOI BibTeX RDF
11	Hamid Mahmoodi-Meimand, Ali Afzali-Kusha	Efficient power clock generation for adiabatic logic.	ISCAS (4)	2001	DBLP DOI BibTeX RDF
11	Sheng Sun, Larry McMurchie, Carl Sechen	A High-Performance 64-bit Adder Implemented in Output Prediction Logic.	ARVLSI	2001	DBLP DOI BibTeX RDF
11	Gin Yee, Carl Sechen	Clock-delayed domino for dynamic circuit design.	IEEE Trans. Very Large Scale Integr. Syst.	2000	DBLP DOI BibTeX RDF
11	Pasquale Corsonello, Stefania Perri, Giuseppe Cocorullo	VLSI Implementation of a Low-Power High-Speed Self-Timed Adder.	PATMOS	2000	DBLP DOI BibTeX RDF
11	Sriram Govindarajan, Ranga Vemuri	Improving the Schedule Quality of Static-List Time-Constrained Scheduling.	DATE	2000	DBLP DOI BibTeX RDF
11	Namdar Bahri, Robert J. Gaskins	Automated material handling system traffic control by means of node balancing.	WSC	2000	DBLP DOI BibTeX RDF
11	Aaron Striegel, G. Manimaran	Best-Effort Scheduling of (m, k)-Firm Real-Time Streams in Multihop Networks.	IPDPS Workshops	2000	DBLP DOI BibTeX RDF
11	Anne-Claire Guillou, Patrice Quinton, Tanguy Risset, Daniel Massicotte	Automatic Design of VLSI Pipelined LMS Architectures.	PARELEC	2000	DBLP DOI BibTeX RDF
11	Mahmoud A. Manzoul	Parallel CLA Algorithm for Fast Addition.	PARELEC	2000	DBLP DOI BibTeX RDF
11	Hilary A. Priestley	Ordered Sets and Complete Lattices.	Algebraic and Coalgebraic Methods in the Mathematics of Program Construction	2000	DBLP DOI BibTeX RDF
11	Jeff B. Pelz, Roxanne L. Canosa, Jason S. Babcock	Extended tasks elicit complex eye movement patterns.	ETRA	2000	DBLP DOI BibTeX RDF	extended tasks, fixation duration, portable/wearable eyetracking, visual perception, eyetracking, complex tasks
11	Shantanu Dutt, Hasan Arslan, Halim Theny	Partitioning using second-order information and stochastic-gainfunctions.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1999	DBLP DOI BibTeX RDF
11	Reem Bahgat, Samir E. AbdelRahman	Combining Constraint Logic Programming Techniques for Solving Linear Problems.	New Trends in Constraints	1999	DBLP DOI BibTeX RDF	Interval Reasoning, Domain Splitting, Simplex-Like Solver, Constraint Logic Programming
11	Dhananjay S. Phatak, Israel Koren	Intermediate Variable Encodings that Enable Multiplexor-Based Implementations of Two Operand Addition.	IEEE Symposium on Computer Arithmetic	1999	DBLP DOI BibTeX RDF
11	Jie Chen 0002, K. J. Ray Liu	Cost-effective low-power architectures of video coding systems.	ISCAS (1)	1999	DBLP DOI BibTeX RDF
11	J. Living, Bashir M. Al-Hashimi	Mixed arithmetic architecture: a solution to the iteration bound for resource efficient FPGA and CPLD recursive digital filters.	ISCAS (1)	1999	DBLP DOI BibTeX RDF
11	Prashanth B. Bhat, Cauligi S. Raghavendra, Viktor K. Prasanna	Efficient Collective Communication in Distributed Heterogeneous Systems.	ICDCS	1999	DBLP DOI BibTeX RDF	Information Power Grid, Collective Communication Algorithms, Multicast, Broadcast, Heterogeneous Networks
11	Aamir A. Farooqui, Vojin G. Oklobdzija	VLSI Implementation of Early Branch Prediction Circuits for High Performance Computing.	Great Lakes Symposium on VLSI	1999	DBLP DOI BibTeX RDF
11	Jean-Charles Pomerol	Scenario Development and Practical Decision Making under Uncertainty: Application to Requirements Engineering.	Requir. Eng.	1998	DBLP DOI BibTeX RDF	Decision practice, Scenario development, Requirements analysis, Risk control
11	Dinesh Somasekhar, Kaushik Roy 0001	LVDCSL: a high fan-in, high-performance, low-voltage differential current switch logic family.	IEEE Trans. Very Large Scale Integr. Syst.	1998	DBLP DOI BibTeX RDF
11	Th. Haniotakis, Dimitris Nikolos, Y. Tsiatouhas	C-Testable One-Dimensional ILAs with Respect to Path Delay Faults: Theory and Applications.	DFT	1998	DBLP DOI BibTeX RDF	robustly delay fault testable circuits, path delay faults, C-testability, Iterative-logic-arrays
11	Hong K. Kim, Jack S. N. Jean	Parallel Optimistic Logic Simulation with Event Lookahead.	ICPP	1998	DBLP DOI BibTeX RDF
11		Adventures in the Mainframe Trade.	IEEE Des. Test Comput.	1997	DBLP DOI BibTeX RDF
11	Wuu Yang	Multi-Plan Attribute Grammars.	APSEC	1997	DBLP DOI BibTeX RDF
11	Michael J. Carey 0001, Nelson Mendonça Mattos, Anil K. Nori	Object-Relational Database Systems: Principles, Products, and Challenges (Tutorial).	SIGMOD Conference	1997	DBLP DOI BibTeX RDF
11	Mario Porrmann, Ulrich Rückert 0001, Karl Michael Marks, Jörg Landmann	HiBRIC-MEM, a Memory Controller for PowerPC Based Systems.	EUROMICRO	1997	DBLP DOI BibTeX RDF
11	Bernd Becker 0001, Rolf Drechsler, Sudhakar M. Reddy	(Quasi-) Linear Path Delay Fault Tests for Adders.	VLSI Design	1997	DBLP DOI BibTeX RDF
11	Terence John Parr, Russell W. Quong	LL and LR Translators Need k>1 Lookahead.	ACM SIGPLAN Notices	1996	DBLP DOI BibTeX RDF
11	Ingemar J. Cox, Sunita L. Hingorani	An Efficient Implementation of Reid's Multiple Hypothesis Tracking Algorithm and Its Evaluation for the Purpose of Visual Tracking.	IEEE Trans. Pattern Anal. Mach. Intell.	1996	DBLP DOI BibTeX RDF	Multiple hypothesis tracking, motion correspondence, ranked bipartite graph matching, tracking, visual tracking, data association
11	Montserrat Bóo, Francisco Argüello, Javier D. Bruguera, Emilio L. Zapata	High-Speed Viterbi Decoder: An Efficient Scheduling Method to Exploit the Pipelining.	ASAP	1996	DBLP DOI BibTeX RDF
11	Alfred Aue, Michael Breu	Distributed Information Systems: An Advanced Methodology.	IEEE Trans. Software Eng.	1994	DBLP DOI BibTeX RDF	distribution of data, communication aspects, BOS Engineering Method, waterfall life cycle model, fault tolerance, software engineering, software engineering, information systems, requirements engineering, distributed processing, feedback, requirements analysis, development process, distributed information systems, business transactions
11	Suphachai Sutanthavibul, Eugene Shragowitz, Rung-Bin Lin	An adaptive timing-driven placement for high performance VLSIs.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1993	DBLP DOI BibTeX RDF
11	Takashi Miyazaki, Takao Nishitani, Masato Edahiro, Ikuko Ono, Kaoru Mitsuhashi	DCT/IDCT processor for HDTV developed with dsp silicon compiler.	J. VLSI Signal Process.	1993	DBLP DOI BibTeX RDF
11	Daniel de Rauglaudre, Michel Mauny	Parsers in ML.	LISP and Functional Programming	1992	DBLP DOI BibTeX RDF	ML
11	Robert Griesemer	Scheduling Instructions by Direct Placement.	CC	1992	DBLP DOI BibTeX RDF
11	Rhys Price Jones, David J. Thuente	The role of simulation in developing game playing strategies.	Annual Simulation Symposium	1990	DBLP DOI BibTeX RDF	SCHEME
11	Manuel E. Bermudez, Karl M. Schimpf	On the (non-) Relationship between SLR(1) and NQLALR(1) Grammars.	ACM Trans. Program. Lang. Syst.	1988	DBLP DOI BibTeX RDF
11	Rajiv Jain, Alice C. Parker, Nohbyung Park	Module Selection for Pipelined Synthesis.	DAC	1988	DBLP BibTeX RDF
11	Fred Ives	Response on Remarks on Recent Algorithms for LALR Lookahead Sets.	ACM SIGPLAN Notices	1987	DBLP DOI BibTeX RDF
11	Noriyuki Kamibayashi, Kazuo Seo	Spirit-III: an advanced relational database machine introducing a novel data-staging architecture with Tuple Stream Filters to preprocess relational algebra.	AFIPS National Computer Conference	1982	DBLP DOI BibTeX RDF
11	Robert J. McMillen, Howard Jay Siegel	Performance and fault tolerance improvements in the Inverse Augmented Data Manipulator network.	ISCA	1982	DBLP BibTeX RDF
11	M. Dennis Mickunas, Ronald L. Lancaster, Victor B. Schneider	Transforming LR(k) Grammars to LR(1), SLR(1), and (1, 1) Bounded Right-Context Grammars.	J. ACM	1976	DBLP DOI BibTeX RDF
11	Jagan P. Agrawal, V. Umapathi Reddy	Log-sum multiplier.	AFIPS National Computer Conference	1976	DBLP DOI BibTeX RDF
11	Thomas C. Lowe	Analysis of boolean program models for time-shared, paged environments.	Commun. ACM	1969	DBLP DOI BibTeX RDF	segmentation, compiler, monitor, program model, paging, time-sharing, executive