Search results for "clocks"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
8	Ashish Chiplunkar, Shankara Narayanan Krishna, Chinmay Jain	Model Checking Logic WCTL with Multi Constrained Modalities on One Clock Priced Timed Automata.	FORMATS	2009	DBLP DOI BibTeX RDF
8	Marta Z. Kwiatkowska, Gethin Norman, David Parker 0001	Stochastic Games for Verification of Probabilistic Timed Automata.	FORMATS	2009	DBLP DOI BibTeX RDF
8	Feng Qian 0001, Alexandre Gerber, Zhuoqing Morley Mao, Subhabrata Sen, Oliver Spatscheck, Walter Willinger	TCP revisited: a fresh look at TCP in the wild.	Internet Measurement Conference	2009	DBLP DOI BibTeX RDF	network measurement, tcp
8	Alexandra Boldyreva, Craig Gentry, Adam O'Neill, Dae Hyun Yum	New Multiparty Signature Schemes for Network Routing Applications.	ACM Trans. Inf. Syst. Secur.	2008	DBLP DOI BibTeX RDF	network security, digital signatures, pairings, identity-based signatures, multisignatures, aggregate signatures
8	Julien Lamoureux, Steven J. E. Wilton	On the trade-off between power and flexibility of FPGA clock networks.	ACM Trans. Reconfigurable Technol. Syst.	2008	DBLP DOI BibTeX RDF	clock-aware placement, FPGA, low-power design, clock distribution networks
8	Arjun Kapoor, Nikhil Jayakumar, Sunil P. Khatri	Dynamically De-Skewable Clock Distribution Methodology.	IEEE Trans. Very Large Scale Integr. Syst.	2008	DBLP DOI BibTeX RDF
8	Min Sik Kim, Taekhyun Kim, YongJune Shin, Simon S. Lam, Edward J. Powers	A wavelet-based approach to detect shared congestion.	IEEE/ACM Trans. Netw.	2008	DBLP DOI BibTeX RDF
8	Jordi Cortadella, Michael Kishinevsky, Dmitry Bufistov, Josep Carmona 0001, Jorge Júlvez	Elasticity and Petri Nets.	Trans. Petri Nets Other Model. Concurr.	2008	DBLP DOI BibTeX RDF
8	Qasim M. Chaudhari, Erchin Serpedin, Khalid A. Qaraqe	On Maximum Likelihood Estimation of Clock Offset and Skew in Networks With Exponential Delays.	IEEE Trans. Signal Process.	2008	DBLP DOI BibTeX RDF
8	Yu Huang 0005, Ruifeng Guo, Wu-Tung Cheng, James Chien-Mo Li	Survey of Scan Chain Diagnosis.	IEEE Des. Test Comput.	2008	DBLP DOI BibTeX RDF
8	Senem Velipasalar, Wayne H. Wolf	Frame-level temporal calibration of video sequences from unsynchronized cameras.	Mach. Vis. Appl.	2008	DBLP DOI BibTeX RDF	Temporal calibration, Frame offset, Unsynchronized cameras, Trajectory alignment, Object tracking
8	Boyan Valtchanov, Alain Aubert, Florent Bernard, Viktor Fischer	Modeling and observing the jitter in ring oscillators implemented in FPGAs.	DDECS	2008	DBLP DOI BibTeX RDF
8	Amir Said, Debargha Mukherjee	Exploiting patterns of data magnitude for efficient image coding.	ICIP	2008	DBLP DOI BibTeX RDF
8	Marcus Völp, Claude-Joachim Hamann, Hermann Härtig	Avoiding timing channels in fixed-priority schedulers.	AsiaCCS	2008	DBLP DOI BibTeX RDF	security, real-time, information flow, fixed-priority scheduling, noninterference
8	Peng Cheng 0009, Vijay Kumar 0001	An almost communication-less approach to task allocation for multiple Unmanned Aerial Vehicles.	ICRA	2008	DBLP DOI BibTeX RDF
8	Hyun Woo Choi, Abhijit Chatterjee	Digital bit stream jitter testing using jitter expansion.	DATE	2008	DBLP DOI BibTeX RDF
8	Najla Chamseddine, Marie Duflot, Laurent Fribourg, Claudine Picaronny, Jeremy Sproston	Computing Expected Absorption Times for Parametric Determinate Probabilistic Timed Automata.	QEST	2008	DBLP DOI BibTeX RDF
8	ChangRyul Yun, DongSoo Kang, YoungHwan Bae, Hanhn Cho, KyoungSon Jhang	Automatic interface synthesis based on the classification of interface protocols of IPs.	ASP-DAC	2008	DBLP DOI BibTeX RDF
8	Sicco Verwer, Mathijs de Weerdt, Cees Witteveen	Polynomial Distinguishability of Timed Automata.	ICGI	2008	DBLP DOI BibTeX RDF
8	Marcel Nassar, Kapil Gulati, Arvind K. Sujeeth, Navid Aghasadeghi, Brian L. Evans, Keith R. Tinsley	Mitigating near-field interference in laptop embedded wireless transceivers.	ICASSP	2008	DBLP DOI BibTeX RDF
8	Jian Wang, Haihang Wang, Chengxiang Tan	Cryptanalysis and Improvement of an 'Efficient Remote Mutual Authentication and Key Agreement'.	APSCC	2008	DBLP DOI BibTeX RDF
8	Paul Caspi, Albert Benveniste	Time-robust discrete control over networked Loosely Time-Triggered Architectures.	CDC	2008	DBLP DOI BibTeX RDF
8	Viktor Fischer, Florent Bernard, Nathalie Bochard, Michal Varchola	Enhancing security of ring oscillator-based trng implemented in FPGA.	FPL	2008	DBLP DOI BibTeX RDF
8	Gueorgi Kossinets, Jon M. Kleinberg, Duncan J. Watts	The structure of information pathways in a social communication network.	KDD	2008	DBLP DOI BibTeX RDF	strength of weak ties, social network, communication latency
8	Svein Yngvar Willassen	Hypothesis-Based Investigation of Digital Timestamps. (PDF / PS)	IFIP Int. Conf. Digital Forensics	2008	DBLP DOI BibTeX RDF	clock hypothesis testing, causality, timestamps, Digital investigations
8	Mutsuo Hidaka, Michitaka Maruyama, Hideo Suzuki	Applying Low Power Consumption Superconductive Device Technology to Real-Time Waveform Monitoring for Photonic Network.	SAINT	2008	DBLP DOI BibTeX RDF	Superconductive device, single flux quantum circuit, real-time oscilloscope, AD converter, sampling clock
8	Osmar Marchi dos Santos, Andy J. Wellings	Run Time Detection of Blocking Time Violations in Real-Time Systems.	RTCSA	2008	DBLP DOI BibTeX RDF
8	Iyad Tumar, Jürgen Schönwälder	Resource Management of Disruption Tolerant Networks. (PDF / PS)	AIMS	2008	DBLP DOI BibTeX RDF	Power Management, Disruption Tolerant Networks
8	Mark H. Nodine, Craig M. Files	A Mature Methodology for Implementing Multi-Valued Logic in Silicon.	ISMVL	2008	DBLP DOI BibTeX RDF	one-hot encoding, 1-of-N encoding, domino logic, null value
8	Youn-Sik Park, Sung-Wook Lee, Bai-Sun Kong, Kwang-Il Park, Jeong-Don Ihm, Joo-Sun Choi, Young-Hyun Jun	PVT-invariant single-to-differential data converter with minimum skew and duty-ratio distortion.	ISCAS	2008	DBLP DOI BibTeX RDF
8	Hae-Soo Jeon, Duk-Hyun You, In-Cheol Park	Fast frequency acquisition all-digital PLL using PVT calibration.	ISCAS	2008	DBLP DOI BibTeX RDF
8	Heinrich Moser, Ulrich Schmid 0001	Optimal Deterministic Remote Clock Estimation in Real-Time Systems.	OPODIS	2008	DBLP DOI BibTeX RDF	optimal clock synchronization, remote clock estimation, real-time systems, Distributed algorithms, computing models
8	Xie Limei	Demand-Driven Weak Clock Synchronization for Distributed Applications.	CSSE (3)	2008	DBLP DOI BibTeX RDF
8	Enrico Biermann, Claudia Ermel, Jonas Hurrelmann, Karsten Ehrig	Flexible visualization of automatic simulation based on structured graph transformation.	VL/HCC	2008	DBLP DOI BibTeX RDF
8	Laurence Loewe, Jane Hillston	The Distribution of Mutational Effects on Fitness in a Simple Circadian Clock.	CMSB	2008	DBLP DOI BibTeX RDF
8	Sirio Scipioni, Leonardo Querzoni, Sara Tucci Piergiovanni, Roberto Baldoni	A theoretical evaluation of peer-to-peer internal clock synchronization.	Autonomics	2008	DBLP DOI BibTeX RDF	internal clock synchronization, peer-to-peer systems, theoretical analysis
8	Liang Xu	SMT-Based Bounded Model Checking for Real-Time Systems (Short Paper).	QSIC	2008	DBLP DOI BibTeX RDF	real-time systems, SMT, BMC
8	Chi-Hao Wu 0001	Multi-Phase Charge Pump Generating Positive and Negative High Voltages for TFT-LCD Gate Driving.	DELTA	2008	DBLP DOI BibTeX RDF	regulated charge pump, TFT-LCD gate driver
8	Roberto Baldoni, Marco Platania, Leonardo Querzoni, Sirio Scipioni	A Peer-to-Peer Filter-Based Algorithm for Internal Clock Synchronization in Presence of Corrupted Processes.	PRDC	2008	DBLP DOI BibTeX RDF
8	Qasim M. Chaudhari, Erchin Serpedin	Estimation of clock parameters and performance benchmarks for synchronization in Wireless Sensor Networks.	AICCSA	2008	DBLP DOI BibTeX RDF
8	Abdelli Abdelkrim, Dahbia Yahiatene	Efficient computation of state space over approximation of preemptive real time systems.	AICCSA	2008	DBLP DOI BibTeX RDF
8	Krishnendu Chatterjee, Thomas A. Henzinger, Vinayak S. Prabhu	Timed Parity Games: Complexity and Robustness.	FORMATS	2008	DBLP DOI BibTeX RDF
8	Jirí Srba	Comparing the Expressiveness of Timed Automata and Timed Extensions of Petri Nets.	FORMATS	2008	DBLP DOI BibTeX RDF
8	Daniel Becker 0001, Rolf Rabenseifner, Felix Wolf 0001	Implications of non-constant clock drifts for the timestamps of concurrent events.	CLUSTER	2008	DBLP DOI BibTeX RDF
8	Swarup Mohalik, A. C. Rajeev, Manoj G. Dixit, S. Ramesh 0002, P. Vijay Suman, Paritosh K. Pandya, Shengbing Jiang	Model checking based analysis of end-to-end latency in embedded, real-time systems with clock drifts.	DAC	2008	DBLP DOI BibTeX RDF	task chain, model checking, timed automata, clock drifts, end-to-end latency
8	Gene Tsudik, Mike Burmester, Ari Juels, Alfred Kobsa, David Molnar, Roberto Di Pietro, Melanie R. Rieback	RFID security and privacy: long-term research or short-term tinkering?	WISEC	2008	DBLP DOI BibTeX RDF
8	Zbigniew Jerzak, Robert Fach, Christof Fetzer	Adaptive Internal Clock Synchronization.	SRDS	2008	DBLP DOI BibTeX RDF
8	Andrea Bondavalli, Andrea Ceccarelli, Lorenzo Falai	Assuring Resilient Time Synchronization.	SRDS	2008	DBLP DOI BibTeX RDF
8	Guillermo Rodríguez-Navas, Julián Proenza	Analytical Assessment of the Precision Degradation Caused by Faults in a Fault-Tolerant Master/Slave Clock Synchronization Service for CAN.	SRDS	2008	DBLP DOI BibTeX RDF
8	Jacob Eshet, Ben Liang 0001	Randomly Ranked Mini Slots for Fair and Efficient Medium Access Control in Ad Hoc Networks.	IEEE Trans. Mob. Comput.	2007	DBLP DOI BibTeX RDF	Distributed multihop wireless networks, random ranks, mini slots, aggregate throughput, long-term fairness, ad hoc networking, medium access control, short-term fairness, busy tone
8	Michael Short 0001, Michael J. Pont	Fault-Tolerant Time-Triggered Communication Using CAN.	IEEE Trans. Ind. Informatics	2007	DBLP DOI BibTeX RDF
8	Yael Tauman Kalai, Yehuda Lindell, Manoj Prabhakaran 0001	Concurrent Composition of Secure Protocols in the Timing Model.	J. Cryptol.	2007	DBLP DOI BibTeX RDF
8	Kypros Constantinides, Stephen Plaza, Jason A. Blome, Valeria Bertacco, Scott A. Mahlke, Todd M. Austin, Bin Zhang 0011, Michael Orshansky	Architecting a reliable CMP switch architecture.	ACM Trans. Archit. Code Optim.	2007	DBLP DOI BibTeX RDF	CMP switch, reliability, defect-tolerance
8	Kim Guldstrand Larsen, Ulrik Nyman, Andrzej Wasowski	Modeling software product lines using color-blind transition systems.	Int. J. Softw. Tools Technol. Transf.	2007	DBLP DOI BibTeX RDF	Relativized simulation, Modeling, Embedded software, Product lines, Labeled transition systems
8	Simon Kramer 0001	Logical concepts in cryptography.	SIGACT News	2007	DBLP DOI BibTeX RDF	applied formal logic, information security
8	Masaru Takesue	The SKB: A Semi-Completely-Connected Bus for On-Chip Systems.	NPC	2007	DBLP DOI BibTeX RDF
8	Alexandra Boldyreva, Craig Gentry, Adam O'Neill, Dae Hyun Yum	Ordered multisignatures and identity-based sequential aggregate signatures, with applications to secure routing.	CCS	2007	DBLP DOI BibTeX RDF
8	Ivan Radojevic, Zoran A. Salcic, Partha S. Roop	McCharts and Multiclock FSMs for modeling large scale systems.	MEMOCODE	2007	DBLP DOI BibTeX RDF
8	R. Kipp Jones, Ling Liu 0001, Farshid Alizadeh-Shabdiz	Improving Wireless Positioning with Look-ahead Map-Matching.	MobiQuitous	2007	DBLP DOI BibTeX RDF
8	Jaap-Henk Hoepman, Andreas Larsson, Elad Michael Schiller, Philippas Tsigas	Secure and Self-stabilizing Clock Synchronization in Sensor Networks.	SSS	2007	DBLP DOI BibTeX RDF	Secure and Resilient Computer Systems, Sensor-Network Systems, Self-Stabilization, Clock-synchronization
8	Daniel Becker 0001, Rolf Rabenseifner, Felix Wolf 0001	Timestamp Synchronization for Event Traces of Large-Scale Message-Passing Applications.	PVM/MPI	2007	DBLP DOI BibTeX RDF	Performance analysis, clock synchronization, event tracing
8	Hector Kirschenbaum, Alejandro De la Plaza	Voltage Pump Based on Self Clocked Cells.	ISVLSI	2007	DBLP DOI BibTeX RDF
8	Paul Wielage, Erik Jan Marinissen, Michel Altheimer, Clemens Wouters	Design and DfT of a high-speed area-efficient embedded asynchronous FIFO.	DATE	2007	DBLP DOI BibTeX RDF
8	Tobias Dubois, Erik Jan Marinissen, Mohamed Azimane, Paul Wielage, Erik Larsson, Clemens Wouters	Test quality analysis and improvement for an embedded asynchronous FIFO.	DATE	2007	DBLP DOI BibTeX RDF
8	Alex Janek, Christoph Trummer, Christian Steger, Reinhold Weiss, Josef Preishuber-Pfluegl, Markus Pistauer	Simulation Based Verification of Energy Storage Architectures for Higher Class Tags supported by Energy Harvesting Devices.	DSD	2007	DBLP DOI BibTeX RDF
8	Andrew M. Scott, Mark E. Schuelein, Marly Roncken, Jin-Jer Hwan, John Bainbridge, John R. Mawer, David L. Jackson, Andrew Bardsley	Asynchronous on-Chip Communication: Explorations on the Intel PXA27x Processor Peripheral Bus.	ASYNC	2007	DBLP DOI BibTeX RDF
8	Xu Su, Rajendra V. Boppana	On Mitigating In-band Wormhole Attacks in Mobile Ad Hoc Networks.	ICC	2007	DBLP DOI BibTeX RDF
8	Taekyu Kim, Sin-Chong Park	Arctangent Processor Design for the Frequency Offset Estimation of IEEE 802.16D Wirelessman-OFDM System.	SiPS	2007	DBLP DOI BibTeX RDF
8	Marcin Jurdzinski, Ashutosh Trivedi 0001	Reachability-Time Games on Timed Automata.	ICALP	2007	DBLP DOI BibTeX RDF
8	Patricia Bouyer, Kim Guldstrand Larsen, Nicolas Markey	Model-Checking One-Clock Priced Timed Automata.	FoSSaCS	2007	DBLP DOI BibTeX RDF
8	Roberto Baldoni, Angelo Corsaro, Leonardo Querzoni, Sirio Scipioni, Sara Tucci Piergiovanni	An Adaptive Coupling-Based Algorithm for Internal Clock Synchronization of Large Scale Dynamic Systems.	OTM Conferences (1)	2007	DBLP DOI BibTeX RDF
8	Gustavo Liñán Cembrano	Focal plane processors & pixel level processing: mimicking natural vision systems to solve image processing problems.	SBCCI	2007	DBLP DOI BibTeX RDF	analog image processing, neural networks, CMOS image sensors, focal plane
8	Rupesh S. Shelar	An efficent clustering algorithm for low power clock tree synthesis.	ISPD	2007	DBLP DOI BibTeX RDF	clustering, low power, clock tree synthesis
8	Qasim M. Chaudhari, Erchin Serpedin	A Simple Algorithm for Clock Synchronization in Wireless Sensor Networks.	WOWMOM	2007	DBLP DOI BibTeX RDF
8	Hirofumi Iwato, Keishi Sakanushi, Yoshinori Takeuchi, Masaharu Imai	A low power VLIW processor generation method by means of extracting non-redundant activation conditions.	CODES+ISSS	2007	DBLP DOI BibTeX RDF	low power, ASIP, clock gating, VLIW processor
8	Parosh Aziz Abdulla, Joël Ouaknine, Karin Quaas, James Worrell 0001	Zone-Based Universality Analysis for Single-Clock Timed Automata.	FSEN	2007	DBLP DOI BibTeX RDF
8	Young Sik Hong, J. H. No	Time Synchronization in Wireless Sensor Network Applications.	SEUS	2007	DBLP DOI BibTeX RDF	sensor network, wireless communication, time synchronization
8	Jaeha Kim, Kevin D. Jones, Mark A. Horowitz	Variable domain transformation for linear PAC analysis of mixed-signal systems.	ICCAD	2007	DBLP DOI BibTeX RDF	PAC analysis, domain transformation, linear analysis, simulation
8	Lei Cheng 0001, Deming Chen, Martin D. F. Wong, Mike Hutton, Jason Govig	Timing constraint-driven technology mapping for FPGAs considering false paths and multi-clock domains.	ICCAD	2007	DBLP DOI BibTeX RDF
8	Max Berger, Michael W. Sobolewski	A dual-time vector clock based synchronization mechanism for key-value data in the SILENUS file system.	ICPADS	2007	DBLP DOI BibTeX RDF
8	Xiaowen Li, Xinkai Chen, Xiang Xie, Guolin Li, Li Zhang 0023, Chun Zhang, Zhihua Wang 0001	A Low Power, Fully Pipelined JPEG-LS Encoder for Lossless Image Compression.	ICME	2007	DBLP DOI BibTeX RDF
8	Davide D'Aprile, Susanna Donatelli, Arnaud Sangnier, Jeremy Sproston	From Time Petri Nets to Timed Automata: An Untimed Approach.	TACAS	2007	DBLP DOI BibTeX RDF
8	Ming Su, Lili Zhou, C.-J. Richard Shi	Maximizing the throughput-area efficiency of fully-parallel low-density parity-check decoding with C-slow retiming and asynchronous deep pipelining.	ICCD	2007	DBLP DOI BibTeX RDF
8	Eric L. Hill, Mikko H. Lipasti	Transparent mode flip-flops for collapsible pipelines.	ICCD	2007	DBLP DOI BibTeX RDF
8	Azzedine Boukerche, Horacio A. B. F. de Oliveira, Eduardo Freire Nakamura, Antonio Alfredo Ferreira Loureiro	A novel lightweight algorithm for time-space localization in wireless sensor networks.	MSWiM	2007	DBLP DOI BibTeX RDF	time-space localization, sensor networks, synchronization
8	Dylan Stark, Gabrielle Allen, Tom Goodale, Thomas Radke, Erik Schnetter	An Extensible Timing Infrastructure for Adaptive Large-Scale Applications.	PPAM	2007	DBLP DOI BibTeX RDF
8	Prashant Dubey, Akhil Garg 0001, Sravan Kumar Bhaskarani	GALS Based Shared Test Architecture for Embedded Memories.	ISCAS	2007	DBLP DOI BibTeX RDF
8	Adam S. W. Man, Edward S. Zhang, Hin-Tat Chan, Vincent K. N. Lau, Chi-Ying Tsui, Howard C. Luong	Design and Implementation of a Low-power Baseband-system for RFID Tag.	ISCAS	2007	DBLP DOI BibTeX RDF
8	Muhammad Arsalan, Maitham Shams	Asynchronous Adiabatic Logic.	ISCAS	2007	DBLP DOI BibTeX RDF
8	Seungbeom Lee, Sin-Chong Park	Modified SDF Architecture for Mixed DIF/DIT FFT.	ISCAS	2007	DBLP DOI BibTeX RDF
8	Christian Groß 0007, Holger Hermanns, Reza Pulungan	Does Clock Precision Influence ZigBee's Energy Consumptions?	OPODIS	2007	DBLP DOI BibTeX RDF	Sensor networks, formal modelling, clock drift, distributed coordination, power-aware design
8	Mani Swaminathan, Martin Fränzle	A Symbolic Decision Procedure for Robust Safety of Timed Systems.	TIME	2007	DBLP DOI BibTeX RDF
8	Masaru Fukushi, Susumu Horiguchi, Luke Demoracski, Fabrizio Lombardi	A Scalable Framework for Defect Isolation of DNA Self-assemlbled Networks.	DFT	2007	DBLP DOI BibTeX RDF
8	Leandro Fabrício Auler, Roberto d'Amore	Adaptive Kalman Filter for Time Synchronization over Packet-Switched Networks: An Heuristic Approach.	COMSWARE	2007	DBLP DOI BibTeX RDF
8	S. Akshay 0001, Madhavan Mukund, K. Narayan Kumar	Checking Coverage for Infinite Collections of Timed Scenarios.	CONCUR	2007	DBLP DOI BibTeX RDF
8	Thomas Edison Yu, Tomokazu Yoneda, Danella Zhao, Hideo Fujiwara	Using Domain Partitioning in Wrapper Design for IP Cores Under Power Constraints.	VTS	2007	DBLP DOI BibTeX RDF	multi-clock domain, wrapper design, SoC, test scheduling, embedded core test
8	Peter Korteweg, Alberto Marchetti-Spaccamela, Leen Stougie, Andrea Vitaletti	Data Aggregation in Sensor Networks: Balancing Communication and Delay Costs.	SIROCCO	2007	DBLP DOI BibTeX RDF	bicriteria optimization, sensor networks, distributed algorithms, data aggregation
8	Hui Li, Yanfei Zheng, Mi Wen, Kefei Chen	A Secure Time Synchronization Protocol for Sensor Network.	PAKDD Workshops	2007	DBLP DOI BibTeX RDF	security, sensor network, Synchronization
8	Vijay A. Saraswat, Vivek Sarkar, Christoph von Praun	X10: concurrent programming for modern architectures.	PPoPP	2007	DBLP DOI BibTeX RDF	concurrent programming languages, fork-join parallelism, global shared memory, high performance computing languages, partitioned global address space languages, asynchrony, X10, hierarchical parallelism
8	S. Akshay 0001, Benedikt Bollig, Paul Gastin	Automata and Logics for Timed Message Sequence Charts.	FSTTCS	2007	DBLP DOI BibTeX RDF