Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
17 | Anand Ramalingam, Sreekumar V. Kodakara, Anirudh Devgan, David Z. Pan |
Robust analytical gate delay modeling for low voltage circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, Yokohama, Japan, January 24-27, 2006, pp. 61-66, 2006, IEEE, 0-7803-9451-8. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
17 | Evangelia Kassapaki, Pavlos M. Mattheakis, Christos P. Sotiriou |
Actual-Delay Circuits on FPGA: Trading-Off Luts for Speed. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: Proceedings of the 2006 International Conference on Field Programmable Logic and Applications (FPL), Madrid, Spain, August 28-30, 2006, pp. 1-6, 2006, IEEE, 1-4244-0312-X. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
17 | Kou Yamada, Hiroshi Takenaga |
The Parametrization of All Stabilizing Smith Predictors for Certain Class of Non-Minimum Phase Time-Delay Plants. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICICIC (1) ![In: First International Conference on Innovative Computing, Information and Control (ICICIC 2006), 30 August - 1 September 2006, Beijing, China, pp. 694-697, 2006, IEEE Computer Society, 0-7695-2616-0. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
17 | Stijn De Vuyst, Sabine Wittevrongel, Herwig Bruneel |
Parametric delay differentiation between packet flows using multiple reserved spaces. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VALUETOOLS ![In: Proceedings of the 1st International Conference on Performance Evaluation Methodolgies and Tools, VALUETOOLS 2006, Pisa, Italy, October 11-13, 2006, pp. 40, 2006, ACM, 1-59593-504-5. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
17 | Xiaomin Dong, Miao Yu, Changrong Liao, Weimin Chen, Hong Hui Zhang, Shanglian Huang |
Adaptive Fuzzy Neural Network Control for Transient Dynamics of Magneto-rheological Suspension with Time-Delay. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISNN (2) ![In: Advances in Neural Networks - ISNN 2006, Third International Symposium on Neural Networks, Chengdu, China, May 28 - June 1, 2006, Proceedings, Part II, pp. 1046-1051, 2006, Springer, 3-540-34437-3. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
17 | Run-Nian Ma, Guoqiang Bai 0001 |
Stability Conditions for Discrete Hopfield Neural Networks with Delay. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICIC (1) ![In: Intelligent Computing, International Conference on Intelligent Computing, ICIC 2006, Kunming, China, August 16-19, 2006. Proceedings, Part I, pp. 476-481, 2006, Springer, 3-540-37271-7. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
17 | Dan Jurca, Pascal Frossard |
Media Streaming with Conservative Delay on Variable Rate Channels. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICME ![In: Proceedings of the 2006 IEEE International Conference on Multimedia and Expo, ICME 2006, July 9-12 2006, Toronto, Ontario, Canada, pp. 1841-1844, 2006, IEEE Computer Society, 1-4244-0367-7. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
17 | Keith A. Bowman, James W. Tschanz, Muhammad M. Khellah, Maged Ghoneima, Yehea I. Ismail, Vivek De |
Time-borrowing multi-cycle on-chip interconnects for delay variation tolerance. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: Proceedings of the 2006 International Symposium on Low Power Electronics and Design, 2006, Tegernsee, Bavaria, Germany, October 4-6, 2006, pp. 79-84, 2006, ACM, 1-59593-462-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
intra-die variations, multi-cycle interconnect, parameter fluctuations, time borrowing, interconnect, parameter variations, within-die variations, variation tolerant |
17 | Vasilis F. Pavlidis, Eby G. Friedman |
Via placement for minimum interconnect delay in three-dimensional (3D) circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2006), 21-24 May 2006, Island of Kos, Greece, 2006, IEEE, 0-7803-9389-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
17 | Sang-Seon Byun, Chuck Yoo |
Reducing Delivery Delay in HRM Tree. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCSA (2) ![In: Computational Science and Its Applications - ICCSA 2006, International Conference, Glasgow, UK, May 8-11, 2006, Proceedings, Part II, pp. 1189-1198, 2006, Springer, 3-540-34072-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
17 | Praveen Ghanta, Sarma B. K. Vrudhula |
Variational Interconnect Delay Metrics for Statistical Timing Analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 7th International Symposium on Quality of Electronic Design (ISQED 2006), 27-29 March 2006, San Jose, CA, USA, pp. 19-24, 2006, IEEE Computer Society, 0-7695-2523-7. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
17 | Vishal J. Mehta, Malgorzata Marek-Sadowska, Zhiyuan Wang, Kun-Han Tsai, Janusz Rajski |
Delay Fault Diagnosis for Non-Robust Test. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 7th International Symposium on Quality of Electronic Design (ISQED 2006), 27-29 March 2006, San Jose, CA, USA, pp. 463-472, 2006, IEEE Computer Society, 0-7695-2523-7. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
17 | Zhengang Pan, Jingxiu Liu, Lan Chen, Kenichi Higuchi, Mamoru Sawahashi |
Multi-degree Random Cyclic Delay Diversity in MISO Systems with Frequency-Domain Scheduling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
APCCAS ![In: IEEE Asia Pacific Conference on Circuits and Systems 2006, APCCAS 2006, Singapore, 4-7 December 2006, pp. 131-134, 2006, IEEE, 1-4244-0387-1. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
17 | Run-Nian Ma, Guoqiang Bai 0001 |
Convergence Study of Discrete Neural Networks with Delay. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICONIP (1) ![In: Neural Information Processing, 13th International Conference, ICONIP 2006, Hong Kong, China, October 3-6, 2006, Proceedings, Part I, pp. 554-561, 2006, Springer, 3-540-46479-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
17 | Wei Luo, Krishna Balachandran, Sanjiv Nanda, K. K. Chang |
Delay analysis of selective-repeat ARQ with applications to link adaptation in wireless packet data systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Wirel. Commun. ![In: IEEE Trans. Wirel. Commun. 4(3), pp. 1017-1029, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
17 | Anup Kumar Sultania, Dennis Sylvester, Sachin S. Sapatnekar |
Gate oxide leakage and delay tradeoffs for dual-Tox circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 13(12), pp. 1362-1375, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
17 | Xiang Lu, Zhuo Li 0001, Wangqi Qiu, D. M. H. Walker, Weiping Shi |
Longest-path selection for delay test under process variation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 24(12), pp. 1924-1929, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
17 | Puneet Gupta 0001, Andrew B. Kahng, Ion I. Mandoiu, Puneet Sharma |
Layout-aware scan chain synthesis for improved path delay fault coverage. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 24(7), pp. 1104-1114, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
17 | Zhiyuan Wang, Malgorzata Marek-Sadowska, Kun-Han Tsai, Janusz Rajski |
Delay-fault diagnosis using timing information. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 24(9), pp. 1315-1325, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
17 | Sunthiti Patchararungruang, Saman K. Halgamuge, Nirmala Shenoy |
Optimized rule-based delay proportion adjustment for proportional differentiated services. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Sel. Areas Commun. ![In: IEEE J. Sel. Areas Commun. 23(2), pp. 261-276, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
17 | Hyung Seok Kim, Tarek F. Abdelzaher, Wook Hyun Kwon |
Dynamic delay-constrained minimum-energy dissemination in wireless sensor networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Embed. Comput. Syst. ![In: ACM Trans. Embed. Comput. Syst. 4(3), pp. 679-706, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
Sensor network, multicast, energy |
17 | Heng Wang, Narayan B. Mandayam |
Opportunistic file transfer over a fading channel under energy and delay constraints. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Commun. ![In: IEEE Trans. Commun. 53(4), pp. 632-644, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
17 | Trong Thua Huynh, Choong Seon Hong |
An Energy*Delay Efficient Routing Scheme for Wireless Sensor Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MMNS ![In: Management of Multimedia Networks and Services, 8th International Conference on Management of Multimedia Networks and Services, MMNS 2005, Barcelona, Spain, October 24-26, 2005, Proceedings, pp. 11-22, 2005, Springer, 3-540-29641-7. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
17 | Haihua Yan, Adit D. Singh, Gefu Xu |
Delay Defect Characterization Using Low Voltage Test. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asian Test Symposium ![In: 14th Asian Test Symposium (ATS 2005), 18-21 December 2005, Calcutta, India, pp. 8-13, 2005, IEEE Computer Society, 0-7695-2481-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
17 | T. M. Mak |
Limitation of structural scan delay test. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asian Test Symposium ![In: 14th Asian Test Symposium (ATS 2005), 18-21 December 2005, Calcutta, India, pp. 471, 2005, IEEE Computer Society, 0-7695-2481-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
17 | Gaoming Huang, Luxi Yang, Zhenya He |
Application of Blind Source Separation to Time Delay Estimation in Interference Environments. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISNN (2) ![In: Advances in Neural Networks - ISNN 2005, Second International Symposium on Neural Networks, Chongqing, China, May 30 - June 1, 2005, Proceedings, Part II, pp. 496-501, 2005, Springer, 3-540-25913-9. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
17 | Shang-Wei Tu, Jing-Yang Jou, Yao-Wen Chang |
RLC coupling-aware simulation for on-chip buses and their encoding for delay reduction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (4) ![In: International Symposium on Circuits and Systems (ISCAS 2005), 23-26 May 2005, Kobe, Japan, pp. 4134-4137, 2005, IEEE, 0-7803-8834-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
17 | Chien-Cheng Tseng |
Improved design of fractional order differentiator using fractional sample delay. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (4) ![In: International Symposium on Circuits and Systems (ISCAS 2005), 23-26 May 2005, Kobe, Japan, pp. 3713-3716, 2005, IEEE, 0-7803-8834-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
17 | Moonseong Kim, Young-Cheol Bang, Hyunseung Choo |
Estimated Path Selection for the Delay Constrained Least Cost Path. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Panhellenic Conference on Informatics ![In: Advances in Informatics, 10th Panhellenic Conference on Informatics, PCI 2005, Volos, Greece, November 11-13, 2005, Proceedings, pp. 112-122, 2005, Springer, 3-540-29673-5. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
17 | Irith Pomeranz, Sudhakar M. Reddy |
Tuple Detection for Path Delay Faults: A Method for Improving Test Set Quality. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 18th International Conference on VLSI Design (VLSI Design 2005), with the 4th International Conference on Embedded Systems Design, 3-7 January 2005, Kolkata, India, pp. 41-46, 2005, IEEE Computer Society, 0-7695-2264-5. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
17 | Chao-Yang Yeh, Malgorzata Marek-Sadowska |
Sequential delay budgeting with interconnect prediction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 12(10), pp. 1028-1037, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
17 | Kan Takeuchi, Kazumasa Yanagisawa, Takashi Sato, Kazuko Sakamoto, Saburo Hojo |
Probabilistic crosstalk delay estimation for ASICs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 23(9), pp. 1377-1383, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
17 | Andrew B. Kahng, Xu Xu 0001 |
Local unidirectional bias for cutsize-delay tradeoff in performance-driven bipartitioning. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 23(4), pp. 464-471, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
17 | William S. Evans, David G. Kirkpatrick |
Optimally scheduling video-on-demand to minimize delay when server and receiver bandwidth may differ. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SODA ![In: Proceedings of the Fifteenth Annual ACM-SIAM Symposium on Discrete Algorithms, SODA 2004, New Orleans, Louisiana, USA, January 11-14, 2004, pp. 1041-1049, 2004, SIAM, 0-89871-558-X. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP BibTeX RDF |
|
17 | Runnian Ma, Youmin Xi, Hangshan Gao |
Stability of Discrete Hopfield Networks with Delay in Serial Mode. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISNN (1) ![In: Advances in Neural Networks - ISNN 2004, International Symposium on Neural Networks, Dalian, China, August 19-21, 2004, Proceedings, Part I, pp. 126-131, 2004, Springer, 3-540-22841-1. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
17 | Zaiping Chen, Liang Liu, Jiangfeng Zhang |
Observer based networked control systems with network-induced time delay. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SMC (4) ![In: Proceedings of the IEEE International Conference on Systems, Man & Cybernetics: The Hague, Netherlands, 10-13 October 2004, pp. 3333-3337, 2004, IEEE, 0-7803-8566-7. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
17 | Daisuke Maruyama, Akira Kanuma, Takashi Mochiyama, Hiroaki Komatsu, Yaroku Sugiyama, Noriyuki Ito |
Detection of multiple transitions in delay fault test of SPARC64 microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: 2004 International Conference on Computer-Aided Design, ICCAD 2004, San Jose, CA, USA, November 7-11, 2004, pp. 893-898, 2004, IEEE Computer Society / ACM, 0-7803-8702-3. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
17 | Moonseong Kim, Young-Cheol Bang, Hyunseung Choo |
On Balancing Delay and Cost for Routing Paths. ![Search on Bibsonomy](Pics/bibsonomy.png) |
International Conference on Computational Science ![In: Computational Science - ICCS 2004, 4th International Conference, Kraków, Poland, June 6-9, 2004, Proceedings, Part I, pp. 602-606, 2004, Springer, 3-540-22114-X. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
17 | Haining Liu, Magda El Zarki |
Adaptive Delay and Synchronization Control for Wi-Fi Based AV Conferencing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
QSHINE ![In: 1st International Conference on Quality of Service in Heterogeneous Wired/Wireless Networks (QSHINE 2004), 18-20 October 2004, Dallas, TX, USA, pp. 84-91, 2004, IEEE Computer Society, 0-7695-2233-5. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
17 | Goran Molnar, Mladen Vucic |
Design of constant-delay systems based on symmetry of time-domain response. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (1) ![In: Proceedings of the 2004 International Symposium on Circuits and Systems, ISCAS 2004, Vancouver, BC, Canada, May 23-26, 2004, pp. 1024-1027, 2004, IEEE, 0-7803-8251-X. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
17 | Young-Cheol Bang, Inki Hong, Sungchang Lee, ByungJun Ahn |
On Algorithms for Minimum-Cost Quickest Paths with Multiple Delay-Bounds. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCSA (1) ![In: Computational Science and Its Applications - ICCSA 2004, International Conference, Assisi, Italy, May 14-17, 2004, Proceedings, Part I, pp. 1125-1133, 2004, Springer, 3-540-22054-2. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
17 | M. L. Yan, C. K. Li |
Delay-Differentiable Fair Queueing (D2FQ): A Low Complexity Scheduling Algorithm for Packet-Switched Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AINA (1) ![In: 18th International Conference on Advanced Information Networking and Applications (AINA 2004), 29-31 March 2004, Fukuoka, Japan, pp. 107-112, 2004, IEEE Computer Society, 0-7695-2051-0. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
17 | Shahdad Irajpour, Sandeep K. Gupta 0001, Melvin A. Breuer |
Timing-Independent Testing of Crosstalk in the Presence of Delay Producing Defects Using Surrogate Fault Models. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings 2004 International Test Conference (ITC 2004), October 26-28, 2004, Charlotte, NC, USA, pp. 1024-1033, 2004, IEEE Computer Society, 0-7803-8581-0. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
17 | Patrick Girard 0001, Olivier Héron, Serge Pravossoudovitch, Michel Renovell |
High Quality TPG for Delay Faults in Look-Up Tables of FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: 2nd IEEE International Workshop on Electronic Design, Test and Applications (DELTA 2004), 28-30 January 2004, Perth, Australia, pp. 83-88, 2004, IEEE Computer Society, 0-7695-2081-2. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
17 | Madhu Mutyam |
Preventing Crosstalk Delay using Fibonacci Representation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 17th International Conference on VLSI Design (VLSI Design 2004), with the 3rd International Conference on Embedded Systems Design, 5-9 January 2004, Mumbai, India, pp. 685-688, 2004, IEEE Computer Society, 0-7695-2072-3. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
17 | Puneet Gupta 0001, Andrew B. Kahng |
Wire Swizzling to Reduce Delay Uncertainty Due to Capacitive Coupling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 17th International Conference on VLSI Design (VLSI Design 2004), with the 3rd International Conference on Embedded Systems Design, 5-9 January 2004, Mumbai, India, pp. 431-436, 2004, IEEE Computer Society, 0-7695-2072-3. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
17 | N. V. Arvind, K. A. Rajagopal, H. S. Ajith, Das Suparna |
Path Based Approach for Crosstalk Delay Analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 17th International Conference on VLSI Design (VLSI Design 2004), with the 3rd International Conference on Embedded Systems Design, 5-9 January 2004, Mumbai, India, pp. 727-730, 2004, IEEE Computer Society, 0-7695-2072-3. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
17 | Kanak Agarwal, Dennis Sylvester, David T. Blaauw, Frank Liu 0001, Sani R. Nassif, Sarma B. K. Vrudhula |
Variational delay metrics for interconnect timing analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 41th Design Automation Conference, DAC 2004, San Diego, CA, USA, June 7-11, 2004, pp. 381-384, 2004, ACM, 1-58113-828-8. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
Performance, Design |
17 | Qiong Li, David L. Mills |
The Implication of Short-Range Dependency on Delay Variation Measurement. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NCA ![In: 2nd IEEE International Symposium on Network Computing and Applications (NCA 2003), 16-18 April 2003, Cambridge, MA, USA, pp. 374-380, 2003, IEEE Computer Society, 0-7695-1938-5. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
17 | Ulrich Seidl, Klaus Eckl, Frank M. Johannes |
Performance-Directed Retiming for FPGAs Using Post-Placement Delay Information. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2003 Design, Automation and Test in Europe Conference and Exposition (DATE 2003), 3-7 March 2003, Munich, Germany, pp. 10770-10777, 2003, IEEE Computer Society, 0-7695-1870-2. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
17 | Dimitrios Velenis, Marios C. Papaefthymiou, Eby G. Friedman |
Reduced Delay Uncertainty in High Performance Clock Distribution Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2003 Design, Automation and Test in Europe Conference and Exposition (DATE 2003), 3-7 March 2003, Munich, Germany, pp. 10068-10075, 2003, IEEE Computer Society, 0-7695-1870-2. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
17 | Huawei Li 0001, Yue Zhang, Xiaowei Li 0001 |
Delay Test Pattern Generation Considering Crosstalk-Induced Effects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asian Test Symposium ![In: 12th Asian Test Symposium (ATS 2003), 17-19 November 2003, Xian, China, pp. 178-183, 2003, IEEE Computer Society, 0-7695-1951-2. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
17 | Venkatesan Rajappan, Sachin S. Sapatnekar |
An Efficient Algorithm for Calculating the Worst-case Delay due to Crosstalk. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 21st International Conference on Computer Design (ICCD 2003),VLSI in Computers and Processors, 13-15 October 2003, San Jose, CA, USA, Proceedings, pp. 76-, 2003, IEEE Computer Society, 0-7695-2025-1. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
17 | Lai Yin Ngan, Yuntao Wu, Hing-Cheung So, Pak-Chung Ching, Siu Wa Lee |
Joint time delay and pitch estimation for speaker localization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (3) ![In: Proceedings of the 2003 International Symposium on Circuits and Systems, ISCAS 2003, Bangkok, Thailand, May 25-28, 2003, pp. 722-725, 2003, IEEE, 0-7803-7761-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
17 | Kuo-Hsing Cheng, Yu-Lung Lo, Wen Fang Yu |
A mixed-mode delay-locked loop for wide-range operation and multiphase outputs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (2) ![In: Proceedings of the 2003 International Symposium on Circuits and Systems, ISCAS 2003, Bangkok, Thailand, May 25-28, 2003, pp. 196-199, 2003, IEEE, 0-7803-7761-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
17 | Sayed Vahid Azhari, Nasser Yazdani, Ali Mohammad Zareh Bidoki |
Providing Delay Guarantee in Input Queued Switches: A Comparative Analysis of Scheduling Algorithms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICOIN ![In: Information Networking, Networking Technologies for Enhanced Internet Services International Conference, ICOIN 2003, Cheju Island, Korea, February 12-14, 2003, Revised Selected Papers, pp. 3-13, 2003, Springer, 3-540-40827-4. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
17 | SangSik Yoon, Deokjai Choi |
A Constrained Multi-path Finding Mechanism Considering Available Bandwidth and Delay of MPLS LSP. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICOIN ![In: Information Networking, Networking Technologies for Enhanced Internet Services International Conference, ICOIN 2003, Cheju Island, Korea, February 12-14, 2003, Revised Selected Papers, pp. 56-65, 2003, Springer, 3-540-40827-4. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
17 | Arun Krishnamachary, Jacob A. Abraham |
Effects of Multi-cycle Sensitization on Delay Tests. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 16th International Conference on VLSI Design (VLSI Design 2003), 4-8 January 2003, New Delhi, India, pp. 137-142, 2003, IEEE Computer Society, 0-7695-1868-0. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
17 | Kuo-Hsing Cheng, Yu-Lung Lo, Wen Fang Yu, Shu-Yin Hung |
A Mixed-Mode Delay-Locked Loop for Wide-Range Operation and Multiphase Clock Generation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IWSOC ![In: Proceedings of the 3rd IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC'03), 30 June - 2 July 2003, Calgary, Alberta, Canada, pp. 90-93, 2003, IEEE Computer Society, 0-7695-1944-X. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
17 | Constantinos Dovrolis, Dimitrios Stiliadis, Parameswaran Ramanathan |
Proportional differentiated services: delay differentiation and packet scheduling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE/ACM Trans. Netw. ![In: IEEE/ACM Trans. Netw. 10(1), pp. 12-26, 2002. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
Dynamic priorities, resource management algorithms, quality of service |
17 | Mustafa Türkboylari, Vijay K. Madisetti |
Effect of handoff delay on the system performance of TDMA cellular systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MWCN ![In: Proceedings of The Fourth IEEE Conference on Mobile and Wireless Communications Networks, MWCN 2002, September 9-11, 2002, Stockholm, Sweden, pp. 411-415, 2002, IEEE. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
17 | Hasan Ural, Keqin Zhu |
Fault Recovery for a Distributed SP-Based Delay Constrained Multicast Routing Algorithm. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 16th International Parallel and Distributed Processing Symposium (IPDPS 2002), 15-19 April 2002, Fort Lauderdale, FL, USA, CD-ROM/Abstracts Proceedings, 2002, IEEE Computer Society, 0-7695-1573-8. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
17 | Frank Liu 0001, Chandramouli V. Kashyap, Charles J. Alpert |
A delay metric for RC circuits based on the Weibull distribution. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: Proceedings of the 2002 IEEE/ACM International Conference on Computer-aided Design, ICCAD 2002, San Jose, California, USA, November 10-14, 2002, pp. 620-624, 2002, ACM / IEEE Computer Society, 0-7803-7607-2. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
17 | Cristinel Ababei, Navaratnasothie Selvakkumaran, Kia Bazargan, George Karypis |
Multi-objective circuit partitioning for cutsize and path-based delay minimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: Proceedings of the 2002 IEEE/ACM International Conference on Computer-aided Design, ICCAD 2002, San Jose, California, USA, November 10-14, 2002, pp. 181-185, 2002, ACM / IEEE Computer Society, 0-7803-7607-2. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
17 | Cliff C. N. Sze, Ting-Chi Wang |
Optimal circuit clustering with variable interconnect delay. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (4) ![In: Proceedings of the 2002 International Symposium on Circuits and Systems, ISCAS 2002, Scottsdale, Arizona, USA, May 26-29, 2002, pp. 707-710, 2002, IEEE, 0-7803-7448-7. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
17 | Yuan-Cheng Lai, Wei-Hsi Li, Arthur Chang |
A Novel Scheduler for the Proportional Delay Differentiation Model by Considering Packet Transmission Time. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICOIN (1) ![In: Information Networking, Wireless Communications Technologies and Network Applications, International Conference, ICOIN 2002, Cheju Island, Korea, January 30 - February 1, 2002, Revised Papers, Part I, pp. 527-538, 2002, Springer, 3-540-44256-1. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
17 | Sung-Ho Hwang, Ki Jun Han |
A Fast Access Scheme to Meet Delay Requirement for Wireless Access Network. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ADVIS ![In: Advances in Information Systems, Second International Conference, ADVIS 2002, Izmir, Turkey, October 23-25, 2002, Proceedings, pp. 356-365, 2002, Springer, 3-540-00009-7. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
17 | Kazuhito Ito, Daisuke Suzuki |
A high-level synthesis method for simultaneous placement and scheduling considering data communication delay. ![Search on Bibsonomy](Pics/bibsonomy.png) |
APCCAS (1) ![In: IEEE Asia Pacific Conference on Circuits and Systems 2002, APCCAS 2002, Singapore, 16-18 December 2002, pp. 149-154, 2002, IEEE, 0-7803-7690-0. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
17 | Sabine Bostelmann |
Categorization of Time Delay by Means of Neural Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Fuzzy Days ![In: Computational Intelligence, Theory and Applications, International Conference, 7th Fuzzy Days, Dortmund, Germany, October 1-3, 2001, Proceedings, pp. 565-575, 2001, Springer, 3-540-42732-5. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
17 | Michinobu Nakao, Yoshikazu Kiyoshige, Kazumi Hatayama, Yasuo Sato, Takaharu Nagumo |
Test Generation for Multiple-Threshold Gate-Delay Fault Model. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asian Test Symposium ![In: 10th Asian Test Symposium (ATS 2001), 19-21 November 2001, Kyoto, Japan, pp. 244-, 2001, IEEE Computer Society, 0-7695-1378-6. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
17 | Akihiko Machizawa, Kazunori Sugiura, Takahiro Komine, Haruo Okazawa, Shin-ichi Nakagawa |
On the Delay and Quality of DV Transmission Systems Using ATM Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICOIN ![In: The 15th International Conference on Information Networking, ICOIN 2001, Beppu City, Oita, Japan, January 31 - February 2, 2001, pp. 709-713, 2001, IEEE Computer Society, 0-7695-0951-7. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
17 | Róbert Szabó, Peter Barta, Felician Németh, József Bíró |
Worst-Case Deterministic Delay Bounds for Arbitrary Weighted Generalized Processor Sharing Schedulers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NETWORKING ![In: NETWORKING 2000, Broadband Communications, High Performance Networking, and Performance of Communication Networks, IFIP-TC6 / European Commission International Conference, Paris, France, May 14-19, 2000, Proceedings, pp. 727-739, 2000, Springer, 3-540-67506-X. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
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17 | Tung Chong Wong, Jon W. Mark, Kee Chaing Chua |
Delay jitter performance of video traffic in a cellular wireless ATM network. ![Search on Bibsonomy](Pics/bibsonomy.png) |
WOWMOM ![In: Proceedings of the Third ACM International Workshop on Wireless Mobile Multimedia, WOWMOM 2000, Boston, Massachusetts, USA, August 11, 2000, pp. 101-107, 2000, ACM, 1-58113-302-2. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
17 | Rajeev Murgai |
Delay-Constrained Area Recovery Via Layout-Driven Buffer Optimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 13th International Conference on VLSI Design (VLSI Design 2000), 4-7 January 2000, Calcutta, India, pp. 240-, 2000, IEEE Computer Society, 0-7695-0487-6. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
17 | Soha Hassoun |
Critical path analysis using a dynamically bounded delay model. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 37th Conference on Design Automation, Los Angeles, CA, USA, June 5-9, 2000., pp. 260-265, 2000, ACM. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
17 | Mahesh Ketkar, Kishore Kasamsetty, Sachin S. Sapatnekar |
Convex delay models for transistor sizing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 37th Conference on Design Automation, Los Angeles, CA, USA, June 5-9, 2000., pp. 655-660, 2000, ACM. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
SPICE |
17 | Tomoyuki Yoda, Atsushi Takahashi 0001, Yoji Kajitani |
Clock Period Minimization of Semi-Synchronous Circuits by Gate-Level Delay Insertion. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 1999 Conference on Asia South Pacific Design Automation, Wanchai, Hong Kong, China, January 18-21, 1999, pp. 125-, 1999, IEEE Computer Society, 0-7803-5012-X. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
17 | Antti Mäntyniemi, Timo Rahkonen, Juha Kostamovaara |
A high resolution digital CMOS time-to-digital converter based on nested delay locked loops. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (2) ![In: Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30 - June 2, 1999, pp. 537-540, 1999, IEEE, 0-7803-5471-0. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
17 | Emrah Acar, Altan Odabasioglu, Mustafa Celik, Lawrence T. Pileggi |
S2P: A Stable 2-Pole RC Delay and Coupling Noise Metric. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Great Lakes Symposium on VLSI ![In: 9th Great Lakes Symposium on VLSI (GLS-VLSI '99), 4-6 March 1999, Ann Arbor, MI, USA, pp. 60-63, 1999, IEEE Computer Society, 0-7695-0104-4. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
17 | Jayabrata Ghosh-Dastidar, Nur A. Touba |
Adaptive Techniques for Improving Delay Fault Diagnosis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 17th IEEE VLSI Test Symposium (VTS '99), 25-30 April 1999, San Diego, CA, USA, pp. 168-172, 1999, IEEE Computer Society, 0-7695-0146-X. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
17 | Subhashis Majumder, Bhargab B. Bhattacharya, Vishwani D. Agrawal, Michael L. Bushnell |
A Complete Characterization of Path Delay Faults through Stuck-at Faults. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 12th International Conference on VLSI Design (VLSI Design 1999), 10-13 January 1999, Goa, India, pp. 492-497, 1999, IEEE Computer Society, 0-7695-0013-7. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
17 | Juinn-Dar Huang, Jing-Yang Jou, Wen-Zen Shen, Hsien-Ho Chuang |
On circuit clustering for area/delay tradeoff under capacity and pin constraints. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 6(4), pp. 634-642, 1998. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
17 | Cheng-Wen Wu, Chih-Yuang Su |
A Probabilistic Model for Path Delay Faults. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asian Test Symposium ![In: 7th Asian Test Symposium (ATS '98), 2-4 December 1998, Singapore, pp. 70-75, 1998, IEEE Computer Society, 0-8186-8277-9. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
17 | Nilanjan Mukherjee 0001, Tapan J. Chakraborty, Sudipta Bhawmik |
A BIST scheme for the detection of path-delay faults. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 1998, Washington, DC, USA, October 18-22, 1998, pp. 422-431, 1998, IEEE Computer Society, 0-7803-5093-6. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
17 | Charles J. Alpert, Anirudh Devgan, Stephen T. Quay |
Buffer Insertion for Noise and Delay Optimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 35th Conference on Design Automation, Moscone center, San Francico, California, USA, June 15-19, 1998., pp. 362-367, 1998, ACM Press, 0-89791-964-5. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
logic synthesis, gate-sizing, fanout optimization |
17 | Majid Sarrafzadeh, David A. Knol, Gustavo E. Téllez |
A delay budgeting algorithm ensuring maximum flexibility in placement. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 16(11), pp. 1332-1341, 1997. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
17 | Hannah Honghua Yang, Martin D. F. Wong |
Circuit clustering for delay minimization under area and pin constraints. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 16(9), pp. 976-986, 1997. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
17 | Kwang-Ting Cheng, Hsi-Chuan Chen |
Classification and identification of nonrobust untestable path delay faults. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 15(8), pp. 845-853, 1996. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
|
17 | Irith Pomeranz, Sudhakar M. Reddy, Prasanti Uppaluri |
NEST: a nonenumerative test generation method for path delay faults in combinational circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 14(12), pp. 1505-1515, 1995. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
|
17 | Irith Pomeranz, Sudhakar M. Reddy |
An efficient nonenumerative method to estimate the path delay fault coverage in combinational circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 13(2), pp. 240-250, 1994. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
|
17 | Weiwei Mao, Michael D. Ciletti |
Reducing correlation to improve coverage of delay faults in scan-path design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 13(5), pp. 638-646, 1994. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
|
17 | Andrzej Krasniewski, Leszek B. Wronski |
Coverage of Delay Faults: When 13% and 99% Mean the Same. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EDCC ![In: Dependable Computing - EDCC-1, First European Dependable Computing Conference, Berlin, Germany, October 4-6, 1994, Proceedings, pp. 178-195, 1994, Springer, 3-540-58426-9. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
|
17 | Andrew B. Kahng, Chung-Wen Albert Tsao |
Low-cost single-layer clock trees with exact zero Elmore delay skew. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: Proceedings of the 1994 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 1994, San Jose, California, USA, November 6-10, 1994, pp. 213-218, 1994, IEEE Computer Society / ACM, 0-89791-690-5. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
|
17 | Kwang-Ting Cheng, Srinivas Devadas, Kurt Keutzer |
Delay-fault test generation and synthesis for testability under a standard scan design methodology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 12(8), pp. 1217-1231, 1993. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP DOI BibTeX RDF |
|
17 | Srinivas Devadas, Kurt Keutzer, Sharad Malik, Albert R. Wang |
Computation of floating mode delay in combinational circuits: practice and implementation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 12(12), pp. 1924-1936, 1993. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP DOI BibTeX RDF |
|
17 | Srinivas Devadas, Kurt Keutzer, Sharad Malik |
Computation of floating mode delay in combinational circuits: theory and algorithms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 12(12), pp. 1913-1923, 1993. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP DOI BibTeX RDF |
|
17 | Srinivas Devadas, Kurt Keutzer |
Synthesis of robust delay-fault-testable circuits: theory. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 11(1), pp. 87-101, 1992. The full citation details ...](Pics/full.jpeg) |
1992 |
DBLP DOI BibTeX RDF |
|
17 | Carlos H. Díaz, Sung-Mo Kang, Yusuf Leblebici |
An accurate analytical delay model for BiCMOS driver circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 10(5), pp. 577-588, 1991. The full citation details ...](Pics/full.jpeg) |
1991 |
DBLP DOI BibTeX RDF |
|
17 | Subhash C. Agrawal, Ravi Ramaswamy |
Analysis of the Resequencing Delay for M/M/m Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SIGMETRICS ![In: Proceedings of the 1987 ACM SIGMETRICS conference on Measurement and modeling of computer systems, Banff, Alberta, Canada, May 11-14, 1987, pp. 27-36, 1987, ACM, 0-89791-225-X. The full citation details ...](Pics/full.jpeg) |
1987 |
DBLP DOI BibTeX RDF |
SNA |
17 | Vaishali P. Sadaphal, Bijendra N. Jain |
Random and Periodic Sleep Schedules for Target Detection in Sensor Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Comput. Sci. Technol. ![In: J. Comput. Sci. Technol. 23(3), pp. 343-354, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
energy conservation, target detection, sleep schedule |