Search results for "AXI"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
139	Armando Sánchez-Peña, Pedro P. Carballo, Luz García 0001, Antonio Núñez	VIPACES, Verification Interface Primitives for the Development of AXI Compliant Elements and Systems.	DSD	2006	DBLP DOI BibTeX RDF	AMBA 3 AXI, VIPACES, Virtual Components, Verification, Test, System-on-Chip (SoC), IP, DCT, Emulation, SystemC, Environment, TLM, IDCT, VIP
97	Hyun-min Kyung, Gi-Ho Park, Jong Wook Kwak, WooKyeong Jeong, Tae-Jin Kim, Sung-Bae Park	Performance monitor unit design for an AXI-based multi-core SoC platform.	SAC	2007	DBLP DOI BibTeX RDF	SOC platform, performance monitor, architecture exploration, AMBA, AXI
50	Zhe Jiang 0004, Kecheng Yang 0001, Nathan Fisher, Ian Gray, Neil C. Audsley, Zheng Dong 0002	AXI-IC$^{\mathrm{ RT}}$ RT : Towards a Real-Time AXI-Interconnect for Highly Integrated SoCs.	IEEE Trans. Computers	2023	DBLP DOI BibTeX RDF
50	Shuaiting Ma, Jinxue Sui, Xia Zhang	AXI, APB and AXI NOC Model Design Based on SysmteC.	ICNCC	2022	DBLP DOI BibTeX RDF
50	Zhe Jiang 0004, Neil C. Audsley, Dayu Shill, Kecheng Yang 0001, Nathan Fisher, Zheng Dong 0002	Brief Industry Paper: AXI-InterconnectRT: Towards a Real-Time AXI-Interconnect for System-on-Chips.	RTAS	2021	DBLP DOI BibTeX RDF
50	Fabio Benevenuti, Fernanda Lima Kastensmidt	Reliability evaluation on interfacing with AXI and AXI-S on Xilinx Zynq-7000 AP-SoC.	LATS	2018	DBLP DOI BibTeX RDF
50	Jun-hee Yoo, Dongwook Lee, Sungjoo Yoo, Kiyoung Choi	Communication Architecture Synthesis of Cascaded Bus Matrix.	ASP-DAC	2007	DBLP DOI BibTeX RDF	AMBA3 AXI, cascaded bus matrix, on-chip communication architecture, bus topology, encoding method, traffic group encoding, simulated annealing, design space exploration
43	Huandong Wang, Dan Tang, Xiang Gao, Yunji Chen	An Enhanced HyperTransport Controller with Cache Coherence Support for Multiple-CMP.	NAS	2009	DBLP DOI BibTeX RDF
35	Qingsen Yan, Axi Niu, Chaoqun Wang, Wei Dong, Marcin Wozniak, Yanning Zhang	KGSR: A kernel guided network for real-world blind super-resolution.	Pattern Recognit.	2024	DBLP DOI BibTeX RDF
35	Axi Niu, Pei Wang, Yu Zhu 0004, Jinqiu Sun, Qingsen Yan, Yanning Zhang	GRAN: ghost residual attention network for single image super resolution.	Multim. Tools Appl.	2024	DBLP DOI BibTeX RDF
35	Chenshuang Zhang, Chaoning Zhang, Kang Zhang 0008, Axi Niu, Junmo Kim, In So Kweon	Towards Understanding Dual BN In Hybrid Adversarial Training.	CoRR	2024	DBLP DOI BibTeX RDF
35	Trung Xuan Pham, Axi Niu, Kang Zhang 0008, Joshua Tian Jin Tee, Ji Woo Hong, Chang D. Yoo	Self-Supervised Visual Representation Learning via Residual Momentum.	IEEE Access	2023	DBLP DOI BibTeX RDF
35	Yaoqi Hu, Axi Niu, Yu Zhu, Qingsen Yan, Jinqiu Sun, Yanning Zhang	Multiple Object Tracking based on Occlusion-Aware Embedding Consistency Learning.	CoRR	2023	DBLP DOI BibTeX RDF
35	Axi Niu, Kang Zhang 0008, Trung X. Pham, Jinqiu Sun, Yu Zhu 0004, In So Kweon, Yanning Zhang	CDPMSR: Conditional Diffusion Probabilistic Models for Single Image Super-Resolution.	CoRR	2023	DBLP DOI BibTeX RDF
35	Axi Niu, Kang Zhang 0008, Joshua Tian Jin Tee, Trung X. Pham, Jinqiu Sun, Chang D. Yoo, In So Kweon, Yanning Zhang	DifAugGAN: A Practical Diffusion-style Data Augmentation for GAN-based Single Image Super-resolution.	CoRR	2023	DBLP DOI BibTeX RDF
35	Axi Niu, Pei Wang, Yu Zhu 0004, Jinqiu Sun, Qingsen Yan, Yanning Zhang	GRAN: Ghost Residual Attention Network for Single Image Super Resolution.	CoRR	2023	DBLP DOI BibTeX RDF
35	Axi Niu, Trung Xuan Pham, Kang Zhang 0008, Jinqiu Sun, Yu Zhu 0004, In So Kweon, Yanning Zhang	ACDMSR: Accelerated Conditional Diffusion Models for Single Image Super-Resolution.	CoRR	2023	DBLP DOI BibTeX RDF
35	Axi Niu, Kang Zhang 0008, Trung X. Pham, Pei Wang, Jinqiu Sun, In So Kweon, Yanning Zhang	Learning from Multi-Perception Features for Real-Word Image Super-resolution.	CoRR	2023	DBLP DOI BibTeX RDF
35	Axi Niu, Kang Zhang 0008, Trung X. Pham, Jinqiu Sun, Yu Zhu 0004, In So Kweon, Yanning Zhang	CDPMSR: Conditional Diffusion Probabilistic Models for Single Image Super-Resolution.	ICIP	2023	DBLP DOI BibTeX RDF
35	Yujuan Cao, Zhao Liu, Wuhe Axi, Dawei Wei, Ning Xi 0002	Physical-Sensing Inconsistency Vulnerability Mitigation for Multi-UAV Crowdsensing.	NaNA	2023	DBLP DOI BibTeX RDF
35	Axi Niu, Yu Zhu 0004, Chaoning Zhang, Jinqiu Sun, Pei Wang, In So Kweon, Yanning Zhang	MS2Net: Multi-Scale and Multi-Stage Feature Fusion for Blurred Image Super-Resolution.	IEEE Trans. Circuits Syst. Video Technol.	2022	DBLP DOI BibTeX RDF
35	Trung Pham, Chaoning Zhang, Axi Niu, Kang Zhang 0008, Chang D. Yoo	On the Pros and Cons of Momentum Encoder in Self-Supervised Visual Representation Learning.	CoRR	2022	DBLP DOI BibTeX RDF
35	Trung X. Pham, Axi Niu, Kang Zhang 0008, Sultan Rizky Hikmawan Madjid, Ji Woo Hong, Daehyeok Kim, Joshua Tian Jin Tee, Chang D. Yoo	Self-Supervised Visual Representation Learning via Residual Momentum.	CoRR	2022	DBLP DOI BibTeX RDF
35	Chaoning Zhang, Kang Zhang 0008, Trung X. Pham, Axi Niu, Zhinan Qiao, Chang D. Yoo, In So Kweon	Dual Temperature Helps Contrastive Learning Without Many Negative Samples: Towards Understanding and Simplifying MoCo.	CoRR	2022	DBLP DOI BibTeX RDF
35	Chaoning Zhang, Kang Zhang 0008, Chenshuang Zhang, Axi Niu, Jiu Feng, Chang D. Yoo, In So Kweon	Decoupled Adversarial Contrastive Learning for Self-supervised Adversarial Robustness.	CoRR	2022	DBLP DOI BibTeX RDF
35	Chaoning Zhang, Kang Zhang 0008, Axi Niu, Chenshuang Zhang, Jiu Feng, Chang D. Yoo, In So Kweon	Noise Augmentation Is All You Need For FGSM Fast Adversarial Training: Catastrophic Overfitting And Robust Overfitting Require Different Augmentation.	CoRR	2022	DBLP BibTeX RDF
35	Chaoning Zhang, Kang Zhang 0008, Trung X. Pham, Axi Niu, Zhinan Qiao, Chang D. Yoo, In So Kweon	Dual Temperature Helps Contrastive Learning Without Many Negative Samples: Towards Understanding and Simplifying MoCo.	CVPR	2022	DBLP DOI BibTeX RDF
35	Chaoning Zhang, Kang Zhang 0008, Chenshuang Zhang, Axi Niu, Jiu Feng, Chang D. Yoo, In So Kweon	Decoupled Adversarial Contrastive Learning for Self-supervised Adversarial Robustness.	ECCV (30)	2022	DBLP DOI BibTeX RDF
35	Pei Wang, Wei Sun 0036, Qingsen Yan, Axi Niu, Rui Li 0013, Yu Zhu 0004, Jinqiu Sun, Yanning Zhang	Non-uniform motion deblurring with blurry component divided guidance.	Pattern Recognit.	2021	DBLP DOI BibTeX RDF
35	Pei Wang, Wei Sun 0036, Qingsen Yan, Axi Niu, Rui Li 0013, Yu Zhu 0004, Jinqiu Sun, Yanning Zhang	Non-uniform Motion Deblurring with Blurry Component Divided Guidance.	CoRR	2021	DBLP BibTeX RDF
35	Axi Aguilera, Paul Castillo 0001, Sergio Gómez 0001	Structure preserving - Field directional splitting difference methods for nonlinear Schrödinger systems.	Appl. Math. Lett.	2021	DBLP DOI BibTeX RDF
35	Lan Wu, Yang Liu, Axi Wang, YuanLi Gong, Shengquan Yu	An analysis of Interaction of Cognitive and Social Aspects during Collaborative Problem Solving.	ICALT	2021	DBLP DOI BibTeX RDF
35	Axi Wang, Lan Wu, Dan Wang	Effects of Procedural Scaffolding on In-Service Teachers' Peer Feedback Quality and Learning Participation in Lesson Study.	ICALT	2021	DBLP DOI BibTeX RDF
35	Axi Wang, Shengquan Yu, Minhong Wang 0001, Ling Chen	Effects of a visualization-based group awareness tool on in-service teachers' interaction behaviors and performance in a lesson study.	Interact. Learn. Environ.	2019	DBLP DOI BibTeX RDF
28	Masoumeh Ebrahimi, Masoud Daneshtalab, Pasi Liljeberg, Juha Plosila, Hannu Tenhunen	A High-Performance Network Interface Architecture for NoCs Using Reorder Buffer Sharing.	PDP	2010	DBLP DOI BibTeX RDF	AXI protocol, Network on Chip, Buffer Management, Network Interface
28	Bruce Mathewson	The evolution of SOC interconnect and how NOC fits within it.	DAC	2010	DBLP DOI BibTeX RDF	AMBA AXI, network on chip
25	Jesús Lázaro 0001, Armando Astarloa, Aitzol Zuloaga, José Ángel Araujo, Jaime Jiménez	AXI Lite Redundant On-Chip Bus Interconnect for High Reliability Systems.	IEEE Trans. Reliab.	2024	DBLP DOI BibTeX RDF
25	Nicolas Bohm Agostini, Jude Haris, Perry Gibson, Malith Jayaweera, Norm Rubin, Antonino Tumeo, José L. Abellán, José Cano 0001, David R. Kaeli	AXI4MLIR: User-Driven Automatic Host Code Generation for Custom AXI-Based Accelerators.	CGO	2024	DBLP DOI BibTeX RDF
25	Chong Li, Yuchen Wang, Choon Ki Ahn, Chengxi Zhang, Bo Wang	Milli-Hertz Frequency Tuning Architecture Toward High Repeatable Micromachined Axi-Symmetry Gyroscopes.	IEEE Trans. Ind. Electron.	2023	DBLP DOI BibTeX RDF
25	Robert Drehmel, Hans-Ulrich Heiss	The Prism Bridge: Maximizing Inter-Chip AXI Throughput in the High-Speed Serial Era.	IEEE Access	2023	DBLP DOI BibTeX RDF
25	Demyana Emil, Mohammed Hamdy, Gihan Nagib	Development an efficient AXI-interconnect unit between set of customized peripheral devices and an implemented dual-core RISC-V processor.	J. Supercomput.	2023	DBLP DOI BibTeX RDF
25	Bakhtiyor Khuzhayorov, Gafurjan I. Ibragimov, Usmonali Saydullaev, Bruno Antonio Pansera	An Axi-Symmetric Problem of Suspensions Filtering with the Formation of a Cake Layer.	Symmetry	2023	DBLP DOI BibTeX RDF
25	Thomas Benz, Alessandro Ottaviano, Robert Balas, Angelo Garofalo, Francesco Restuccia 0002, Alessandro Biondi 0001, Luca Benini	AXI-REALM: A Lightweight and Modular Interconnect Extension for Traffic Regulation and Monitoring of Heterogeneous Real-Time SoCs.	CoRR	2023	DBLP DOI BibTeX RDF
25	Vikram Jain, Matheus A. Cavalcante, Nazareno Bruschi, Michael Rogenmoser, Thomas Benz, Andreas Kurth, Davide Rossi, Luca Benini, Marian Verhelst	PATRONoC: Parallel AXI Transport Reducing Overhead for Networks-on-Chip targeting Multi-Accelerator DNN Platforms at the Edge.	CoRR	2023	DBLP DOI BibTeX RDF
25	Nicolas Bohm Agostini, Jude Haris, Perry Gibson, Malith Jayaweera, Norm Rubin, Antonino Tumeo, José L. Abellán, José Cano 0001, David R. Kaeli	AXI4MLIR: User-Driven Automatic Host Code Generation for Custom AXI-Based Accelerators.	CoRR	2023	DBLP DOI BibTeX RDF
25	Chi Zhang, Paul Scheffler, Thomas Benz, Matteo Perotti, Luca Benini	AXI-Pack: Near-Memory Bus Packing for Bandwidth-Efficient Irregular Workloads.	DATE	2023	DBLP DOI BibTeX RDF
25	Emre Karabulut, Amro Awad, Aydin Aysu	SS-AXI: Secure and Safe Access Control Mechanism for Multi-Tenant Cloud FPGAs.	ISCAS	2023	DBLP DOI BibTeX RDF
25	Vikram Jain, Matheus A. Cavalcante, Nazareno Bruschi, Michael Rogenmoser, Thomas Benz, Andreas Kurth, Davide Rossi, Luca Benini, Marian Verhelst	PATRONoC: Parallel AXI Transport Reducing Overhead for Networks-on-Chip targeting Multi-Accelerator DNN Platforms at the Edge.	DAC	2023	DBLP DOI BibTeX RDF
25	Chi Zhang, Paul Scheffler, Thomas Benz, Matteo Perotti, Luca Benini	AXI-Pack: Near-Memory Bus Packing for Bandwidth-Efficient Irregular Workloads.	CoRR	2022	DBLP DOI BibTeX RDF
25	Monika Nitsche	Corrected trapezoidal rule for near-singular integrals in axi-symmetric Stokes flow.	Adv. Comput. Math.	2022	DBLP DOI BibTeX RDF
25	Yukui Luo, Yuheng Zhang, Shijin Duan, Xiaolin Xu	An Integrity Checking Framework for AXI Protocol in Multi-tenant FPGA.	FPGA	2022	DBLP DOI BibTeX RDF
25	Efe Berkay Yitim, Ece Güran Schmidt	An AXI Data Shaper for Heterogeneous FPGA System-on-Chip (SoC) Architectures.	SIU	2022	DBLP DOI BibTeX RDF
25	Earl S. Lester, Lawrence K. Forbes	The unstable temporal development of axi-symmetric jets of incompressible fluid.	CoRR	2021	DBLP BibTeX RDF
25	Vazgen Melikyan, Stepan Harutyunyan, Artak Kirakosyan, Taron Kaplanyan	UVM Verification IP for AXI.	EWDTS	2021	DBLP DOI BibTeX RDF
25	Ming Chen, Zhifeng Zhang, Haoqi Ren	Design and Verification of High Performance Memory Interface Based on AXI Bus.	ICCT	2021	DBLP DOI BibTeX RDF
25	Christopher Blochwitz, León Philipp, Mladen Berekovic, Thilo Pionteck	StreamGrid - An AXI-Stream-Compliant Overlay Architecture.	ARC	2021	DBLP DOI BibTeX RDF
25	Tuy Nguyen Tan, Phap Duong-Ngoc, Thang Xuan Pham, Hanho Lee	Novel Performance Evaluation Approach of AMBA AXI-Based SoC Design.	ISOCC	2021	DBLP DOI BibTeX RDF
25	Tri Tran Minh Huynh, Ly Van Tran, Son Vu Truong Dao	Real-Time Size and Mass Estimation of Slender Axi-Symmetric Fruit/Vegetable Using a Single Top View Image.	Sensors	2020	DBLP DOI BibTeX RDF
25	Corrado De Sio, Sarah Azimi, Luca Sterpone	On the Evaluation of SEU Effects on AXI Interconnect Within AP-SoCs.	ARCS	2020	DBLP DOI BibTeX RDF
25	Francesco Restuccia 0002, Alessandro Biondi 0001, Mauro Marinoni, Giorgiomaria Cicero, Giorgio C. Buttazzo	AXI HyperConnect: A Predictable, Hypervisor-level Interconnect for Hardware Accelerators in FPGA SoC.	DAC	2020	DBLP DOI BibTeX RDF
25	Francesco Restuccia 0002, Marco Pagani, Alessandro Biondi 0001, Mauro Marinoni, Giorgio C. Buttazzo	Is Your Bus Arbiter Really Fair? Restoring Fairness in AXI Interconnects for FPGA SoCs.	ACM Trans. Embed. Comput. Syst.	2019	DBLP DOI BibTeX RDF
25	Marco Pagani, Enrico Rossi, Alessandro Biondi 0001, Mauro Marinoni, Giuseppe Lipari, Giorgio C. Buttazzo	A Bandwidth Reservation Mechanism for AXI-Based Hardware Accelerators on FPGAs.	ECRTS	2019	DBLP DOI BibTeX RDF
25	Mark Fosberry, Ben McMahon	Matlab JTAG AXI Master opens new dimensions for development and testability.	NATW	2019	DBLP DOI BibTeX RDF
25	Frank Plasencia-Balabarca, Edward Mitacc-Meza, Mario Raffo-Jara, Carlos Silva Cárdenas	A Flexible UVM-Based Verification Framework Reusable with Avalon, AHB, AXI and Wishbone Bus Interfaces for an AES Encryption Module.	LATS	2019	DBLP DOI BibTeX RDF
25	Esraa Ragab, Mohamed A. Abd El Ghany, Klaus Hofmann	DDR2 Memory Controller for Multi-core Systems with AMBA AXI Interface.	ICM	2018	DBLP DOI BibTeX RDF
25	Fabio Benevenuti, Fernanda Lima Kastensmidt	Analyzing AXI Streaming Interface for Hardware Acceleration in AP-SoC Under Soft Errors.	ARC	2018	DBLP DOI BibTeX RDF
25	C. Sarojini, Jaisingh Thangaraj	Implementation and Optimization of Throughput in High Speed Memory Interface Using AXI Protocol.	ICCCNT	2018	DBLP DOI BibTeX RDF
25	Fushui Liu, Yang Xu, Yikai Li	A coupled level-set and volume-of-fluid method for simulating axi-symmetric incompressible two-phase flows.	Appl. Math. Comput.	2017	DBLP DOI BibTeX RDF
25	Xuan-Tu Tran, Tung Nguyen, Hai-Phong Phan, Duy-Hieu Bui	AXI-NoC: High-Performance Adaptation Unit for ARM Processors in Network-on-Chip Architectures.	IEICE Trans. Fundam. Electron. Commun. Comput. Sci.	2017	DBLP DOI BibTeX RDF
25	Paul Reiter, Harald Ziegelwanger	Multi-domain boundary element method for axi-symmetric layered linear acoustic systems.	J. Comput. Phys.	2017	DBLP DOI BibTeX RDF
25	William Kamp	AXI over Ethernet; a protocol for the monitoring and control of FPGA clusters.	FPT	2017	DBLP DOI BibTeX RDF
25	Ting Duan, Jinjun Wang	Experimental investigation on the evolution of axi-symmetrical synthetic jet.	J. Vis.	2016	DBLP DOI BibTeX RDF
25	Paola Brambilla, P. Brivio, Alberto Guardone, G. Romanelli	Grid convergence assessment for adaptive grid simulations of normal drop impacts onto liquid films in axi-symmetric and three-dimensional geometries.	Appl. Math. Comput.	2015	DBLP DOI BibTeX RDF
25	Chadi Al Khatib, Claire Aupetit, Cyril Chevalier, Chouki Aktouf, Gilles Sicard, Laurent Fesquet	A generic clock controller for low power systems: Experimentation on an AXI bus.	VLSI-SoC	2015	DBLP DOI BibTeX RDF
25	Erfan Azarkhish, Davide Rossi, Igor Loi, Luca Benini	High performance AXI-4.0 based interconnect for extensible smart memory cubes.	DATE	2015	DBLP BibTeX RDF
25	Shane T. Fleming, Ivan Beretta, David B. Thomas, George A. Constantinides, Dan R. Ghica	PushPush: Seamless integration of hardware and software objects via function calls over AXI.	FPL	2015	DBLP DOI BibTeX RDF
25	Mrugesh Walimbe	JTAG-AXI Debug IP with Performance Meter Mode.	MTV	2014	DBLP DOI BibTeX RDF
25	Benedikt Janßen, Michael Hübner 0001, Timo Jaeschke	An AXI compatible cypress EZ-USB FX3 interface for USB-3.0 SuperSpeed.	ReConFig	2014	DBLP DOI BibTeX RDF
25	Zdravko Panjkov, Juergen Haas, Martin Aigner 0002, Herbert Rosmanith, Tianlun Liu, Roland Poppenreiter, Andreas Wasserbauer, Richard Hagelauer	OCP2XI Bridge: An OCP to AXI Protocol Bridge.	ARC	2014	DBLP DOI BibTeX RDF
25	Saber Saffar, Bijan Mollaei-Dariani, Massoud Malaki	Numerical and experimental study on the effect of die shape and billet size in the forging process of axi-symmetric parts.	Int. J. Manuf. Res.	2013	DBLP DOI BibTeX RDF
25	Andy Louwyck, Alexander Vandenbohede, Mark Bakker, Luc Lebbe	Simulation of axi-symmetric flow towards wells: A finite-difference approach.	Comput. Geosci.	2012	DBLP DOI BibTeX RDF
25	Pascal Cotret, Guy Gogniat, Jean-Philippe Diguet, Jérémie Crenne	Lightweight reconfiguration security services for AXI-based MPSoCs.	FPL	2012	DBLP DOI BibTeX RDF
25	Marco Ramírez 0001, Masoud Daneshtalab, Juha Plosila, Pasi Liljeberg	NoC-AXI interface for FPGA-based MPSoC platforms.	FPL	2012	DBLP DOI BibTeX RDF
25	Kees A. Vissers, Stephen Neuendorffer, Juanjo Noguera	Building real-time HDTV applications in FPGAs using processors, AXI interfaces and high level synthesis tools.	DATE	2011	DBLP DOI BibTeX RDF
25	Xiongfei Liao, Jun Zhou 0017, Xin Liu 0015	Exploring AMBA AXI on-Chip interconnection for TSV-based 3D SoCs.	3DIC	2011	DBLP DOI BibTeX RDF
25	Mohammad Hossein Neishaburi, Zeljko Zilic	Debug Aware AXI-based Network Interface.	DFT	2011	DBLP DOI BibTeX RDF
25	Mohammad Hossein Neishaburi, Zeljko Zilic	A distributed AXI-based platform for post-silicon validation.	VTS	2011	DBLP DOI BibTeX RDF
25	Monika Nitsche, Héctor D. Ceniceros, A. L. Karniala, S. Naderi	High order quadratures for the evaluation of interfacial velocities in axi-symmetric Stokes flows.	J. Comput. Phys.	2010	DBLP DOI BibTeX RDF
25	Hyun-min Kyung, Gi-Ho Park, Jong Wook Kwak, Tae-Jin Kim, Sung-Bae Park	Design and implementation of Performance Analysis Unit (PAU) for AXI-based multi-core System on Chip (SOC).	Microprocess. Microsystems	2010	DBLP DOI BibTeX RDF
25	Nelson Yen-Chung Chang, Ying-Ze Liao, Tian-Sheuan Chang	Analysis of shared-link AXI.	IET Comput. Digit. Tech.	2009	DBLP DOI BibTeX RDF
25	Tahito Aida, Takeshi Uragaki, Masahiro Kawakita, Yutaka Tomita, Ryoji Tsunoi, Satoshi Yahagi, Minoru Tanaka, Hideyuki Mitake, Masayuki Tawara	High-speed depth-mapping Axi-Vision camera with compact optical system.	Three-Dimensional Image Capture and Applications	2008	DBLP DOI BibTeX RDF
25	Tee Chwee Liong, Andy Pascual	Impact of Quad Flat No Lead package (QFN) on automated X-ray inspection (AXI).	ITC	2007	DBLP DOI BibTeX RDF
25	Masahiro Kawakita, Keigo Iizuka, Yoshiki Iino, Hiroshi Kikuchi, Hideo Fujikake, Tahito Aida	Real-time depth-mapping three-dimension TV camera (Axi-Vision camera).	Syst. Comput. Jpn.	2006	DBLP DOI BibTeX RDF
25	Masahiro Kawakita, Keigo Iizuka, Tahito Aida, Hiroshi Kikuchi, Hideo Fujikake, Jun Yonai, Kuniharo Takizawa	Axi-vision Camera: A Three-dimensional Camera.	Three-Dimensional Image Capture and Applications	2000	DBLP DOI BibTeX RDF
21	Sudeep Pasricha, Nikil D. Dutt	ORB: An on-chip optical ring bus communication architecture for multi-processor systems-on-chip.	ASP-DAC	2008	DBLP DOI BibTeX RDF
21	Rajendra S. Katti, Rajesh G. Kavasseri	Secure pseudo-random bit sequence generation using coupled linear congruential generators.	ISCAS	2008	DBLP DOI BibTeX RDF
21	Andrei Radulescu, John Dielissen, Santiago González Pestana, Om Prakash Gangwal, Edwin Rijpkema, Paul Wielage, Kees Goossens	An efficient on-chip NI offering guaranteed services, shared-memory abstraction, and flexible network configuration.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2005	DBLP DOI BibTeX RDF
21	Philippe Martin 0005	Design of a Virtual Component Neutral Network-on-Chip Transaction Layer.	DATE	2005	DBLP DOI BibTeX RDF
21	Andrei Radulescu, John Dielissen, Kees Goossens, Edwin Rijpkema, Paul Wielage	An Efficient On-Chip Network Interface Offering Guaranteed Services, Shared-Memory Abstraction, and Flexible Network Configuration.	DATE	2004	DBLP DOI BibTeX RDF
21	Akihiko Shirai, Kiichi Kobayashi, Masahiro Kawakita, Shoichi Hasegawa, Masayuki Nakajima 0001, Makoto Sato	Entertainment Applications of Human-Scale Virtual Reality Systems.	PCM (3)	2004	DBLP DOI BibTeX RDF