Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
121 | A. B. M. Harun-ur Rashid, Mazuhidul Karim, Syed Mahfuzul Aziz |
Testing complementary pass-transistor logic circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (4) ![In: Proceedings of the 2001 International Symposium on Circuits and Systems, ISCAS 2001, Sydney, Australia, May 6-9, 2001, pp. 5-8, 2001, IEEE, 0-7803-6685-9. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
104 | Simon Kramer 0001 |
Logical concepts in cryptography. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SIGACT News ![In: SIGACT News 38(4), pp. 65-66, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
applied formal logic, information security |
104 | Masahide Nakamura, Pattara Leelaprute, Ken-ichi Matsumoto, Tohru Kikuno |
Semantic Warnings and Feature Interaction in Call Processing Language on Internet Telephony. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SAINT ![In: 2003 Symposium on Applications and the Internet (SAINT 2003), 27-31 January 2003 - Orlando, FL, USA, Proceedings, pp. 283-291, 2003, IEEE Computer Society, 0-7695-1872-9. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
87 | Leon Bobrowski |
Ranked Modelling with Feature Selection Based on the CPL Criterion Functions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MLDM ![In: Machine Learning and Data Mining in Pattern Recognition, 4th International Conference, MLDM 2005, Leipzig, Germany, July 9-11, 2005, Proceedings, pp. 218-227, 2005, Springer, 3-540-26923-1. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
Ranked linear models, convex and piecewise linear (CPL) criterion functions, linear separability of data sets, feature selection |
79 | Leon Bobrowski |
CPLClustering with Feature Costs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICDM ![In: Advances in Data Mining. Medical Applications, E-Commerce, Marketing, and Theoretical Aspects, 8th Industrial Conference, ICDM 2008, Leipzig, Germany, July 16-18, 2008, Proceedings, pp. 177-188, 2008, Springer, 978-3-540-70717-2. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
convex and piecewise linear (CPL) criterion functions, linear dependence of feature vectors, feature selection |
69 | Saswat Anand, Wei-Ngan Chin, Siau-Cheng Khoo |
Charting Patterns on Price History. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICFP ![In: Proceedings of the Sixth ACM SIGPLAN International Conference on Functional Programming (ICFP '01), Firenze (Florence), Italy, September 3-5, 2001., pp. 134-145, 2001, ACM, 1-58113-415-0. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
Haskell |
61 | Issam S. Abu-Khater, Abdellatif Bellaouar, Mohamed I. Elmasry, Ran-Hong Yan |
Circuit/architecture for low-power high-performance 32-bit adder. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Great Lakes Symposium on VLSI ![In: 5th Great Lakes Symposium on VLSI (GLS-VLSI '95), March 16-18, 1995, The State University of New York at Buffalo, USA, pp. 74-, 1995, IEEE Computer Society, 0-8186-7035-5. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
conditional sum architecture, CPL-like logic implementation, power supply voltage, minimum size, optimized speed, 1 to 3.3 V, logic design, CMOS, integrated circuit design, adders, adder, CMOS logic circuits, circuit optimisation, 32 bit |
60 | Santi Phithakkitnukoon, Ram Dantu |
CPL: Enhancing Mobile Phone Functionality by Call Predicted List. ![Search on Bibsonomy](Pics/bibsonomy.png) |
OTM Workshops ![In: On the Move to Meaningful Internet Systems: OTM 2008 Workshops, OTM Confederated International Workshops and Posters, ADI, AWeSoMe, COMBEK, EI2N, IWSSA, MONET, OnToContent + QSI, ORM, PerSys, RDDS, SEMELS, and SWWS 2008, Monterrey, Mexico, November 9-14, 2008. Proceedings, pp. 571-581, 2008, Springer, 978-3-540-88874-1. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Call prediction, Mobile phone, Context-aware computing |
60 | Yuanzhong Wan, Maitham Shams |
Delay modeling of CMOS/CPL logic circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (6) ![In: International Symposium on Circuits and Systems (ISCAS 2005), 23-26 May 2005, Kobe, Japan, pp. 5613-5616, 2005, IEEE, 0-7803-8834-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
44 | Leon Bobrowski |
Ranked linear models and sequential patterns recognition. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Pattern Anal. Appl. ![In: Pattern Anal. Appl. 12(1), pp. 1-7, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
Ranked linear transformations, Convex and piecewise linear (CPL) criterion functions, Linear separability of data sets, Feature selection, Sequential patterns |
43 | Bhaskar Chatterjee, Manoj Sachdev, Ram Krishnamurthy 0001 |
A CPL-based dual supply 32-bit ALU for sub 180nm CMOS technologies. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: Proceedings of the 2004 International Symposium on Low Power Electronics and Design, 2004, Newport Beach, California, USA, August 9-11, 2004, pp. 248-251, 2004, ACM. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
DSM leakage control and scaling trends, dual supply ALU design, low power techniques |
35 | Maja Loncar, Fredrik Rusek |
On Reduced-Complexity Equalization Based on Ungerboeck and Forney Observation Models. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Signal Process. ![In: IEEE Trans. Signal Process. 56(8-1), pp. 3784-3789, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
35 | Leon Bobrowski, Magdalena Topczewska |
Induction of Similarity Measures for Case Based Reasoning Through Separable Data Transformations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Case-Based Reasoning on Images and Signals ![In: Case-Based Reasoning on Images and Signals, pp. 127-148, 2008, Springer, 978-3-540-73178-8. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
35 | B. John Oommen, Govindachari Raghunath, Benjamin Kuipers |
On How to Learn from a Stochastic Teacher or a Stochastic Compulsive Liar of Unknown Identity. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Australian Conference on Artificial Intelligence ![In: AI 2003: Advances in Artificial Intelligence, 16th Australian Conference on Artificial Intelligence, Perth, Australia, December 3-5, 2003, Proceedings, pp. 24-40, 2003, Springer, 3-540-20646-9. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
35 | Abdoul Rjoub, M. Alrousan, Omar M. Al-Jarrah, Odysseas G. Koufopavlou |
Multi-level low swing voltage values for low power design applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (4) ![In: Proceedings of the 2001 International Symposium on Circuits and Systems, ISCAS 2001, Sydney, Australia, May 6-9, 2001, pp. 590-593, 2001, IEEE, 0-7803-6685-9. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
35 | Roger Hartley, Heather Pfeiffer |
Visual Representation of Procedural Knowledge. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VL ![In: 2000 IEEE International Symposium on Visual Languages, VL 2000, Seattle, Washington, USA, September 10-13, 2000, Proceedings., pp. 63-64, 2000, IEEE Computer Society, 0-7695-0840-5. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
35 | Abdoul Rjoub, Odysseas G. Koufopavlou |
Low voltage swing gates for low power consumption. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (1) ![In: Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30 - June 2, 1999, pp. 234-237, 1999, IEEE, 0-7803-5471-0. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
35 | Hartmut Liefke, Susan B. Davidson |
Specifying Updates in Biomedical Databases. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SSDBM ![In: 11th International Conference on Scientific and Statistical Database Management, Proceedings, Cleveland, Ohio, USA, 28-30 July, 1999, pp. 44-53, 1999, IEEE Computer Society, 0-7695-0046-3. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
complex value databases, optimization, object-oriented databases, updates, rewriting, biological databases |
35 | David Harel, Eli Singerman |
Computation Paths Logic: An Expressive, yet Elementary, Process Logic (abridged version). ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICALP ![In: Automata, Languages and Programming, 24th International Colloquium, ICALP'97, Bologna, Italy, 7-11 July 1997, Proceedings, pp. 408-418, 1997, Springer, 3-540-63165-8. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
28 | Olivier Danvy, J. Michael Spivey |
On Barron and Strachey's cartesian product function. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICFP ![In: Proceedings of the 12th ACM SIGPLAN International Conference on Functional Programming, ICFP 2007, Freiburg, Germany, October 1-3, 2007, pp. 41-46, 2007, ACM, 978-1-59593-815-2. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
CPL |
28 | Kuo-Hsing Cheng, Shun-Wen Cheng, Che-Yu Liao |
64-bit Low Threshold Voltage High-Speed Conditional Carry Adder by Complementary Pass-Transistor Logi. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISVLSI ![In: 2004 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2004), Emerging Trends in VLSI Systems Design, 19-20 February 2004, Lafayette, LA, USA, pp. 233-236, 2004, IEEE Computer Society, 0-7695-2097-9. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
CPL, conditional sum adder, low-threshold voltage, differential-end, VLSI design, low-voltage |
27 | Leon Bobrowski, Ralph C. Huntsinger |
Exploring the linearity of models on the basis of ranked data. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SCSC ![In: Proceedings of the 2007 Summer Computer Simulation Conference, SCSC 2007, San Diego, California, USA, July 16-19, 2007, pp. 411-418, 2007, Simulation Councils, Inc., 1-56555-316-0. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP BibTeX RDF |
convex and piecewise linear (CPL) criterion functions, multiparameter optimization, ranked relations, linear transformations, linear separability |
25 | Md. Imran Kalim, Ahmad Ali |
Maximum Sensitivity Constrained Graphical Controller Tuning for a DC-DC Boost Converter Loaded With a CPL. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Ind. Electron. ![In: IEEE Trans. Ind. Electron. 71(3), pp. 2933-2941, March 2024. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
|
25 | Lanfeng Zhong, Xin Liao, Shaoting Zhang 0001, Xiaofan Zhang, Guotai Wang |
VLM-CPL: Consensus Pseudo Labels from Vision-Language Models for Human Annotation-Free Pathological Image Classification. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2403.15836, 2024. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
|
25 | Zihao He, Jonathan May, Kristina Lerman |
CPL-NoViD: Context-Aware Prompt-based Learning for Norm Violation Detection in Online Communities. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2305.09846, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
25 | Andrew Rouditchenko, Ronan Collobert, Tatiana Likhomanenko |
AV-CPL: Continuous Pseudo-Labeling for Audio-Visual Speech Recognition. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2309.17395, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
25 | Federico Martin Serra, W. Gil-Gonzalez, Oscar D. Montoya, Jesús C. Hernández |
Voltage Regulation in a Buck Converter for an Unknown CPL: An Extended Feedback Control Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LASCAS ![In: 14th IEEE Latin America Symposium on Circuits and System, LASCAS 2023, Quito, Ecuador, February 28 - March 3, 2023, pp. 1-4, 2023, IEEE, 978-1-6654-5705-7. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
25 | Hussain Sarwar Khan, Kimmo Kauhaniemi |
FPGA Validated Advanced Learning-Based Voltage Control of DC/DC Converter Feeding CPL in DC Microgrid Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISIE ![In: 32nd IEEE International Symposium on Industrial Electronics, ISIE 2023, Helsinki, Finland, June 19-21, 2023, pp. 1-6, 2023, IEEE, 979-8-3503-9971-4. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
25 | Xuehai He, Diji Yang, Weixi Feng, Tsu-Jui Fu, Arjun R. Akula, Varun Jampani, Pradyumna Narayana, Sugato Basu, William Yang Wang, Xin Eric Wang |
CPL: Counterfactual Prompt Learning for Vision and Language Models. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2210.10362, 2022. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
25 | Xuehai He, Diji Yang, Weixi Feng, Tsu-Jui Fu, Arjun R. Akula, Varun Jampani, Pradyumna Narayana, Sugato Basu, William Yang Wang, Xin Wang 0061 |
CPL: Counterfactual Prompt Learning for Vision and Language Models. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EMNLP ![In: Proceedings of the 2022 Conference on Empirical Methods in Natural Language Processing, EMNLP 2022, Abu Dhabi, United Arab Emirates, December 7-11, 2022., pp. 3407-3418, 2022, Association for Computational Linguistics. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
25 | Abdelali El Aroudi, Mohammed S. Al-Numay, Reham Haroun, Guidong Zhang |
Analytical Determination of Fast-Scale Instability Boundaries for Current Mode Controlled DC-DC Converters With CPL and Closed Voltage Loop. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Emerg. Sel. Topics Circuits Syst. ![In: IEEE J. Emerg. Sel. Topics Circuits Syst. 11(1), pp. 39-48, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
25 | Milad Andalibi, Mojtaba Hajihosseini, Meysam Gheisarnejad, Mohammad Hassan Khooban, Jalil Boudjadar |
A Novel Method for Stabilizing Buck-Boost Converters with CPL using Model Prediction Control. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICIT ![In: 22nd IEEE International Conference on Industrial Technology, ICIT 2021, Valencia, Spain, March 10-12, 2021, pp. 541-545, 2021, IEEE, 978-1-7281-5730-6. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
25 | Edward Ronald Smith, D. J. Trevelyan, Eduardo Ramos Fernandez, Adnan Sufian, Catherine O'Sullivan, Daniele Dini |
CPL library - A minimal framework for coupled particle and continuum simulation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Comput. Phys. Commun. ![In: Comput. Phys. Commun. 250, pp. 107068, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
25 | Cheonghwan Hur, Bunyodbek Ibrokhimov, Sanggil Kang |
N3-CPL: Neuroplasticity-based neuromorphic network cell proliferation learning. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Neurocomputing ![In: Neurocomputing 411, pp. 193-205, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
25 | Taosha Fan, Hanlin Wang, Michael Rubenstein, Todd D. Murphey |
CPL-SLAM: Efficient and Certifiably Correct Planar Graph-Based SLAM Using the Complex Number Representation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Robotics ![In: IEEE Trans. Robotics 36(6), pp. 1719-1737, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
25 | Paolo Luchini |
Introducing CPL. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2012.12143, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP BibTeX RDF |
|
25 | Taosha Fan, Hanlin Wang, Michael Rubenstein, Todd D. Murphey |
CPL-SLAM: Efficient and Certifiably Correct Planar Graph-Based SLAM Using the Complex Number Representation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2007.06708, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP BibTeX RDF |
|
25 | Hamed Farsizadeh, Meysam Gheisarnejad, Mahdi Mosayebi, Mehdi Rafiei, Mohammad Hassan Khooban |
An Intelligent and Fast Controller for DC/DC Converter Feeding CPL in a DC Microgrid. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. II Express Briefs ![In: IEEE Trans. Circuits Syst. II Express Briefs 67-II(6), pp. 1104-1108, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
25 | Kevin Eduardo Lucas Marcillo, Douglas A. Plaza-Guingla, Walter Barra Junior, Renan Landau Paiva de Medeiros, Erick Melo Rocha, David Alejandro Vaca Benavides, Sara Judith Rios Orellana, Efren Vinicio Herrera Muentes |
Novel Robust Methodology for Controller Design Aiming to Ensure DC Microgrid Stability Under CPL Power Variation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Access ![In: IEEE Access 7, pp. 64206-64222, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
25 | Wei Jin, Yuping Lu, Tao Huang |
Improved Blocking Scheme for CPL Current Protection in Wind Farms Using the Amplitude Ratio and Phase Difference. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Access ![In: IEEE Access 7, pp. 68060-68070, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
25 | Nengjun Zhu, Jian Cao 0001 |
CPL: A Combined Framework of Pointwise Prediction and Learning to Rank for top-N Recommendations with Implicit Feedback. ![Search on Bibsonomy](Pics/bibsonomy.png) |
WISE ![In: Web Information Systems Engineering - WISE 2019 - 20th International Conference, Hong Kong, China, November 26-30, 2019, Proceedings, pp. 259-273, 2019, Springer, 978-3-030-34222-7. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
25 | Aleksandra Grzelak, Dorota Leszczynska-Jasion |
Automatic proof generation in an axiomatic system for $$\mathsf{CPL}$$ by means of the method of Socratic proofs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Log. J. IGPL ![In: Log. J. IGPL 26(1), pp. 109-148, 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
25 | Wei He 0001, Carlos Abraham Soriano-Rangel, Romeo Ortega, Alessandro Astolfi, Fernando Mancilla-David, Shihua Li 0001 |
DC-DC Buck-Boost Converters with Unknown CPL: An Adaptive PBC. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACC ![In: 2018 Annual American Control Conference, ACC 2018, Milwaukee, WI, USA, June 27-29, 2018, pp. 6749-6754, 2018, IEEE, 978-1-5386-5428-6. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
25 | Sergey Budkov, Kseniya Buraya, Andrey Filchenkov, Ivan Smetannikov, Antonina Puchkovskaia |
RICH-CPL: Fact Extraction from Wikipedia-sized Corpora for Morphologically Rich Languages. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FRUCT ![In: 23rd Conference of Open Innovations Association, FRUCT 2018, Bologna, Italy, November 13-16, 2018, pp. 78-84, 2018, IEEE, 978-9-5268-6536-2. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
25 | Kuen-Suan Chen, Kung-Jeng Wang, Tsang-Chuan Chang |
A novel approach to deriving the lower confidence limit of indices Cpu, Cpl, and Cpk in assessing process capability. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Int. J. Prod. Res. ![In: Int. J. Prod. Res. 55(17), pp. 4963-4981, 2017. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
25 | Tadeusz Litak, Dirk Pattinson, Katsuhiko Sano, Lutz Schröder |
Model Theory and Proof Theory of CPL. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/1701.03773, 2017. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP BibTeX RDF |
|
25 | Oliver Bracevac, Sebastian Erdweg, Guido Salvaneschi, Mira Mezini |
CPL: A Core Language for Cloud Computing - Technical Report. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/1602.00981, 2016. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP BibTeX RDF |
|
25 | Oliver Bracevac, Sebastian Erdweg, Guido Salvaneschi, Mira Mezini |
CPL: a core language for cloud computing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MODULARITY ![In: Proceedings of the 15th International Conference on Modularity, MODULARITY 2016, Málaga, Spain, March 14 - 18, 2016, pp. 94-105, 2016, ACM, 978-1-4503-3995-7. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
25 | Tanguy Ropitault |
Routage et performances dans les réseaux CPL pour le Smart Grid. (Routing and performance for the Smart Grid). ![Search on Bibsonomy](Pics/bibsonomy.png) |
|
2015 |
RDF |
|
25 | Hedong Yang, Lijie Wen, Jianmin Wang 0001, Raymond K. Wong 0001 |
CPL+: An improved approach for evaluating the local completeness of event logs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Inf. Process. Lett. ![In: Inf. Process. Lett. 114(11), pp. 607-610, 2014. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
25 | Qiguo Dai, Mao-Zu Guo 0001, Xiao-Yan Liu, Zhixia Teng, Chunyu Wang |
CPL: Detecting Protein Complexes by Propagating Labels on Protein-Protein Interaction Network. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Comput. Sci. Technol. ![In: J. Comput. Sci. Technol. 29(6), pp. 1083-1093, 2014. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
25 | Leon Bobrowski |
Discovering Main Vertexical Planes in a Multivariate Data Space by Using CPL Functions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICDM ![In: Advances in Data Mining. Applications and Theoretical Aspects - 14th Industrial Conference, ICDM 2014, St. Petersburg, Russia, July 16-20, 2014. Proceedings, pp. 200-213, 2014, Springer, 978-3-319-08975-1. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
25 | David Hartley |
CPL: Failed Venture or Noble Ancestor? ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Ann. Hist. Comput. ![In: IEEE Ann. Hist. Comput. 35(3), pp. 55-63, 2013. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
25 | Martin Richards |
How BCPL Evolved from CPL. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Comput. J. ![In: Comput. J. 56(5), pp. 664-670, 2013. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
25 | Manoj Sharma, Arti Noor |
CPL-Adiabatic Gated logic (CPLAG) XOR gate. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICACCI ![In: International Conference on Advances in Computing, Communications and Informatics, ICACCI 2013, Mysore, India, August 22-25, 2013, pp. 575-579, 2013, IEEE, 978-1-4799-2432-5. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
25 | Leon Bobrowski |
CPL Criterion Functions and Learning Algorithms Linked to the Linear Separability Concept. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EANN (1) ![In: Engineering Applications of Neural Networks - 14th International Conference, EANN 2013, Halkidiki, Greece, September 13-16, 2013 Proceedings, Part I, pp. 456-465, 2013, Springer, 978-3-642-41012-3. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
25 | De-Shuang Huang, Wen Jiang |
A General CPL-AdS Methodology for Fixing Dynamic Parameters in Dual Environments. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Syst. Man Cybern. Part B ![In: IEEE Trans. Syst. Man Cybern. Part B 42(5), pp. 1489-1500, 2012. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
25 | Mingoo Seok |
Performance and energy-efficiency improvement through modified CPL in organic transistor integrated circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: International Symposium on Low Power Electronics and Design, ISLPED'12, Redondo Beach, CA, USA - July 30 - August 01, 2012, pp. 215-220, 2012, ACM, 978-1-4503-1249-3. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
25 | Rehan Hashmat |
Characterization and Modeling of the Channel and Noise for Indoor MIMO PLC Networks. (Caractérisation et modélisation du canal et du bruit pour les réseaux CPL MIMO domestiques). ![Search on Bibsonomy](Pics/bibsonomy.png) |
|
2012 |
RDF |
|
25 | Leon Bobrowski |
CPL Clustering Based on Linear Dependencies. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Simul. Notes Eur. ![In: Simul. Notes Eur. 20(3-4), pp. 43-48, 2010. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
|
25 | Abdoul Rjoub, Al-Mamoon Al-Othman |
The Influence of the Nanometer Technology on Performance of CPL Full Adders. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Comput. ![In: J. Comput. 5(3), pp. 337-344, 2010. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP BibTeX RDF |
|
25 | Jianping Hu, Binbin Liu |
Energy Efficient Medium-Voltage Circuits Based on Adiabatic CPL. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISIA ![In: Information and Automation - International Symposium, ISIA 2010, Guangzhou, China, November 10-11, 2010. Revised Selected Papers, pp. 539-545, 2010, Springer, 978-3-642-19852-6. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
|
25 | Leon Bobrowski |
Selection of High Risk Patients with Ranked Models Based on the CPL Criterion Functions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICDM ![In: Advances in Data Mining. Applications and Theoretical Aspects, 10th Industrial Conference, ICDM 2010, Berlin, Germany, July 12-14, 2010. Proceedings, pp. 432-441, 2010, Springer, 978-3-642-14399-1. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
|
25 | Lixiang Wang, Jiuyun Xu, Stephan Reiff-Marganiec |
Online Detection of Feature Interactions of CPL Services. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICFI ![In: Feature Interactions in Software and Communication Systems X, International Conference on Feature Interactions in Software and Communication Systems, ICFI 2009, 11-12 June, 2009, Lisbon, Portugal., pp. 19-33, 2009, IOS Press, 978-1-60750-014-8. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
25 | Yiqun Xu, Luigi Logrippo, Jacques Sincennes |
Detecting feature interactions in CPL. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Netw. Comput. Appl. ![In: J. Netw. Comput. Appl. 30(2), pp. 775-799, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
25 | Nicolas Gorse, Luigi Logrippo, Jacques Sincennes |
Detecting feature interaction in CPL. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Softw. Syst. Model. ![In: Softw. Syst. Model. 5(2), pp. 121-134, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
Telephony software, Detection method, Feature interaction, Formal techniques |
25 | Dongmei Jiang, Ramiro Liscano, Luigi Logrippo |
Personalization of internet telephony services for presence with SIP and extended CPL. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Comput. Commun. ![In: Comput. Commun. 29(18), pp. 3766-3779, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
25 | Jonathan Lennox, Xiaotao Wu, Henning Schulzrinne |
Call Processing Language (CPL): A Language for User Control of Internet Telephony Services. ![Search on Bibsonomy](Pics/bibsonomy.png) |
RFC ![In: RFC 3880, pp. 1-74, October 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
25 | Wen Lea Pearn, Ming-Hung Shu |
An algorithm for calculating the lower confidence bounds of CPU and CPL with application to low-drop-out linear regulators. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. Reliab. ![In: Microelectron. Reliab. 43(3), pp. 495-502, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
25 | Wen Lea Pearn, Ming-Hung Shu |
Erratum to "An algorithm for calculating the lower confidence bounds of CPU and CPL with application to low-drop-out linear regulators" [Microelectronics Reliability 2003;43: 495-502]. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. Reliab. ![In: Microelectron. Reliab. 43(8), pp. 1349, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
25 | José M. Quintana, Maria J. Avedillo, Raúl Jiménez, Esther Rodríguez-Villegas |
Practical low-cost CPL implementations threshold logic functions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 11th ACM Great Lakes Symposium on VLSI 2001, West Lafayette, Indiana, USA, 2001, pp. 139-144, 2001, ACM, 1-58113-351-0. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
25 | David Hartley |
Cambridge and CPL in the 1960s. ![Search on Bibsonomy](Pics/bibsonomy.png) |
High. Order Symb. Comput. ![In: High. Order Symb. Comput. 13(1/2), pp. 69-70, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
25 | Martin Richards |
Christopher Strachey and the Cambridge CPL Compiler. ![Search on Bibsonomy](Pics/bibsonomy.png) |
High. Order Symb. Comput. ![In: High. Order Symb. Comput. 13(1/2), pp. 85-88, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
25 | Abdoul Rjoub, Odysseas G. Koufopavlou |
Multiple low swing voltage values for CPL, CVSL and domino logic families. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICECS ![In: Proceedings of the 2000 7th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2000, Jounieh, Lebanon, December 17-20, 2000, pp. 903-906, 2000, IEEE, 0-7803-6542-9. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
25 | Mihai Munteanu, Peter A. Ivey, Nicholas Luke Seed, Marios Psilogeorgopoulos, Neil Powell, Istvan Bogdan |
Single Ended Pass-Transistor Logic - A Comparison with CMOS and CPL. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI ![In: VLSI: Systems on a Chip, IFIP TC10/WG10.5 Tenth International Conference on Very Large Scale Integration (VLSI '99), December 1-4, 1999, Lisbon, Portugal, pp. 206-218, 1999, Kluwer, 0-7923-7731-1. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP BibTeX RDF |
|
25 | Eyal Mozes |
CPL: a tool for planning with multiple considerations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
|
1993 |
RDF |
|
25 | Peter Lundén |
Sound-Models: The Representation of Knowledge about Sound-Synthesis in the CPL Environment. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICMC ![In: Proceedings of the 1991 International Computer Music Conference, ICMC 1991, Montreal, Quebec, Canada, October 16-20, 1991, 1991, Michigan Publishing. The full citation details ...](Pics/full.jpeg) |
1991 |
DBLP BibTeX RDF |
|
25 | David W. Barron, John N. Buxton, David F. Hartley, Eric Nixon, Christopher S. Strachey |
The Main Features of CPL. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Comput. J. ![In: Comput. J. 6(2), pp. 134-143, 1963. The full citation details ...](Pics/full.jpeg) |
1963 |
DBLP DOI BibTeX RDF |
|
17 | João P. Papa, Alexandre X. Falcão |
A Learning Algorithm for the Optimum-Path Forest Classifier. ![Search on Bibsonomy](Pics/bibsonomy.png) |
GbRPR ![In: Graph-Based Representations in Pattern Recognition, 7th IAPR-TC-15 International Workshop, GbRPR 2009, Venice, Italy, May 26-28, 2009. Proceedings, pp. 195-204, 2009, Springer, 978-3-642-02123-7. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
17 | Sundeepkumar Agarwal, Pavankumar V. K., Yokesh R. |
Energy-Efficient, High Performance Circuits for Arithmetic Units. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 21st International Conference on VLSI Design (VLSI Design 2008), 4-8 January 2008, Hyderabad, India, pp. 371-376, 2008, IEEE Computer Society, 0-7695-3083-4. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
17 | Riccardo Pucella |
Introduction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SIGACT News ![In: SIGACT News 38(4), pp. 64, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
17 | Mandeep Singh, Christophe Giacomotto, Bart R. Zeydel, Vojin G. Oklobdzija |
Logic Style Comparison for Ultra Low Power Operation in 65nm Technology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PATMOS ![In: Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation, 17th International Workshop, PATMOS 2007, Gothenburg, Sweden, September 3-5, 2007, Proceedings, pp. 181-190, 2007, Springer, 978-3-540-74441-2. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
17 | Tarashankar Rudra, David Tien, Terry Bossomaier |
Spoken Communication with Computer Game Characters. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICITA (1) ![In: Third International Conference on Information Technology and Applications (ICITA 2005), 4-7 July 2005, Sydney, Australia, pp. 494-497, 2005, IEEE Computer Society, 0-7695-2316-1. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
pidgin, XML, Games |
17 | Leon Bobrowski |
Linear Ranked Regression - Designing Principles. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CORES ![In: Computer Recognition Systems, Proceedings of the 4th International Conference on Computer Recognition Systems, CORES'05, May 22-25, 2005, Rydzyna Castle, Poland, pp. 105-112, 2005, Springer, 978-3-540-25054-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
17 | Yuanzhong Wan, Maitham Shams |
Optimization of Mixed Logic Circuits with Application to a 64-Bit Static Adder. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 18th International Conference on VLSI Design (VLSI Design 2005), with the 4th International Conference on Embedded Systems Design, 3-7 January 2005, Kolkata, India, pp. 261-266, 2005, IEEE Computer Society, 0-7695-2264-5. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
17 | Leon Bobrowski, Tomasz Lukaszuk |
Selection of the Linearly Separable Feature Subsets. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICAISC ![In: Artificial Intelligence and Soft Computing - ICAISC 2004, 7th International Conference, Zakopane, Poland, June 7-11, 2004, Proceedings, pp. 544-549, 2004, Springer, 3-540-22123-9. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
17 | Hiroaki Suzuki, Woopyo Jeong, Kaushik Roy 0001 |
Low-power carry-select adder using adaptive supply voltage based on input vector patterns. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: Proceedings of the 2004 International Symposium on Low Power Electronics and Design, 2004, Newport Beach, California, USA, August 9-11, 2004, pp. 313-318, 2004, ACM. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
adaptive supply voltage, low power adder, carry-select adder |
17 | Pattara Leelaprute, Masahide Nakamura, Ken-ichi Matsumoto, Tohru Kikuno |
Evaluating Semantic Warnings in VoIP Programmable Services with Open Source Environment. ![Search on Bibsonomy](Pics/bibsonomy.png) |
APSEC ![In: 10th Asia-Pacific Software Engineering Conference (APSEC 2003), 10-12 December 2003, Chiang Mai, Thailand, pp. 552-, 2003, IEEE Computer Society, 0-7695-2011-1. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
17 | Abhijit S. Pandya, Ankur Agarwal, Pyeoung Kee Kim |
Low Power Design of the Neuroprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
KES ![In: Knowledge-Based Intelligent Information and Engineering Systems, 7th International Conference, KES 2003, Oxford, UK, September 3-5, 2003, Proceedings, Part II, pp. 856-862, 2003, Springer, 3-540-40804-5. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
17 | Massimo Alioto, Gaetano Palumbo |
Analysis and comparison on full adder block in submicron technology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 10(6), pp. 806-823, 2002. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
17 | Viji Srinivasan, David M. Brooks, Michael Gschwind, Pradip Bose, Victor V. Zyuban, Philip N. Strenski, Philip G. Emma |
Optimizing pipelines for power and performance. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: Proceedings of the 35th Annual International Symposium on Microarchitecture, Istanbul, Turkey, November 18-22, 2002, pp. 333-344, 2002, ACM/IEEE Computer Society, 0-7695-1859-1. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
17 | Kenneth J. Turner |
Modelling SIP Services Using CRESS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FORTE ![In: Formal Techniques for Networked and Distributed Systems - FORTE 2002, 22nd IFIP WG 6.1 International Conference Houston, Texas, USA, November 11-14, 2002, Proceedings, pp. 162-177, 2002, Springer, 3-540-00141-7. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
17 | Natalia Kazakova, Raymond J. Sung, Nelson G. Durdle, Martin Margala, Julien Lamoureux |
Fast and low-power inner product processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (4) ![In: Proceedings of the 2001 International Symposium on Circuits and Systems, ISCAS 2001, Sydney, Australia, May 6-9, 2001, pp. 646-649, 2001, IEEE, 0-7803-6685-9. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
17 | Limsoon Wong |
The functional guts of the Kleisli query system. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICFP ![In: Proceedings of the Fifth ACM SIGPLAN International Conference on Functional Programming (ICFP '00), Montreal, Canada, September 18-21, 2000., pp. 1-10, 2000, ACM, 1-58113-202-6. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
17 | David Zhang 0001, Mohamed I. Elmasry |
VLSI compressor design with applications to digital neural networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 5(2), pp. 230-233, 1997. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
17 | Uming Ko, T. Balsara, Wai Lee |
Low-power design techniques for high-performance CMOS adders. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 3(2), pp. 327-333, 1995. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
|
17 | Debabrata Ghosh, S. K. Nandy 0001 |
Design and realization of high-performance wave-pipelined 8×8 b multiplier in CMOS technology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 3(1), pp. 36-48, 1995. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
|
17 | Sanjay Rekhi, J. Donald Trotter |
HAL: heuristic algorithms for layout synthesis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ARVLSI ![In: 16th Conference on Advanced Research in VLSI (ARVLSI '95), March 27-29, 1995, Chapel Hill, North Carolina, USA, pp. 185-199, 1995, IEEE Computer Society, 0-8186-7047-9. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
layout synthesis, graph theory based algorithms, leaf cells, common poly gates, 1-1/2-d layout style, common circuit nodes, transistor sets, symbolic layouts, static dual type, static CMOS circuitry, pullup network, pulldown network, dynamic logic styles, graph theory, network topology, logic CAD, heuristic algorithms, circuit layout CAD, CMOS logic circuits, CMOS circuits, GENIE, run time efficient, layout area |