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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 5518 occurrences of 2681 keywords
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Results
Found 7331 publication records. Showing 7331 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
63 | K. Korotaev |
Hierarchical CPU Schedulers for Multiprocessor Systems, Fair CPU Scheduling and Processes Isolation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CLUSTER ![In: 2005 IEEE International Conference on Cluster Computing (CLUSTER 2005), September 26 - 30, 2005, Boston, Massachusetts, USA, pp. 1, 2005, IEEE Computer Society, 0-7803-9485-2. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
61 | Ping Yang, Shu Dai, Xiuhua Wu, Yong Yang |
The Hardware Research of Dual-port RAM for Main-spare CPU in Rural Power Terminal System of Power Quantity Collection. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CCTA ![In: Computer And Computing Technologies In Agriculture, Volume I, First IFIP TC 12 International Conference on Computer and Computing Technologies in Agriculture (CCTA 2007), Wuyishan, China, August 18-20, 2007, pp. 433-440, 2007, Springer, 978-0-387-77250-9. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
dual-port RAM, main-spare CPU, terminal of power quantity collection, data exchange, parallel communication |
53 | John G. Cleary, Murray Pearson, Husam Kinawi |
The architecture of an optimistic CPU: the WarpEngine. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HICSS (1) ![In: 28th Annual Hawaii International Conference on System Sciences (HICSS-28), January 3-6, 1995, Kihei, Maui, Hawaii, USA, pp. 163-172, 1995, IEEE Computer Society, 0-8186-6945-4. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
optimistic CPU, WarpEngine, shared memory CPU, single instructions, memory latency tolerance, executable instructions, TimeWarp algorithm, optimistic, single linear address space, single thread of control, reliability, caches, parallel architectures, fault tolerant computing, concurrency control, synchronisation, synchronisation, shared memory systems, memory architecture, cache storage, memory system, memory model, time stamped, memory accesses, local memory |
52 | Xiaodong Zhang 0001, Yanxia Qu, Li Xiao 0001 |
Improving Distributed Workload Performance by Sharing both CPU and Memory Resources. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICDCS ![In: Proceedings of the 20th International Conference on Distributed Computing Systems, Taipei, Taiwan, April 10-13, 2000, pp. 233-241, 2000, IEEE Computer Society, 0-7695-0601-1. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
50 | Dongyu Liu, Songqing Chen, Bo Shen 0003 |
AMTrac: adaptive meta-caching for transcoding. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NOSSDAV ![In: Network and Operating System Support for Digital Audio and Video, 16th International Workshop, NOSSDAV 2006, Newport, Rhode Island, USA, November 22-23, 2006, Proceedings, pp. 6, 2006, ACM, 1-59593-285-2. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
CPU intensive computing, meta-caching, adaptation, transcoding |
49 | Toshihiro Tabata, Satoshi Hakomori, Kazutoshi Yokoyama, Hideo Taniguchi |
Controlling CPU Usage for Processes with Execution Resource for Mitigating CPU DoS Attack. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MUE ![In: 2007 International Conference on Multimedia and Ubiquitous Engineering (MUE 2007), 26-28 April 2007, Seoul, Korea, pp. 141-152, 2007, IEEE Computer Society, 978-0-7695-2777-2. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
47 | Andrea Santoro, Francesco Quaglia |
PCI-DMA/CPU Handoff for Increased Effectiveness of Checkpointing Functionalities in CCL. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DS-RT ![In: 7th IEEE International Symposium on Distributed Simulation and Real-Time Applications (DS-RT 2003), 23-25 October 2003, Delft, The Netherlands, pp. 120-127, 2003, IEEE Computer Society, 0-7695-2036-7. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
47 | Shimin Chen, Anastassia Ailamaki, Phillip B. Gibbons, Todd C. Mowry |
Improving hash join performance through prefetching. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Database Syst. ![In: ACM Trans. Database Syst. 32(3), pp. 17, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
CPU cache performance, CPU cache prefetching, group prefetching, software-pipelined prefetching, Hash join |
47 | C. Javier Castro Peña, Joseph B. Evans |
Performance Evaluation of Software Virtual Private Networks (VPN). ![Search on Bibsonomy](Pics/bibsonomy.png) |
LCN ![In: Proceedings 27th Conference on Local Computer Networks, Tampa, Florida, USA, 8-10 November, 2000, pp. 522-523, 2000, IEEE Computer Society, 0-7695-0912-6. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
software virtual private networks, software VPN, CPU usage, VPN programs, Ethernet link, transference speed, CPU overhead, low speed serial link, performance evaluation, compression, data compression, encryption, local area networks, performance measurements, software performance evaluation, software packages, software packages, VPN, network throughput, business communication, 100 Mbit/s |
47 | Ashish Mehra, Atri Indiresan, Kang G. Shin |
Resource management for real-time communication: making theory meet practice. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Real Time Technology and Applications Symposium ![In: 2nd IEEE Real-Time Technology and Applications Symposium, RTAS '96, Boston, MA, USA, June 10-12, 1996, pp. 130-138, 1996, IEEE Computer Society, 0-8186-7448-2. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
host CPU, link resources, channel admissibility, resource capacity, implementation paradigms, admission control procedure, resource preemption overheads, link bandwidth, CPU bandwidth allocation, real-time systems, resource allocation, distributed processing, resource management, packet switching, operating systems (computers), real-time communication, network operating systems, packet-switched networks, computer network management, telecommunication congestion control, telecommunication channels, real-time channels |
46 | Loïc Duflot |
CPU Bugs, CPU Backdoors and Consequences on Security. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ESORICS ![In: Computer Security - ESORICS 2008, 13th European Symposium on Research in Computer Security, Málaga, Spain, October 6-8, 2008. Proceedings, pp. 580-599, 2008, Springer, 978-3-540-88312-8. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
hardware bug, hardware backdoor, CPU, x86 |
46 | Uwe Langer |
Integration of Performance Evaluations in the Design Process of CPUs and Computer Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MMB ![In: Quantitative Evaluation of Computing and Communication Systems, 8th International Conference on Modelling Techniques and Tools for Computer Performance Evaluation, Performance Tools '95, 8th GI/ITG Conference on Measuring, Modeling and Evaluating Computing and Communication Systems, MMB '95, Heidelberg, Germany, September 20-22, 1995, Proceedings, pp. 71-85, 1995, Springer, 3-540-60300-X. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
CPU design, workload hierarchy, generic objects, information re-use, simulation, performance evaluation, modelling, computer design |
45 | Vignesh T. Ravi, Wenjing Ma, David Chiu 0001, Gagan Agrawal |
Compiler and runtime support for enabling generalized reduction computations on heterogeneous parallel configurations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICS ![In: Proceedings of the 24th International Conference on Supercomputing, 2010, Tsukuba, Ibaraki, Japan, June 2-4, 2010, pp. 137-146, 2010, ACM, 978-1-4503-0018-6. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
dynamic work distribution, generalized reductions, multi-cores, GPGPU, heterogeneous systems |
44 | Nick Richardson, Lun Bin Huang, Razak Hossain, Tommy Zounes, Naresh Soni, Julian Lewis |
The iCOREtm 520 MHz synthesizable CPU core. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 39th Design Automation Conference, DAC 2002, New Orleans, LA, USA, June 10-14, 2002, pp. 640-645, 2002, ACM, 1-58113-461-4. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
high-frequency, st20, cache, synthesis, pipeline, embedded, ASIC, branch-prediction, microarchitecture, CPU |
43 | Swann Perarnau, Guillaume Huard |
KRASH: reproducible CPU load generation on many cores machines. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PPoPP ![In: Proceedings of the 15th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, PPOPP 2010, Bangalore, India, January 9-14, 2010, pp. 327-328, 2010, ACM, 978-1-60558-877-3. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
cpu load generation, many cores, experimentation testbed |
43 | Walter Binder, Jarle Hulaas |
Self-accounting as Principle for Portable CPU Control in Java. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Net.ObjectDays ![In: Object-Oriented and Internet-Based Technologies, 5th Annual International Conference on Object-Oriented and Internet-Based Technologies, Concepts, and Applications for a NetworkedWorld, Net.ObjectDays 2004, Erfurt, Germany, September 27-30, 2004, Proceedings, pp. 24-38, 2004, Springer, 3-540-23201-X. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
Bytecode rewriting, CPU accounting and control, Java, program transformations |
43 | Lei Shi 0001, Yuyan Sun, Lin Wei |
Effect of Scheduling Discipline on CPU-MEM Load Sharing System. ![Search on Bibsonomy](Pics/bibsonomy.png) |
GCC ![In: Grid and Cooperative Computing, Sixth International Conference on Grid and Cooperative Computing, GCC 2007, August 16-18, 2007, Urumchi, Xinjiang, China, Proceedings, pp. 242-249, 2007, IEEE Computer Society, 0-7695-2871-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
41 | Ergude Bao, Yang Yang, Hui Chen, Yuan-Yuan Lu, Xiao Liu, Weisheng Li 0001 |
A study and implementation of self-adaptive allocation algorithm for parallel program. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CSTST ![In: CSTST 2008: Proceedings of the 5th International Conference on Soft Computing as Transdisciplinary Science and Technology, Cergy-Pontoise, France, October 28-31, 2008, pp. 583-588, 2008, ACM, 978-1-60558-046-3. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Microsoft WCCS system, counter propagation neutral network, self-adaptive, API, CPU time |
41 | Abhishek Udupa, R. Govindarajan, Matthew J. Thazhuthaveetil |
Synergistic execution of stream programs on multicores with accelerators. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LCTES ![In: Proceedings of the 2009 ACM SIGPLAN/SIGBED conference on Languages, compilers, and tools for embedded systems, LCTES 2009, Dublin, Ireland, June 19-20, 2009, pp. 99-108, 2009, ACM, 978-1-60558-356-3. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
CUDAa, partitioning, software pipelining, stream programming, GPU programming |
41 | Victor W. Lee, Changkyu Kim, Jatin Chhugani, Michael Deisher, Daehyun Kim 0001, Anthony D. Nguyen, Nadathur Satish, Mikhail Smelyanskiy, Srinivas Chennupaty, Per Hammarlund, Ronak Singhal, Pradeep Dubey |
Debunking the 100X GPU vs. CPU myth: an evaluation of throughput computing on CPU and GPU. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: 37th International Symposium on Computer Architecture (ISCA 2010), June 19-23, 2010, Saint-Malo, France, pp. 451-460, 2010, ACM, 978-1-4503-0053-7. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
cpu architecture, gpu architecture, throughput computing, performance analysis, performance measurement, software optimization |
40 | Gerasimos Xydas, Jérôme Tassel |
Experimentation in CPU Control with Real-Time Java. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISORC ![In: 3rd International Symposium on Object-Oriented Real-Time Distributed Computing (ISORC 2000), 15-17 March 2000, Newport Beach, CA, USA, pp. 386-391, 2000, IEEE Computer Society, 0-7695-0607-0. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
host resource manager, QoS, worst case execution time, streaming media, real-time Java, CPU, end-to-end, rate-monotonic |
39 | Fan Wu 0013, Emmanuel Agu, Clifford Lindsay |
Adaptive CPU Scheduling to Conserve Energy in Real-Time Mobile Graphics Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISVC (1) ![In: Advances in Visual Computing, 4th International Symposium, ISVC 2008, Las Vegas, NV, USA, December 1-3, 2008. Proceedings, Part I, pp. 624-633, 2008, Springer, 978-3-540-89638-8. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Real-time rendering, Energy conservation, Multiresolution rendering, CPU scheduling |
39 | Guilhem Paroux, Bernard Toursel, Richard Olejnik, Violeta Felea |
A Java CPU Calibration Tool for Load Balancing in Distributed Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPDC/HeteroPar ![In: 3rd International Symposium on Parallel and Distributed Computing (ISPDC 2004), 3rd International Workshop on Algorithms, Models and Tools for Parallel Computing on Heterogenous Networks (HeteroPar 2004), 5-7 July 2004, Cork, Ireland, pp. 155-159, 2004, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
Load observation, Java, Calibration, Distributed applications, Network of workstations, CPU time |
39 | Marc A. Nurmi, William E. Bejcek, Rod N. Gregoire, K. C. Liu, Mark D. Pohl |
Automatic Management of CPU and I/O Bottlenecks in Distributed Applications on ATM Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPDC ![In: Proceedings of the 5th International Symposium on High Performance Distributed Computing (HPDC '96), Syracuse, NY, USA, August 6-9, 1996., pp. 481-489, 1996, IEEE Computer Society, 0-8186-7582-9. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
CPU bottleneck management, input output bottleneck management, computationally intensive applications, distributed process management, centralized application management, parallel programming, asynchronous transfer mode, message passing, message passing, programming environments, local area networks, distributed applications, bandwidth, ATM networks, software performance evaluation, parallel programming environments, workstation networks, application performance, virtual shared memory |
38 | Isaac Gelado, John H. Kelm, Shane Ryoo, Steven S. Lumetta, Nacho Navarro, Wen-mei W. Hwu |
CUBA: an architecture for efficient CPU/co-processor data communication. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICS ![In: Proceedings of the 22nd Annual International Conference on Supercomputing, ICS 2008, Island of Kos, Greece, June 7-12, 2008, pp. 299-308, 2008, ACM, 978-1-60558-158-3. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
co-processors |
38 | Chung-Hsing Hsu, Wu-chun Feng |
Effective Dynamic Voltage Scaling Through CPU-Boundedness Detection. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PACS ![In: Power-Aware Computer Systems, 4th International Workshop, PACS 2004, Portland, OR, USA, December 5, 2004, Revised Selected Papers, pp. 135-149, 2004, Springer, 3-540-29790-1. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
38 | Yap Siong Chua, Charles N. Winton |
A Simulation Tool for Teaching CPU Design and Microprogramming Concepts. ![Search on Bibsonomy](Pics/bibsonomy.png) |
APL ![In: Conference Proceedings on APL as a Tool of Thought, APL 1989, New York City, NY, USA, August 7-10, 1989., pp. 94-100, 1989, ACM, 0-89791-327-2. The full citation details ...](Pics/full.jpeg) |
1989 |
DBLP DOI BibTeX RDF |
APL |
38 | Alois Ferscha, Johannes Lüthi |
Estimating rollback overhead for optimism control in Time Warp. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Annual Simulation Symposium ![In: Proceedings 28st Annual Simulation Symposium (SS '95), April 25-28, 1995, Santa Barbara, California, USA, pp. 2-12, 1995, IEEE Computer Society, 0-8186-7091-6. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
rollback overhead, adaptive optimism control mechanism, performance pitfall, Time Warp distributed discrete event simulation protocol, DDES protocol, overoptimistic progression, event execution, simulated future, premature event execution, causality violations, performance inefficiencies, observed model parallelism, local virtual time, LVT progression per unit CPU time, arriving messages, simulation engine, optimal CPU delay interval, rollback probability, synchronization behavior, iPSC/860, protocols, virtual machines, discrete event simulation, adaptive systems, optimal control, cost model, distributed memory multiprocessor, time warp simulation, logical processes |
38 | Gregory Bollella, Kevin Jeffay |
Support for real-time computing within general purpose operating systems-supporting co-resident operating systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Real Time Technology and Applications Symposium ![In: 1st IEEE Real-Time Technology and Applications Symposium, Chicago, Illinois, USA, May 15-17, 1995, pp. 4-14, 1995, IEEE Computer Society, 0-8186-6980-2. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
real-time computing support, co-resident operating systems, workstation applications, real-time communication services, real-time computation services, real-time computing technology development, commercial systems, predictable real-time kernel, shared device multiplexing, shared data structure partitioning, CPU executive, IBM Microkernel, Mach microkernel, OSF/1 server, uniprocessor periodic task scheduling, CPU capacity allocation, scheduling, software engineering, real-time systems, hardware, multimedia systems, processor scheduling, operating systems (computers), operating system kernels, distributed multimedia applications, general purpose operating systems |
37 | Dimitris Tsirogiannis, Stavros Harizopoulos, Mehul A. Shah |
Analyzing the energy efficiency of a database server. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SIGMOD Conference ![In: Proceedings of the ACM SIGMOD International Conference on Management of Data, SIGMOD 2010, Indianapolis, Indiana, USA, June 6-10, 2010, pp. 231-242, 2010, ACM, 978-1-4503-0032-2. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
cpu power, ssd, energy efficiency, power consumption, database server |
37 | Yen-Tso Liu, Tyng-Yeu Liang, Chi-Ting Huang, Ce-Kuen Shieh |
Memory Resource Considerations in the Load Balancing of Software DSM Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICPP Workshops ![In: 32nd International Conference on Parallel Processing Workshops (ICPP 2003 Workshops), 6-9 October 2003, Kaohsiung, Taiwan, pp. 71-78, 2003, IEEE Computer Society, 0-7695-2018-9. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
CPU resource, memory resource, load balance, distributed shared memory, page replacement |
37 | Tatsuo Nakajima, Hiroshi Fujita |
Experiences with adaptive QOS mapping scheme. ![Search on Bibsonomy](Pics/bibsonomy.png) |
RTCSA ![In: Third International Workshop on Real-Time Computing Systems Application (RTCSA '96), October 30 - November 01, 1996, Seoul, Korea, pp. 261-, 1996, IEEE Computer Society, 0-8186-7626-4. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
QOS mapping, CPU capacity, Quality of Service, operating systems, feedback control, multimedia computing, multimedia computing, dynamic mapping |
36 | Michela Becchi, Surendra Byna, Srihari Cadambi, Srimat T. Chakradhar |
Data-aware scheduling of legacy kernels on heterogeneous platforms with distributed memory. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SPAA ![In: SPAA 2010: Proceedings of the 22nd Annual ACM Symposium on Parallelism in Algorithms and Architectures, Thira, Santorini, Greece, June 13-15, 2010, pp. 82-91, 2010, ACM, 978-1-4503-0079-7. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
accelerators, distributed memory, multi-core processors, runtime, heterogeneous platforms |
35 | Mahmut T. Kandemir, Ozcan Ozturk 0001 |
Software-directed combined cpu/link voltage scaling fornoc-based cmps. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SIGMETRICS ![In: Proceedings of the 2008 ACM SIGMETRICS International Conference on Measurement and Modeling of Computer Systems, SIGMETRICS 2008, Annapolis, MD, USA, June 2-6, 2008, pp. 359-370, 2008, ACM, 978-1-60558-005-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
compiler, CMP, NoC, voltage scaling, cpu, communication link |
34 | Alexander Khutoretskij, Sergei Bredikhin |
Distributions and Schedules of CPU Time in a Multiprocessor System When the Users' Utility Functions Are Linear. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PaCT ![In: Parallel Computing Technologies, 10th International Conference, PaCT 2009, Novosibirsk, Russia, August 31-September 4, 2009. Proceedings, pp. 316-320, 2009, Springer, 978-3-642-03274-5. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
paid services, scheduling, linear programming, Distribution, multiprocessor system, CPU time, market equilibrium |
34 | Yoshihiro Sugaya, Hiroshi Tatsumi, Mitiharu Kobayashi, Hirotomo Aso |
Long-Term CPU Load Prediction System for Scheduling of Distributed Processes and its Implementation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AINA ![In: 22nd International Conference on Advanced Information Networking and Applications, AINA 2008, GinoWan, Okinawa, Japan, March 25-28, 2008, pp. 971-977, 2008, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Long-Term CPU load prediction, runtime prediction, load balancing |
34 | Sriram Govindan, Arjun R. Nath, Amitayu Das, Bhuvan Urgaonkar, Anand Sivasubramaniam |
Xen and co.: communication-aware CPU scheduling for consolidated xen-based hosting platforms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VEE ![In: Proceedings of the 3rd International Conference on Virtual Execution Environments, VEE 2007, San Diego, California, USA, June 13-15, 2007, pp. 126-136, 2007, ACM, 978-1-59593-630-1. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
virtual machine monitor, xen, CPU scheduler, multi-tier application |
34 | Bhuvan Urgaonkar, Prashant J. Shenoy |
Sharc: Managing CPU and Network Bandwidth in Shared Clusters. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 15(1), pp. 2-17, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
Shared clusters, dedicated clusters, Sharc, nucleus, CPU and network bandwidth, hosting platforms, Linux, control plane, capsule |
34 | Marta Beltrán, José Luis Bosque |
Estimating a Workstation CPU Assignment with the DYPAP Monitor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPDC/HeteroPar ![In: 3rd International Symposium on Parallel and Distributed Computing (ISPDC 2004), 3rd International Workshop on Algorithms, Models and Tools for Parallel Computing on Heterogenous Networks (HeteroPar 2004), 5-7 July 2004, Cork, Ireland, pp. 64-70, 2004, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
CPU availability, monitoring, resources management, Computational models |
34 | Jun Wu 0010, Tei-Wei Kuo |
Real-Time Scheduling of CPU-Bound and I/O-Bound Processes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
RTCSA ![In: 6th International Workshop on Real-Time Computing and Applications Symposium (RTCSA '99), 13-16 December 1999, Hong Kong, China, pp. 303-, 1999, IEEE Computer Society, 0-7695-0306-3. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
CPU-Bound Process, I/O-Bound Process, Real-Time Systems, Real-Time Scheduling, Priority Ceiling Protocol |
34 | Ricardo Salem Zebulum, Marco Aurélio Cavalcanti Pacheco, Marley M. B. R. Vellasco |
Evolutionary Systems Applied to the Synthesis of a CPU Controller. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SEAL ![In: Simulated Evolution and Learning, Second Asia-Pacific Conference on Simulated Evolution and Learning, SEAL'98, Canberra, Australia, November 24-27 1998, Selected Papers, pp. 373-380, 1998, Springer, 3-540-65907-2. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
Evolutionary Hardware, CPU control, Sequential Circuits |
34 | Andrea Acquaviva, Nicola Bombieri, Franco Fummi, Sara Vinco |
Automatic customization of device drivers for IP-cores used with assorted CPU organizations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CODES+ISSS ![In: Proceedings of the 7th International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2009, Grenoble, France, October 11-16, 2009, pp. 173-182, 2009, ACM, 978-1-60558-628-1. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
device driver design, embedded systems, hardware-software codesign |
34 | Lorenzo Martignoni, Roberto Paleari, Giampaolo Fresi Roglia, Danilo Bruschi |
Testing CPU emulators. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSTA ![In: Proceedings of the Eighteenth International Symposium on Software Testing and Analysis, ISSTA 2009, Chicago, IL, USA, July 19-23, 2009, pp. 261-272, 2009, ACM, 978-1-60558-338-9. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
software testing, emulation, automatic test generation, fuzzing |
34 | Mark Joselli, Marcelo Panaro de Moraes Zamith, Esteban Walter Gonzalez Clua, Anselmo Antunes Montenegro, Aura Conci, Regina Leal-Toledo, Luis Valente, Bruno Feijó, Marcos Cordeiro d'Ornellas, Cesar Tadeu Pozzer |
Automatic Dynamic Task Distribution between CPU and GPU for Real-Time Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CSE ![In: Proceedings of the 11th IEEE International Conference on Computational Science and Engineering, CSE 2008, São Paulo, SP, Brazil, July 16-18, 2008, pp. 48-55, 2008, IEEE Computer Society, 978-0-7695-3193-9. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
real-time loop models, real-time systems, Parallel computing, GPGPU, task distribution |
34 | Wanghong Yuan, Klara Nahrstedt |
Energy-efficient CPU scheduling for multimedia applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Comput. Syst. ![In: ACM Trans. Comput. Syst. 24(3), pp. 292-331, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
mobile computing, multimedia, Power management, soft real-time |
34 | Hai Jin 0001, Qionghua Hu, Xiaofei Liao, Hao Chen 0002, Dafu Deng |
IMAC: an importance-level based adaptive CPU scheduling scheme for multimedia and non-real time applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AICCSA ![In: 2005 ACS / IEEE International Conference on Computer Systems and Applications (AICCSA 2005), January 3-6, 2005, Cairo, Egypt, pp. 119, 2005, IEEE Computer Society, 0-7803-8735-X. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
34 | Kui-Yon Mun, Dae Woong Kim, Do-Hun Kim, Chan-Ik Park |
dDVS: An Efficient Dynamic Voltage Scaling Algorithm Based on the Differential of CPU Utilization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asia-Pacific Computer Systems Architecture Conference ![In: Advances in Computer Systems Architecture, 9th Asia-Pacific Conference, ACSAC 2004, Beijing, China, September 7-9, 2004, Proceedings, pp. 160-169, 2004, Springer, 3-540-23003-3. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
34 | Eric Eide, Tim Stack, John Regehr, Jay Lepreau |
Dynamic CPU Management for Real-Time, Middleware-Based Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Real-Time and Embedded Technology and Applications Symposium ![In: 10th IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS 2004), 25-28 May 2004, Toronto, Canada, pp. 286-295, 2004, IEEE Computer Society, 0-7695-2148-7. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
34 | Anil Patel |
An inside look at the Z80, 000 CPU: Zilog's new 32-bit microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AFIPS National Computer Conference ![In: American Federation of Information Processing Societies: 1984 National Computer Conference, 9-12 July 1984, Las Vegas, Nevada, USA, pp. 83-91, 1984, AFIPS Press, 0-88283-043-0. The full citation details ...](Pics/full.jpeg) |
1984 |
DBLP DOI BibTeX RDF |
|
33 | Toni Mastelic, Ivona Brandic, Jasmina Jaarevic |
CPU Performance Coefficient (CPU-PC): A Novel Performance Metric Based on Real-Time CPU Resource Provisioning in Time-Shared Cloud Environments. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CloudCom ![In: IEEE 6th International Conference on Cloud Computing Technology and Science, CloudCom 2014, Singapore, December 15-18, 2014, pp. 408-415, 2014, IEEE Computer Society, 978-1-4799-4093-6. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
32 | Bin Lin 0002, Arindam Mallik, Peter A. Dinda, Gokhan Memik, Robert P. Dick |
User- and process-driven dynamic voltage and frequency scaling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPASS ![In: IEEE International Symposium on Performance Analysis of Systems and Software, ISPASS 2009, April 26-28, 2009, Boston, Massachusetts, USA, Proceedings, pp. 11-22, 2009, IEEE Computer Society, 978-1-4244-4184-6. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
32 | Ming Wu 0006, Xian-He Sun |
Memory Conscious Task Partition and Scheduling in Grid Environments. ![Search on Bibsonomy](Pics/bibsonomy.png) |
GRID ![In: 5th International Workshop on Grid Computing (GRID 2004), 8 November 2004, Pittsburgh, PA, USA, Proceedings, pp. 138-145, 2004, IEEE Computer Society, 0-7695-2256-4. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
32 | Li Xiao 0001, Songqing Chen, Xiaodong Zhang 0001 |
Dynamic Cluster Resource Allocations for Jobs with Known and Unknown Memory Demands. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 13(3), pp. 223-240, 2002. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
memory-intensive workloads and trace-driven simulations, distributed systems, cluster computing, load sharing |
31 | Loïc Duflot |
CPU bugs, CPU backdoors and consequences on security. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Comput. Virol. ![In: J. Comput. Virol. 5(2), pp. 91-104, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
31 | Stanley Mazor |
Intel 8080 CPU Chip Development. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Ann. Hist. Comput. ![In: IEEE Ann. Hist. Comput. 29(2), pp. 70-73, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
Intel 8080, microchip, microprocessor, history, CPU, microcomputer |
30 | Michael Schöbel, Andreas Polze |
Kernel-mode scheduling server for CPU partitioning: a case study using the Windows research kernel. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SAC ![In: Proceedings of the 2008 ACM Symposium on Applied Computing (SAC), Fortaleza, Ceara, Brazil, March 16-20, 2008, pp. 1700-1704, 2008, ACM, 978-1-59593-753-7. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
CPU partitioning, windows research kernel, scheduling |
30 | Amith Kumar Nuggehalli Ramachandra, Avin Kumar Kannur |
Analysis of CPU Utilisation and Stack Consumption of a Multimedia Embedded System. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: 4th IEEE International Symposium on Electronic Design, Test and Applications, DELTA 2008, Hong Kong, January 23-25, 2008, pp. 89-94, 2008, IEEE Computer Society, 978-0-7695-3110-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
CPU Utilisation, Stack Consumption |
30 | Saeed Shamshiri, Hadi Esmaeilzadeh, Zainalabedin Navabi |
Instruction-level test methodology for CPU core self-testing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Design Autom. Electr. Syst. ![In: ACM Trans. Design Autom. Electr. Syst. 10(4), pp. 673-689, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
CPU core testing, Instruction level testing, test instruction set, BIST, pipelined processor, software-based self testing |
30 | Dimitris Nikolos, Haridimos T. Vergos |
On the Yield of VLSI Processors with on-chip CPU Cache. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EDCC ![In: Dependable Computing - EDCC-2, Second European Dependable Computing Conference, Taormina, Italy, October 2-4, 1996, Proceedings, pp. 214-230, 1996, Springer, 3-540-61772-8. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
Indexing terms On-chip CPU caches, Partially good chips, Fault Tolerance, Yield Enhancement |
30 | R. Gopalakrishnan, Guru M. Parulkar |
RMDP-a real-time CPU scheduling algorithm to provide QoS guarantees for protocol processing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Real Time Technology and Applications Symposium ![In: 1st IEEE Real-Time Technology and Applications Symposium, Chicago, Illinois, USA, May 15-17, 1995, pp. 56-57, 1995, IEEE Computer Society, 0-8186-6980-2. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
RMDP real-time CPU scheduling algorithm, processing guarantees, reduced contest switch operations, bandwidth guarantees, protocol session, NetBSD operating system, simulation, simulation, scheduling, real-time systems, protocols, delays, multimedia applications, processor scheduling, operating systems (computers), multimedia computing, QoS guarantees, delay guarantees, schedulability test, protocol processing |
29 | Yen-Lin Huang, Yun-Chung Shen, Ja-Ling Wu |
Scalable computation for spatially scalable video coding using NVIDIA CUDA and multi-core CPU. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Multimedia ![In: Proceedings of the 17th International Conference on Multimedia 2009, Vancouver, British Columbia, Canada, October 19-24, 2009, pp. 361-370, 2009, ACM, 978-1-60558-608-3. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
parallel computing, GPU, multi-core, CUDA, SVC |
29 | Xiaotie Deng, Li-Sha Huang, Minming Li |
On Walrasian Price of CPU Time. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Algorithmica ![In: Algorithmica 48(2), pp. 159-172, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
29 | Rong Ge 0002, Xizhou Feng, Wu-chun Feng, Kirk W. Cameron |
CPU MISER: A Performance-Directed, Run-Time System for Power-Aware Clusters. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICPP ![In: 2007 International Conference on Parallel Processing (ICPP 2007), September 10-14, 2007, Xi-An, China, pp. 18, 2007, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
29 | Andrea Camesi, Jarle Hulaas, Walter Binder |
Continuous Bytecode Instruction Counting for CPU Consumption Estimation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
QEST ![In: Third International Conference on the Quantitative Evaluation of Systems (QEST 2006), 11-14 September 2006, Riverside, California, USA, pp. 19-30, 2006, IEEE Computer Society, 0-7695-2665-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
29 | Dong Guo 0002, Liang Hu 0001, Meng Zhang 0006, Zhuopeng Zhang |
GcpSensor: a CPU Performance Tool for Grid Environments. ![Search on Bibsonomy](Pics/bibsonomy.png) |
QSIC ![In: Fifth International Conference on Quality Software (QSIC 2005), 19-20 September 2005, Melbourne, Australia, pp. 273-278, 2005, IEEE Computer Society, 0-7695-2472-9. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
29 | Xiaotie Deng, Li-Sha Huang, Minming Li |
On Walrasian Price of CPU Time. ![Search on Bibsonomy](Pics/bibsonomy.png) |
COCOON ![In: Computing and Combinatorics, 11th Annual International Conference, COCOON 2005, Kunming, China, August 16-29, 2005, Proceedings, pp. 586-595, 2005, Springer, 3-540-28061-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
29 | Xiaoqin Ma, Gene Cooperman |
Fast Query Processing by Distributing an Index over CPU Caches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CLUSTER ![In: 2005 IEEE International Conference on Cluster Computing (CLUSTER 2005), September 26 - 30, 2005, Boston, Massachusetts, USA, pp. 1-10, 2005, IEEE Computer Society, 0-7803-9485-2. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
29 | Saeed Shamshiri, Hadi Esmaeilzadeh, Zainalabedin Navabi |
Test Instruction Set (TIS) for High Level Self-Testing of CPU Cores. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asian Test Symposium ![In: 13th Asian Test Symposium (ATS 2004), 15-17 November 2004, Kenting, Taiwan, pp. 158-163, 2004, IEEE Computer Society, 0-7695-2235-1. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
29 | Sayaka Akioka, Yoichi Muraoka |
Extended forecast of CPU and network load on computational Grid. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CCGRID ![In: 4th IEEE/ACM International Symposium on Cluster Computing and the Grid (CCGrid 2004), April 19-22, 2004, Chicago, Illinois, USA, pp. 765-772, 2004, IEEE Computer Society, 0-7803-8430-X. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
29 | Wanghong Yuan, Klara Nahrstedt |
ReCalendar: Calendaring and Scheduling Applications with CPU and Energy Resource Guarantees for Mobile Devices. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PerCom ![In: Proceedings of the First IEEE International Conference on Pervasive Computing and Communications (PerCom'03), March 23-26, 2003, Fort Worth, Texas, USA, pp. 425-432, 2003, IEEE Computer Society, 0-7695-1893-1. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
29 | Thomas L. Martin, Daniel P. Siewiorek |
Nonideal battery and main memory effects on CPU speed-setting for low power. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 9(1), pp. 29-34, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
29 | Richard Wolski, Neil T. Spring, Jim Hayes |
Predicting the CPU Availability of Time-shared Unix Systems on the Computational Grid. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPDC ![In: Proceedings of the Eighth IEEE International Symposium on High Performance Distributed Computing, HPDC'99, Redondo Beach, California, USA, August 3-6, 1999., pp. 105-112, 1999, IEEE Computer Society, 0-7695-0287-3. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
29 | Junho Ahn, Jung-Hi Min, Hojung Cha, Rhan Ha |
A Power Management mechanism for Handheld Systems having a Multimedia Accelerator. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PerCom ![In: Sixth Annual IEEE International Conference on Pervasive Computing and Communications (PerCom 2008), 17-21 March 2008, Hong Kong, pp. 663-668, 2008, IEEE Computer Society, 978-0-7695-3113-7. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
handheld systems, multimedia accelerator, power management, CPU |
28 | Hisao Kameda |
Optimality of a Central Processor Scheduling Policy for Processing a Job Stream ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Comput. Syst. ![In: ACM Trans. Comput. Syst. 2(1), pp. 78-90, 1984. The full citation details ...](Pics/full.jpeg) |
1984 |
DBLP DOI BibTeX RDF |
1/0 bound, CPU bound, Markovian queuing model, dispatching policy, finite-source queue, job stream, machine repairman model, multiple-resource system, near-complete decomposability, multiprogramming, CPU scheduling, preemptive priority |
28 | Sotaro Ohara, Makoto Suzuki, Shunsuke Saruwatari, Hiroyuki Morikawa |
A Prototype of a Multi-core Wireless Sensor Node for Reducing Power Consumption. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SAINT ![In: Proceedings of the 2008 International Symposium on Applications and the Internet, SAINT 2008, 28 July - 1 August 2008, Turku, Finland, pp. 369-372, 2008, IEEE Computer Society, 978-0-7695-3297-4. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
multi-core CPU, sensor network, hard real-time, low power consumption |
28 | Faraz Idris Khan, Eui-nam Huh |
Adaptive Vertical Handoff Management Architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
International Conference on Computational Science (4) ![In: Computational Science - ICCS 2007, 7th International Conference, Beijing, China, May 27 - 30, 2007, Proceedings, Part IV, pp. 582-585, 2007, Springer, 978-3-540-72589-3. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
feedback scheduling, CPU scheduler adaptation, quality of service, resource management, vertical handoff |
28 | Jacob Engel, Joseph Meneskie, Taskin Koçak |
Performance analysis of network protocol offload in a simulation environment. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Southeast Regional Conference ![In: Proceedings of the 44st Annual Southeast Regional Conference, 2006, Melbourne, Florida, USA, March 10-12, 2006, pp. 762-763, 2006, ACM, 1-59593-315-8. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
CPU utilization, gigabit NIC, offload engines, TCP, IP, UDP |
28 | Cédric Dinont, Philippe Mathieu, Emmanuel Druon, Patrick Taillibert |
Artifacts for time-aware agents. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AAMAS ![In: 5th International Joint Conference on Autonomous Agents and Multiagent Systems (AAMAS 2006), Hakodate, Japan, May 8-12, 2006, pp. 593-600, 2006, ACM, 1-59593-303-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
CPU sharing, coordination, artifacts |
27 | Chuliang Weng, Zhigang Wang, Minglu Li 0001, Xinda Lu |
The hybrid scheduling framework for virtual machine systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VEE ![In: Proceedings of the 5th International Conference on Virtual Execution Environments, VEE 2009, Washington, DC, USA, March 11-13, 2009, pp. 111-120, 2009, ACM, 978-1-60558-375-4. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
virtualization, scheduling strategy, hybrid scheduling |
27 | Henry Wong, Anne Bracy, Ethan Schuchman, Tor M. Aamodt, Jamison D. Collins, Perry H. Wang, Gautham N. Chinya, Ankur Khandelwal Groen, Hong Jiang, Hong Wang 0003 |
Pangaea: a tightly-coupled IA32 heterogeneous chip multiprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PACT ![In: 17th International Conference on Parallel Architectures and Compilation Techniques, PACT 2008, Toronto, Ontario, Canada, October 25-29, 2008, pp. 52-61, 2008, ACM, 978-1-60558-282-5. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
ia32, on-chip integration, chip multiprocessor, heterogeneous |
27 | Young-Mi Kim, Dae-Joon Hwang |
The Flow Control of Audio Data Using Distributed Terminal Mixing in Multi-point Communication. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FQAS ![In: Flexible Query Answering Systems, 7th International Conference, FQAS 2006, Milan, Italy, June 7-10, 2006, Proceedings, pp. 671-680, 2006, Springer, 3-540-34638-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
27 | Dong-Jae Kang, Young-Ho Kim, Gyu-Il Cha, Sung-In Jung, Myung-Joon Kim, Hae-Young Bae |
Design and Implementation of Zero-Copy Data Path for Efficient File Transmission. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCC ![In: High Performance Computing and Communications, Second International Conference, HPCC 2006, Munich, Germany, September 13-15, 2006, Proceedings, pp. 350-359, 2006, Springer, 3-540-39368-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
27 | Mee Young Sung, Suk-Min Whang, Yonghee Yoo, Nam-Joong Kim, Jong Seung Park, Wonik Choi |
Parallel Processing for Reducing the Bottleneck in Realtime Graphics Rendering. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PCM ![In: Advances in Multimedia Information Processing - PCM 2006, 7th Pacific Rim Conference on Multimedia, Hangzhou, China, November 2-4, 2006, Proceedings, pp. 943-952, 2006, Springer, 3-540-48766-2. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
Realtime graphics rendering, Distribution of rendering operations, Optimization, Parallel processing, Multithreading, Bottleneck |
27 | Youngjin Cho, Naehyuck Chang |
Memory-aware energy-optimal frequency assignment for dynamic supply voltage scaling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: Proceedings of the 2004 International Symposium on Low Power Electronics and Design, 2004, Newport Beach, California, USA, August 9-11, 2004, pp. 387-392, 2004, ACM. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
low power, memory system, SDRAM |
27 | Stefan Manegold, Peter A. Boncz, Martin L. Kersten |
Optimizing Main-Memory Join on Modern Hardware. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Knowl. Data Eng. ![In: IEEE Trans. Knowl. Data Eng. 14(4), pp. 709-730, 2002. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
memory access optimization, decomposed storage model, query processing, Main-memory databases, join algorithms, implementation techniques |
27 | Hisao Kameda |
Effects of Job Loading Policies for Multiprogramming Systems in Processing a Job Stream. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Comput. Syst. ![In: ACM Trans. Comput. Syst. 4(1), pp. 71-106, 1986. The full citation details ...](Pics/full.jpeg) |
1986 |
DBLP DOI BibTeX RDF |
|
27 | Jeffrey R. Spirn |
Multi-queue scheduling of two tasks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SIGMETRICS ![In: Proceedings of the Joint International Conference on Measurements and Modeling of Computer Systems, SIGMETRICS 1976, March 29-31, 1976, Cambridge, MA, USA, pp. 102-108, 1976, ACM. The full citation details ...](Pics/full.jpeg) |
1976 |
DBLP DOI BibTeX RDF |
|
26 | Joel Grodstein, Rachid Rayess, Tad Truex, Linda Shattuck, Sue Lowell, Dan Bailey, David Bertucci, Gabriel P. Bischoff, Daniel E. Dever, Mike Gowan, Roy Lane, Brian Lilly, Krishna Nagalla, Rahul Shah 0004, Emily Shriver, Shi-Huang Yin, Shannon V. Morton |
Power and CAD considerations for the 1.75mbyte, 1.2ghz L2 cache on the alpha 21364 CPU. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 12th ACM Great Lakes Symposium on VLSI 2002, New York, NY, USA, April 18-19, 2002, pp. 1-6, 2002, ACM, 1-58113-462-2. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
low-power, cache memory, CPU, timing verification, logic verification |
25 | Janusz Sosnowski, Lukasz Tupaj |
CPU Testability in Embedded Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: Fifth IEEE International Symposium on Electronic Design, Test & Applications, DELTA 2010, Ho Chi Minh City, Vietnam, January 13-15, 2010, pp. 108-112, 2010, IEEE Computer Society, 978-0-7695-3978-2. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
CPU testing, embedded systems, testability, software-based-self-test |
25 | Enrico Bini, Giorgio C. Buttazzo, Giuseppe Lipari |
Minimizing CPU energy in real-time systems with discrete speed management. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Embed. Comput. Syst. ![In: ACM Trans. Embed. Comput. Syst. 8(4), pp. 31:1-31:23, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
CPU energy, Real-time systems |
25 | Jemal H. Abawajy, Sivarama P. Dandamudi |
Scheduling Parallel Jobs with CPU and I/O Resource Requirements in Cluster Computing Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MASCOTS ![In: 11th International Workshop on Modeling, Analysis, and Simulation of Computer and Telecommunication Systems (MASCOTS 2003), 12-15 October 2003, Orlando, FL, USA, pp. 336-343, 2003, IEEE Computer Society, 0-7695-2039-1. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
Coordinated CPU-I/O Resources Scheduling, High-Performance Computing, Cluster computing, Parallel I/O, Parallel Job Scheduling |
25 | Lingyun Yang, Ian T. Foster, Jennifer M. Schopf |
Homeostatic and Tendency-Based CPU Load Predictions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 17th International Parallel and Distributed Processing Symposium (IPDPS 2003), 22-26 April 2003, Nice, France, CD-ROM/Abstracts Proceedings, pp. 42, 2003, IEEE Computer Society, 0-7695-1926-1. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
CPU Load prediction, resource-sharing environment, time series |
25 | Dimitris Nikolos, Haridimos T. Vergos |
On the Yield of VLSI Processors with On-Chip CPU Cache. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 48(10), pp. 1138-1144, 1999. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
on-chip CPU caches, partially good chips, Fault tolerance, yield enhancement |
25 | Stephanie Dogimont, Martin Gumm, Friederich Mombers, Daniel Mlynek, Alessandro Torielli |
Conception and design of a RISC CPU for the use as embedded controller within a parallel multimedia architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASAP ![In: 1997 International Conference on Application-Specific Systems, Architectures, and Processors (ASAP '97), 14-16 July 1997, Zurich, Switzerland, pp. 412-421, 1997, IEEE Computer Society, 0-8186-7958-1. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
RISC CPU, parallel multimedia architecture, high performance control structure, parallel motion estimation architecture, MPEG2 coding, combined MIMD-SIMD approach, motion estimation, ASIP, subword parallelism, embedded controller |
25 | F. Frances Yao, Alan J. Demers, Scott Shenker |
A Scheduling Model for Reduced CPU Energy. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FOCS ![In: 36th Annual Symposium on Foundations of Computer Science, Milwaukee, Wisconsin, USA, 23-25 October 1995, pp. 374-382, 1995, IEEE Computer Society, 0-8186-7183-1. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
computer power supplies, reduced CPU energy, energy usage, minimum-energy schedule, competitive performance, scheduling, power consumption, job scheduling, on-line algorithms, power function, scheduling model |
25 | Mark D. Hill, Alan Jay Smith |
Evaluating Associativity in CPU Caches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 38(12), pp. 1612-1630, 1989. The full citation details ...](Pics/full.jpeg) |
1989 |
DBLP DOI BibTeX RDF |
CPU caches, cache miss ratio, forest simulation, all-associativity simulation, stack simulation, associativity, buffer storage, content-addressable storage, direct-mapped, set-associative |
24 | Haoqiang Zheng, Jason Nieh |
WARP: Enabling fast CPU scheduler development and evaluation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPASS ![In: IEEE International Symposium on Performance Analysis of Systems and Software, ISPASS 2009, April 26-28, 2009, Boston, Massachusetts, USA, Proceedings, pp. 101-112, 2009, IEEE Computer Society, 978-1-4244-4184-6. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
24 | Yasuhiko Ogata, Toshio Endo, Naoya Maruyama, Satoshi Matsuoka |
An efficient, model-based CPU-GPU heterogeneous FFT library. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 22nd IEEE International Symposium on Parallel and Distributed Processing, IPDPS 2008, Miami, Florida USA, April 14-18, 2008, pp. 1-10, 2008, IEEE. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
24 | Arun A. Nair, Lizy K. John |
Simulation points for SPEC CPU 2006. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 26th International Conference on Computer Design, ICCD 2008, 12-15 October 2008, Lake Tahoe, CA, USA, Proceedings, pp. 397-403, 2008, IEEE Computer Society, 978-1-4244-2657-7. The full citation details ...](Pics/full.jpeg) |
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24 | Chun Zhang, Rong N. Chang, Chang-Shing Perng, Edward So, Chunqiang Tang, Tao Tao |
Leveraging Service Composition Relationship to Improve CPU Demand Estimation in SOA Environments. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE SCC (1) ![In: 2008 IEEE International Conference on Services Computing (SCC 2008), 8-11 July 2008, Honolulu, Hawaii, USA, pp. 317-324, 2008, IEEE Computer Society, 978-0-7695-3283-7. The full citation details ...](Pics/full.jpeg) |
2008 |
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