Search results for "CPU2000"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
97	JunSeong Kim, JongSu Yi	Performance sensitivity of SPEC CPU2000 over operating frequency.	ISICT	2004	DBLP BibTeX RDF
72	Jason F. Cantin, Mark D. Hill	Cache performance for selected SPEC CPU2000 benchmarks.	SIGARCH Comput. Archit. News	2001	DBLP DOI BibTeX RDF
62	Swathi Tanjore Gurumani, Aleksandar Milenkovic	Execution characteristics of SPEC CPU2000 benchmarks: Intel C++ vs. Microsoft VC++.	ACM Southeast Regional Conference	2004	DBLP DOI BibTeX RDF	SPEC CPU2000 benchmarks, event-based sampling, performance evaluation, compiler optimizations
47	Arun Kejariwal, Gerolf Hoflehner, Darshan Desai, Daniel M. Lavery, Alexandru Nicolau, Alexander V. Veidenbaum	Comparative characterization of SPEC CPU2000 and CPU2006 on Itanium architecture.	SIGMETRICS	2007	DBLP DOI BibTeX RDF	SPEC CPU benchmarks, performance evaluation, caches, branch prediction
47	Hussein Al-Zoubi, Aleksandar Milenkovic, Milena Milenkovic	Performance evaluation of cache replacement policies for the SPEC CPU2000 benchmark suite.	ACM Southeast Regional Conference	2004	DBLP DOI BibTeX RDF	performance evaluation, cache memory, replacement policy
47	Daniel Citron	MisSPECulation: Partial and Misleading Use of SPEC CPU2000 in Computer Architecture Conferences.	ISCA	2003	DBLP DOI BibTeX RDF
47	Gokul B. Kandiraju, Anand Sivasubramaniam	Characterizing the d-TLB behavior of SPEC CPU2000 benchmarks.	SIGMETRICS	2002	DBLP DOI BibTeX RDF
47	John L. Henning	SPEC CPU2000: Measuring CPU Performance in the New Millennium.	Computer	2000	DBLP DOI BibTeX RDF
41	Lodewijk Bonebakker	Comparison of the SPEC CPU Benchmarks with 499 Other Workloads Using Hardware Counters.	SIPEW	2008	DBLP DOI BibTeX RDF	SPEC CPU2000, SPEC CPU2006, benchmark, workloads, workload characterization, comparison
41	Roland E. Wunderlich, Thomas F. Wenisch, Babak Falsafi, James C. Hoe	Statistical sampling of microarchitecture simulation.	ACM Trans. Model. Comput. Simul.	2006	DBLP DOI BibTeX RDF	Microarchitecture simulation, SPEC CPU2000 simulation, cold-start bias, simulation sampling, statistical sampling
41	Manohar K. Prabhu, Kunle Olukotun	Exposing speculative thread parallelism in SPEC2000.	PPoPP	2005	DBLP DOI BibTeX RDF	SPEC CPU2000, feedback-driven optimization, manual parallel programming, chip multiprocessors, multithreading, thread-level speculation
34	Arun Kejariwal, Alexander V. Veidenbaum, Alexandru Nicolau, Xinmin Tian, Milind Girkar, Hideki Saito 0001, Utpal Banerjee	Comparative architectural characterization of SPEC CPU2000 and CPU2006 benchmarks on the intel® CoreTM 2 Duo processor.	ICSAMOS	2008	DBLP DOI BibTeX RDF
34	Mohsen Sharifi, Mohsen Soryani, Mohammad Hossein Rezvani	A Simulation-Based Study of 2-level TLB and Cache Performance of the SPEC CPU2000 Benchmarks.	IMECS	2007	DBLP BibTeX RDF
28	Kartik K. Agaram, Stephen W. Keckler, Calvin Lin, Kathryn S. McKinley	Decomposing memory performance: data structures and phases.	ISMM	2006	DBLP DOI BibTeX RDF	CPU2000, DTrack, simulation, data structure, phase, SPEC
25	Weiming Zhao, Zhenlin Wang, Yingwei Luo	Dynamic memory balancing for virtual machines.	ACM SIGOPS Oper. Syst. Rev.	2009	DBLP DOI BibTeX RDF
25	Kenneth Hoste, Lieven Eeckhout, Hendrik Blockeel	Analyzing commercial processor performance numbers for predicting performance of applications of interest.	SIGMETRICS	2007	DBLP DOI BibTeX RDF	benchmark similarity, performance analysis, performance prediction
25	Arun Kejariwal, Xinmin Tian, Wei Li 0015, Milind Girkar, Sergey Kozhukhov, Hideki Saito 0001, Utpal Banerjee, Alexandru Nicolau, Alexander V. Veidenbaum, Constantine D. Polychronopoulos	On the performance potential of different types of speculative thread-level parallelism: The DL version of this paper includes corrections that were not made available in the printed proceedings.	ICS	2006	DBLP DOI BibTeX RDF	DOALL loops, value dependence, performance evaluation, data dependence, speculative execution, control dependence
25	Sorin Iacobovici, Lawrence Spracklen, Sudarshan Kadambi, Yuan Chou, Santosh G. Abraham	Effective stream-based and execution-based data prefetching.	ICS	2004	DBLP DOI BibTeX RDF	hardware prefetcher, multiple strides, stream prefetching
25	Viji Srinivasan, Edward S. Davidson, Gary S. Tyson, Mark J. Charney, Thomas R. Puzak	Branch History Guided Instruction Prefetching.	HPCA	2001	DBLP DOI BibTeX RDF
13	Naveen Neelakantam, David R. Ditzel, Craig B. Zilles	A real system evaluation of hardware atomicity for software speculation.	ASPLOS	2010	DBLP DOI BibTeX RDF	optimization, checkpoint, atomicity, speculation, dynamic translation
13	Xi Chen 0068, Chi Xu, Robert P. Dick, Zhuoqing Morley Mao	Performance and power modeling in a multi-programmed multi-core environment.	DAC	2010	DBLP DOI BibTeX RDF	performance modeling, assignment, power modeling
13	Mohammad Shihabul Haque, Jorgen Peddersen, Andhi Janapsatya, Sri Parameswaran	SCUD: a fast single-pass L1 cache simulation approach for embedded processors with round-robin replacement policy.	DAC	2010	DBLP DOI BibTeX RDF	miss rate, simulation, round robin, cache simulation, L1 cache
13	Simon Kluyskens, Lieven Eeckhout	Branch Predictor Warmup for Sampled Simulation through Branch History Matching.	Trans. High Perform. Embed. Archit. Compil.	2009	DBLP DOI BibTeX RDF
13	Dmitry G. Korzun, Andrei V. Gurtov	A local equilibrium model for P2P resource ranking.	SIGMETRICS Perform. Evaluation Rev.	2009	DBLP DOI BibTeX RDF
13	Bill Lin 0001, Jun (Jim) Xu, Nan Hua, Hao Wang 0006, Haiquan (Chuck) Zhao	A randomized interleaved DRAM architecture for the maintenance of exact statistics counters.	SIGMETRICS Perform. Evaluation Rev.	2009	DBLP DOI BibTeX RDF
13	Sipat Triukose, Zhihua Wen, Michael Rabinovich	Content delivery networks: how big is big enough?	SIGMETRICS Perform. Evaluation Rev.	2009	DBLP DOI BibTeX RDF
13	Alma Riska, Erik Riedel	Evaluation of disk-level workloads at different time scales.	SIGMETRICS Perform. Evaluation Rev.	2009	DBLP DOI BibTeX RDF
13	Arun Kejariwal, Alexandru Nicolau, Utpal Banerjee, Alexander V. Veidenbaum, Constantine D. Polychronopoulos	Cache-aware partitioning of multi-dimensional iteration spaces.	SYSTOR	2009	DBLP DOI BibTeX RDF	partitioning, parallel loops, iteration space
13	Jianwei Dai, Lei Wang 0003	Way-tagged cache: an energy-efficient L2 cache architecture under write-through policy.	ISLPED	2009	DBLP DOI BibTeX RDF	low-power technique, way-tag array, cache
13	Matthew A. Watkins, Sally A. McKee, Lambert Schaelicke	Revisiting Cache Block Superloading.	HiPEAC	2009	DBLP DOI BibTeX RDF
13	Mark Gebhart, Bertrand A. Maher, Katherine E. Coons, Jeffrey R. Diamond, Paul Gratz, Mario Marino, Nitya Ranganathan, Behnam Robatmili, Aaron Smith, James H. Burrill, Stephen W. Keckler, Doug Burger, Kathryn S. McKinley	An evaluation of the TRIPS computer system.	ASPLOS	2009	DBLP DOI BibTeX RDF	trips
13	Weiwu Hu, Jian Wang	Making Effective Decisions in Computer Architects' Real-World: Lessons and Experiences with Godson-2 Processor Designs.	J. Comput. Sci. Technol.	2008	DBLP DOI BibTeX RDF	correlation design, balanced design, Pico-architecture design, work-on-silicon, optimized design, superscalar architecture
13	Lei Wang 0003, Niral Patel	Improving Error Tolerance for Multithreaded Register Files.	IEEE Trans. Very Large Scale Integr. Syst.	2008	DBLP DOI BibTeX RDF
13	Eriko Nurvitadhi, Jumnit Hong, Shih-Lien Lu	Active Cache Emulator.	IEEE Trans. Very Large Scale Integr. Syst.	2008	DBLP DOI BibTeX RDF
13	Mohsen Sharifi, Behrouz Zolfaghari	YAARC: yet another approach to further reducing the rate of conflict misses.	J. Supercomput.	2008	DBLP DOI BibTeX RDF	Skewed associative cache, YAARC cache, Hit rate, Cache, Conflict misses
13	Davy Genbrugge, Lieven Eeckhout	Memory Data Flow Modeling in Statistical Simulation for the Efficient Exploration of Microprocessor Design Spaces.	IEEE Trans. Computers	2008	DBLP DOI BibTeX RDF	Simulation, Modeling techniques, Performance Analysis and Design Aids
13	Shuai Wang 0006, Jie S. Hu, Sotirios G. Ziavras	Self-Adaptive Data Caches for Soft-Error Reliability.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2008	DBLP DOI BibTeX RDF
13	Zhelong Pan, Rudolf Eigenmann	PEAK - a fast and effective performance tuning system via compiler optimization orchestration.	ACM Trans. Program. Lang. Syst.	2008	DBLP DOI BibTeX RDF	optimization orchestration, Performance tuning, dynamic compilation
13	Manuel Arenaz, Juan Touriño, Ramon Doallo	XARK: An extensible framework for automatic recognition of computational kernels.	ACM Trans. Program. Lang. Syst.	2008	DBLP DOI BibTeX RDF	Automatic kernel recognition, demand-driven algorithms, gated single assignment, use-def chains, symbolic analysis, strongly connected component
13	Jeffrey J. Cook, Craig B. Zilles	A characterization of instruction-level error derating and its implications for error detection.	DSN	2008	DBLP DOI BibTeX RDF
13	Isidro Gonzalez, Marco Galluzzi, Alexander V. Veidenbaum, Marco Antonio Ramírez, Adrián Cristal, Mateo Valero	A distributed processor state management architecture for large-window processors.	MICRO	2008	DBLP DOI BibTeX RDF
13	Sebastian Winkel, Rakesh Krishnaiyer, Robyn Sampson	Latency-tolerant software pipelining in a production compiler.	CGO	2008	DBLP DOI BibTeX RDF	latency-tolerant scheduling, load clustering, compiler, code generation, prefetching, software pipelining, modulo scheduling, memory latency, memory-level parallelism, itanium, epic
13	Kenneth Hoste, Lieven Eeckhout	Characterizing the Unique and Diverse Behaviors in Existing and Emerging General-Purpose and Domain-Specific Benchmark Suites.	ISPASS	2008	DBLP DOI BibTeX RDF
13	Manuel Arenaz, Pedro Amoedo, Juan Touriño	Efficiently Building the Gated Single Assignment Form in Codes with Pointers in Modern Optimizing Compilers.	Euro-Par	2008	DBLP DOI BibTeX RDF
13	Qiong Cai, Josep M. Codina, José González 0002, Antonio González 0001	A software-hardware hybrid steering mechanism for clustered microarchitectures.	IPDPS	2008	DBLP DOI BibTeX RDF
13	Fernando Magno Quintão Pereira, Jens Palsberg	Register allocation by puzzle solving.	PLDI	2008	DBLP DOI BibTeX RDF	puzzle solving, register aliasing, register allocation
13	Shuo Wang, Lei Wang 0003	Design of error-tolerant cache memory for multithreaded computing.	ISCAS	2008	DBLP DOI BibTeX RDF
13	Haibing Guan, Bo Liu 0001, Tingtao Li, Alei Liang	Multithreaded Optimizing Technique for Dynamic Binary Translator CrossBit.	CSSE (5)	2008	DBLP DOI BibTeX RDF
13	Rupak Samanta, Jason Surprise, Rabi N. Mahapatra	Dynamic Aggregation of Virtual Addresses in TLB Using TCAM Cells.	VLSI Design	2008	DBLP DOI BibTeX RDF
13	Vincent M. Weaver, Sally A. McKee	Using Dynamic Binary Instrumentation to Generate Multi-platform SimPoints: Methodology and Accuracy.	HiPEAC	2008	DBLP DOI BibTeX RDF
13	Luk Van Ertvelde, Lieven Eeckhout	Dispersing proprietary applications as benchmarks through code mutation.	ASPLOS	2008	DBLP DOI BibTeX RDF	benchmark generation, code mutation
13	Sreekumar V. Kodakara, Jinpyo Kim, David J. Lilja, Douglas M. Hawkins, Wei-Chung Hsu, Pen-Chung Yew	CIM: A Reliable Metric for Evaluating Program Phase Classifications.	IEEE Comput. Archit. Lett.	2007	DBLP DOI BibTeX RDF
13	Shlomit S. Pinter, Israel Waldman	Selective Code Compression Scheme for Embedded Systems.	Trans. High Perform. Embed. Archit. Compil.	2007	DBLP DOI BibTeX RDF	run-time decompression, Code compression, code size reduction
13	Xian-He Sun, Surendra Byna, Yong Chen 0001	Server-Based Data Push Architecture for Multi-Processor Environments.	J. Comput. Sci. Technol.	2007	DBLP DOI BibTeX RDF	modeling, evaluation, performance measurement, cache memory, simulation of multiple-processor system
13	Weiwu Hu, Ji-Ye Zhao, Shi-Qiang Zhong, Xu Yang, Elio Guidetti, Chris Wu	Implementing a 1GHz Four-Issue Out-of-Order Execution Microprocessor in a Standard Cell ASIC Methodology.	J. Comput. Sci. Technol.	2007	DBLP DOI BibTeX RDF	superscalar pipeline, non-blocking cache, synthesis flow, bit-sliced placement, crafted cell, performance evaluation, physical design, out-of-order execution, general-purpose processor
13	Aleksandar Milenkovic, Milena Milenkovic	An efficient single-pass trace compression technique utilizing instruction streams.	ACM Trans. Model. Comput. Simul.	2007	DBLP DOI BibTeX RDF	Instruction and data traces, instruction streams, trace compression
13	Matthew A. Watkins, Sally A. McKee, Lambert Schaelicke	A Phase-Adaptive Approach to Increasing Cache Performance.	PACT	2007	DBLP DOI BibTeX RDF
13	Cheng Wang 0013, Ho-Seop Kim, Youfeng Wu, Victor Ying	Compiler-Managed Software-based Redundant Multi-Threading for Transient Fault Detection.	CGO	2007	DBLP DOI BibTeX RDF
13	Qin Zhao, Rodric M. Rabbah, Saman P. Amarasinghe, Larry Rudolph, Weng-Fai Wong	Ubiquitous Memory Introspection.	CGO	2007	DBLP DOI BibTeX RDF
13	Kapil Vaswani, Matthew J. Thazhuthaveetil, Y. N. Srikant, P. J. Joseph	Microarchitecture Sensitive Empirical Models for Compiler Optimizations.	CGO	2007	DBLP DOI BibTeX RDF
13	Jason Hiser, Daniel W. Williams, Wei Hu, Jack W. Davidson, Jason Mars, Bruce R. Childers	Evaluating Indirect Branch Handling Mechanisms in Software Dynamic Translation Systems.	CGO	2007	DBLP DOI BibTeX RDF
13	Jun Shao, Brian T. Davis	A Burst Scheduling Access Reordering Mechanism.	HPCA	2007	DBLP DOI BibTeX RDF
13	Santhosh Srinath, Onur Mutlu, Hyesoon Kim, Yale N. Patt	Feedback Directed Prefetching: Improving the Performance and Bandwidth-Efficiency of Hardware Prefetchers.	HPCA	2007	DBLP DOI BibTeX RDF
13	Xuanhua Li, Donald Yeung	Application-Level Correctness and its Impact on Fault Tolerance.	HPCA	2007	DBLP DOI BibTeX RDF
13	Kapil Vaswani, Aditya V. Nori, Trishul M. Chilimbi	Preferential path profiling: compactly numbering interesting paths.	POPL	2007	DBLP DOI BibTeX RDF	preferential paths, profiling, dynamic analysis, arithmetic coding
13	Daniel Grund, Sebastian Hack	A Fast Cutting-Plane Algorithm for Optimal Coalescing.	CC	2007	DBLP DOI BibTeX RDF
13	Manuel Arenaz, Juan Touriño, Ramon Doallo	Program Behavior Characterization Through Advanced Kernel Recognition.	Euro-Par	2007	DBLP DOI BibTeX RDF
13	Mohsen Soryani, Mohsen Sharifi, Mohammad Hossein Rezvani	Performance Evaluation of Cache Memory Organizations in Embedded Systems.	ITNG	2007	DBLP DOI BibTeX RDF
13	Yaobin Wang, Hong An, Bo Liang, Li Wang, Ming Cong, Yongqing Ren	Balancing Thread Partition for Efficiently Exploiting Speculative Thread-Level Parallelism.	APPT	2007	DBLP DOI BibTeX RDF
13	Jinpyo Kim, Wei-Chung Hsu, Pen-Chung Yew, Sreekumar R. Nair, Robert Y. Geva	Entropy-Based Profile Characterization and Classification for Automatic Profile Management.	Asia-Pacific Computer Systems Architecture Conference	2007	DBLP DOI BibTeX RDF
13	Sang Jeong Lee, Hae-Kag Lee, Pen-Chung Yew	Runtime Performance Projection Model for Dynamic Power Management.	Asia-Pacific Computer Systems Architecture Conference	2007	DBLP DOI BibTeX RDF	Dynamic Voltage-Frequency Scaling, Performance Monitoring, Dynamic Power Management
13	Takashi Yokota, Kanemitsu Ootsu, Takanobu Baba	Introducing entropies for representing program behavior and branch predictor performance.	Experimental Computer Science	2007	DBLP DOI BibTeX RDF	architecture, information entropy, program behavior, prediction performance, branch predictors
13	Sharath Jayaprakash, Nihar R. Mahapatra	Partitioned Hybrid Encoding to Minimize On-Chip Energy Dissipation ofWide Microprocessor Buses.	VLSI Design	2007	DBLP DOI BibTeX RDF
13	Simon Kluyskens, Lieven Eeckhout	Branch History Matching: Branch Predictor Warmup for Sampled Simulation.	HiPEAC	2007	DBLP DOI BibTeX RDF
13	Ajay Joshi, Aashish Phansalkar, Lieven Eeckhout, Lizy Kurian John	Measuring Benchmark Similarity Using Inherent Program Characteristics.	IEEE Trans. Computers	2006	DBLP DOI BibTeX RDF	modeling techniques, performance of systems, Measurement techniques, performance attributes
13	Jin Lin, Wei-Chung Hsu, Pen-Chung Yew, Roy Dz-Ching Ju, Tin-Fook Ngai	Recovery code generation for general speculative optimizations.	ACM Trans. Archit. Code Optim.	2006	DBLP DOI BibTeX RDF	Recovery code, multi-level data speculation, speculative SSA form
13	Kenneth Hoste, Aashish Phansalkar, Lieven Eeckhout, Andy Georges, Lizy Kurian John, Koen De Bosschere	Performance prediction based on inherent program similarity.	PACT	2006	DBLP DOI BibTeX RDF	inherent program behavior, performance modeling, workload characterization
13	Zhelong Pan, Rudolf Eigenmann	Fast, automatic, procedure-level performance tuning.	PACT	2006	DBLP DOI BibTeX RDF	optimization orchestration, performance tuning, dynamic compilation
13	Francisco J. Mesa-Martinez, Michael C. Huang 0001, Jose Renau	SEED: scalable, efficient enforcement of dependences.	PACT	2006	DBLP DOI BibTeX RDF	scalability, energy-efficient design, issue logic
13	Ilya Ganusov, Martin Burtscher	Efficient emulation of hardware prefetchers via event-driven helper threading.	PACT	2006	DBLP DOI BibTeX RDF	prefetching, multi-core architectures, helper threading
13	Joseph D'Errico, Wei Qin	Constructing portable compiled instruction-set simulators: an ADL-driven approach.	DATE	2006	DBLP DOI BibTeX RDF
13	Mark Heffernan, Kent D. Wilken, Ghassan Shobaki	Data-Dependency Graph Transformations for Superblock Scheduling.	MICRO	2006	DBLP DOI BibTeX RDF
13	P. J. Joseph, Kapil Vaswani, Matthew J. Thazhuthaveetil	A Predictive Performance Model for Superscalar Processors.	MICRO	2006	DBLP DOI BibTeX RDF
13	Zhelong Pan, Rudolf Eigenmann	Fast and Effective Orchestration of Compiler Optimizations for Automatic Performance Tuning.	CGO	2006	DBLP DOI BibTeX RDF
13	Christopher Lupo, Kent D. Wilken	Post Register Allocation Spill Code Optimization.	CGO	2006	DBLP DOI BibTeX RDF
13	Luk Van Ertvelde, Filip Hellebaut, Lieven Eeckhout, Koen De Bosschere	NSL-BLRL: Efficient CacheWarmup for Sampled Processor Simulation.	Annual Simulation Symposium	2006	DBLP DOI BibTeX RDF
13	Thomas F. Wenisch, Roland E. Wunderlich, Babak Falsafi, James C. Hoe	Statistical sampling of microarchitecture simulation.	IPDPS	2006	DBLP DOI BibTeX RDF
13	Davy Genbrugge, Lieven Eeckhout, Koen De Bosschere	Accurate memory data flow modeling in statistical simulation.	ICS	2006	DBLP DOI BibTeX RDF	memory data flow modeling, performance modeling, statistical simulation
13	Rajesh Vivekanandham, Bharadwaj S. Amrutur, R. Govindarajan	A scalable low power issue queue for large instruction window processors.	ICS	2006	DBLP DOI BibTeX RDF	complexity-effective architecture, wakeup logic, low-power architecture, issue logic
13	Nicolas Vasilache, Cédric Bastoul, Albert Cohen 0001, Sylvain Girbal	Violated dependence analysis.	ICS	2006	DBLP DOI BibTeX RDF
13	Dandan Huan, Zusong Li, Weiwu Hu, Zhiyong Liu	Processor Directed Dynamic Page Policy.	Asia-Pacific Computer Systems Architecture Conference	2006	DBLP DOI BibTeX RDF	Godson-2, Memory Control Policy, Dynamic Page Policy, Open Page, Close Page
13	Chengyi Zhang, Hongwei Zhou, Minxuan Zhang, Zuocheng Xing	An Architectural Leakage Power Reduction Method for Instruction Cache in Ultra Deep Submicron Microprocessors.	Asia-Pacific Computer Systems Architecture Conference	2006	DBLP DOI BibTeX RDF	Periodically Drowsy Speculative Recover, Adaptive, Leakage Power, Drowsy cache
13	Shuo Wang, Lei Wang 0003	Exploiting soft redundancy for error-resilient on-chip memory design.	ICCAD	2006	DBLP DOI BibTeX RDF	cache space utilization, memory system, error tolerance
13	Israel Waldman, Shlomit S. Pinter	Profile-driven compression scheme for embedded systems.	Conf. Computing Frontiers	2006	DBLP DOI BibTeX RDF	run-time decompression, code compression, code size reduction
13	Darshan D. Thaker, Diana Franklin, John Y. Oliver, Susmit Biswas, Derek Lockhart, Tzvetan S. Metodi, Frederic T. Chong	Characterization of Error-Tolerant Applications when Protecting Control Data.	IISWC	2006	DBLP DOI BibTeX RDF
13	Karthick Rajamani, Heather Hanson, Juan Rubio 0001, Soraya Ghiasi, Freeman L. Rawson III	Application-Aware Power Management.	IISWC	2006	DBLP DOI BibTeX RDF
13	Moinuddin K. Qureshi, Daniel N. Lynch, Onur Mutlu, Yale N. Patt	A Case for MLP-Aware Cache Replacement.	ISCA	2006	DBLP DOI BibTeX RDF
13	Angshuman Parashar, Anand Sivasubramaniam, Sudhanva Gurumurthi	SlicK: slice-based locality exploitation for efficient redundant multithreading.	ASPLOS	2006	DBLP DOI BibTeX RDF	backward slice extraction, redundant threading, microarchitecture, transient faults
13	Jason Hiser, Daniel W. Williams, Adrian Filipi, Jack W. Davidson, Bruce R. Childers	Evaluating fragment construction policies for SDT systems.	VEE	2006	DBLP DOI BibTeX RDF	dynamic translation performance, software dynamic translator, performance, low overhead
13	Onur Mutlu, Hyesoon Kim, David N. Armstrong, Yale N. Patt	Using the First-Level Caches as Filters to Reduce the Pollution Caused by Speculative Memory References.	Int. J. Parallel Program.	2005	DBLP DOI BibTeX RDF	cache filtering, speculative memory references, Caches, runahead execution, cache pollution