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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 2974 occurrences of 1216 keywords
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Results
Found 3381 publication records. Showing 3380 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
107 | Yau-Tsun Steven Li, Sharad Malik, Andrew Wolfe |
Cache modeling for real-time software: beyond direct mapped instruction caches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
RTSS ![In: Proceedings of the 17th IEEE Real-Time Systems Symposium (RTSS '96), December 4-6, 1996, Washington, DC, USA, pp. 254-263, 1996, IEEE Computer Society, 0-8186-7689-2. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
direct mapped instruction caches, worst case timing analysis, cache hits, set associative instruction caches, unified caches, cinderella, research, integer-linear-programming, worst case execution time, data caches, cache storage, design tool, memory performance, cache misses, real-time software, tight bound, cache modeling, hardware system |
91 | Yuan-Shin Hwang, Jia-Jhe Li |
Snug set-associative caches: Reducing leakage power of instruction and data caches with no performance penalties. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Archit. Code Optim. ![In: ACM Trans. Archit. Code Optim. 4(1), pp. 6, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
Caches, leakage power, drowsy caches, cache decay |
81 | Yingwu Zhu, Yiming Hu |
Exploiting client caches to build large Web caches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Supercomput. ![In: J. Supercomput. 39(2), pp. 149-175, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
Hier-GD, Client cache, Latency gain, Infinite cache size, Cooperative proxy caching, Peer-to-peer, Proxy cache |
81 | Yingwu Zhu, Yiming Hu |
Exploiting Client Caches: An Approach to Building Large Web Caches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICPP ![In: 32nd International Conference on Parallel Processing (ICPP 2003), 6-9 October 2003, Kaohsiung, Taiwan, pp. 419-426, 2003, IEEE Computer Society, 0-7695-2017-0. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
68 | Derek Bruening, Vladimir Kiriansky, Timothy Garnett, Sanjeev Banerji |
Thread-Shared Software Code Caches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CGO ![In: Fourth IEEE/ACM International Symposium on Code Generation and Optimization (CGO 2006), 26-29 March 2006, New York, New York, USA, pp. 28-38, 2006, IEEE Computer Society, 0-7695-2499-0. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
62 | Víctor Jesús Sosa Sosa, Juan Gabriel González Serna, Xochitl Landa Miguez, Francisco Verduzco Medina, Manuel A. Valdés Marrero |
Dynamic Configuration between Proxy Caches within an Intranet. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCSA (4) ![In: Computational Science and Its Applications - ICCSA 2004, International Conference, Assisi, Italy, May 14-17, 2004, Proceedings, Part IV, pp. 137-146, 2004, Springer, 3-540-22060-7. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
62 | Krisztián Flautner, Nam Sung Kim, Steven M. Martin, David T. Blaauw, Trevor N. Mudge |
Drowsy Caches: Simple Techniques for Reducing Leakage Power. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: 29th International Symposium on Computer Architecture (ISCA 2002), 25-29 May 2002, Anchorage, AK, USA, pp. 148-157, 2002, IEEE Computer Society, 0-7695-1605-X. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
62 | Josefa Díaz, José Ignacio Hidalgo, Francisco Fernández 0001, Oscar Garnica, Sonia López |
Improving SMT performance: an application of genetic algorithms to configure resizable caches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
GECCO (Companion) ![In: Genetic and Evolutionary Computation Conference, GECCO 2009, Proceedings, Montreal, Québec, Canada, July 8-12, 2009, Companion Material, pp. 2029-2034, 2009, ACM, 978-1-60558-505-5. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
reconfigurable caches, genetic algorithms, optimization, caches memories, simultaneous multithreading, gals, adaptive caches |
61 | Kiran Tati, Geoffrey M. Voelker |
ShortCuts: Using Soft State to Improve DHT Routing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
WCW ![In: Web Content Caching and Distribution: 9th International Workshop, WCW 2004, Beijing, China, October 18-20, 2004. Proceedings, pp. 44-62, 2004, Springer, 3-540-23516-7. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
61 | Mark Brehob, Richard J. Enbody, Eric Torng, Stephen Wagner |
On-line restricted caching. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SODA ![In: Proceedings of the Twelfth Annual Symposium on Discrete Algorithms, January 7-9, 2001, Washington, DC, USA., pp. 374-383, 2001, ACM/SIAM, 0-89871-490-7. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP BibTeX RDF |
|
61 | Jeffrey B. Rothman, Alan Jay Smith |
Sector Cache Design and Performance. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MASCOTS ![In: MASCOTS 2000, Proceedings of the 8th International Symposium on Modeling, Analysis and Simulation of Computer and Telecommunication Systems, 29 August - 1 September 2000, San Francisco, California, USA, pp. 124-133, 2000, IEEE Computer Society, 0-7695-0728-X. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
sector cache, simulation, architecture, workloads, multiprogramming |
60 | Michael J. Geiger, Sally A. McKee, Gary S. Tyson |
Drowsy region-based caches: minimizing both dynamic and static power dissipation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Conf. Computing Frontiers ![In: Proceedings of the Second Conference on Computing Frontiers, 2005, Ischia, Italy, May 4-6, 2005, pp. 378-384, 2005, ACM, 1-59593-019-1. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
region-based caches, energy-aware design, drowsy caches |
58 | Cheng-Kok Koh, Weng-Fai Wong, Yiran Chen 0001, Hai Li 0001 |
Tolerating process variations in large, set-associative caches: The buddy cache. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Archit. Code Optim. ![In: ACM Trans. Archit. Code Optim. 6(2), pp. 8:1-8:34, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
caches, Processor architectures, fault recovery, memory structures |
58 | Pepijn J. de Langen, Ben H. H. Juurlink |
Reducing traffic generated by conflict misses in caches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Conf. Computing Frontiers ![In: Proceedings of the First Conference on Computing Frontiers, 2004, Ischia, Italy, April 14-16, 2004, pp. 235-239, 2004, ACM, 1-58113-741-9. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
caches, embedded processors, power reduction, conflict misses |
58 | Qidong Xu, Patricia J. Teller |
Unified vs. split TLBs and caches in shared-memory MP systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPPS ![In: Proceedings of IPPS '95, The 9th International Parallel Processing Symposium, April 25-28, 1995, Santa Barbara, California, USA, pp. 398-403, 1995, IEEE Computer Society, 0-8186-7074-6. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
data references, performance evaluation, caches, discrete event simulation, shared-memory multiprocessors, shared memory systems, trace-driven simulations, cache storage, performance gains, translation-lookaside buffer |
57 | Rabin A. Sugumar, Santosh G. Abraham |
Set-Associative Cache Simulation Using Generalized Binomial Trees ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Comput. Syst. ![In: ACM Trans. Comput. Syst. 13(1), pp. 32-56, 1995. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
all-associativity simulation, binomial tree, inclusion properties, single-pass simulation, trace-driven simulation, cache modeling, set-associative caches |
56 | Edith Cohen, Haim Kaplan |
Aging through cascaded caches: performance issues in the distribution of web content. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SIGCOMM ![In: Proceedings of the ACM SIGCOMM 2001 Conference on Applications, Technologies, Architectures, and Protocols for Computer Communication, August 27-31, 2001, San Diego, CA, USA, pp. 41-53, 2001, ACM, 1-58113-411-8. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
56 | André Seznec |
Decoupled Sectored Caches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 46(2), pp. 210-215, 1997. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
Sectored caches, tag volume, decoupled sectored caches, second-level caches |
55 | Jaume Abella 0001, Antonio González 0001 |
Heterogeneous way-size cache. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICS ![In: Proceedings of the 20th Annual International Conference on Supercomputing, ICS 2006, Cairns, Queensland, Australia, June 28 - July 01, 2006, pp. 239-248, 2006, ACM, 1-59593-282-8. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
adaptive, low power, cache memories, set-associative |
55 | Christoph Lindemann, Oliver P. Waldhorst |
Exploiting epidemic data dissemination for consistent lookup operations in mobile applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM SIGMOBILE Mob. Comput. Commun. Rev. ![In: ACM SIGMOBILE Mob. Comput. Commun. Rev. 8(3), pp. 44-56, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
55 | Christoph Lindemann, Oliver P. Waldhorst |
Consistency mechanisms for a distributed lookup service supporting mobile applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MobiDE ![In: Proceedings of the Third ACM International Workshop on Data Engineering for Wireless and Mobile Access, MobiDE 2003, September 19, 2003, San Diego, California, USA, pp. 61-68, 2003, ACM. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
ad-hoc networked databases, consistency maintenance in weakly connected environments, epidemic algorithms for data dissemination, data caching |
52 | Samuel Rodríguez, Bruce L. Jacob |
Energy/power breakdown of pipelined nanometer caches (90nm/65nm/45nm/32nm). ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: Proceedings of the 2006 International Symposium on Low Power Electronics and Design, 2006, Tegernsee, Bavaria, Germany, October 4-6, 2006, pp. 25-30, 2006, ACM, 1-59593-462-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
nanometer design, pipelined caches, cache design |
52 | Onur Mutlu, Hyesoon Kim, David N. Armstrong, Yale N. Patt |
Using the First-Level Caches as Filters to Reduce the Pollution Caused by Speculative Memory References. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Int. J. Parallel Program. ![In: Int. J. Parallel Program. 33(5), pp. 529-559, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
cache filtering, speculative memory references, Caches, runahead execution, cache pollution |
52 | Kuang-Chih Liu, Chung-Ta King |
On the effectiveness of sectored caches in reducing false sharing misses. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICPADS ![In: 1997 International Conference on Parallel and Distributed Systems (ICPADS '97), 11-13 December 1997, Seoul, Korea, Proceedings, pp. 352-359, 1997, IEEE Computer Society, 0-8186-8227-2. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
sectored caches, false sharing misses, bus-based multiprocessors, coherence unit, MESI protocol, LU, SORBYR, SORBYC, benchmarks, FFT, performance metric, cache storage, Radix |
52 | Sunil Kim, Alexander V. Veidenbaum |
Stride-directed Prefetching for Secondary Caches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICPP ![In: 1997 International Conference on Parallel Processing (ICPP '97), August 11-15, 1997, Bloomington, IL, USA, Proceedings, pp. 314-323, 1997, IEEE Computer Society, 0-8186-8108-X. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
Secondary Caches, Stride Detection, Memory Hierarchy, Data Prefetching |
51 | David A. Koufaty, Xiangfeng Chen, David K. Poulsen, Josep Torrellas |
Data Forwarding in Scalable Shared-Memory Multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 7(12), pp. 1250-1264, 1996. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
Memory latency hiding, forwarding and prefetching, multiprocessor caches, address trace analysis, scalable shared-memory multiprocessors |
51 | Christina Caches, Mo Mansouri |
Applications of Systems Thinking for Scooter Sharing Transportation System. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CSDM ![In: Proceedings of the Tenth International Conference on Complex Systems Design & Management, CSD&M 2019, Paris, France, December 12-13, 2019, pp. 192, 2019, Springer, 978-3-030-34843-4. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
50 | Wei Pei, Wen-Ben Jone, Yiming Hu |
Fault Modeling and Detection for Drowsy SRAM Caches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26(6), pp. 1084-1100, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
50 | Michela Becchi, Mark A. Franklin, Patrick Crowley |
Performance/area efficiency in chip multiprocessors with micro-caches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Conf. Computing Frontiers ![In: Proceedings of the 4th Conference on Computing Frontiers, 2007, Ischia, Italy, May 7-9, 2007, pp. 247-258, 2007, ACM, 978-1-59593-683-7. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
networking workload, chip multiprocessor, cache hierarchies |
50 | Isabelle Puaut |
WCET-Centric Software-controlled Instruction Caches for Hard Real-Time Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ECRTS ![In: 18th Euromicro Conference on Real-Time Systems, ECRTS'06, 5-7 July 2006, Dresden, Germany, Proceedings, pp. 217-226, 2006, IEEE Computer Society, 0-7695-2619-5. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
50 | Xueyan Tang, Samuel T. Chanson |
Coordinated Management of Cascaded Caches for Efficient Content Distribution. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICDE ![In: Proceedings of the 19th International Conference on Data Engineering, March 5-8, 2003, Bangalore, India, pp. 37-48, 2003, IEEE Computer Society, 0-7803-7665-X. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
50 | Nam Sung Kim, Krisztián Flautner, David T. Blaauw, Trevor N. Mudge |
Drowsy instruction caches: leakage power reduction using dynamic voltage scaling and cache sub-bank prediction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: Proceedings of the 35th Annual International Symposium on Microarchitecture, Istanbul, Turkey, November 18-22, 2002, pp. 219-230, 2002, ACM/IEEE Computer Society, 0-7695-1859-1. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
50 | Edith Cohen, Eran Halperin, Haim Kaplan |
Performance Aspects of Distributed Caches Using TTL-Based Consistency. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICALP ![In: Automata, Languages and Programming, 28th International Colloquium, ICALP 2001, Crete, Greece, July 8-12, 2001, Proceedings, pp. 744-756, 2001, Springer, 3-540-42287-0. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
47 | Rui Min, Wen-Ben Jone, Yiming Hu |
Location cache: a low-power L2 cache system. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: Proceedings of the 2004 International Symposium on Low Power Electronics and Design, 2004, Newport Beach, California, USA, August 9-11, 2004, pp. 120-125, 2004, ACM. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
L1/L2 caches, data location, power, TLB, set-associative caches |
46 | Magnus Ekman, Per Stenström, Fredrik Dahlgren |
TLB and snoop energy-reduction using virtual caches in low-power chip-multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: Proceedings of the 2002 International Symposium on Low Power Electronics and Design, 2002, Monterey, California, USA, August 12-14, 2002, pp. 243-246, 2002, ACM, 1-58113-475-4. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
virtual caches, low-power, CMP, snoop |
45 | Hyunhee Kim, Jung Ho Ahn, Jihong Kim 0001 |
Replication-aware leakage management in chip multiprocessors with private L2 cache. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: Proceedings of the 2010 International Symposium on Low Power Electronics and Design, 2010, Austin, Texas, USA, August 18-20, 2010, pp. 135-140, 2010, ACM, 978-1-4503-0146-6. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
leakage power management, chip multiprocessors, L2 caches |
44 | Randall T. White, Christopher A. Healy, David B. Whalley, Frank Mueller 0001, Marion G. Harmon |
Timing Analysis for Data Caches and Set-Associative Caches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Real Time Technology and Applications Symposium ![In: 3rd IEEE Real-Time Technology and Applications Symposium, RTAS '97, Montreal, Canada, June 9-11, 1997, pp. 192-202, 1997, IEEE Computer Society, 0-8186-8016-4. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
44 | Aviral Shrivastava, Jongeun Lee, Reiley Jeyapaul |
Cache vulnerability equations for protecting data in embedded processor caches from soft errors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LCTES ![In: Proceedings of the ACM SIGPLAN/SIGBED 2010 conference on Languages, compilers, and tools for embedded systems, LCTES 2010, Stockholm, Sweden, April 13-15, 2010, pp. 143-152, 2010, ACM, 978-1-60558-953-4. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
cache vulnerability, static analysis, embedded processors, soft errors, code transformation, compiler technique |
44 | Girish Chandramohan, Ramaswamy Govindarajan |
Improving Performance of Digest Caches in Network Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HiPC ![In: High Performance Computing - HiPC 2008, 15th International Conference, Bangalore, India, December 17-20, 2008. Proceedings, pp. 6-17, 2008, Springer, 978-3-540-89893-1. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
44 | Derek Bruening, Vladimir Kiriansky |
Process-shared and persistent code caches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VEE ![In: Proceedings of the 4th International Conference on Virtual Execution Environments, VEE 2008, Seattle, WA, USA, March 5-7, 2008, pp. 61-70, 2008, ACM, 978-1-59593-796-4. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
software code cache, tool scalability, binary translation, dynamic instrumentation |
44 | Wei Wu 0024, Sheldon X.-D. Tan, Jun Yang 0002, Shih-Lien Lu |
Improving the reliability of on-chip data caches under process variations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 25th International Conference on Computer Design, ICCD 2007, 7-10 October 2007, Lake Tahoe, CA, USA, Proceedings, pp. 325-332, 2007, IEEE, 1-4244-1258-7. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
44 | Sonia López, Steve Dropsho, David H. Albonesi, Oscar Garnica, Juan Lanchares |
Dynamic Capacity-Speed Tradeoffs in SMT Processor Caches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HiPEAC ![In: High Performance Embedded Architectures and Compilers, Second International Conference, HiPEAC 2007, Ghent, Belgium, January 28-30, 2007, Proceedings, pp. 136-150, 2007, Springer, 978-3-540-69337-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
44 | Chuanjun Zhang |
Balanced instruction cache: reducing conflict misses of direct-mapped caches through balanced subarray accesses. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Comput. Archit. Lett. ![In: IEEE Comput. Archit. Lett. 5(1), pp. 2-5, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
44 | Martti Forsell |
Reducing the associativity and size of step caches in CRCW operation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 20th International Parallel and Distributed Processing Symposium (IPDPS 2006), Proceedings, 25-29 April 2006, Rhodes Island, Greece, 2006, IEEE. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
44 | Chuanjun Zhang |
Balanced Cache: Reducing Conflict Misses of Direct-Mapped Caches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: 33rd International Symposium on Computer Architecture (ISCA 2006), June 17-21, 2006, Boston, MA, USA, pp. 155-166, 2006, IEEE Computer Society, 0-7695-2608-X. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
44 | Zhao Zhang 0010, Zhichun Zhu, Xiaodong Zhang 0001 |
Design and Optimization of Large Size and Low Overhead Off-Chip Caches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 53(7), pp. 843-855, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
44 | Ann Gordon-Ross, Susan Cotterell, Frank Vahid |
Tiny instruction caches for low power embedded systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Embed. Comput. Syst. ![In: ACM Trans. Embed. Comput. Syst. 2(4), pp. 449-481, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
embedded systems., fixed program, low power, instruction cache, low energy, architecture tuning, Loop cache, filter cache |
44 | Theodore R. Haining, Darrell D. E. Long |
Management policies for non-volatile write caches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPCCC ![In: Proceedings of the IEEE International Performance Computing and Communications Conference, IPCCC 1999, Phoenix/Scottsdale, Arizona, USA, 10-12 February 1999, pp. 321-328, 1999, IEEE, 0-7803-5258-0. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
44 | Milind B. Kamble, Kanad Ghose |
Energy-Efficiency of VLSI Caches: A Comparative Study. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 10th International Conference on VLSI Design (VLSI Design 1997), 4-7 January 1997, Hyderabad, India, pp. 261-267, 1997, IEEE Computer Society, 0-8186-7755-4. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
43 | Mohsen Sharifi, Behrouz Zolfaghari |
YAARC: yet another approach to further reducing the rate of conflict misses. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Supercomput. ![In: J. Supercomput. 44(1), pp. 24-40, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Skewed associative cache, YAARC cache, Hit rate, Cache, Conflict misses |
43 | Padma Apparao, Ravi R. Iyer 0001, Donald Newell |
Implications of cache asymmetry on server consolidation performance. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IISWC ![In: 4th International Symposium on Workload Characterization (IISWC 2008), Seattle, Washington, USA, September 14-16, 2008, pp. 24-32, 2008, IEEE Computer Society, 978-1-4244-2778-9. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
43 | Yuanyuan Zhou 0001, Zhifeng Chen, Kai Li 0001 |
Second-Level Buffer Cache Management. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 15(6), pp. 505-519, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
43 | Patcharee Basu, Kanchana Kanchanasut |
A Multicast Push Caching System over a UDLR Satellite Link. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SAINT Workshops ![In: 2003 Symposium on Applications and the Internet Workshops (SAINT 2003), 27-31 January 2003 - Orlando, FL, USA, Proceedings, pp. 46-49, 2003, IEEE Computer Society, 0-7695-1873-7. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
Unidirectional link routing protocol, Reliable multicast, Cooperative cache, Push technology |
43 | William Y. Chen, Pohua P. Chang, Thomas M. Conte, Wen-mei W. Hwu |
The Effect of Code Expanding Optimizations on Instruction Cache Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 42(9), pp. 1045-1057, 1993. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP DOI BibTeX RDF |
code expanding optimizations, instruction placement, function inline expansion, superscalar optimizations, small caches, medium caches, load forwarding, large caches, C compiler, code expansion, optimisation, cache memory, memory architecture, buffer storage, instruction cache, code optimization, cache design, miss ratio |
41 | Alexandre E. Eichenberger, Santosh G. Abraham |
Modeling load imbalance and fuzzy barriers for scalable shared-memory multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HICSS (1) ![In: 28th Annual Hawaii International Conference on System Sciences (HICSS-28), January 3-6, 1995, Kihei, Maui, Hawaii, USA, pp. 262-271, 1995, IEEE Computer Society, 0-8186-6945-4. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
fuzzy barriers, overall execution time, parallel region, nondeterministic load imbalance modelling, random replacement policy, processor caches, cyclic access stream, interprocessor synchronization, 64-processor KSR system, Kendall Square Research system, random first-level caches, performance evaluation, resource allocation, concurrency control, synchronisation, shared memory systems, cache storage, variance, performance improvement, network contention, hit ratio, scalable shared-memory multiprocessors |
39 | Doe Hyun Yoon, Mattan Erez |
Memory mapped ECC: low-cost error protection for last level caches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: 36th International Symposium on Computer Architecture (ISCA 2009), June 20-24, 2009, Austin, TX, USA, pp. 116-127, 2009, ACM, 978-1-60558-526-0. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
reliability, error correction, soft error, last-level caches |
39 | Jun Yan 0008, Wei Zhang 0002 |
Analyzing the worst-case execution time for instruction caches with prefetching. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Embed. Comput. Syst. ![In: ACM Trans. Embed. Comput. Syst. 8(1), pp. 7:1-7:19, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
instruction caches, hard real-time, Worst-case execution time analysis, instruction prefetching |
39 | Edya Ladan-Mozes, Charles E. Leiserson |
A consistency architecture for hierarchical shared caches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SPAA ![In: SPAA 2008: Proceedings of the 20th Annual ACM Symposium on Parallelism in Algorithms and Architectures, Munich, Germany, June 14-16, 2008, pp. 11-22, 2008, ACM, 978-1-59593-973-9. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
mapping collision, message race, progressive protocol, memory hierarchy, deadlock, sequential consistency, cache consistency, shared caches, fat-tree |
39 | Kim M. Hazelwood, Michael D. Smith 0001 |
Managing bounded code caches in dynamic binary optimization systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Archit. Code Optim. ![In: ACM Trans. Archit. Code Optim. 3(3), pp. 263-294, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
code caches, Dynamic optimization, just-in-time compilation, dynamic translation |
39 | Georgi Gaydadjiev, Stamatis Vassiliadis |
SAD Prefetching for MPEG4 Using Flux Caches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SAMOS ![In: Embedded Computer Systems: Architectures, Modeling, and Simulation, 6th International Workshop, SAMOS 2006, Samos, Greece, July 17-20, 2006, Proceedings, pp. 248-258, 2006, Springer, 3-540-36410-2. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
Flux caches, Prefetching mechanisms, Multimedia, Reconfigurable architectures |
39 | Jia-Jhe Li, Yuan-Shin Hwang |
Snug set-associative caches: reducing leakage power while improving performance. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: Proceedings of the 2005 International Symposium on Low Power Electronics and Design, 2005, San Diego, California, USA, August 8-10, 2005, pp. 345-350, 2005, ACM, 1-59593-137-6. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
leakage power, set-associative caches |
39 | Mathias Spjuth, Martin Karlsson, Erik Hagersten |
Skewed caches from a low-power perspective. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Conf. Computing Frontiers ![In: Proceedings of the Second Conference on Computing Frontiers, 2005, Ischia, Italy, May 4-6, 2005, pp. 152-160, 2005, ACM, 1-59593-019-1. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
elbow, skewed caches, low-power, CAT |
39 | Salvador Petit, Julio Sahuquillo, Jose M. Such, David R. Kaeli |
Exploiting temporal locality in drowsy cache policies. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Conf. Computing Frontiers ![In: Proceedings of the Second Conference on Computing Frontiers, 2005, Ischia, Italy, May 4-6, 2005, pp. 371-377, 2005, ACM, 1-59593-019-1. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
drowsy cache policies, reuse information, low-power, temporal locality, set-associative caches |
39 | Jayaram Mudigonda, Harrick M. Vin, Raj Yavatkar |
Overcoming the memory wall in packet processing: hammers or ladders? ![Search on Bibsonomy](Pics/bibsonomy.png) |
ANCS ![In: Proceedings of the 2005 ACM/IEEE Symposium on Architecture for Networking and Communications Systems, ANCS 2005, Princeton, New Jersey, USA, October 16-18, 2005, pp. 1-10, 2005, ACM, 1-59593-082-5. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
multithreading, network processors, data-caches |
39 | Stephen J. Walsh, John A. Board |
Pollution control caching. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 1995 International Conference on Computer Design (ICCD '95), VLSI in Computers and Processors, October 2-4, 1995, Austin, TX, USA, Proceedings, pp. 300-306, 1995, IEEE Computer Society, 0-8186-7165-3. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
pollution control caching, high speed processors, bandwidth mismatch, standard DRAMS, on-chip caches, miss ratio statistics, expected clock cycles per instruction, main memory latencies, PCC+VB, discrete event simulation, memory architecture, trace driven simulation, cache storage, memory performance, ANOVA, DRAM chips |
39 | Ching-Long Su, Alvin M. Despain |
Cache designs for energy efficiency. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HICSS (1) ![In: 28th Annual Hawaii International Conference on System Sciences (HICSS-28), January 3-6, 1995, Kihei, Maui, Hawaii, USA, pp. 306-315, 1995, IEEE Computer Society, 0-8186-6945-4. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
cache design techniques, superpipelined processors, cache energy consumption estimation, block buffering, cache sub-banking, Gray code addressing, instruction cache designs, consecutive accessing, energy efficiency, microprocessors, power consumption, energy conservation, data caches, cache storage, superscalar processors, Gray codes, energy reduction, CMOS memory circuits |
39 | Anant Agarwal |
Performance Tradeoffs in Multithreaded Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 3(5), pp. 525-539, 1992. The full citation details ...](Pics/full.jpeg) |
1992 |
DBLP DOI BibTeX RDF |
context-switchingoverhead, multiprocessingsystems, performance evaluation, parallel algorithms, caches, multiprocessor interconnection networks, storage management, data-sharing, buffer storage, switching theory, multithreaded processors, network bandwidth, network contention, parallelprogramming, cache interference |
37 | Mehrtash Manoochehri, Alireza Ejlali, Seyed Ghassem Miremadi |
Joint write policy and fault-tolerance mechanism selection for caches in DSM technologies: Energy-reliability trade-off. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 10th International Symposium on Quality of Electronic Design (ISQED 2009), 16-18 March 2009, San Jose, CA, USA, pp. 839-844, 2009, IEEE Computer Society, 978-1-4244-2952-3. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
37 | Naveen Muralimanohar, Rajeev Balasubramonian, Norman P. Jouppi |
Optimizing NUCA Organizations and Wiring Alternatives for Large Caches with CACTI 6.0. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: 40th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-40 2007), 1-5 December 2007, Chicago, Illinois, USA, pp. 3-14, 2007, IEEE Computer Society, 0-7695-3047-8. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
non-uniform cache archi- tectures (NUCA), on-chip intercon- nects, memory hierarchies, cache models |
37 | Ziyu Lin, Dongqing Yang, Guojie Song, Tengjiao Wang 0003 |
Dealing with Query Contention Issue in Real-Time Data Warehouses by Dynamic Multi-level Caches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CIT ![In: Seventh International Conference on Computer and Information Technology (CIT 2007), October 16-19, 2007, University of Aizu, Fukushima, Japan, pp. 122-127, 2007, IEEE Computer Society, 978-0-7695-2983-7. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
37 | Bradford M. Beckmann, Michael R. Marty, David A. Wood 0001 |
ASR: Adaptive Selective Replication for CMP Caches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: 39th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-39 2006), 9-13 December 2006, Orlando, Florida, USA, pp. 443-454, 2006, IEEE Computer Society, 0-7695-2732-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
37 | Ja Chun Ku, Serkan Ozdemir, Gokhan Memik, Yehea I. Ismail |
Power density minimization for highly-associative caches in embedded processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 16th ACM Great Lakes Symposium on VLSI 2006, Philadelphia, PA, USA, April 30 - May 1, 2006, pp. 100-104, 2006, ACM, 1-59593-347-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
cache, embedded processor, leakage power, temperature |
37 | Song Jiang 0001, Xiaodong Zhang 0001 |
ULC: A File Block Placement and Replacement Protocol to Effectively Exploit Hierarchical Locality in Multi-Level Buffer Caches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICDCS ![In: 24th International Conference on Distributed Computing Systems (ICDCS 2004), 24-26 March 2004, Hachioji, Tokyo, Japan, pp. 168-177, 2004, IEEE Computer Society, 0-7695-2086-3. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
37 | Yingwu Zhu, Yiming Hu |
Disk Built-in Caches: Evaluation on System Performance. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MASCOTS ![In: 11th International Workshop on Modeling, Analysis, and Simulation of Computer and Telecommunication Systems (MASCOTS 2003), 12-15 October 2003, Orlando, FL, USA, pp. 306-, 2003, IEEE Computer Society, 0-7695-2039-1. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
37 | Se-Hyun Yang, Babak Falsafi |
Near-Optimal Precharging in High-Performance Nanoscale CMOS Caches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: Proceedings of the 36th Annual International Symposium on Microarchitecture, San Diego, CA, USA, December 3-5, 2003, pp. 67-80, 2003, IEEE Computer Society, 0-7695-2043-X. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
37 | Andrés Djordjalian |
Minimally-Skewed-Associative Caches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SBAC-PAD ![In: 14th Symposium on Computer Architecture and High Performance Computing (SBAC-PAD 2002), 28-30 October 2002, Vitoria, Espirito Santo, Brazil, pp. 100-107, 2002, IEEE Computer Society, 0-7695-1772-2. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
37 | Rui Min, Yiming Hu |
Improving Performance of Large Physically Indexed Caches by Decoupling Memory Addresses from Cache Addresses. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 50(11), pp. 1191-1201, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
Novel memory architectures, cache, memory systems, TLB, performance enhancement |
37 | Roberto Ferreira Brandão, Ricardo de Oliveira Anido |
A Parallel Simulator for Distributed and Cooperative Web Caches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DS-RT ![In: 5th IEEE International Workshop on Distributed Simulation and Real-Time Applications (DS-RT 2001), 13-15 August 2001, Cincinnati, OH, USA, pp. 113-120, 2001, IEEE Computer Society, 0-7695-1348-4. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
37 | Parthasarathy Ranganathan, Sarita V. Adve, Norman P. Jouppi |
Reconfigurable caches and their application to media processing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: 27th International Symposium on Computer Architecture (ISCA 2000), June 10-14, 2000, Vancouver, BC, Canada, pp. 214-224, 2000, IEEE Computer Society, 978-1-58113-232-8. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
37 | Edward S. Tam, Jude A. Rivers, Vijayalakshmi Srinivasan, Gary S. Tyson, Edward S. Davidson |
Active Management of Data Caches by Exploiting Reuse Information. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 48(11), pp. 1244-1259, 1999. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
Multilateral cache, reuse information, active management |
37 | André Seznec, François Bodin |
Skewed-associative Caches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARLE ![In: PARLE '93, Parallel Architectures and Languages Europe, 5th International PARLE Conference, Munich, Germany, June 14-17, 1993, Proceedings, pp. 304-316, 1993, Springer, 3-540-56891-3. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP DOI BibTeX RDF |
skewed-associative cache, cache, microprocessors, set-associative cache |
37 | Yixin Shi, Gyungho Lee |
Dynamic Partition of Memory Reference Instructions - A Register Guided Approach. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Euro-Par ![In: Euro-Par 2005, Parallel Processing, 11th International Euro-Par Conference, Lisbon, Portugal, August 30 - September 2, 2005, Proceedings, pp. 508-518, 2005, Springer, 3-540-28700-0. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
37 | Christian Bachmeir, Jianxiang Peng, Hans-Jörg Vögel, Chris Wallace, Gavin Conran |
Diversity Protected, Cache Based Reliable Content Distribution Building on Scalable, P2P, and Multicast Based Content Discovery. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HSNMC ![In: High Speed Networks and Multimedia Communications, 6th IEEE International Conference HSNMC 2003, Estoril, Portugal, July 23-25, 2003, Proceedings, pp. 93-107, 2003, Springer, 3-540-40542-9. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
37 | Pablo Rodriguez 0001, Christian Spanner, Ernst W. Biersack |
Analysis of web caching architectures: hierarchical and distributed caching. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE/ACM Trans. Netw. ![In: IEEE/ACM Trans. Netw. 9(4), pp. 404-418, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
performance, World Wide Web (WWW), Caching, web |
37 | Doug Burger, James R. Goodman, Alain Kägi |
Memory Bandwidth Limitations of Future Microprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: Proceedings of the 23rd Annual International Symposium on Computer Architecture, Philadelphia, PA, USA, May 22-24, 1996, pp. 78-89, 1996, ACM, 0-89791-786-3. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
|
37 | Richard E. Kessler, Richard Jooss, Alvin R. Lebeck, Mark D. Hill |
Inexpensive Implementations of Set-Associativity. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: Proceedings of the 16th Annual International Symposium on Computer Architecture. Jerusalem, Israel, June 1989, pp. 131-139, 1989, ACM, 0-89791-319-1. The full citation details ...](Pics/full.jpeg) |
1989 |
DBLP DOI BibTeX RDF |
|
33 | Sebastian Altmeyer, Claire Maiza, Jan Reineke 0001 |
Resilience analysis: tightening the CRPD bound for set-associative caches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LCTES ![In: Proceedings of the ACM SIGPLAN/SIGBED 2010 conference on Languages, compilers, and tools for embedded systems, LCTES 2010, Stockholm, Sweden, April 13-15, 2010, pp. 153-162, 2010, ACM, 978-1-60558-953-4. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
cache-related preemption delay, lru caches, timing analysis |
33 | Feng Chen 0005, Xiaodong Zhang 0001 |
PS-BC: power-saving considerations in design of buffer caches serving heterogeneous storage devices. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: Proceedings of the 2010 International Symposium on Low Power Electronics and Design, 2010, Austin, Texas, USA, August 18-20, 2010, pp. 295-300, 2010, ACM, 978-1-4503-0146-6. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
power management, energy saving, buffer caches, hard disk |
33 | Xiufeng Sui, Junmin Wu, Guoliang Chen 0001, Yixuan Tang, Xiaodong Zhu |
Augmenting cache partitioning with thread-aware insertion/promotion policies to manage shared caches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Conf. Computing Frontiers ![In: Proceedings of the 7th Conference on Computing Frontiers, 2010, Bertinoro, Italy, May 17-19, 2010, pp. 79-80, 2010, ACM, 978-1-4503-0044-5. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
shared caches, replacement, cache partitioning |
33 | Thanos Makatos, Yannis Klonatos, Manolis Marazakis, Michail D. Flouris, Angelos Bilas |
Using transparent compression to improve SSD-based I/O caches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EuroSys ![In: European Conference on Computer Systems, Proceedings of the 5th European conference on Computer systems, EuroSys 2010, Paris, France, April 13-16, 2010, pp. 1-14, 2010, ACM, 978-1-60558-577-2. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
online block-level compression, solid state disk caches, evaluation, I/O performance |
33 | Mary Jane Irwin |
Shared caches in multicores: the good, the bad, and the ugly. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: 37th International Symposium on Computer Architecture (ISCA 2010), June 19-23, 2010, Saint-Malo, France, pp. 234, 2010, ACM, 978-1-4503-0053-7. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
caches, multicore |
33 | Anand Bhaskar Das, Siddharth Goyal, Anand Gupta |
Practical Optimal Caching Using Multiple Virtual Caches in Multiple Query Optimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IMTIC ![In: Wireless Networks, Information Processing and Systems, International Multi Topic Conference, IMTIC 2008, Jamshoro, Pakistan, April 11-12, 2008, Revised Selected Papers, pp. 366-377, 2008, Springer, 978-3-540-89852-8. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Advanced Databases, Multi-Query Optimisation, Multiple Virtual Caches, Optimal Caching Algorithm |
33 | Kyle J. Nesbit, James Laudon, James E. Smith 0001 |
Virtual private caches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: 34th International Symposium on Computer Architecture (ISCA 2007), June 9-13, 2007, San Diego, California, USA, pp. 57-68, 2007, ACM, 978-1-59593-706-3. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
quality of service, chip multiprocessor, soft real-time, shared caches, performance isolation |
33 | Kimish Patel, Luca Benini, Enrico Macii, Massimo Poncino |
STV-Cache: a leakage energy-efficient architecture for data caches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 16th ACM Great Lakes Symposium on VLSI 2006, Philadelphia, PA, USA, April 30 - May 1, 2006, pp. 404-409, 2006, ACM, 1-59593-347-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
architecture, caches, leakage power |
33 | Gokhan Memik, Glenn Reinman, William H. Mangione-Smith |
Reducing energy and delay using efficient victim caches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: Proceedings of the 2003 International Symposium on Low Power Electronics and Design, 2003, Seoul, Korea, August 25-27, 2003, pp. 262-265, 2003, ACM, 1-58113-682-X. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
miss detection, network processors, victim caches |
33 | Soontae Kim, Narayanan Vijaykrishnan, Mary Jane Irwin, Lizy Kurian John |
On load latency in low-power caches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: Proceedings of the 2003 International Symposium on Low Power Electronics and Design, 2003, Seoul, Korea, August 25-27, 2003, pp. 258-261, 2003, ACM, 1-58113-682-X. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
load latency, low-power, caches |
33 | Mesaac Makpangou, Guillaume Pierre, Christian Khoury, Neilze Dorta |
Replicated Directory Service for Weakly Consistent Distributed Caches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICDCS ![In: Proceedings of the 19th International Conference on Distributed Computing Systems, Austin, TX, USA, May 31 - June 4, 1999, pp. 92-100, 1999, IEEE Computer Society, 0-7695-0222-9. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
Cooperative Caches, Directory Service, Weak Consistency |
33 | Masaru Takesue |
Psi-Cubes: Recursive Bused Fat-Hypercubes for Multilevel Snoopy Caches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPAN ![In: 1999 International Symposium on Parallel Architectures, Algorithms and Networks (ISPAN '99), 23-25 June 1999, Fremantle, Australia, pp. 62-67, 1999, IEEE Computer Society, 0-7695-0231-8. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
Bused networks, recursive networks, trees of buses, multilevel caches, coherence directories, clustering, Hamming codes |
33 | Omar Hammami |
Real time aspects of cluster based caches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
RTCSA ![In: 2nd International Workshop on Real-Time Computing Systems and Applications, October 25 - 27, 1995, Tokyo, Japan, pp. 16-20, 1995, IEEE Computer Society, 0-8186-7106-8. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
cluster based caches, performance evaluation, performance, real-time systems, predictability, cache storage, hit ratio, cache organization, hit time |
33 | Roger A. Bringmann, Scott A. Mahlke, Wen-mei W. Hwu |
A study of the effects of compiler-controlled speculation on instruction and data caches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HICSS (1) ![In: 28th Annual Hawaii International Conference on System Sciences (HICSS-28), January 3-6, 1995, Kihei, Maui, Hawaii, USA, pp. 211-220, 1995, IEEE Computer Society, 0-8186-6945-4. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
compiler-controlled speculation, nonnumeric programs, speculatively scheduled code, aggressive speculation models, scheduling, performance evaluation, parallel programming, time, instruction level parallelism, program compilers, data caches, cache storage, instruction cache, cache misses, performance results |
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