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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 989 occurrences of 575 keywords
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Results
Found 1111 publication records. Showing 1111 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
105 | Steffen Tarnick |
Single- and Double-Output Embedded Checker Architectures for Systematic Unordered Codes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 21(4), pp. 391-404, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
systematic unordered codes, embedded checkers, single- and double-output checkers, non-code-disjoint checkers, code translators |
95 | Steffen Tarnick |
Self-Testing Embedded Borden t -UED Code Checkers for t = 2 k q - 1 with q = 2 m - 1. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 24(6), pp. 509-527, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Borden codes, Embedded checkers, Code translators, AN codes, Self-testing checkers |
95 | Steffen Tarnick |
Design of Embedded Self-Testing Checkers for t-UED and BUED Codes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 20(5), pp. 465-477, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
t-unidirectional error detecting (t-UED) codes, burst unidirectional error detecting (BUED) codes, averaging circuits, embedded checkers, self-testing checkers |
85 | Steffen Tarnick |
Design of Embedded m-out-of-n Code Checkers Using Complete Parallel Counters. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IOLTS ![In: 13th IEEE International On-Line Testing Symposium (IOLTS 2007), 8-11 July 2007, Heraklion, Crete, Greece, pp. 285-292, 2007, IEEE Computer Society, 0-7695-2918-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
76 | Shafi Goldwasser, Dan Gutfreund, Alexander Healy, Tali Kaufman, Guy N. Rothblum |
A (de)constructive approach to program checking. ![Search on Bibsonomy](Pics/bibsonomy.png) |
STOC ![In: Proceedings of the 40th Annual ACM Symposium on Theory of Computing, Victoria, British Columbia, Canada, May 17-20, 2008, pp. 143-152, 2008, ACM, 978-1-60558-047-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
program testing, program correcting, program checking |
71 | Albrecht P. Stroele, Steffen Tarnick |
Embedded Checker Architectures for Cyclic and Low-Cost Arithmetic Codes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 16(4), pp. 355-367, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
code checkers, code word accumulators, code word generators, embedded checkers, cyclic arithmetic codes, low-cost arithmetic codes, built-in self-test, on-line test, totally self-checking checkers |
68 | Gordon Fraser 0001, Franz Wotawa |
Improving Model-Checkers for Software Testing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
QSIC ![In: Seventh International Conference on Quality Software (QSIC 2007), 11-12 October 2007, Portland, Oregon, USA, pp. 25-31, 2007, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
60 | Gul Muhammad Khan, Julian Francis Miller, David M. Halliday |
Developing neural structure of two agents that play checkers using cartesian genetic programming. ![Search on Bibsonomy](Pics/bibsonomy.png) |
GECCO (Companion) ![In: Genetic and Evolutionary Computation Conference, GECCO 2008, Proceedings, Atlanta, GA, USA, July 12-16, 2008, Companion Material, pp. 2169-2174, 2008, ACM, 978-1-60558-131-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
artificial neural networks, co-evolution, cartesian genetic programming, checkers, computational development |
59 | Steffen Tarnick |
Single-Output Embedded Checkers for Systematic Unordered Codes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IOLTS ![In: 10th IEEE International On-Line Testing Symposium (IOLTS 2004), 12-14 July 2004, Funchal, Madeira Island, Portugal, pp. 45-51, 2004, IEEE Computer Society, 0-7695-2180-0. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
59 | Michael Nicolaidis |
Fault secure property versus strongly code disjoint checkers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 13(5), pp. 651-658, 1994. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
|
52 | Cecilia Metra, Jien-Chung Lo |
Intermediacy Prediction for High Speed Berger Code Checkers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 16(6), pp. 607-615, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
self-checking circuits, checkers, Berger code |
52 | D. A. Pierce, Parag K. Lala |
Modular implementation of efficient self-checking checkers for the Berger code. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 9(3), pp. 279-294, 1996. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
conventional Berger code, 1's counters, fully-testable circuits, partitioning, CMOS technology, totally self-checking checkers, Berger code |
52 | Cecilia Metra, Michele Favalli, Bruno Riccò |
Embedded two-rail checkers with on-line testing ability. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 14th IEEE VLSI Test Symposium (VTS'96), April 28 - May 1, 1996, Princeton, NJ, USA, pp. 145-150, 1996, IEEE Computer Society, 0-8186-7304-4. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
embedded two-rail checkers, online testing ability, self-testing ability, compact structure, VLSI, logic testing, integrated circuit testing, design for testability, error detection, automatic testing, integrated logic circuits, two-rail code |
51 | Steffen Tarnick |
A Design Method for Embedded Self-Testing t-UED and BUED Code Checkers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IOLTS ![In: 9th IEEE International On-Line Testing Symposium (IOLTS 2003), 7-9 July 2003, Kos Island, Greece, pp. 43-48, 2003, IEEE Computer Society, 0-7695-1968-7. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
51 | J. Ignacio Giráldez, Daniel Borrajo |
Distributed Decision Making in Checkers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Computers and Games ![In: Computers and Games, First International Conference, CG'98, Tsukuba, Japan, November 11-12, 1998, Proceedings, pp. 183-194, 1998, Springer, 3-540-65766-5. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
51 | Xrysovalantis Kavousianos, Dimitris Nikolos, G. Sidiropoulos |
Design of Compact and High speed, Totally Self Checking CMOS Checkers for m-out-of-n Codes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 1997 Workshop on Defect and Fault-Tolerance in VLSI Systems (DFT '97), 20-22 October 1997, Paris, France, pp. 128-136, 1997, IEEE Computer Society, 0-8186-8168-3. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
SelfChecking circuits, totally selfchecking circuits, moutofn codes, fault tolerance |
51 | Stanislaw J. Piestrak |
Design of minimal-level PLA self-testing checkers for m-out-of-n codes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 4(2), pp. 264-272, 1996. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
|
51 | Vladimir Kolarik, Salvador Mir, Marcelo Lubaszewski, Bernard Courtois |
Analog checkers with absolute and relative tolerances. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 14(5), pp. 607-612, 1995. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
|
51 | Sandip Kundu, Sudhakar M. Reddy |
Embedded Totally Self-Checking Checkers: A Practical Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Des. Test Comput. ![In: IEEE Des. Test Comput. 7(4), pp. 5-12, 1990. The full citation details ...](Pics/full.jpeg) |
1990 |
DBLP DOI BibTeX RDF |
|
51 | Bruno Codenotti, Funda Ergün, Peter Gemmell, Ravi Kumar 0001 |
Checking Properties of Polynomials (Extended Abstract). ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICALP ![In: Automata, Languages and Programming, 24th International Colloquium, ICALP'97, Bologna, Italy, 7-11 July 1997, Proceedings, pp. 203-213, 1997, Springer, 3-540-63165-8. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
44 | B. Hamdi, Hakim Bederr, Michael Nicolaidis |
A tool for automatic generation of self-checking data paths. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 13th IEEE VLSI Test Symposium (VTS'95), April 30 - May 3, 1995, Princeton, New Jersey, USA, pp. 460-466, 1995, IEEE Computer Society, 0-8186-7000-2. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
self-checking data paths, ALUs, shifters, double rail checkers, logic testing, built-in self test, microprocessors, adders, circuit CAD, multipliers, microcontrollers, register files, circuit design, CAD tools, automatic generation, automatic test software, dividers, circuit testing, parity checkers |
44 | Odette Radi |
Secondary School Students' English Writing Aided by Spelling and Grammar Checkers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
WCCE ![In: Education and Technology for a Better World, 9th IFIP TC 3 World Conference on Computers in Education, WCCE 2009, Bento Gonçalves, Brazil, July 27-31, 2009. Proceedings, pp. 247-255, 2009, Springer, 978-3-642-03114-4. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
spelling and grammar checkers, social demands and practices, curriculum, cognition, Students, literacy, secondary education, computer use |
43 | Martin Omaña 0001, Daniele Rossi 0001, Cecilia Metra |
Low Cost and High Speed Embedded Two-Rail Code Checker. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 54(2), pp. 153-164, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
Self-checking circuits, checkers, error indicators, two-rail code |
43 | Jonathan Schaeffer |
Computer (and Human) Perfection at Checkers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Canadian AI ![In: Advances in Artificial Intelligence, 22nd Canadian Conference on Artificial Intelligence, Canadian AI 2009, Kelowna, Canada, May 25-27, 2009, Proceedings, pp. 3, 2009, Springer, 978-3-642-01817-6. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
43 | Daniele Rossi 0001, Martin Omaña 0001, Cecilia Metra |
Checkers' No-Harm Alarms and Design Approaches to Tolerate Them. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 24(1-3), pp. 93-103, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Error detecting codes, Transient faults, Self-checking circuits, Checker |
43 | Martin Straka, Zdenek Kotásek, Jan Winter |
Digital Systems Architectures Based on On-line Checkers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DSD ![In: 11th Euromicro Conference on Digital System Design: Architectures, Methods and Tools, DSD 2008, Parma, Italy, September 3-5, 2008, pp. 81-87, 2008, IEEE Computer Society, 978-0-7695-3277-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
43 | Gordon Fraser 0001, Franz Wotawa |
Test-Case Generation and Coverage Analysis for Nondeterministic Systems Using Model-Checkers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICSEA ![In: Proceedings of the Second International Conference on Software Engineering Advances (ICSEA 2007), August 25-31, 2007, Cap Esterel, French Riviera, France, pp. 45, 2007, IEEE Computer Society, 0-7695-2937-2. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
43 | Kazuhiro Ogata 0001, Kokichi Futatsugi |
Analysis of the Suzuki-Kasami Algorithm with SAL Model Checkers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CIT ![In: Fifth International Conference on Computer and Information Technology (CIT 2005), 21-23 September 2005, Shanghai, China, pp. 937-943, 2005, IEEE Computer Society, 0-7695-2432-X. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
43 | Kartik Mohanram, Nur A. Touba |
Lowering power consumption in concurrent checkers via input ordering. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 12(11), pp. 1234-1243, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
43 | Ronny Frevert, Steffen Rülke, Torsten Schäfer, Frank Dresig |
Use of HDL Code Checkers to Support the IP Entrance Check - A Requirement Analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DSD ![In: 2002 Euromicro Symposium on Digital Systems Design (DSD 2002), Systems-on-Chip, 4-6 September 2002, Dortmund, Germany, pp. 364-370, 2002, IEEE Computer Society, 0-7695-1790-0. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
43 | Kyung-Joong Kim 0001, Sung-Bae Cho |
Checkers Strategy Evolution with Speciated Neural Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PRICAI ![In: PRICAI 2002: Trends in Artificial Intelligence, 7th Pacific Rim International Conference on Artificial Intelligence, Tokyo, Japan, August 18-22, 2002, Proceedings, pp. 599, 2002, Springer, 3-540-44038-0. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
43 | Dimitris Nikolos |
Self-Testing Embedded Two-Rail Checkers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 12(1-2), pp. 69-79, 1998. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
parity tree, embedded self-testing, self testing, two-rail checker, parity checker |
43 | Stanislaw J. Piestrak |
Design of Self-Testing Checkers for m-out-of-n Codes Using Parallel Counters. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 12(1-2), pp. 63-68, 1998. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
counters of 1s, m-out-of-n (m/n) codes, concurrent error detection, on-line testing, self-checking circuit, unidirectional errors, parallel counters, unordered codes, self-testing checker |
43 | Kireeti Kompella, Leonard M. Adleman |
Fast Checkers for Cryptography. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CRYPTO ![In: Advances in Cryptology - CRYPTO '90, 10th Annual International Cryptology Conference, Santa Barbara, California, USA, August 11-15, 1990, Proceedings, pp. 515-529, 1990, Springer, 3-540-54508-5. The full citation details ...](Pics/full.jpeg) |
1990 |
DBLP DOI BibTeX RDF |
|
43 | Michael Nicolaidis |
Self-exercising checkers for unified built-in self-test (UBIST). ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 8(3), pp. 203-218, 1989. The full citation details ...](Pics/full.jpeg) |
1989 |
DBLP DOI BibTeX RDF |
|
36 | Jacek Mandziuk |
Computational Intelligence in Mind Games. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Challenges for Computational Intelligence ![In: Challenges for Computational Intelligence, pp. 407-442, 2007, Springer, 978-3-540-71983-0. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
CI in games, soft-computing methods, Give-Away Checkers, Backgammon, Scrabble, challenges, Bridge, game playing, Go, Poker, Checkers, Chess, Othello |
36 | Petr Golan |
Design of Totally Self-Checking Checker for 1-out-of-3 Code. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 33(3), pp. 285, 1984. The full citation details ...](Pics/full.jpeg) |
1984 |
DBLP DOI BibTeX RDF |
fixed-weight codes, 1-out-of-3 code, TSC checkers, totally self-checking checkers, Constant weight codes, m-out-of-n codes |
36 | Dhiraj K. Pradhan |
A New Class of Error-Correcting/Detecting Codes for Fault-Tolerant Computer Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 29(6), pp. 471-481, 1980. The full citation details ...](Pics/full.jpeg) |
1980 |
DBLP DOI BibTeX RDF |
Coset codes, decoder logic, erasure decoding, mass memories, multiple errors, TSC checkers, error detection, error correction, transient faults, multiple faults, unidirectional errors, self-checking, shift register memories, read-only memories, random errors, two-rail checkers |
35 | Vassilios V. Dimakopoulos, G. Sourtziotis, Antonis M. Paschalis, Dimitris Nikolos |
On TSC Checkers for m-out-n Codes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 44(8), pp. 1055-1059, 1995. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
MOS transistor implementation, fault tolerance, Fault detection, totally self-checking checkers, m-out-of-n code |
35 | Wen-Ben Jone, Cheng-Juei Wu |
Multiple Fault Detection in Parity Checkers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 43(9), pp. 1096-1099, 1994. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
monitoring circuits, identity matrix, zero vector, wired-OR connections, reliability, logic testing, fault location, digital systems, multiple stuck-at faults, multiple fault detection, binary matrix, parity checkers |
35 | Niraj K. Jha |
Fault Detection in CVS Parity Trees with Application to Strongly Self-Checking Parity and Two-Rail Checkers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 42(2), pp. 179-189, 1993. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP DOI BibTeX RDF |
CVS parity trees, strongly self-checking parity, single stuck-at, stuck-open, stuck-on fault detection, cascode voltage switch, differential cascode voltage switch, EX-OR gates, single-ended cascode voltage switch, logic testing, fault location, logic gates, two-rail checkers |
35 | Jien-Chung Lo, Suchai Thanawastien |
On the Design of Combinational Totally Self-Checking I-out-of3 Code Checkers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 39(3), pp. 387-393, 1990. The full citation details ...](Pics/full.jpeg) |
1990 |
DBLP DOI BibTeX RDF |
combinational totally self-checking 1-out-of-3 code checkers, NMOS, TSC goal, fault sequences, minimum fault sequences, MOS integrated circuits, logic testing, logic design, automatic testing, integrated logic circuits |
35 | Stanislaw J. Piestrak |
Design of High-Speed and Cost-Effective Self-Testing Checkers for Low-Cost Arithmetic Codes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 39(3), pp. 360-374, 1990. The full citation details ...](Pics/full.jpeg) |
1990 |
DBLP DOI BibTeX RDF |
complexity, logic testing, logic design, automatic testing, digital arithmetic, logic circuits, error-detecting codes, error detection codes, arithmetic codes, gate levels, self-testing checkers |
35 | Dimitris Nikolos, Antonis M. Paschalis, George Philokyprou |
Efficient Design of Totally Self-Checking Checkers for all Low-Cost Arithmetic Codes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 37(7), pp. 807-814, 1988. The full citation details ...](Pics/full.jpeg) |
1988 |
DBLP DOI BibTeX RDF |
low-cost arithmetic codes, reliability, fault tolerant computing, partitioning, trees, error detection codes, totally self-checking checkers, gate levels |
35 | Michael Nicolaidis, Bernard Courtois |
Strongly Code Disjoint Checkers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 37(6), pp. 751-756, 1988. The full citation details ...](Pics/full.jpeg) |
1988 |
DBLP DOI BibTeX RDF |
strongly code disjoint checkers, strongly fault secure networks, combinational system, error detection codes, combinatorial circuits, totally self-checking |
35 | Nikolaos Gaitanis |
Totally Self-Checking Checkers with Separate Internal Fault Indication. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 37(10), pp. 1206-1213, 1988. The full citation details ...](Pics/full.jpeg) |
1988 |
DBLP DOI BibTeX RDF |
separate internal fault indication, functional circuit, two-element Boolean algebra, self-checking operator blocks, logic testing, fault location, fault, design technique, totally self-checking checkers, algebraic approach |
35 | Antonis M. Paschalis, Dimitris Nikolos, Constantine Halatsis |
Efficient Modular Design of TSC Checkers for M-out-of-2M Codes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 37(3), pp. 301-309, 1988. The full citation details ...](Pics/full.jpeg) |
1988 |
DBLP DOI BibTeX RDF |
half-adder, VLSI MOS implementation, logic design, trees, codes, codes, adders, modular design, totally self-checking checkers, full-adder |
35 | Ingrid Jansch, Bernard Courtois |
Definition and Design of Strongly Language Disjoint Checkers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 37(6), pp. 745-748, 1988. The full citation details ...](Pics/full.jpeg) |
1988 |
DBLP DOI BibTeX RDF |
strongly language disjoint checkers, logic testing, fault location, totally self-checking, sequential systems |
35 | Nikolaos Gaitanis |
Totally Self-Checking Checkers for Low-Cost Arithmetic Codes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 34(7), pp. 596-601, 1985. The full citation details ...](Pics/full.jpeg) |
1985 |
DBLP DOI BibTeX RDF |
TSC residue generators, Inverse residue codes, low-cost codes, totally self-checking checkers |
35 | Constantine Halatsis, Nikolaos Gaitanis, Maria Sigala |
Fast and Efficient Totally Self-Checking Checkers for m-out-of-(2m ±1) Codes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 32(5), pp. 507-511, 1983. The full citation details ...](Pics/full.jpeg) |
1983 |
DBLP DOI BibTeX RDF |
totally self-checking checkers, m-out-of-n codes |
35 | Nikolaos Gaitanis, Constantine Halatsis |
A New Design Method for m-Out-of-n TSC Checkers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 32(3), pp. 273-283, 1983. The full citation details ...](Pics/full.jpeg) |
1983 |
DBLP DOI BibTeX RDF |
totally selfchecking checkers, Code disjoint, fault detection, m-out-of-n codes |
35 | Daniel Etiemble |
Multivalued I2L Circuits for TSC Checkers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 29(6), pp. 537-540, 1980. The full citation details ...](Pics/full.jpeg) |
1980 |
DBLP DOI BibTeX RDF |
totally self-checking comparator, multivalued logic, Error-detecting codes, totally self-checking checkers, I |
35 | Gul Muhammad Khan, Julian F. Miller |
Evolution of cartesian genetic programs capable of learning. ![Search on Bibsonomy](Pics/bibsonomy.png) |
GECCO ![In: Genetic and Evolutionary Computation Conference, GECCO 2009, Proceedings, Montreal, Québec, Canada, July 8-12, 2009, pp. 707-714, 2009, ACM, 978-1-60558-325-9. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
artificial neural networks, co-evolution, cartesian genetic programming, checkers, computational development |
35 | Gordon Fraser 0001, Franz Wotawa |
Using LTL rewriting to improve the performance of model-checker based test-case generation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
A-MOST ![In: Proceedings of the 3rd Workshop on Advances in Model Based Testing, A-MOST 2007, co-located with the ISSTA 2007 International Symposium on Software Testing and Analysis, London, United Kingdom, July 9-12, pp. 64-74, 2007, ACM, 978-1-59593-850-3. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
LTL rewriting, test-case generation with model-checkers, automated software testing |
34 | Alberto Dafonte-Gomez, María-Isabel Míguez-González, Xabier Martínez-Rolán |
Los fact-checkers iberoamericanos frente a la COVID-19. Análisis de actividad en Facebook / The Ibero-American fact-checkers facing the COVID-19. Analysis of activity on Facebook. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2109.06533, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP BibTeX RDF |
|
34 | Jacek Mandziuk, Magdalena Kusiak, Karol Waledzik |
Evolutionary-based heuristic generators for checkers and give-away checkers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Expert Syst. J. Knowl. Eng. ![In: Expert Syst. J. Knowl. Eng. 24(4), pp. 189-211, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
34 | Gul Muhammad Khan, Julian Francis Miller, David M. Halliday |
Coevolution of Neuro-developmental Programs That Play Checkers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICES ![In: Evolvable Systems: From Biology to Hardware, 8th International Conference, ICES 2008, Prague, Czech Republic, September 21-24, 2008. Proceedings, pp. 352-361, 2008, Springer, 978-3-540-85856-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Co-evolution of hybrid systems, Artificial Neural Networks, Adaptive computing, Cartesian Genetic Programming |
34 | Marc Boule, Jean-Samuel Chenard, Zeljko Zilic |
Assertion Checkers in Verification, Silicon Debug and In-Field Diagnosis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 8th International Symposium on Quality of Electronic Design (ISQED 2007), 26-28 March 2007, San Jose, CA, USA, pp. 613-620, 2007, IEEE Computer Society, 978-0-7695-2795-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
34 | Kyung-Joong Kim 0001, Sung-Bae Cho |
Ensemble Evolution of Checkers Players with Knowledge of Opening, Middle and Endgame. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PRICAI ![In: PRICAI 2006: Trends in Artificial Intelligence, 9th Pacific Rim International Conference on Artificial Intelligence, Guilin, China, August 7-11, 2006, Proceedings, pp. 950-954, 2006, Springer, 3-540-36667-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
34 | Steffen Tarnick |
Embedded Borden 2-UED Code Checkers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IOLTS ![In: 12th IEEE International On-Line Testing Symposium (IOLTS 2006), 10-12 July 2006, Como, Italy, pp. 173-175, 2006, IEEE Computer Society, 0-7695-2620-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
34 | Evan J. Hughes |
Checkers using a co-evolutionary on-line evolutionary algorithm. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Congress on Evolutionary Computation ![In: Proceedings of the IEEE Congress on Evolutionary Computation, CEC 2005, 2-4 September 2005, Edinburgh, UK, pp. 1899-1905, 2005, IEEE, 0-7803-9363-5. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
34 | Nicholas Cooper, Aaron Keatley, Maria Dahlquist, Simon Mann, Hannah Slay, Joanne E. Zucco, Ross T. Smith, Bruce H. Thomas |
Augmented Reality Chinese Checkers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Advances in Computer Entertainment Technology ![In: Proceedings of the 2004 ACM SIGCHI International Conference on Advances in Computer Entertainment Technology, 2004, Singapore, June 3-5, 2004, pp. 117-126, 2004, ACM, 1-58113-882-2. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
computer based board games, augmented reality, tangible interaction, entertainment computing |
34 | Steffen Tarnick |
Self-Testing Embedded Checkers for Bose-Lin, Bose, and a Class of Borden Codes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2003 Design, Automation and Test in Europe Conference and Exposition (DATE 2003), 3-7 March 2003, Munich, Germany, pp. 11162-11163, 2003, IEEE Computer Society, 0-7695-1870-2. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
34 | Valery A. Vardanian, Liana B. Mirzoyan |
Improving the Error Detection Ability of Concurrent Checkers by Observation Point Insertion in the Circuit Under Check. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2000 Design, Automation and Test in Europe (DATE 2000), 27-30 March 2000, Paris, France, pp. 762, 2000, IEEE Computer Society / ACM, 0-7695-0537-6. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
34 | Albrecht P. Stroele, Steffen Tarnick |
Programmable Embedded Self-Testing Checkers for All-Unidirectional Error-Detecting Code. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 17th IEEE VLSI Test Symposium (VTS '99), 25-30 April 1999, San Diego, CA, USA, pp. 361-369, 1999, IEEE Computer Society, 0-7695-0146-X. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
34 | Steffen Tarnick, Albrecht P. Stroele |
Embedded self-testing checkers for low-cost arithmetic codes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 1998, Washington, DC, USA, October 18-22, 1998, pp. 514-523, 1998, IEEE Computer Society, 0-7803-5093-6. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
34 | Yu-Yau Guo, Jien-Chung Lo, Cecilia Metra |
Fast and area-time efficient Berger code checkers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 1997 Workshop on Defect and Fault-Tolerance in VLSI Systems (DFT '97), 20-22 October 1997, Paris, France, pp. 110-118, 1997, IEEE Computer Society, 0-8186-8168-3. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
Berger code checker, ratioed FET circuit, area-time efficiency, resistive breaks, VLSI, defects, error detection codes, bridges, speed, threshold function, 32 bit, 1.2 micron |
34 | Steffen Tarnick |
Controllable self-checking checkers for conditional concurrent checking. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 14(5), pp. 547-553, 1995. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
|
34 | Cecilia Metra, Michele Favalli, Piero Olivo, Bruno Riccò |
Design of CMOS checkers with improved testability of bridging and transistor stuck-on faults. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 6(1), pp. 7-22, 1995. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
CMOS, testability, Bridging fault, self-checking circuits, checker |
34 | Jonathan Schaeffer |
The games computers play...: perfectly. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SIGCSE ![In: Proceedings of the 38th SIGCSE Technical Symposium on Computer Science Education, SIGCSE 2007, Covington, Kentucky, USA, March 7-11, 2007, pp. 581, 2007, ACM, 1-59593-361-1. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
34 | Angelo Ciaramella, Paolo D'Arco, Alfredo De Santis, Clemente Galdi, Roberto Tagliaferri |
Neural Network Techniques for Proactive Password Checking. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Dependable Secur. Comput. ![In: IEEE Trans. Dependable Secur. Comput. 3(4), pp. 327-339, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
neural networks, machine learning, access control, passwords, System security |
34 | Leonardo Mendonça de Moura, Sam Owre, Harald Rueß, John M. Rushby, Natarajan Shankar, Maria Sorea, Ashish Tiwari 0001 |
SAL 2. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CAV ![In: Computer Aided Verification, 16th International Conference, CAV 2004, Boston, MA, USA, July 13-17, 2004, Proceedings, pp. 496-500, 2004, Springer, 3-540-22342-8. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
34 | Claus Schröter, Stefan Schwoon, Javier Esparza |
The Model-Checking Kit. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICATPN ![In: Applications and Theory of Petri Nets 2003, 24th International Conference, ICATPN 2003, Eindhoven, The Netherlands, June 23-27, 2003, Proceedings, pp. 463-472, 2003, Springer, 3-540-40334-5. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
34 | Girish Bhat, Rance Cleaveland, Alex Groce |
Efficient Model Checking Via Büchi Tableau Automata. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CAV ![In: Computer Aided Verification, 13th International Conference, CAV 2001, Paris, France, July 18-22, 2001, Proceedings, pp. 38-52, 2001, Springer, 3-540-42345-1. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
34 | Ramesh Bharadwaj, Steve Sims |
Salsa: Combining Constraint Solvers with BDDs for Automatic Invariant Checking. ![Search on Bibsonomy](Pics/bibsonomy.png) |
TACAS ![In: Tools and Algorithms for Construction and Analysis of Systems, 6th International Conference, TACAS 2000, Held as Part of the European Joint Conferences on the Theory and Practice of Software, ETAPS 2000, Berlin, Germany, March 25 - April 2, 2000, Proceedings, pp. 378-394, 2000, Springer, 3-540-67282-6. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
34 | Andy Chou, Benjamin Chelf, Dawson R. Engler, Mark A. Heinrich |
Using Meta-level Compilation to Check FLASH Protocol Code. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASPLOS ![In: ASPLOS-IX Proceedings of the 9th International Conference on Architectural Support for Programming Languages and Operating Systems, Cambridge, MA, USA, November 12-15, 2000., pp. 59-70, 2000, ACM Press, 1-58113-317-0. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
34 | Vikraman Arvind, K. V. Subrahmanyam 0001, N. V. Vinodchandran |
The Query Complexity of Program Checking by Constant-Depth Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISAAC ![In: Algorithms and Computation, 10th International Symposium, ISAAC '99, Chennai, India, December 16-18, 1999, Proceedings, pp. 123-132, 1999, Springer, 3-540-66916-7. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
26 | Marc Boule, Zeljko Zilic |
Automata-based assertion-checker synthesis of PSL properties. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Design Autom. Electr. Syst. ![In: ACM Trans. Design Autom. Electr. Syst. 13(1), pp. 4:1-4:21, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
assertion checkers, emulation, hardware, automata, PSL, Assertion-Based Verification |
26 | Panagiotis Louridas |
Static Code Analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Softw. ![In: IEEE Softw. 23(4), pp. 58-61, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
static checkers, software testing, debugging |
26 | Pavel Parízek, Frantisek Plásil, Jan Kofron |
Model Checking of Software Components: Combining Java PathFinder and Behavior Protocol Model Checker. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SEW ![In: 30th Annual IEEE / NASA Software Engineering Workshop (SEW-30 2006), 25-28 April 2006, Loyola College Graduate Center, Columbia, MD, USA, pp. 133-141, 2006, IEEE Computer Society, 0-7695-2624-1. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
cooperation of model checkers, model checking, software components, behavior protocols |
26 | Haralampos-G. D. Stratigopoulos, Yiorgos Makris |
An Analog Checker with Input-Relative Tolerance for Duplicate Signals. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 20(5), pp. 479-488, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
analog checkers, on-line test, analog test, concurrent test |
26 | Ileana Ober |
More Meaningful UML Models. ![Search on Bibsonomy](Pics/bibsonomy.png) |
TOOLS (37) ![In: TOOLS Pacific 2000: 37th International Conference on Technology of Object-Oriented Languages and Systems, Sydney, Australia, November 2000, pp. 146-157, 2000, IEEE Computer Society, 0-7695-0918-5. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
complex systems modelling, tool support capabilities, executable semantics, tool vendors, intelligent tools, consistency checkers, semantics definition, UML meta-model, well formedness rules, UML standard, behaviour primitives, ASM transition rules, UML actions, object-oriented programming, specification languages, finite automata, formal semantics, symbolic execution, Abstract State Machines, UML models, programming language semantics, dynamic semantics, static semantics |
26 | Michael Nicolaidis |
Efficient UBIST implementation for microprocessor sequencing parts. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 6(3), pp. 295-312, 1995. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
strongly code disjoint checkers, signature analyser, UBIST, microprocessor sequencing part, BIST, LFSR, self-checking circuits, totally self-checking circuits |
26 | Shiu-Kai Chin, John Faust, Joseph Giordano |
Integrating formal methods tools to support system design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICECCS ![In: 1st IEEE International Conference on Engineering of Complex Computer Systems (ICECCS '95), November 6-10, 1995, Fort Lauderdale, Florida, USA, pp. 88-, 1995, IEEE Computer Society, 0-8186-7123-8. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
formal methods tools integration, top-level process descriptions, gate-level hardware designs, simulators, formal specification, system design, specification languages, specification languages, systems analysis, system engineering, theorem-provers, computer-aided design tools, model checkers |
26 | Alessandro Armando |
Building SMT-Based Software Model Checkers: An Experience Report. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FroCoS ![In: Frontiers of Combining Systems, 7th International Symposium, FroCoS 2009, Trento, Italy, September 16-18, 2009. Proceedings, pp. 1-17, 2009, Springer, 978-3-642-04221-8. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
26 | Carlos Arthur Lang Lisbôa, Luigi Carro |
XOR-based Low Cost Checkers for Combinational Logic. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 23rd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2008), 1-3 October 2008, Boston, MA, USA, pp. 281-289, 2008, IEEE Computer Society, 978-0-7695-3365-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
26 | Radek Pelánek |
BEEM: Benchmarks for Explicit Model Checkers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SPIN ![In: Model Checking Software, 14th International SPIN Workshop, Berlin, Germany, July 1-3, 2007, Proceedings, pp. 263-267, 2007, Springer, 978-3-540-73369-0. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
26 | Magdalena Kusiak, Karol Waledzik, Jacek Mandziuk |
Evolutionary Approach to the Game of Checkers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICANNGA (1) ![In: Adaptive and Natural Computing Algorithms, 8th International Conference, ICANNGA 2007, Warsaw, Poland, April 11-14, 2007, Proceedings, Part I, pp. 432-440, 2007, Springer, 978-3-540-71589-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
26 | Bor-Yuh Evan Chang, Xavier Rival, George C. Necula |
Shape Analysis with Structural Invariant Checkers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SAS ![In: Static Analysis, 14th International Symposium, SAS 2007, Kongens Lyngby, Denmark, August 22-24, 2007, Proceedings, pp. 384-401, 2007, Springer, 978-3-540-74060-5. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
26 | Kyung-Joong Kim 0001, Sung-Bae Cho |
Systematically incorporating domain-specific knowledge into evolutionary speciated checkers players. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Evol. Comput. ![In: IEEE Trans. Evol. Comput. 9(6), pp. 615-627, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
26 | Radu Iosif, Matthew B. Dwyer, John Hatcliff |
Translating Java for Multiple Model Checkers: The Bandera Back-End. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Formal Methods Syst. Des. ![In: Formal Methods Syst. Des. 26(2), pp. 137-180, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
26 | Marc Boule, Zeljko Zilic |
Incorporating Ef.cient Assertion Checkers into Hardware Emulation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 23rd International Conference on Computer Design (ICCD 2005), 2-5 October 2005, San Jose, CA, USA, pp. 221-228, 2005, IEEE Computer Society, 0-7695-2451-6. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
26 | Magdalena Kusiak, Karol Waledzik, Jacek Mandziuk |
Evolution of Heuristics for Give-Away Checkers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICANN (2) ![In: Artificial Neural Networks: Formal Models and Their Applications - ICANN 2005, 15th International Conference, Warsaw, Poland, September 11-15, 2005, Proceedings, Part II, pp. 981-987, 2005, Springer, 3-540-28755-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
26 | Jacek Mandziuk, Daniel Osman |
Temporal Difference Approach to Playing Give-Away Checkers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICAISC ![In: Artificial Intelligence and Soft Computing - ICAISC 2004, 7th International Conference, Zakopane, Poland, June 7-11, 2004, Proceedings, pp. 909-914, 2004, Springer, 3-540-22123-9. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
26 | Mats Per Erik Heimdahl, Sanjai Rayadurgam, Willem Visser, George Devaraj, Jimin Gao |
Auto-generating Test Sequences Using Model Checkers: A Case Study. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FATES ![In: Formal Approaches to Software Testing, Third International Workshop on Formal Approaches to Testing of Software, FATES 2003, Montreal, Quebec, Canada, October 6th, 2003, pp. 42-59, 2003, Springer, 3-540-20894-1. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
26 | Rolf Drechsler |
Synthesizing checkers for on-line verification of System-on-Chip designs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (4) ![In: Proceedings of the 2003 International Symposium on Circuits and Systems, ISCAS 2003, Bangkok, Thailand, May 25-28, 2003, pp. 748-751, 2003, IEEE, 0-7803-7761-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
26 | Dinghao Wu, Andrew W. Appel, Aaron Stump |
Foundational proof checkers with small witnesses. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PPDP ![In: Proceedings of the 5th International ACM SIGPLAN Conference on Principles and Practice of Declarative Programming, 27-29 August 2003, Uppsala, Sweden, pp. 264-274, 2003, ACM, 1-58113-705-2. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
proof checker, proof-carrying code |
26 | Anzhela Yu. Matrosova, Vladimir Ostrovsky, Ilya Levin, K. Nikitin |
Designing FPGA based Self-Testing Checkers for m-out-of-n Codes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IOLTS ![In: 9th IEEE International On-Line Testing Symposium (IOLTS 2003), 7-9 July 2003, Kos Island, Greece, pp. 49-53, 2003, IEEE Computer Society, 0-7695-1968-7. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
26 | Stanislaw J. Piestrak |
Design Method of a Class of Embedded Combinational Self-Testing Checkers for Two-Rail Codes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 51(2), pp. 229-234, 2002. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
embedded circuit, inverter-free circuit, totally self-testing circuit, concurrent error detection, Berger code, self-testing checker, two-rail code |
26 | Kartik Mohanram, Nur A. Touba |
Input Ordering in Concurrent Checkers to Reduce Power Consumption. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 17th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2002), 6-8 November 2002, Vancouver, BC, Canada, Proceedings, pp. 87-98, 2002, IEEE Computer Society, 0-7695-1831-1. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
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