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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 720 occurrences of 377 keywords
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Results
Found 2317 publication records. Showing 2317 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
126 | Mingjing Chen, Alex Orailoglu |
Deflecting crosstalk by routing reconsideration through refined signal correlation estimation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 19th ACM Great Lakes Symposium on VLSI 2009, Boston Area, MA, USA, May 10-12 2009, pp. 369-374, 2009, ACM, 978-1-60558-522-2. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
signal correlation, routing, crosstalk |
112 | Prashant Saxena, C. L. Liu 0001 |
A postprocessing algorithm for crosstalk-driven wire perturbation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 19(6), pp. 691-702, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
110 | Zheng Rong Yang |
Crosstalk and Signalling Pathway Complexity - A Case Study on Synthetic Models. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HAIS ![In: Hybrid Artificial Intelligence Systems, Third International Workshop, HAIS 2008, Burgos, Spain, September 24-26, 2008. Proceedings, pp. 696-705, 2008, Springer, 978-3-540-87655-7. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
signalling pathways, gene expression order, Crosstalk, differential equations, transcription, degradation, steady-state analysis |
110 | Xiaoliang Bai, Sujit Dey |
High-level Crosstalk Defect Simulation for System-on-Chip Interconnects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 19th IEEE VLSI Test Symposium (VTS 2001), Test and Diagnosis in a Nanometric World, 29 April - 3 May 2001, Marina Del Rey, CA, USA, pp. 169-177, 2001, IEEE Computer Society, 0-7695-1122-8. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
System-on-Chip, Crosstalk, Interconnect test, Defect simulation, High level |
108 | Ajoy Kumar Palit, Kishore K. Duganapalli, Walter Anheier |
Modeling of Crosstalk Fault in Defective Interconnects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PATMOS ![In: Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation, 16th International Workshop, PATMOS 2006, Montpellier, France, September 13-15, 2006, Proceedings, pp. 340-349, 2006, Springer, 3-540-39094-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
defect-based-crosstalk fault model, signal integrity losses, aggres-sor-victim, ABCD-model, crosstalk-hazards |
103 | Iris Hui-Ru Jiang, Song-Ra Pan, Yao-Wen Chang, Jing-Yang Jou |
Reliable crosstalk-driven interconnect optimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Design Autom. Electr. Syst. ![In: ACM Trans. Design Autom. Electr. Syst. 11(1), pp. 88-103, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
post-layout optimization, VLSI, interconnect, lagrangian relaxation |
103 | Tianxiong Xue, Ernest S. Kuh, Dongsheng Wang 0012 |
Post global routing crosstalk synthesis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 16(12), pp. 1418-1430, 1997. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
102 | Shahin Nazarian, Massoud Pedram, Emre Tuncer |
An empirical study of crosstalk in VDSM technologies. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 15th ACM Great Lakes Symposium on VLSI 2005, Chicago, Illinois, USA, April 17-19, 2005, pp. 317-322, 2005, ACM, 1-59593-057-4. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
automatic test pattern generation (ATPG) tool, crosstalk induced slowdown and speedup, transition time, static timing analysis (STA), skew |
95 | Yi Zhao, Sujit Dey |
Fault-coverage analysis techniques of crosstalk in chip interconnects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 22(6), pp. 770-782, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
93 | Narender Hanchate, Nagarajan Ranganathan |
A game-theoretic framework for multimetric optimization of interconnect delay, power, and crosstalk noise during wire sizing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Design Autom. Electr. Syst. ![In: ACM Trans. Design Autom. Electr. Syst. 11(3), pp. 711-739, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
Game theory, transmission lines, crosstalk noise, interconnect models, wire sizing, interconnect delay |
87 | Xiaoliang Bai, Sujit Dey |
High-level crosstalk defect Simulation methodology for system-on-chip interconnects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 23(9), pp. 1355-1361, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
87 | Tzyy-Kuen Tien, Shih-Chieh Chang, Tong-Kai Tsai |
Crosstalk alleviation for dynamic PLAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 21(12), pp. 1416-1424, 2002. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
85 | Sachin Shrivastava, Harindranath Parameswaran |
Statistical Crosstalk Noise Analysis Using First Order Parameterized Approach for Aggressor Grouping. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 9th International Symposium on Quality of Electronic Design (ISQED 2008), 17-19 March 2008, San Jose, CA, USA, pp. 445-449, 2008, IEEE Computer Society, 978-0-7695-3117-5. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
statistical crosstalk, aggressor grouping |
85 | Narender Hanchate, Nagarajan Ranganathan |
Simultaneous Interconnect Delay and Crosstalk Noise Optimization through Gate Sizing Using Game Theory. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 55(8), pp. 1011-1023, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
Game theory, gate sizing, transmission lines, crosstalk noise, interconnect models, interconnect delay |
81 | Jiaxing Sun, Yun Zheng, Qing Ye, Tianchun Ye 0001 |
Worst-Case Crosstalk Noise Analysis Based on Dual-Exponential Noise Metrics. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 18th International Conference on VLSI Design (VLSI Design 2005), with the 4th International Conference on Embedded Systems Design, 3-7 January 2005, Kolkata, India, pp. 348-353, 2005, IEEE Computer Society, 0-7695-2264-5. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
crosstalk noise metrics, peak noise window, worst-case crosstalk noise, crosstalk noise |
79 | Ferdi A. Smit, Robert van Liere, Bernd Froehlich 0001 |
Non-Uniform Crosstalk Reduction for Dynamic Scenes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VR ![In: IEEE Virtual Reality Conference, VR 2007, 10-14 March 2007, Charlotte, NC, USA, Proceedings, pp. 139-146, 2007, IEEE Computer Society, 1-4244-0905-5. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
79 | Michele Favalli, Cecilia Metra |
TMR voting in the presence of crosstalk faults at the voter inputs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Reliab. ![In: IEEE Trans. Reliab. 53(3), pp. 342-348, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
79 | Jinjun Xiong, Lei He 0001 |
Full-chip routing optimization with RLC crosstalk budgeting. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 23(3), pp. 366-377, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
79 | Tilmann Stöhr, Markus Alt, Asmus Hetzel, Jürgen Koehl |
Analysis, reduction and avoidance of crosstalk on VLSI chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPD ![In: Proceedings of the 1998 International Symposium on Physical Design, ISPD 1998, Monterey, CA, USA, April 6-8, 1998, pp. 211-218, 1998, ACM, 1-58113-021-X. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
77 | Yiyuan Xie, Mahdi Nikdast, Jiang Xu 0001, Wei Zhang 0012, Qi Li 0013, Xiaowen Wu, Yaoyao Ye, Xuan Wang 0001, Weichen Liu |
Crosstalk noise and bit error rate analysis for optical network-on-chip. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 47th Design Automation Conference, DAC 2010, Anaheim, California, USA, July 13-18, 2010, pp. 657-660, 2010, ACM, 978-1-4503-0002-5. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
optical network-on-chip, crosstalk, BER, SNR |
77 | Peng-Yang Hung, Ying-Shu Lou, Yih-Lang Li |
Minimum Shield Insertion on Full-Chip RLC Crosstalk Budgeting Routing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 9th International Symposium on Quality of Electronic Design (ISQED 2008), 17-19 March 2008, San Jose, CA, USA, pp. 514-519, 2008, IEEE Computer Society, 978-0-7695-3117-5. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Shield insertion, track routing, crosstalk optimization, global routing |
77 | Chen Yu, Yasushi Inoguchi, Susumu Horiguchi |
Overall Blocking Behavior Analysis on Banyan-Based Optical Switching Networks Under Crosstalk Constraint. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NPC ![In: Network and Parallel Computing, IFIP International Conference, NPC 2007, Dalian, China, September 18-21, 2007, Proceedings, pp. 101-113, 2007, Springer, 978-3-540-74783-3. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
vertical stacking optical banyan, degree of crosstalk, blocking probability, banyan networks, Optical switching networks |
77 | Yici Cai, Bin Liu 0007, Yan Xiong, Qiang Zhou 0001, Xianlong Hong |
Priority-Based Routing Resource Assignment Considering Crosstalk. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Comput. Sci. Technol. ![In: J. Comput. Sci. Technol. 21(6), pp. 913-921, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
track reservation, routing, VLSI, crosstalk, resource assignment |
77 | Natasha Young, Zheng Rong Yang |
Multivariate Crosstalk Models. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IDEAL ![In: Intelligent Data Engineering and Automated Learning - IDEAL 2006, 7th International Conference, Burgos, Spain, September 20-23, 2006, Proceedings, pp. 1129-1136, 2006, Springer, 3-540-45485-3. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
Multivariate models, crosstalk, systems biology |
77 | Paul Winward, David E. Goldberg |
Fluctuating crosstalk, deterministic noise, and GA scalability. ![Search on Bibsonomy](Pics/bibsonomy.png) |
GECCO ![In: Genetic and Evolutionary Computation Conference, GECCO 2006, Proceedings, Seattle, Washington, USA, July 8-12, 2006, pp. 1361-1368, 2006, ACM, 1-59593-186-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
deterministic noise, fluctuating crosstalk, genetic algorithm, scalability, problem difficulty |
77 | Hailong Yao, Yici Cai, Qiang Zhou 0001, Xianlong Hong |
Crosstalk-Aware Routing Resource Assignment. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Comput. Sci. Technol. ![In: J. Comput. Sci. Technol. 20(2), pp. 231-236, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
track/layer assignment, routing, VLSI, interconnect, physical design, crosstalk |
77 | Masanori Hashimoto, Yuji Yamada, Hidetoshi Onodera |
Capturing crosstalk-induced waveform for accurate static timing analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPD ![In: Proceedings of the 2003 International Symposium on Physical Design, ISPD 2003, Monterey, CA, USA, April 6-9, 2003, pp. 18-23, 2003, ACM, 1-58113-650-1. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
capacitive coupling noise, delay calculation, slope propagation, static timing analysis, crosstalk noise |
77 | Yajun Ran, Malgorzata Marek-Sadowska |
Crosstalk noise in FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 40th Design Automation Conference, DAC 2003, Anaheim, CA, USA, June 2-6, 2003, pp. 944-949, 2003, ACM, 1-58113-688-9. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
FPGAs, noise, crosstalk, switch box |
77 | Masanori Hashimoto, Masao Takahashi, Hidetoshi Onodera |
Crosstalk noise optimization by post-layout transistor sizing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPD ![In: Proceedings of 2002 International Symposium on Physical Design, ISPD 2002, Del Mar, CA, USA, April 7-10, 2002, pp. 126-130, 2002, ACM, 1-58113-460-6. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
capacitive coupling noise, post-layout optimization, gate sizing, transistor sizing, crosstalk noise |
70 | Waleed K. Al-Assadi, Sindhu Kakarla |
A BIST Technique for Crosstalk Noise Detection in FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 23rd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2008), 1-3 October 2008, Boston, MA, USA, pp. 167-175, 2008, IEEE Computer Society, 978-0-7695-3365-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
70 | Mini Nanua, David T. Blaauw |
Investigating Crosstalk in Sub-Threshold Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 8th International Symposium on Quality of Electronic Design (ISQED 2007), 26-28 March 2007, San Jose, CA, USA, pp. 639-646, 2007, IEEE Computer Society, 978-0-7695-2795-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
70 | Raid Ayoub, Alex Orailoglu |
A unified transformational approach for reductions in fault vulnerability, power, and crosstalk noise & delay on processor buses. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 2005 Conference on Asia South Pacific Design Automation, ASP-DAC 2005, Shanghai, China, January 18-21, 2005, pp. 729-734, 2005, ACM Press, 0-7803-8737-6. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
70 | Aniket, Ravishankar Arunachalam |
Novel Algorithm for Testing Crosstalk Induced Delay Faults in VLSI Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 18th International Conference on VLSI Design (VLSI Design 2005), with the 4th International Conference on Embedded Systems Design, 3-7 January 2005, Kolkata, India, pp. 479-484, 2005, IEEE Computer Society, 0-7695-2264-5. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
70 | Chunjie Duan, Sunil P. Khatri |
Exploiting Crosstalk to Speed up On-Chip Buse. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2004 Design, Automation and Test in Europe Conference and Exposition (DATE 2004), 16-20 February 2004, Paris, France, pp. 778-783, 2004, IEEE Computer Society, 0-7695-2085-5. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
70 | Tzyy-Kuen Tien, Tong-Kai Tsai, Shih-Chieh Chang |
Crosstalk Alleviation for Dynamic PLAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2002 Design, Automation and Test in Europe Conference and Exposition (DATE 2002), 4-8 March 2002, Paris, France, pp. 683-687, 2002, IEEE Computer Society, 0-7695-1471-5. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
70 | Xiaohong Jiang 0001, Hong Shen 0001, Md. Mamun-ur-Rashid Khandker, Susumu Horiguchi |
A New Scheme to Realize Crosstalk-free Permutations in Optical MINs with Vertical Stacking. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPAN ![In: International Symposium on Parallel Architectures, Algorithms and Networks, ISPAN 2002, May 22-24, 2002, Makati City, Metro Manila, Philippines, pp. 341-, 2002, IEEE Computer Society, 0-7695-1579-7. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
69 | Murthy Palla, Jens Bargfrede, Klaus Koch, Walter Anheier, Rolf Drechsler |
Adaptive Branch and Bound Using SAT to Estimate False Crosstalk. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 9th International Symposium on Quality of Electronic Design (ISQED 2008), 17-19 March 2008, San Jose, CA, USA, pp. 508-513, 2008, IEEE Computer Society, 978-0-7695-3117-5. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Crosstalk Analysis, False Noise, STA, SAT Solver |
69 | Ying Zhang 0040, Huawei Li 0001, Xiaowei Li 0001, Yu Hu 0001 |
Codeword Selection for Crosstalk Avoidance and Error Correction on Interconnects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 26th IEEE VLSI Test Symposium (VTS 2008), April 27 - May 1, 2008, San Diego, California, USA, pp. 377-382, 2008, IEEE Computer Society, 978-0-7695-3123-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Codeword Selection, Crosstalk Avoidance, Reliable Bus |
69 | Huawei Li 0001, Xiaowei Li 0001 |
Selection of Crosstalk-Induced Faults in Enhanced Delay Test. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 21(2), pp. 181-195, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
automatic test pattern generation (ATPG), crosstalk, delay test, critical paths |
69 | Li Chen, Xiaoliang Bai, Sujit Dey |
Testing for Interconnect Crosstalk Defects Using On-Chip Embedded Processor Cores. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 18(4-5), pp. 529-538, 2002. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
interconnect, crosstalk, processor, self-test |
69 | Paul B. Morton, Wayne Wei-Ming Dai |
Crosstalk noise estimation for noise management. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 39th Design Automation Conference, DAC 2002, New Orleans, LA, USA, June 10-14, 2002, pp. 659-664, 2002, ACM, 1-58113-461-4. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
noise management, optimal spacing, noise, estimation, crosstalk, local approximation |
69 | Steven J. E. Wilton |
A crosstalk-aware timing-driven router for FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the ACM/SIGDA International Symposium on Field Programmable Gate Arrays, FPGA 2001, Monterey, CA, USA, February 11-13, 2001, pp. 21-28, 2001, ACM, 1-58113-341-3. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
field-programmable gate arrays, routing algorithms, crosstalk |
69 | José Antonio Sainz, R. Muñoz, J. A. Maiz, L. A. Aguado, Miquel Roca 0001 |
A Crosstalk Sensor Implementation for Measuring Interferences in Digital CMOS VLSI Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IOLTW ![In: 6th IEEE International On-Line Testing Workshop (IOLTW 2000), 3-5 July 2000, Palma de Mallorca, Spain, pp. 45-51, 2000, IEEE Computer Society, 0-7695-0646-1. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
VLSI, Sensor, CMOS, Crosstalk, Digital |
69 | Dongsheng Wang 0012, Ernest S. Kuh |
A Performance-Driven MCM Router with Special Consideration of Crosstalk Reduction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 1998 Design, Automation and Test in Europe (DATE '98), February 23-26, 1998, Le Palais des Congrès de Paris, Paris, France, pp. 466-470, 1998, IEEE Computer Society, 0-8186-8359-7. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
MCM routing, crosstalk reduction |
67 | Partha Pratim Pande, Haibo Zhu, Amlan Ganguly, Cristian Grecu |
Energy Reduction through Crosstalk Avoidance Coding in NoC Paradigm. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DSD ![In: Ninth Euromicro Conference on Digital System Design: Architectures, Methods and Tools (DSD 2006), 30 August - 1 September 2006, Dubrovnik, Croatia, pp. 689-695, 2006, IEEE Computer Society, 0-7695-2609-8. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
crosstalk avoidance codes, interconnect energy, networks on chip, crosstalk, wormhole switching |
67 | Ajoy Kumar Palit, Lei Wu, Kishore K. Duganapalli, Walter Anheier, Jürgen Schlöffel |
A New, Flexible and Very Accurate Crosstalk Fault Model to Analyze the Effects of Coupling Noise between the Interconnects on Signal Integrity Losses in Deep Submicron Chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asian Test Symposium ![In: 14th Asian Test Symposium (ATS 2005), 18-21 December 2005, Calcutta, India, pp. 22-27, 2005, IEEE Computer Society, 0-7695-2481-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
crosstalk model, aggressor-victim, ABCD-model, crosstalk-hazards, signal integrity |
67 | Jens Lienig |
Channel and Switchbox Routing with Minimized Crosstalk - A Parallel Genetic Algorithm Approach. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 10th International Conference on VLSI Design (VLSI Design 1997), 4-7 January 1997, Hyderabad, India, pp. 27-31, 1997, IEEE Computer Society, 0-8186-7755-4. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
minimized crosstalk, interconnection routing, interconnection crosstalk, VLSI channel routing, VLSI switchbox routing, distributed workstation network, VLSI, VLSI design, parallel genetic algorithm |
66 | Wu-An Kuo, Yi-Ling Chiang, TingTing Hwang, Allen C.-H. Wu |
Performance-Driven Crosstalk Elimination at Postcompiler Level-The Case of Low-Crosstalk Op-Code Assignment. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26(3), pp. 564-573, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
62 | Alodeep Sanyal, Abhisek Pan, Sandip Kundu |
A study on impact of aggressor de-rating in the context of multiple crosstalk effects in circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 19th ACM Great Lakes Symposium on VLSI 2009, Boston Area, MA, USA, May 10-12 2009, pp. 529-534, 2009, ACM, 978-1-60558-522-2. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
capacitive cross-coupling, dynamic simulation., static analysis |
62 | Mini Nanua, David T. Blaauw |
Crosstalk Waveform Modeling Using Wave Fitting. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PATMOS ![In: Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation, 17th International Workshop, PATMOS 2007, Gothenburg, Sweden, September 3-5, 2007, Proceedings, pp. 211-221, 2007, Springer, 978-3-540-74441-2. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
62 | Mini Nanua, David T. Blaauw |
Receiver Modeling for Static Functional Crosstalk Analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PATMOS ![In: Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation, 16th International Workshop, PATMOS 2006, Montpellier, France, September 13-15, 2006, Proceedings, pp. 329-339, 2006, Springer, 3-540-39094-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
62 | Andrew B. Kahng, Bao Liu 0001, Xu Xu 0001 |
Statistical crosstalk aggressor alignment aware interconnect delay calculation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SLIP ![In: The Eigth International Workshop on System-Level Interconnect Prediction (SLIP 2006), Munich, Germany, March 4-5, 2006, Proceedings, pp. 91-97, 2006, ACM, 1-59593-255-0. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
62 | Kan Takeuchi, Kazumasa Yanagisawa, Takashi Sato, Kazuko Sakamoto, Saburo Hojo |
Probabilistic crosstalk delay estimation for ASICs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 23(9), pp. 1377-1383, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
62 | Wing-Kin Ma, Pak-Chung Ching, Ba-Ngu Vo |
Crosstalk resilient interference cancellation in microphone arrays using Capon beamforming. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Speech Audio Process. ![In: IEEE Trans. Speech Audio Process. 12(5), pp. 468-477, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
62 | Lin Li 0002, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin |
A Crosstalk Aware Interconnect with Variable Cycle Transmission. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2004 Design, Automation and Test in Europe Conference and Exposition (DATE 2004), 16-20 February 2004, Paris, France, pp. 102-107, 2004, IEEE Computer Society, 0-7695-2085-5. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
62 | Yi-Yu Liu, Kuo-Hua Wang, TingTing Hwang |
Crosstalk Minimization in Logic Synthesis for PLA. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2004 Design, Automation and Test in Europe Conference and Exposition (DATE 2004), 16-20 February 2004, Paris, France, pp. 790-795, 2004, IEEE Computer Society, 0-7695-2085-5. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
62 | Shahdad Irajpour, Sandeep K. Gupta 0001, Melvin A. Breuer |
Timing-Independent Testing of Crosstalk in the Presence of Delay Producing Defects Using Surrogate Fault Models. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings 2004 International Test Conference (ITC 2004), October 26-28, 2004, Charlotte, NC, USA, pp. 1024-1033, 2004, IEEE Computer Society, 0-7803-8581-0. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
62 | Madhu Mutyam |
Preventing Crosstalk Delay using Fibonacci Representation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 17th International Conference on VLSI Design (VLSI Design 2004), with the 3rd International Conference on Embedded Systems Design, 5-9 January 2004, Mumbai, India, pp. 685-688, 2004, IEEE Computer Society, 0-7695-2072-3. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
62 | Shih-Hsu Huang, Yi-Siang Hsu |
A timing driven approach for crosstalk minimization in gridded channel routing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
APCCAS (1) ![In: IEEE Asia Pacific Conference on Circuits and Systems 2002, APCCAS 2002, Singapore, 16-18 December 2002, pp. 263-266, 2002, IEEE, 0-7803-7690-0. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
62 | Janusz Konrad, Bertrand Lacotte, Eric Dubois 0002 |
Cancellation of image crosstalk in time-sequential displays of stereoscopic video. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Image Process. ![In: IEEE Trans. Image Process. 9(5), pp. 897-908, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
62 | Bruno Franzini, Cristiano Forzan, Davide Pandini, Primo Scandolara, Alessandro Dal Fabbro |
Crosstalk Aware Static Timing Analysis: A Two Step Approach. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 1st International Symposium on Quality of Electronic Design (ISQED 2000), 20-22 March 2000, San Jose, CA, USA, pp. 499-504, 2000, IEEE Computer Society, 0-7695-0525-2. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
62 | Ki-Wook Kim, Unni Narayanan, Sung-Mo Kang |
Domino logic synthesis minimizing crosstalk. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 37th Conference on Design Automation, Los Angeles, CA, USA, June 5-9, 2000., pp. 280-285, 2000, ACM. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
62 | Xiaoliang Bai, Sujit Dey, Janusz Rajski |
Self-test methodology for at-speed test of crosstalk in chip interconnects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 37th Conference on Design Automation, Los Angeles, CA, USA, June 5-9, 2000., pp. 619-624, 2000, ACM. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
60 | Yu-Ning Chang, Yih-Lang Li, Wei-Tin Lin, Wen-Nai Cheng |
Non-slicing floorplanning-based crosstalk reduction on gridless track assignment for a gridless routing system with fast pseudo-tile extraction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPD ![In: Proceedings of the 2008 International Symposium on Physical Design, ISPD 2008, Portland, Oregon, USA, April 13-16, 2008, pp. 134-141, 2008, ACM, 978-1-60558-048-7. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
crosstalk reduction, full-chip routing, gridless routing, implicit connection graph-based router, non-slicing floorplanning, detailed routing |
60 | Arthur Nieuwoudt, Jamil Kawa, Yehia Massoud |
Investigating the Impact of Fill Metal on Crosstalk-Induced Delay and Noise. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 9th International Symposium on Quality of Electronic Design (ISQED 2008), 17-19 March 2008, San Jose, CA, USA, pp. 724-729, 2008, IEEE Computer Society, 978-0-7695-3117-5. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
fill generation, crosstalk, Design for manufacturability, dummy fill |
60 | C. R. Venugopal, Prasanth Soraiyur, Jagannath Rao |
Evaluation of the PTSI Crosstalk Noise Analysis Tool and Development of an Automated Spice Correlation Suite to Enable Accuracy Validation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 9th International Symposium on Quality of Electronic Design (ISQED 2008), 17-19 March 2008, San Jose, CA, USA, pp. 334-337, 2008, IEEE Computer Society, 978-0-7695-3117-5. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Noise Propagation, Noise Immunity Curve, Crosstalk |
60 | Jae-Seok Yang, Andrew R. Neureuther |
Crosstalk Noise Variation Assessment and Analysis for the Worst Process Corner. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 9th International Symposium on Quality of Electronic Design (ISQED 2008), 17-19 March 2008, San Jose, CA, USA, pp. 352-356, 2008, IEEE Computer Society, 978-0-7695-3117-5. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
worst corner, noise, crosstalk, variation, signal integrity |
60 | Youming Li, Amir Leshem, Liming Fang |
Computationally efficient approximated matrix inversion with application to crosstalk precoding in downstream VDSL. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IWCMC ![In: Proceedings of the International Conference on Wireless Communications and Mobile Computing, IWCMC 2007, Honolulu, Hawaii, USA, August 12-16, 2007, pp. 429-433, 2007, ACM, 978-1-59593-695-0. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
crosstalk cancellation, matrix splitting, vectoring, digital subscriber line |
60 | Yi-Yu Liu, Kuo-Hua Wang, TingTing Hwang |
Crosstalk minimization in logic synthesis for PLAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Design Autom. Electr. Syst. ![In: ACM Trans. Design Autom. Electr. Syst. 11(4), pp. 890-915, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
synthesis, Crosstalk, PLA, domino logic |
60 | Shahin Nazarian, Ali Iranli, Massoud Pedram |
Crosstalk analysis in nanometer technologies. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 16th ACM Great Lakes Symposium on VLSI 2006, Philadelphia, PA, USA, April 30 - May 1, 2006, pp. 253-258, 2006, ACM, 1-59593-347-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
crosstalk-aware delay, correlation, process variations, variance, mean, statistical static timing analysis |
60 | Ajoy Kumar Palit, Kishore K. Duganapalli, Walter Anheier |
Influence of Resistive Bridging Fault on Crosstalk Coupling Effects in On-Chip Aggressor-Victim Interconnects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 21th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2006), 4-6 October 2006, Arlington, Virginia, USA, pp. 336-344, 2006, IEEE Computer Society, 0-7695-2706-X. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
defective interconnects, defect’s severity, fault model, crosstalk, bridging fault |
60 | Melvin A. Breuer, Sandeep K. Gupta 0001, Shahin Nazarian |
Efficient Identification of Crosstalk Induced Slowdown Targets. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asian Test Symposium ![In: 13th Asian Test Symposium (ATS 2004), 15-17 November 2004, Kenting, Taiwan, pp. 124-131, 2004, IEEE Computer Society, 0-7695-2235-1. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
required time, slow-down effect, filters, Crosstalk, static timing analysis, extractors |
60 | Jihong Ren, Mark R. Greenstreet |
Synthesizing optimal filters for crosstalk-cancellation for high-speed buses. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 40th Design Automation Conference, DAC 2003, Anaheim, CA, USA, June 2-6, 2003, pp. 592-597, 2003, ACM, 1-58113-688-9. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
equalizing filters, optimal synthesis, crosstalk, buses |
60 | Hai Zhou 0001, D. F. Wong 0001 |
Optimal river routing with crosstalk constraints. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Design Autom. Electr. Syst. ![In: ACM Trans. Design Autom. Electr. Syst. 3(3), pp. 496-514, 1998. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
river routing, crosstalk |
60 | Zhan Chen, Israel Koren |
Crosstalk Minimization in Three-Layer HVH Channel Routing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 1997 Workshop on Defect and Fault-Tolerance in VLSI Systems (DFT '97), 20-22 October 1997, Paris, France, pp. 38-43, 1997, IEEE Computer Society, 0-8186-8168-3. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
design for reliability, routing, crosstalk |
60 | Hai Zhou 0001, D. F. Wong 0001 |
An optimal algorithm for river routing with crosstalk constraints. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: Proceedings of the 1996 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 1996, San Jose, CA, USA, November 10-14, 1996, pp. 310-315, 1996, IEEE Computer Society / ACM, 0-8186-7597-7. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
river routing, physical design, crosstalk, detailed routing |
58 | Abby A. Ilumoka |
Efficient prediction of interconnect crosstalk using neural networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICTAI ![In: 12th IEEE International Conference on Tools with Artificial Intelligence (ICTAI 2000), 13-15 November 2000, Vancouver, BC, Canada, pp. 122-125, 2000, IEEE Computer Society, 0-7695-0909-6. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
interconnect crosstalk prediction, deep submicron downscaling, wirecells, modular artificial neural networks, multiparadigm prototyping system, equicoupling contours, isocouples, transconductance amplifier, neural networks, delays, delay, finite element method, neural nets, crosstalk, experimental results, circuit CAD, finite element analysis, circuit simulation, circuit simulator, integrated circuit interconnections, wafer-scale integration, wafer scale integration |
58 | Narender Hanchate, Nagarajan Ranganathan |
Integrated Gate and Wire Sizing at Post Layout Level. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISVLSI ![In: 2007 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2007), May 9-11, 2007, Porto Alegre, Brazil, pp. 225-232, 2007, IEEE Computer Society, 0-7695-2896-1. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
58 | Ming-Fu Hsiao, Malgorzata Marek-Sadowska, Sao-Jie Chen |
Minimizing Inter-Clock Coupling Jitter. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 4th International Symposium on Quality of Electronic Design (ISQED 2003), 24-26 March 2003, San Jose, CA, USA, pp. 333-338, 2003, IEEE Computer Society, 0-7695-1881-8. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
56 | Krishna Sekar, Sujit Dey |
LI-BIST: A Low-Cost Self-Test Scheme for SoC Logic Cores and Interconnects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 19(2), pp. 113-123, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
LI-BIST, crosstalk test, BIST, SoC test, low-power test |
54 | Hariharan Sankaran, Srinivas Katkoori |
On-chip dynamic worst-case crosstalk pattern detection and elimination for bus-based macro-cell designs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 10th International Symposium on Quality of Electronic Design (ISQED 2009), 16-18 March 2009, San Jose, CA, USA, pp. 33-39, 2009, IEEE Computer Society, 978-1-4244-2952-3. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
54 | Arash Mehdizadeh, Morteza Saheb Zamani |
Proposing an efficient method to estimate and reduce crosstalk after placement in VLSI circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AICCSA ![In: The 6th ACS/IEEE International Conference on Computer Systems and Applications, AICCSA 2008, Doha, Qatar, March 31 - April 4, 2008, pp. 61-68, 2008, IEEE Computer Society, 978-1-4244-1967-8. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
54 | Truong Quang Vinh, Young-Chul Kim 0001 |
A low power crosstalk-free bus encoding using genetic algorithm. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AICCSA ![In: The 6th ACS/IEEE International Conference on Computer Systems and Applications, AICCSA 2008, Doha, Qatar, March 31 - April 4, 2008, pp. 69-73, 2008, IEEE Computer Society, 978-1-4244-1967-8. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
54 | Yi-Yu Liu, TingTing Hwang |
Crosstalk-Aware Domino-Logic Synthesis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26(6), pp. 1155-1161, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
54 | Kunal P. Ganeshpure, Sandip Kundu |
Interactive presentation: Automatic test pattern generation for maximal circuit noise in multiple aggressor crosstalk faults. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2007 Design, Automation and Test in Europe Conference and Exposition, DATE 2007, Nice, France, April 16-20, 2007, pp. 540-545, 2007, EDA Consortium, San Jose, CA, USA, 978-3-9810801-2-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
54 | Syed Rafay Hasan, Yvon Savaria |
Crosstalk Effects in Event-Driven Self-Timed Circuits Designed With 90nm CMOS Technology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2007), 27-20 May 2007, New Orleans, Louisiana, USA, pp. 629-632, 2007, IEEE, 1-4244-0920-9. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
54 | Nahmsuk Oh, Alireza Kasnavi, Peivand F. Tehrani |
Fast Crosstalk Repair by Quick Timing Change Estimation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 8th International Symposium on Quality of Electronic Design (ISQED 2007), 26-28 March 2007, San Jose, CA, USA, pp. 176-184, 2007, IEEE Computer Society, 978-0-7695-2795-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
54 | Amit Kumar 0004, Krishnendu Chakrabarty, Chunduri Rama Mohan |
An ECO Technique for Removing Crosstalk Violations in Clock Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 20th International Conference on VLSI Design (VLSI Design 2007), Sixth International Conference on Embedded Systems (ICES 2007), 6-10 January 2007, Bangalore, India, pp. 283-288, 2007, IEEE Computer Society, 0-7695-2762-0. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
54 | Yang Shi 0001, Feng Ding 0001, Tongwen Chen |
Multirate Crosstalk Identification in xDSL Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Commun. ![In: IEEE Trans. Commun. 54(10), pp. 1878-1886, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
54 | Yi-Yu Liu, TingTing Hwang |
Crosstalk-aware domino logic synthesis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: Proceedings of the Conference on Design, Automation and Test in Europe, DATE 2006, Munich, Germany, March 6-10, 2006, pp. 1312-1317, 2006, European Design and Automation Association, Leuven, Belgium, 3-9810801-1-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
54 | Shahin Nazarian, Massoud Pedram, Sandeep K. Gupta 0001, Melvin A. Breuer |
STAX: statistical crosstalk target set compaction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE Designers' Forum ![In: Proceedings of the Conference on Design, Automation and Test in Europe: Designers' Forum, DATE 2006, Munich, Germany, March 6-10, 2006, pp. 172-177, 2006, European Design and Automation Association, Leuven, Belgium, 3-9810801-0-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
compaction degree, fault-producing target, pruning power, safe target, statistical static timing analyzer, ATPG |
54 | Wu-An Kuo, Yi-Ling Chiang, TingTing Hwang, Allen C.-H. Wu |
Performance-driven crosstalk elimination at post-compiler level. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2006), 21-24 May 2006, Island of Kos, Greece, 2006, IEEE, 0-7803-9389-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
54 | Chia-Chun Tsai, Jan-Ou Wu, Chien-Wen Kao, Trong-Yen Lee, Rong-Shue Hsiao |
Coupling aware RLC-based clock routings for crosstalk minimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2006), 21-24 May 2006, Island of Kos, Greece, 2006, IEEE, 0-7803-9389-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
54 | Hiroshi Takahashi, Keith J. Keller, Kim T. Le, Kewal K. Saluja, Yuzo Takamatsu |
A method for reducing the target fault list of crosstalk faults in synchronous sequential circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 24(2), pp. 252-263, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
54 | Chin-Hui Wang, Yung-Ching Chen, Tsai-Ming Hsieh, Chih-Hung Lee, Hsin-Hsiung Huang |
A new congestion and crosstalk aware router. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (6) ![In: International Symposium on Circuits and Systems (ISCAS 2005), 23-26 May 2005, Kobe, Japan, pp. 6234-6237, 2005, IEEE, 0-7803-8834-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
54 | Sachin Shrivastava, Sreeram Chandrasekar |
Crosstalk Noise Analysis at Multiple Frequencies. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 18th International Conference on VLSI Design (VLSI Design 2005), with the 4th International Conference on Embedded Systems Design, 3-7 January 2005, Kolkata, India, pp. 342-347, 2005, IEEE Computer Society, 0-7695-2264-5. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
54 | Suvodeep Gupta, Srinivas Katkoori, Hariharan Sankaran |
Floorplan-Based Crosstalk Estimation for Macrocell-Based Designs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 18th International Conference on VLSI Design (VLSI Design 2005), with the 4th International Conference on Embedded Systems Design, 3-7 January 2005, Kolkata, India, pp. 463-468, 2005, IEEE Computer Society, 0-7695-2264-5. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
54 | Ajoy Kumar Palit, Volker Meyer, Walter Anheier, Jürgen Schlöffel |
ABCD Modeling of Crosstalk Coupling Noise to Analyze the Signal Integrity Losses on the Victim Interconnect in DSM Chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 18th International Conference on VLSI Design (VLSI Design 2005), with the 4th International Conference on Embedded Systems Design, 3-7 January 2005, Kolkata, India, pp. 354-359, 2005, IEEE Computer Society, 0-7695-2264-5. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
54 | V. Saminadan, Meenakshi Murugappan |
In-Band Crosstalk Performance of WDM Optical Networks Under Different Routing and Wavelength Assignment Algorithms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IWDC ![In: Distributed Computing - IWDC 2005, 7th International Workshop, Kharagpur, India, December 27-30, 2005, Proceedings, pp. 159-170, 2005, Springer, 3-540-30959-4. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
54 | Di Wu 0017, Jiang Hu, Rabi N. Mahapatra, Min Zhao 0001 |
Layer assignment for crosstalk risk minimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 2004 Conference on Asia South Pacific Design Automation: Electronic Design and Solution Fair 2004, Yokohama, Japan, January 27-30, 2004, pp. 159-162, 2004, IEEE Computer Society, 0-7803-8175-0. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
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