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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 293 occurrences of 217 keywords
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Results
Found 449 publication records. Showing 449 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
136 | Evangelos P. Markatos, Manolis Katevenis |
User-Level DMA without Operating System Kernel Modification. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCA ![In: Proceedings of the 3rd IEEE Symposium on High-Performance Computer Architecture (HPCA '97), San Antonio, Texas, USA, February 1-5, 1997, pp. 322-331, 1997, IEEE Computer Society, 0-8186-7764-3. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
121 | Christian Zinner, Wilfried Kubinger |
ROS-DMA: A DMA Double Buffering Method for Embedded Image Processing with Resource Optimized Slicing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Real Time Technology and Applications Symposium ![In: 12th IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS 2006), 4-7 April 2006, San Jose, California, USA, pp. 361-372, 2006, IEEE Computer Society, 0-7695-2516-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
110 | Ben-Ami Yassour, Muli Ben-Yehuda, Orit Wasserman |
On the DMA mapping problem in direct device assignment. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SYSTOR ![In: Proceedings of of SYSTOR 2010: The 3rd Annual Haifa Experimental Systems Conference, Haifa, Israel, May 24-26, 2010, 2010, ACM, 978-1-60558-908-4. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
DMA mapping, I/O virtualization, IOMMU, IOMMU protection strategies, SR-IOV, device assignment, direct access, on-demand mapping |
96 | Matthias A. Blumrich, Cezary Dubnicki, Edward W. Felten, Kai Li 0001 |
Protected, User-Level DMA for the SHRIMP Network Interface. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCA ![In: Proceedings of the Second International Symposium on High-Performance Computer Architecture, San Jose, CA, USA, February 3-7, 1996, pp. 154-165, 1996, IEEE Computer Society, 0-8186-7237-4. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
SHRIMP network interface, User-level Direct Memory Access, DMA transfers, permission checking, virtual memory translation, operating system, computer networks, file organisation, network interfaces, DMA, address translation, computer interfaces |
90 | Antonino Tumeo, Matteo Monchiero, Gianluca Palermo, Fabrizio Ferrandi, Donatella Sciuto |
Lightweight DMA management mechanisms for multiprocessors on FPGA. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASAP ![In: 19th IEEE International Conference on Application-Specific Systems, Architectures and Processors, ASAP 2008, July 2-4, 2008, Leuven, Belgium, pp. 275-280, 2008, IEEE Computer Society, 978-1-4244-1897-8. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
83 | Tai-Yi Huang, Jane W.-S. Liu, David Hull |
A Method for Bounding the Effect of DMA I/O Interference on Program Execution Time. ![Search on Bibsonomy](Pics/bibsonomy.png) |
RTSS ![In: Proceedings of the 17th IEEE Real-Time Systems Symposium (RTSS '96), December 4-6, 1996, Washington, DC, USA, pp. 275-285, 1996, IEEE Computer Society, 0-8186-7689-2. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
DMA I/O operation, program execution time, DMA controller, cycle-stealing mode, bus cycles, cycle stealing operation, executing program, machine instruction, instruction-cache architectures, input output operation, simulations, real-time systems, worst-case execution time, data transfer |
80 | Francesca Palumbo, Danilo Pani, Alessandro Pilia, Luigi Raffo |
Impact of Half-Duplex and Full-Duplex DMA Implementations on NoC Performance. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NOCS ![In: NOCS 2010, Fourth ACM/IEEE International Symposium on Networks-on-Chip, Grenoble, France, May 3-6, 2010, pp. 249-256, 2010, IEEE Computer Society, 978-0-7695-4053-5. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
full-duplex DMA, half-duplex DMA, hybrid switching NoC, DMA performance bias, deadlock prevention |
78 | Vivek Pandey, Weihang Jiang, Yuanyuan Zhou 0001, Ricardo Bianchini |
DMA-aware memory energy management. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCA ![In: 12th International Symposium on High-Performance Computer Architecture, HPCA-12 2006, Austin, Texas, USA, February 11-15, 2006, pp. 133-144, 2006, IEEE Computer Society, 0-7803-9368-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
78 | Adeoye Olugbon, Sami Khawam, Tughrul Arslan, Ioannis Nousias, Iain Lindsay |
An AMBA AHB-based reconfigurable SOC architecture using multiplicity of dedicated flyby DMA blocks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 2005 Conference on Asia South Pacific Design Automation, ASP-DAC 2005, Shanghai, China, January 18-21, 2005, pp. 1256-1259, 2005, ACM Press, 0-7803-8737-6. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
78 | Andrea Santoro, Francesco Quaglia |
PCI-DMA/CPU Handoff for Increased Effectiveness of Checkpointing Functionalities in CCL. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DS-RT ![In: 7th IEEE International Symposium on Distributed Simulation and Real-Time Applications (DS-RT 2003), 23-25 October 2003, Delft, The Netherlands, pp. 120-127, 2003, IEEE Computer Society, 0-7695-2036-7. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
70 | Tao Liu, Haibo Lin, Tong Chen 0001, Kevin O'Brien, Ling Shao 0002 |
DBDB: optimizing DMATransfer for the cell be architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICS ![In: Proceedings of the 23rd international conference on Supercomputing, 2009, Yorktown Heights, NY, USA, June 8-12, 2009, pp. 36-45, 2009, ACM, 978-1-60558-498-0. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
loop blocking, local memory, multi-core system |
70 | Alexander A. Hagin, Gabriel Dermler, Kurt Rothermel, Gennadij Shchemelev |
Distributed Multimedia Application Configuration Management. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 11(7), pp. 669-682, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
configuration management, assignment, resource reservation, Distributed multimedia application, QoS negotiation |
66 | Guillermo Payá Vayá, Javier Martín-Langerwerf, Sören Moch, Peter Pirsch |
An Enhanced DMA Controller in SIMD Processors for Video Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ARCS ![In: Architecture of Computing Systems - ARCS 2009, 22nd International Conference, Delft, The Netherlands, March 10-13, 2009. Proceedings, pp. 159-170, 2009, Springer, 978-3-642-00453-7. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
66 | Theo Kluter, Philip Brisk, Paolo Ienne, Edoardo Charbon |
Speculative DMA for architecturally visible storage in instruction set extensions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CODES+ISSS ![In: Proceedings of the 6th International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2008, Atlanta, GA, USA, October 19-24, 2008, pp. 243-248, 2008, ACM, 978-1-60558-470-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
architecturally visible storage, speculative direct memory access, instruction set extensions, application-specific processors |
66 | Tai-Yi Huang, Chih-Chieh Chou, Po-Yuan Chen |
Bounding the Execution Times of DMA I/O Tasks on Hard-Real-Time Embedded Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
RTCSA ![In: Real-Time and Embedded Computing Systems and Applications, 9th International Conference, RTCSA 2003, Tainan, Taiwan, February 18-20, 2003. Revised Papers, pp. 499-512, 2003, Springer, 3-540-21974-9. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
56 | Francesco Quaglia, Andrea Santoro |
Modeling and optimization of non-blocking checkpointing for optimistic simulation on myrinet clusters. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICS ![In: Proceedings of the 17th Annual International Conference on Supercomputing, ICS 2003, San Francisco, CA, USA, June 23-26, 2003, pp. 130-139, 2003, ACM, 1-58113-733-8. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
checkpointing, performance optimization, DMA, optimistic simulation |
55 | Aristidis Sotiropoulos, Georgios Tsoukalas, Nectarios Koziris |
Enhancing the Performance of Tiled Loop Execution onto Clusters Using Memory Mapped Network Interfaces and Pipelined Schedules. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 16th International Parallel and Distributed Processing Symposium (IPDPS 2002), 15-19 April 2002, Fort Lauderdale, FL, USA, CD-ROM/Abstracts Proceedings, 2002, IEEE Computer Society, 0-7695-1573-8. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
Memory Mapped Interfaces, Zero-Copy Protocols, DMA transfers, Loop Tiling, Communication Overlapping |
55 | Sayaka Shida, Yuichiro Shibata, Kiyoshi Oguri, Duncan A. Buell |
An optimization method of DMA transfer for a general purpose reconfigurable machine. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: FPL 2008, International Conference on Field Programmable Logic and Applications, Heidelberg, Germany, 8-10 September 2008, pp. 647-650, 2008, IEEE, 978-1-4244-1961-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
46 | Tong Zhao, Yueming Lu, Yuefeng Ji |
Least Interference Optimization Based Dynamic Multi-path Routing Algorithm in ASON. ![Search on Bibsonomy](Pics/bibsonomy.png) |
APNOMS ![In: Challenges for Next Generation Network Operations and Service Management, 11th Asia-Pacific Network Operations and Management Symposium, APNOMS 2008, Beijing, China, October 22-24, 2008. Proceedings, pp. 441-444, 2008, Springer, 978-3-540-88622-8. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
routing, load balance, interference, ASON |
46 | Francesco Quaglia, Andrea Santoro, Bruno Ciciani |
Tuning of the Checkpointing and Communication Library for Optimistic Simulation on Myrinet Based NOWs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MASCOTS ![In: 9th International Workshop on Modeling, Analysis, and Simulation of Computer and Telecommunication Systems (MASCOTS 2001), 15-18 August 2001, Cincinnati, OH, USA, pp. 241-248, 2001, IEEE Computer Society, 0-7695-1315-8. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
43 | Vaibhav Saxena, Prashant Agrawal, Yogish Sabharwal, Vijay K. Garg, Vimitha A. Kuruvilla, John A. Gunnels |
Optimization of BLAS on the Cell Processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HiPC ![In: High Performance Computing - HiPC 2008, 15th International Conference, Bangalore, India, December 17-20, 2008. Proceedings, pp. 18-29, 2008, Springer, 978-3-540-89893-1. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Direct Memory Access (DMA), multi-core, linear algebra, BLAS, Cell processor |
43 | Daniel Jiménez-González, Xavier Martorell, Alex Ramírez |
Performance Analysis of Cell Broadband Engine for High Memory Bandwidth Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPASS ![In: 2007 IEEE International Symposium on Performance Analysis of Systems and Software, April 25-27, 2007, San Jose, California, USA, Proceedings, pp. 210-219, 2007, IEEE Computer Society, 1-4244-1081-9. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
arithmetic performance analysis, memory bandwidth application, synergistic processor element, DMA controller, direct memory access, element interconnect bus, bandwidth performance peak, processor component, message passing interface, data stream, single instruction multiple data, cell broadband engine, streaming programming model, processor speed |
43 | Shaoshan Liu, Richard Neil Pittman, Alessandro Forin |
Minimizing partial reconfiguration overhead with fully streaming DMA engines and intelligent ICAP controller (abstract only). ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the ACM/SIGDA 18th International Symposium on Field Programmable Gate Arrays, FPGA 2010, Monterey, California, USA, February 21-23, 2010, pp. 292, 2010, ACM, 978-1-60558-911-4. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
fpga, partial reconfiguration |
43 | Tong Chen 0001, Zehra Sura, Kathryn M. O'Brien, John K. O'Brien |
Optimizing the Use of Static Buffers for DMA on a CELL Chip. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LCPC ![In: Languages and Compilers for Parallel Computing, 19th International Workshop, LCPC 2006, New Orleans, LA, USA, November 2-4, 2006. Revised Papers, pp. 314-329, 2006, Springer, 978-3-540-72520-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
43 | Mattias O'Nils, Axel Jantsch |
Synthesis of DMA Controllers from Architecture Independent Descriptions of HW/SW Communication Protocols. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 12th International Conference on VLSI Design (VLSI Design 1999), 10-13 January 1999, Goa, India, pp. 138-145, 1999, IEEE Computer Society, 0-7695-0013-7. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
41 | Wen Su, Ling Wang, Menghao Su, Su Liu |
A Processor-DMA-Based Memory Copy Hardware Accelerator. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NAS ![In: Sixth International Conference on Networking, Architecture, and Storage, NAS 2011, Dalian, China, 28-30 July, 2011, pp. 225-229, 2011, IEEE Computer Society, 978-1-4577-1172-5. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
memory copy, accelerator, processor, DMA |
40 | Won Jun Lee, Chang Hyun Kim, Yoonah Paik, Seon Wook Kim |
PISA-DMA: Processing-in-Memory Instruction Set Architecture Using DMA. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Access ![In: IEEE Access 11, pp. 8622-8632, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
40 | Jan Kubálek, Jakub Cabal, Martin Spinler, Radek Isa |
DMA Medusa: A Vendor-Independent FPGA-Based Architecture for 400 Gbps DMA Transfers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FCCM ![In: 29th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, FCCM 2021, Orlando, FL, USA, May 9-12, 2021, pp. 258, 2021, IEEE, 978-1-6654-3555-0. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
40 | Jinbin Zhu, Limin Xiao, Liang Wang 0020, Guangjun Qin, Rui Zhang, Yuting Liu, Zhonglin Liu |
UPM-DMA: An Efficient Userspace DMA-Pinned Memory Management Strategy for NVMe SSDs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICA3PP (1) ![In: Algorithms and Architectures for Parallel Processing - 21st International Conference, ICA3PP 2021, Virtual Event, December 3-5, 2021, Proceedings, Part I, pp. 257-270, 2021, Springer, 978-3-030-95383-6. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
40 | Sheng Ma, Yuanwu Lei, Libo Huang, Zhiying Wang 0003 |
MT-DMA: A DMA Controller Supporting Efficient Matrix Transposition for Digital Signal Processing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Access ![In: IEEE Access 7, pp. 5808-5818, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
40 | Nikola Vujic, Lluc Alvarez, Marc González 0001, Xavier Martorell, Eduard Ayguadé |
DMA-circular: an enhanced high level programmable DMA controller for optimized management of on-chip local memories. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Conf. Computing Frontiers ![In: Proceedings of the Computing Frontiers Conference, CF'12, Caligari, Italy - May 15 - 17, 2012, pp. 113-122, 2012, ACM, 978-1-4503-1215-8. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
40 | Carsten F. Ball, Kolio Ivanov, Robert Müllner, Hubert Winkler |
SI2R-DMA: self-organizing inter- and intra-site interference reduction DMA for GERAN networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PIMRC ![In: Proceedings of the IEEE 15th International Symposium on Personal, Indoor and Mobile Radio Communications, PIMRC 2004, 5-8 September 2004, Barcelona, Spain, pp. 1193-1198, 2004, IEEE. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
35 | Thomas Fischer 0003, Kerstin Bauer, Peter Merz |
Solving the routing and wavelength assignment problem with a multilevel distributed memetic algorithm. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Memetic Comput. ![In: Memetic Comput. 1(2), pp. 101-123, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
Routing and wavelength assignment problem, Multilevel approach, Memetic algorithms, Iterated local search |
35 | Yanqin Yang, Zili Shao, Linfeng Pan, Minyi Guo |
ISOS: Space Overlapping Based on Iteration Access Patterns for Dynamic Scratch-pad Memory Management in Embedded Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICYCS ![In: Proceedings of the 9th International Conference for Young Computer Scientists, ICYCS 2008, Zhang Jia Jie, Hunan, China, November 18-21, 2008, pp. 1360-1366, 2008, IEEE Computer Society, 978-0-7695-3398-8. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
35 | Michael Gschwind |
Optimizing data sharing and address translation for the Cell BE Heterogeneous Chip Multiprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 26th International Conference on Computer Design, ICCD 2008, 12-15 October 2008, Lake Tahoe, CA, USA, Proceedings, pp. 478-485, 2008, IEEE Computer Society, 978-1-4244-2657-7. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
35 | Miguel Peón Quirós, Alexandros Bartzas, Stylianos Mamagkakis, Francky Catthoor, Jose Manuel Mendias, Dimitrios Soudris |
Direct Memory Access Optimization in Wireless Terminals for Reduced Memory Latency and Energy Consumption. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PATMOS ![In: Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation, 17th International Workshop, PATMOS 2007, Gothenburg, Sweden, September 3-5, 2007, Proceedings, pp. 373-383, 2007, Springer, 978-3-540-74441-2. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
35 | Amitava Biswas, Purnendu Sinha |
On improving performance of Network Intrusion Detection Systems by efficient packet capturing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NOMS ![In: Management of Integrated End-to-End Communications and Services, 10th IEEE/IFIP Network Operations and Management Symposium, NOMS 2006, Vancouver, Canada, April 3-7, 2006. Proceedings, 2006, IEEE, 1-4244-0143-7. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
35 | Zheng Wan |
An Efficient Dynamic Multicast Protocol for Mobile IPv6 Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LCN ![In: LCN 2006, The 31st Annual IEEE Conference on Local Computer Networks, Tampa, Florida, USA, 14-16 November 2006, pp. 913-920, 2006, IEEE Computer Society, 1-4244-0418-5. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
35 | Kuan Jen Lin, Chuang Hsiang Huang, Cheng Chia Lo |
Design and Implementation of a Schedulable DMAC on an AMBA-Based SOPC Platform. ![Search on Bibsonomy](Pics/bibsonomy.png) |
APCCAS ![In: IEEE Asia Pacific Conference on Circuits and Systems 2006, APCCAS 2006, Singapore, 4-7 December 2006, pp. 279-282, 2006, IEEE, 1-4244-0387-1. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
35 | Francesco Quaglia, Andrea Santoro |
CCL v3.0: Multiprogrammed Semi-Asynchronous Checkpoints. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PADS ![In: Proceedings of the 17th Workshop on Parallel and Distributed Simulation, PADS 2003, June 10-13, 2003, San Diego, CA, USA, pp. 21-30, 2003, IEEE Computer Society, 0-7695-1970-9. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
35 | Tai-Yi Huang, Jane W.-S. Liu, Jen-Yao Chung |
Allowing cycle-stealing direct memory access I/O concurrent with hard-real-time programs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICPADS ![In: 1996 International Conference on Parallel and Distributed Systems (ICPADS '96), June 3-6, 1996, Tokyo, Japan, Proceedings, pp. 422-429, 1996, IEEE Computer Society, 0-8186-7267-6. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
cycle-stealing direct memory access, I/O concurrent, hard-real-time programs, bus cycles, straight-line sequence, cycle-stealing operations, real-time systems, fault tolerant computing, worst-case execution time, schedulability analysis, file organisation |
35 | David A. Hartley, David M. Harvey |
Analysis of the TMS320C40 Communication Channels Using Timed Petri Nets. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Application and Theory of Petri Nets ![In: Application and Theory of Petri Nets 1993, 14th International Conference, Chicago, Illinois, USA, June 21-25, 1993, Proceedings, pp. 562-571, 1993, Springer, 3-540-56863-8. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP DOI BibTeX RDF |
|
33 | Ahsan Shabbir, Sander Stuijk, Akash Kumar 0001, Bart D. Theelen, Bart Mesman, Henk Corporaal |
A predictable communication assist. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Conf. Computing Frontiers ![In: Proceedings of the 7th Conference on Computing Frontiers, 2010, Bertinoro, Italy, May 17-19, 2010, pp. 97-98, 2010, ACM, 978-1-4503-0044-5. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
fpga's, communication, predictable, dma, ca, mp-soc |
33 | Tong Chen 0001, Tao Zhang, Zehra Sura, Marc González Tallada |
Prefetching irregular references for software cache on cell. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CGO ![In: Sixth International Symposium on Code Generation and Optimization (CGO 2008), April 5-9, 2008, Boston, MA, USA, pp. 155-164, 2008, ACM, 978-1-59593-978-4. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
prefetch, DMA, software cache |
33 | Mountassar Maamoun, Boualem Laichi, Abdelhalim Benbelkacem, Daoud Berkani |
Interfacing in Microprocessor-based Systems with an Advanced Physical Addressing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IWSOC ![In: Proceedings of the 4th IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC'04), 19-21 July 2004, Banff, Alberta, Canada, pp. 243-246, 2004, IEEE Computer Society, 0-7695-2182-7. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
Software/Hardware system, Advanced Physical Addressing, memory integration, Interfacing, DMA |
33 | Mountassar Maamoun, Abdelhalim Benbelkacem, Daoud Berkani, Abderrezak Guessoum |
Interfacing in Microprocessor-based Systems with a Fast Physical Addressing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IWSOC ![In: Proceedings of the 3rd IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC'03), 30 June - 2 July 2003, Calgary, Alberta, Canada, pp. 144-149, 2003, IEEE Computer Society, 0-7695-1944-X. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
Software/hardware System, Fast Physical Addressing, Interfacing, DMA |
33 | Maria Athanasaki, Aristidis Sotiropoulos, Georgios Tsoukalas, Nectarios Koziris |
Pipelined scheduling of tiled nested loops onto clusters of SMPs using memory mapped network interfaces. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SC ![In: Proceedings of the 2002 ACM/IEEE conference on Supercomputing, Baltimore, Maryland, USA, November 16-22, 2002, CD-ROM, pp. 41:1-41:13, 2002, IEEE Computer Society, 0-7695-1524-X. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
memory mapped network interfaces, tile grouping, SMPs, DMA, pipelined schedules, communication overlapping |
33 | Jiun-Ming Hsu, Prithviraj Banerjee |
Performance Measurement and Trace Driven Simulation of Parallel CAD and Numeric Applications on a Hypercube Multicomputer. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 3(4), pp. 451-464, 1992. The full citation details ...](Pics/full.jpeg) |
1992 |
DBLP DOI BibTeX RDF |
parallel CAD, realistic workloads, time interval distributions, statistical functions, nonlinear regression technique, message destinations, trace-drive simulation environment, performance evaluation, performance evaluation, parallel programs, parallel programming, benchmarks, statistical analysis, hypercube networks, digital simulation, workload characterization, execution traces, temporal locality, spatial locality, hypercube multicomputer, software monitoring, DMA, message length, link utilizations |
32 | Sufian Sudeng, Arthit Thongtak |
Template Based: A Novel STG Based Logic Synthesis for Asynchronous Control Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
World Congress on Engineering (Selected Papers) ![In: Advances in Electrical Engineering and Computational Science, [revised and extended papers from the World Congress on Engineering, WCE 2008, London, UK, July 2-4, 2008], pp. 59-74, 2008, Springer, 978-90-481-2310-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
asynchronous control circuits, asynchronous DMA controller, template based technique, logic synthesis, Signal Transition Graph (STG) |
32 | Atsushi Hatabu, Takashi Miyazaki, Ichiro Kuroda |
QVGA/CIF Resolution MPEG-4 Video Codec Based on a Low-Power and General-Purpose DSP. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. VLSI Signal Process. ![In: J. VLSI Signal Process. 39(1-2), pp. 7-14, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
PD77210, successive similarity detection algorithm (SSDA), DMA queue, low power, motion estimation, DSP, MPEG-4, computational cost |
32 | Ken Yocum, Jeffrey S. Chase, Andrew J. Gallatin, Alvin R. Lebeck |
Cut-Through Delivery in Trapeze: An Exercise in Low-Latency Messaging. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPDC ![In: Proceedings of the 6th International Symposium on High Performance Distributed Computing, HPDC '97, Portland, OR, USA, August 5-8, 1997., pp. 243-252, 1997, IEEE Computer Society, 0-8186-8117-9. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
message switching, cut-through delivery, low-latency messaging, I/O bus bandwidths, host I/O DMA transfers, network traversal, messaging substrate, network memory, Trapeze prototype, virtual memory pages, Myrinet cluster, DEC AlphaStations, network interfaces, computer clusters, network technology, application performance, messaging systems |
32 | Chiung-San Lee, Tai-Ming Parng |
A Subsystem-Oriented Performance Analysis Methodology for Shared-Bus Multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 7(7), pp. 755-767, 1996. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
Bottleneck analysis, DMA transfer, separated address bus and data bus, shared-bus multiprocessor system, subsystem access time modeling, subsystem interferences, performance analysis |
32 | Eric M. Dowling, Zuqiang Fu, Ron S. Drafz |
HARP: An Open Architecture for Parallel Matrix and Signal Processing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 4(10), pp. 1081-1091, 1993. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP DOI BibTeX RDF |
HARP, matrix processing, Hybrid Array RingProcessor, memory mapped processing cells, open backplane, bidirectional systolic ring, bus controller, DMA function, systolic communication, reduced overhead message passing, digital signalprocessor, systolicarray, parallel algorithms, parallel, parallel architectures, multiprocessor, shared memory, signal processing, signal processing, systolic arrays, shared memory systems, interprocessor communication, open architecture, Application specific architecture |
31 | Latchesar Ionkov, Aki Nyrhinen, Andrey Mirtchovski |
CellFS: Taking the "DMA" out of Cell programming. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 23rd IEEE International Symposium on Parallel and Distributed Processing, IPDPS 2009, Rome, Italy, May 23-29, 2009, pp. 1-8, 2009, IEEE. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
31 | Roberto Giorgi, Zdravko Popovic, Nikola Puzovic |
Exploiting DMA to enable non-blocking execution in Decoupled Threaded Architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 23rd IEEE International Symposium on Parallel and Distributed Processing, IPDPS 2009, Rome, Italy, May 23-29, 2009, pp. 1-8, 2009, IEEE. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
31 | Claudio Brunelli, Fabio Garzia, Carmelo Giliberto, Jari Nurmi |
A dedicated DMA logic addressing a time multiplexed memory to reduce the effects of the system bus bottleneck. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: FPL 2008, International Conference on Field Programmable Logic and Applications, Heidelberg, Germany, 8-10 September 2008, pp. 487-490, 2008, IEEE, 978-1-4244-1961-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
31 | Christof Pitter, Martin Schoeberl |
Time Predictable CPU and DMA Shared Memory Access. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: FPL 2007, International Conference on Field Programmable Logic and Applications, Amsterdam, The Netherlands, 27-29 August 2007, pp. 317-322, 2007, IEEE, 1-4244-1060-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
31 | Minas Dasygenis, Erik Brockmeyer, Bart Durinck, Francky Catthoor, Dimitrios Soudris, Adonios Thanailakis |
A combined DMA and application-specific prefetching approach for tackling the memory latency bottleneck. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 14(3), pp. 279-291, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
31 | Zhan Shi, Jiangling Zhang, Xinrong Zhou |
Using DMA Aligned Buffer to Improve Software RAID Performance. ![Search on Bibsonomy](Pics/bibsonomy.png) |
International Conference on Computational Science ![In: Computational Science - ICCS 2004, 4th International Conference, Kraków, Poland, June 6-9, 2004, Proceedings, Part III, pp. 355-362, 2004, Springer, 3-540-22116-6. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
31 | Christian Bell, Dan Bonachea |
A New DMA Registration Strategy for Pinning-Based High Performance Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 17th International Parallel and Distributed Processing Symposium (IPDPS 2003), 22-26 April 2003, Nice, France, CD-ROM/Abstracts Proceedings, pp. 198, 2003, IEEE Computer Society, 0-7695-1926-1. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
31 | Dave Comisky, Sanjive Agarwala, Charles Fuoco |
A Scalable High-Performance DMA Architecture for DSP Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: Proceedings of the IEEE International Conference On Computer Design: VLSI In Computers & Processors, ICCD '00, Austin, Texas, USA, September 17-20, 2000, pp. 414-419, 2000, IEEE Computer Society, 0-7695-0801-4. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
23 | Yanqin Yang, Meng Wang 0005, Zili Shao, Minyi Guo |
Dynamic Scratch-Pad Memory Management with Data Pipelining for Embedded Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CSE (2) ![In: Proceedings of the 12th IEEE International Conference on Computational Science and Engineering, CSE 2009, Vancouver, BC, Canada, August 29-31, 2009, pp. 358-365, 2009, IEEE Computer Society, 978-1-4244-5334-4. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
23 | Xuejun Sha, Rong-hui Wen, Xin Qiu |
A new multiple-access method based on Fractional Fourier Transform. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CCECE ![In: Proceedings of the 22nd Canadian Conference on Electrical and Computer Engineering, CCECE 2009, 3-6 May 2009, Delta St. John's Hotel and Conference Centre, St. John's, Newfoundland, Canada, pp. 856-859, 2009, IEEE, 978-1-4244-3508-1. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
23 | Chih-Lun Fang, Tsung-Han Tsai 0001, Ren-Chih Kuo |
Design and Implementation of a Videotext Extractor on Dual-Core Platform. ![Search on Bibsonomy](Pics/bibsonomy.png) |
APSCC ![In: Proceedings of the 3rd IEEE Asia-Pacific Services Computing Conference, APSCC 2008, Yilan, Taiwan, 9-12 December 2008, pp. 896-900, 2008, IEEE Computer Society, 978-0-7695-3473-2. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
23 | Roberto Jung Drebes, Takashi Nanya |
Limitations of the Linux Fault Injection Framework to Test Direct Memory Access Address Errors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PRDC ![In: 14th IEEE Pacific Rim International Symposium on Dependable Computing, PRDC 2008, 15-17 December 2008, Taipei, Taiwan, pp. 146-152, 2008, IEEE Computer Society, 978-0-7695-3448-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
23 | Kevin O'Brien, Kathryn M. O'Brien, Zehra Sura, Tong Chen 0001, Tao Zhang |
Supporting OpenMP on Cell. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IWOMP ![In: A Practical Programming Model for the Multi-Core Era, 3rd International Workshop on OpenMP, IWOMP 2007, Beijing, China, June 3-7, 2007, Proceedings, pp. 65-76, 2007, Springer, 978-3-540-69302-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
23 | Hristo Nikolov, Todor P. Stefanov, Ed F. Deprettere |
Efficient External Memory Interface for Multi-processor Platforms Realized on FPGA Chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: FPL 2007, International Conference on Field Programmable Logic and Applications, Amsterdam, The Netherlands, 27-29 August 2007, pp. 580-584, 2007, IEEE, 1-4244-1060-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
23 | Navneeth Kankani, Vineet Agarwal, Janet Meiling Wang |
A probabilistic analysis of pipelined global interconnect under process variations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, Yokohama, Japan, January 24-27, 2006, pp. 724-729, 2006, IEEE, 0-7803-9451-8. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
23 | Satish Narayanasamy, Cristiano Pereira, Harish Patil, Robert Cohn, Brad Calder |
Automatic logging of operating system effects to guide application-level architecture simulation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SIGMETRICS/Performance ![In: Proceedings of the Joint International Conference on Measurement and Modeling of Computer Systems, SIGMETRICS/Performance 2006, Saint Malo, France, June 26-30, 2006, pp. 216-227, 2006, ACM, 1-59593-319-0. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
emulating system calls, checkpoints, architecture simulation |
23 | Qian Wu, Jianping Wu, Mingwei Xu, Yong Cui 0001, Hui Deng |
An Agent-Based Scheme for Efficient Multicast Application in Mobile Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCIS ![In: Computer and Information Sciences - ISCIS 2005, 20th International Symposium, Istanbul, Turkey, October 26-28, 2005, Proceedings, pp. 23-32, 2005, Springer, 3-540-29414-7. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
23 | Giuseppe Ciaccio |
Using a Self-connected Gigabit Ethernet Adapter as a memcpy() Low-Overhead Engine for MPI. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PVM/MPI ![In: Recent Advances in Parallel Virtual Machine and Message Passing Interface,10th European PVM/MPI Users' Group Meeting, Venice, Italy, September 29 - October 2, 2003, Proceedings, pp. 247-256, 2003, Springer, 3-540-20149-1. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
23 | Sumesh Udayakumaran, Rajeev Barua |
Compiler-decided dynamic memory allocation for scratch-pad based embedded systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the International Conference on Compilers, Architectures and Synthesis for Embedded Systems, CASES 2003, San Jose, California, USA, October 30 - November 1, 2003, pp. 276-286, 2003, ACM, 1-58113-676-5. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
embedded systems, compiler, memory allocation, scratch-pad |
23 | Khaled Salah 0001, K. El-Badawi |
Evaluating System Performance in Gigabit Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LCN ![In: 28th Annual IEEE Conference on Local Computer Networks (LCN 2003), The Conference on Leading Edge and Practical Computer Networking, 20-24 October 2003, Bonn/Königswinter, Germany, Proceedings, pp. 498-, 2003, IEEE Computer Society, 0-7695-2037-5. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
23 | Francesco Quaglia, Andrea Santoro, Bruno Ciciani |
Conditional checkpoint abort: an alternative semantic for re-synchronization in CCL. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PADS ![In: Proceedings of the 16th Workshop on Parallel and Distributed Simulation, PADS 2002, Washington, D.C., USA, May 12-15, 2002, pp. 143-150, 2002, IEEE Computer Society, 0-7695-1608-4. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
Rollback Based Synchronization, Checkpointing, Performance Optimization, Optimistic Simulation |
23 | Aristidis Sotiropoulos, Georgios Tsoukalas, Nectarios Koziris |
Efficient Utilization of Memory Mapped NICs onto Clusters using Pipelined Schedules. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CCGRID ![In: 2nd IEEE International Symposium on Cluster Computing and the Grid (CCGrid 2002), 22-24 May 2002, Berlin, Germany, pp. 238-246, 2002, IEEE Computer Society, 0-7695-1582-7. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
23 | Sidney Cadot, Frits Kuijlman, Koen Langendoen, Kees van Reeuwijk, Henk J. Sips |
ENSEMBLE: A Communication Layer for Embedded Multi-Processor Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LCTES/OM ![In: Proceedings of The Workshop on Languages, Compilers, and Tools for Embedded Systems (LCTES 2001), June 22-23, 2001 / The Workshop on Optimization of Middleware and Distributed Systems (OM 2001), June 18, 2001, Snowbird, Utah, USA, pp. 56-63, 2001, ACM, 1-58113-425-8. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
23 | Adam Smyk, Marek Tudruj |
Inter-Process Communication for Parallel Computations of Wavelet Transforms on Hitachi SR2201 Supercomputer. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: 2000 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2000), 27-30 August 2000, Quebec, Canada, pp. 248-252, 2000, IEEE Computer Society, 0-7695-0759-X. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
21 | David Szczesny, Sebastian Hessel, Felix Bruns, Attila Bilgic |
On-the-fly hardware acceleration for protocol stack processing in next generation mobile devices. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CODES+ISSS ![In: Proceedings of the 7th International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2009, Grenoble, France, October 11-16, 2009, pp. 155-162, 2009, ACM, 978-1-60558-628-1. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
embedded systems, real-time, hardware acceleration, virtual prototyping, hardware/software co-design, LTE, DMA |
21 | Xiandong Meng, Vipin Chaudhary |
An adaptive data prefetching scheme for biosequence database search on reconfigurable platforms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SAC ![In: Proceedings of the 2007 ACM Symposium on Applied Computing (SAC), Seoul, Korea, March 11-15, 2007, pp. 140-141, 2007, ACM, 1-59593-480-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
FPGA, data prefetching, DMA, Smith-Waterman algorithm |
21 | Satish Narayanasamy, Gilles Pokam, Brad Calder |
BugNet: Recording Application-Level Execution for Deterministic Replay Debugging. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Micro ![In: IEEE Micro 26(1), pp. 100-109, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
BugNet, debugging, DMA |
21 | Francesco Poletti, Paul Marchal, David Atienza, Luca Benini, Francky Catthoor, Jose Manuel Mendias |
An integrated hardware/software approach for run-time scratchpad management. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 41th Design Automation Conference, DAC 2004, San Diego, CA, USA, June 7-11, 2004, pp. 238-243, 2004, ACM, 1-58113-828-8. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
AMBA AHB, scratchpad, DMA, dynamic allocation |
21 | Francesco Quaglia, Andrea Santoro |
Nonblocking Checkpointing for Optimistic Parallel Simulation: Description and an Implementation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 14(6), pp. 593-610, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
checkpointing, performance optimization, Parallel discrete-event simulation, myrinet, DMA, optimistic synchronization |
20 | J. Lakshmi, S. K. Nandy 0001 |
I/O Virtualization Architecture for Security. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CIT ![In: 10th IEEE International Conference on Computer and Information Technology, CIT 2010, Bradford, West Yorkshire, UK, June 29-July 1, 2010, pp. 2267-2272, 2010, IEEE Computer Society, 978-0-7695-4108-2. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
I/O virtualization, unconstrained DMA, security threats, denial of service attack |
20 | Takahiro Shinagawa, Hideki Eiraku, Kouichi Tanimoto, Kazumasa Omote, Shoichi Hasegawa, Takashi Horie, Manabu Hirano, Kenichi Kourai, Yoshihiro Oyama, Eiji Kawai, Kenji Kono, Shigeru Chiba, Yasushi Shinjo, Kazuhiko Kato |
BitVisor: a thin hypervisor for enforcing i/o device security. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VEE ![In: Proceedings of the 5th International Conference on Virtual Execution Environments, VEE 2009, Washington, DC, USA, March 11-13, 2009, pp. 121-130, 2009, ACM, 978-1-60558-375-4. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
parapass-through, shadow dma descriptor, virtual machine monitors, hypervisors, trusted computing base |
20 | Yufeng Guo, Qiong Li, Guangming Liu, Yusheng Cao, Lei Zhang |
A Distributed Shared Parallel IO System for HPC. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITNG ![In: Fifth International Conference on Information Technology: New Generations (ITNG 2008), 7-8 April 2008, Las Vegas, Nevada, USA, pp. 229-234, 2008, IEEE Computer Society, 978-0-7695-3099-4. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Distributed Shared IO system, Remote DMA, Parallel filesystem, HPC |
20 | Manolis Marazakis, Konstantinos Xinidis, Vassilis Papaefstathiou, Angelos Bilas |
Efficient remote block-level I/O over an RDMA-capable NIC. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICS ![In: Proceedings of the 20th Annual International Conference on Supercomputing, ICS 2006, Cairns, Queensland, Australia, June 28 - July 01, 2006, pp. 97-106, 2006, ACM, 1-59593-282-8. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
block-level I/O, remote DMA, performance evaluation, networked storage |
20 | Adam Smyk, Marek Tudruj |
Program Implementation Based on Macro Data Flow Paradigm with RDMA Communication Support. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPDC/HeteroPar ![In: 3rd International Symposium on Parallel and Distributed Computing (ISPDC 2004), 3rd International Workshop on Algorithms, Models and Tools for Parallel Computing on Heterogenous Networks (HeteroPar 2004), 5-7 July 2004, Cork, Ireland, pp. 270-276, 2004, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
Macro Data Flow analysis, Remote DMA, MPI, FDTD |
20 | M. Esen Tuna, Kamlesh Rath, Steven D. Johnson |
Specification and synthesis of bounded indirection. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Great Lakes Symposium on VLSI ![In: 5th Great Lakes Symposium on VLSI (GLS-VLSI '95), March 16-18, 1995, The State University of New York at Buffalo, USA, pp. 86-89, 1995, IEEE Computer Society, 0-8186-7035-5. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
bounded indirection, complex control structures, dynamic connections, control state indirection, value indirection, net indirection, behavior tables, data path descriptions, DMA controller, formal specification, high level synthesis, finite state machines, interrupts, interrupts, continuations, hardware description languages, hardware description languages, pointers, system specification, data flow computing, control system CAD |
20 | Chao Pei |
DMA-SGCN for Video Motion Recognition: A Tool for Advanced Sports Analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Access ![In: IEEE Access 12, pp. 58690-58702, 2024. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
|
20 | Kelin Huang, Li You, Mengyu Qian, Xiqi Gao 0001 |
MetaSWIPT: DMA-Assisted Multi-User MISO Downlink Simultaneous Wireless Information and Power Transfer. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Wirel. Commun. Lett. ![In: IEEE Wirel. Commun. Lett. 13(4), pp. 1048-1052, April 2024. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
|
20 | Thomas Benz, Michael Rogenmoser, Paul Scheffler, Samuel Riedel, Alessandro Ottaviano, Andreas Kurth, Torsten Hoefler, Luca Benini |
A High-Performance, Energy-Efficient Modular DMA Engine Architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 73(1), pp. 263-277, January 2024. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
|
20 | Dingding Li, Weijie Zhang, Mianxiong Dong, Kaoru Ota |
DMA-Assisted I/O for Persistent Memory. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 35(5), pp. 829-843, May 2024. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
|
20 | Zheng Zhang, Yuanwei Liu, Zhaolin Wang, Jian Chen, Dong In Kim |
Near Field Communications for DMA-NOMA Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2403.04925, 2024. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
|
20 | Zhenyu Cui, Jiahuan Zhou, Yuxin Peng |
DMA: Dual Modality-Aware Alignment for Visible-Infrared Person Re-Identification. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Inf. Forensics Secur. ![In: IEEE Trans. Inf. Forensics Secur. 19, pp. 2696-2708, 2024. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
|
20 | Niklas Schelten, Fritjof Steinert, Justin Knapheide, Anton Schulte, Benno Stabernack |
A High-Throughput, Resource-Efficient Implementation of the RoCEv2 Remote DMA Protocol and its Application. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Reconfigurable Technol. Syst. ![In: ACM Trans. Reconfigurable Technol. Syst. 16(1), pp. 5:1-5:23, March 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
20 | Jibi G. Thanikkal, Ashwani Kumar Dubey, Thomas M. T. |
Deep - Morpho Algorithm (DMA) for medicinal leaves features extraction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Multim. Tools Appl. ![In: Multim. Tools Appl. 82(18), pp. 27905-27925, July 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
20 | Paolo Pazzaglia, Daniel Casini, Alessandro Biondi 0001, Marco Di Natale |
Optimizing Inter-Core Communications Under the LET Paradigm using DMA Engines. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 72(1), pp. 127-139, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
20 | Kaizhi Huang, Wenyu Jiang, Yajun Chen, Liang Jin, Qingqing Wu, Xiaoling Hu |
Robust Anti-jamming Communications with DMA-Based Reconfigurable Heterogeneous Array. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2310.09466, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
20 | Diaeddin Rimawi, Antonio Liotta, Marco Todescato, Barbara Russo |
CAIS-DMA: A Decision-Making Assistant for Collaborative AI Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2311.04562, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
20 | Thomas Benz, Michael Rogenmoser, Paul Scheffler, Samuel Riedel, Alessandro Ottaviano, Andreas Kurth, Torsten Hoefler, Luca Benini |
A High-performance, Energy-efficient Modular DMA Engine Architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2305.05240, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
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