Search results for "Hardware"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
66	Mohammad Tehranipoor, Farinaz Koushanfar	A Survey of Hardware Trojan Taxonomy and Detection.	IEEE Des. Test Comput.	2010	DBLP DOI BibTeX RDF	hardware Trojans, Trojan taxonomy and detection, security, design and test, ICs
43	David Szczesny, Sebastian Hessel, Felix Bruns, Attila Bilgic	On-the-fly hardware acceleration for protocol stack processing in next generation mobile devices.	CODES+ISSS	2009	DBLP DOI BibTeX RDF	embedded systems, real-time, hardware acceleration, virtual prototyping, hardware/software co-design, LTE, DMA
43	Kees A. Vissers	Trade-offs in the design of mixed hardware-software systems-a perspective from industry.	CODES	1997	DBLP DOI BibTeX RDF	consumer electronics devices, dedicated components, end-user applications, hardware interface, hardware-software systems design, on-screen display, programmable components, well defined interfaces, embedded systems, software architecture, operating system, high level synthesis, application programming interfaces, device drivers, television, software interfaces, industry perspective, hardware platform
43	Sumit Ghosh	Large-Scale Systems Design: A Revolutionary New Approach in Software Hardware Co-design.	AIS	2004	DBLP DOI BibTeX RDF
41	Jainendra Kumar, Noel R. Strader, Jeff Freeman, Michael Miller	Emulation verification of the Motorola 68060.	ICCD	1995	DBLP DOI BibTeX RDF	emulation verification, Motorola 68060, hardware logic emulation, configurable hardware, circuit verification, pseudo-random verification vectors, software application programs, formal verification, microprocessors, reconfigurable architectures, logic CAD, digital simulation, circuit analysis computing, RTL, hardware description languages, hardware description language, microprocessor chips, HDL, gate-level
41	Ghassan Al Hayek, Chantal Robach	On the Adequacy of Deriving Hardware Test Data from the Behavioral Specification.	EUROMICRO	1996	DBLP DOI BibTeX RDF	hardware test data, behavioral fault modeling, gate-level strategies, high-level fault detection, gate-level fault detection, design automation tools, generated test set, gate-level fault coverage, hardware description languages, hardware description languages, behavioral specification
39	Timothy J. Purcell, Craig Donner, Mike Cammarano, Henrik Wann Jensen, Pat Hanrahan	Photon mapping on programmable graphics hardware.	Graphics Hardware	2003	DBLP DOI BibTeX RDF	global illumination, programmable graphics hardware, photon mapping
37	Li-Yi Wei	Tile-based texture mapping on graphics hardware.	Graphics Hardware	2004	DBLP DOI BibTeX RDF	texture mapping, texture synthesis, graphics hardware
36	Tianyi Ma, Jun Yang, Xinglan Wang	Low Power Hardware-Software Partitioning Algorithm for Heterogeneous Distributed Embedded Systems.	EUC	2006	DBLP DOI BibTeX RDF	low power, tabu search, chaotic neural network, Hardware-software co-design, hardware-software partitioning
36	Matt Ryan, Sojan Markose, Xiaoqing Frank Liu, Ying Cheng	Structured Object-Oriented Co-Analysis/Co-Design of Hardware/Software for the FACTS Power System.	COMPSAC (1)	2005	DBLP DOI BibTeX RDF	Hardware/Software Co-analysis, Structured Object-Oriented Method, Embedded Systems, Integration, Hardware/Software Co-design, Concurrent Process
36	Arash Hariri, Reza Rastegar, Keivan Navi, Morteza Saheb Zamani, Mohammad Reza Meybodi	Cellular Learning Automata based Evolutionary Computing (CLA-EC) for Intrinsic Hardware Evolution.	Evolvable Hardware	2005	DBLP DOI BibTeX RDF
36	Daniel Roggen, Stephane Hofmann, Yann Thoma, Dario Floreano	Hardware spiking neural network with run-time reconfigurable connectivity in.	Evolvable Hardware	2003	DBLP DOI BibTeX RDF
36	Juan-Manuel Moreno Aróstegui, Joan Cabestany, Eduardo Sanchez	An In-System Routing Strategy For Evolvable Hardware Programmable Platforms.	Evolvable Hardware	2001	DBLP DOI BibTeX RDF
36	Peter T. Breuer, Natividad Martínez Madrid, Carlos Delgado Kloos	The Computational Description of Analogue System Behaviour.	Prospects for Hardware Foundations	1998	DBLP DOI BibTeX RDF
35	Rajat Subhra Chakraborty, Swarup Bhunia	Hardware protection and authentication through netlist level obfuscation.	ICCAD	2008	DBLP DOI BibTeX RDF	IP piracy, design for security, hardware authentication, hardware obfuscation, hardware protection
35	Adel Baganne, Jean Luc Philippe, Eric Martin 0001	Hardware interface design for real time embedded systems.	Great Lakes Symposium on VLSI	1997	DBLP DOI BibTeX RDF	real time digital signal processing, hardware interface design, codesign approach, storage components, hardware-software components, I/O data modeling style, hardware I/O transfer sequences, high level synthesis tool, GAUT, I/O transfer order, cosynthesis tool, real-time systems, ASICs, timing constraints, generic model, data communication, real time embedded systems, formal technique, interface specification, FFT algorithms, allocation problem
35	Mark J. Harris, William V. Baxter III, Thorsten Scheuermann, Anselmo Lastra	Simulation of cloud dynamics on graphics hardware.	Graphics Hardware	2003	DBLP DOI BibTeX RDF	graphics hardware, clouds, physically-based simulation, fluid dynamics, light scattering
35	Jeffrey J. Joyce	Totally Verified Systems: Linking Verified Software to Verified Hardware.	Hardware Specification, Verification and Synthesis	1989	DBLP DOI BibTeX RDF	machine-assisted theorem proving, safety-critical systems, higher-order logic, hardware verification, compiler correctness
35	Masatoshi Kameyama, Yoshiyuki Kato, Hitoshi Fujimoto, Hiroyasu Negishi, Yukio Kodama, Yoshitsugu Inoue, Hiroyuki Kawai	3D graphics LSI core for mobile phone "Z3D".	Graphics Hardware	2003	DBLP DOI BibTeX RDF	graphics accelerator, graphics hardware, rendering hardware
34	Wei-Chuan Liu, Ken-Hao Liu, Ming-Syan Chen	Hardware Enhanced Mining for Association Rules.	PAKDD	2006	DBLP DOI BibTeX RDF	Hardware enhanced mining, association rules
34	Harald P. E. Vranken, M. P. J. Stevens, M. T. M. Segers	Design-For-Debug in Hardware/Software Co-Design.	CODES	1997	DBLP DOI BibTeX RDF	system integration and test, hardware/software co-design, design validation, design-for-debug
34	Péter Arató, Zoltán Ádám Mann, András Orbán	Algorithmic aspects of hardware/software partitioning.	ACM Trans. Design Autom. Electr. Syst.	2005	DBLP DOI BibTeX RDF	optimization, graph algorithms, hardware/software codesign, Hardware/software partitioning, graph bipartitioning
34	Alan Mycroft, Richard Sharp	Higher-level techniques for hardware description and synthesis.	Int. J. Softw. Tools Technol. Transf.	2003	DBLP DOI BibTeX RDF	Static allocation, Behavioural hardware description, High-level synthesis, Functional languages, Hardware/software co-design
34	Budirijanto Purnomo, Jonathan Bilodeau, Jonathan D. Cohen 0001, Subodh Kumar 0001	Hardware-compatible vertex compression using quantization and simplification.	Graphics Hardware	2005	DBLP DOI BibTeX RDF
34	John C. Gallagher, Sanjay K. Boddhu, Saranyan A. Vigraham	A Reconfigurable Continuous Time Recurrent Neural Network for Evolvable Hardware Applications.	Evolvable Hardware	2005	DBLP DOI BibTeX RDF
34	Theresa Foley, Mike Houston, Pat Hanrahan	Efficient partitioning of fragment shaders for multiple-output hardware.	Graphics Hardware	2004	DBLP DOI BibTeX RDF
34	David A. Gwaltney, Michael I. Ferguson	Intrinsic Hardware Evolution for the Design and Reconfiguration of Analog Speed Controllers for a DC Motor.	Evolvable Hardware	2003	DBLP DOI BibTeX RDF
34	Adrian Stoica, Didier Keymeulen, Ricardo Salem Zebulum, Michael I. Ferguson	On Two New Trends in Evolvable Hardware: Employment of HDL-Based Structuring, and Design of Multi-Functional Circuits.	Evolvable Hardware	2002	DBLP DOI BibTeX RDF
34	Michael Korkin, Gary Fehr, Gregory Jeffery	Evolving Hardware on a Large Scale.	Evolvable Hardware	2000	DBLP DOI BibTeX RDF
34	Marek A. Perkowski, Alan Mishchenko, Anatoli N. Chebotarev	Evolvable Hardware or Learning Hardware? Induction of State Machines from Temporal Logic Constraints.	Evolvable Hardware	1999	DBLP DOI BibTeX RDF
34	Jan Philipps, Peter Scholz	Formal Verification and Hardware Design with Statecharts.	Prospects for Hardware Foundations	1998	DBLP DOI BibTeX RDF
34	Bernhard Möller	Deductive Hardware Design: A Functional Approach.	Prospects for Hardware Foundations	1998	DBLP DOI BibTeX RDF
33	Mark Genoe, Paul Vanoostende, Geert van Wauwe	On the use of VHDL-based behavioral synthesis for telecom ASIC design.	ISSS	1995	DBLP DOI BibTeX RDF	Alcatel-Bell, RTL-synthesizable description, behavioral synthesis tools, hardware CAD tool, system level design methodology, telecom ASIC design, telecom system hardware design, high level synthesis, VHDL, VHDL, application specific integrated circuits, ASIC, logic synthesis, integrated circuit design, hardware description languages, integrated logic circuits, behavioral synthesis, telecommunication computing, hardware software codesign, design complexities
32	Sangkil Jung, Sangjin Hong	Network/hardware cross-layer evaluation for ROHC and packet aggregation on wireless mesh networks.	Wirel. Networks	2009	DBLP DOI BibTeX RDF	Network/hardware cross-layer evaluation, ROHC, Wireless mesh network
32	Lance Saldanha, Roman L. Lysecky	Hardware/software partitioning of floating point software applications to fixed-pointed coprocessor circuits.	CODES+ISSS	2008	DBLP DOI BibTeX RDF	floating point to fixed conversion, floating point, fixed point, hardware/software partitioning
32	Gregor Wetekam, Dirk Staneker, Urs Kanus, Michael Wand 0001	A hardware architecture for multi-resolution volume rendering.	Graphics Hardware	2005	DBLP DOI BibTeX RDF
32	Nicholas J. Macias, Lisa J. K. Durbeck	A Hardware Implementation of the Cell Matrix Self-Configurable Architecture: The Cell Matrix MOD 88.	Evolvable Hardware	2005	DBLP DOI BibTeX RDF
32	Heng Liu 0006, Julian F. Miller, Andy M. Tyrrell	Intrinsic Evolvable Hardware Implementation of a Robust Biological Development Model for Digital Systems.	Evolvable Hardware	2005	DBLP DOI BibTeX RDF
32	Ju Hui Li, Meng-Hiot Lim, Qi Cao 0002	An Intrinsic Evolvable and Online Adaptive Evolvable Fuzzy Hardware Scheme for Packet Switching Network.	Evolvable Hardware	2004	DBLP DOI BibTeX RDF
32	Yang Zhang, Stephen L. Smith 0002, Andy M. Tyrrell	Digital Circuit Design using Intrinsic Evolvable Hardware.	Evolvable Hardware	2004	DBLP DOI BibTeX RDF
32	Josh C. Bongard, Hod Lipson	Automated Robot Function Recovery after Unanticipated Failure or Environmental Change using a Minimum of Hardware Trials.	Evolvable Hardware	2004	DBLP DOI BibTeX RDF
32	Juan Manuel Moreno, Yann Thoma, Eduardo Sanchez, Oriol Torres, Gianluca Tempesti	Hardware Realization of a Bio-inspired POEtic Tissue.	Evolvable Hardware	2004	DBLP DOI BibTeX RDF
32	Jonathan R. Evans, Tughrul Arslan	The Implementation of an Evolvable Hardware System for Real Time Image Registration on a System-on-Chip Platform.	Evolvable Hardware	2002	DBLP DOI BibTeX RDF
32	John W. Lockwood	Evolvable Internet Hardware Platforms.	Evolvable Hardware	2001	DBLP DOI BibTeX RDF
32	Reid B. Porter, Kevin McCabe, Neil W. Bergmann	An Applications Approach to Evolvable Hardware.	Evolvable Hardware	1999	DBLP DOI BibTeX RDF
32	Gunnar Tufte, Pauline C. Haddow	Prototyping a GA Pipeline for Complete Hardware Evolution.	Evolvable Hardware	1999	DBLP DOI BibTeX RDF
32	Moritoshi Yasunaga, Ikuo Yoshihara, Jung Hwan Kim	Gene Finding Using Evolvable Reasoning Hardware.	ICES	2003	DBLP DOI BibTeX RDF	evolving hardware system, evolutionary hardware design methodologies, genome informatics
32	Ghassan Al Hayek, Yves Le Traon, Chantal Robach	Considering Test Economics in the Process of Hardware/Software Partitioning.	EUROMICRO	1996	DBLP DOI BibTeX RDF	hardware/software testing, specifications, logic testing, estimate, testability, co-design, mutation-test, hardware/software partitioning, test economics
32	Marc Olano, Bob Kuehne, Maryann Simmons	Automatic shader level of detail.	Graphics Hardware	2003	DBLP DOI BibTeX RDF	multi-pass rendering, computer games, level of detail, languages, simplification, interactive rendering, rendering systems, hardware systems, reflectance & shading models, procedural shading
32	Alvin J. Surkan, Amiran Khuskivadze	Evolution of Quantum Algorithms for Computer of Reversible Operators.	Evolvable Hardware	2002	DBLP DOI BibTeX RDF	evolutionary design and discovery of evolvable hardware, CCNOT Toffoli quantum gates, genetic programming, quantum computation, Program synthesis, qubits, circuit models
30	Norihiro Fujii, Nobuhiko Koike	A New Remote Laboratory for Hardware Experiment with Shared Resources and Service Management.	ICITA (2)	2005	DBLP DOI BibTeX RDF	Hardware Experiment, Shared-Lab, Web services, Distance learning, Remote laboratory, shared service
30	Kevin Fan, Manjunath Kudlur, Hyunchul Park 0001, Scott A. Mahlke	Increasing hardware efficiency with multifunction loop accelerators.	CODES+ISSS	2006	DBLP DOI BibTeX RDF	multifunction design, high-level synthesis, modulo scheduling, loop accelerator, application-specific hardware
30	Lejla Batina, David Hwang 0001, Alireza Hodjat, Bart Preneel, Ingrid Verbauwhede	Hardware/Software Co-design for Hyperelliptic Curve Cryptography (HECC) on the 8051µP.	CHES	2005	DBLP DOI BibTeX RDF	HECC, genus 2 curves, embedded implementation, hardware/software co- design
30	Peter Voigt Knudsen, Jan Madsen	PACE: A Dynamic Programming Algorithm for Hardware/Software Partitioning.	CODES	1996	DBLP DOI BibTeX RDF	communication, Codesign, hardware/software partitioning, performance estimation, area estimation, co-synthesis
30	Jorge Luís Machado do Amaral, José Franco Machado do Amaral, Cristina Costa Santini, Ricardo Tanscheit, Marley M. B. R. Vellasco, Marco Aurélio Cavalcanti Pacheco, Antonio Carneiro de Mesquita Filho	Evolvable Building Blocks for Analog Fuzzy Logic Controllers.	Evolvable Hardware	2003	DBLP DOI BibTeX RDF
30	Adrian Stoica, Didier Keymeulen, Raoul Tawel, Carlos Salazar-Lazaro, Wei-Te Li	Evolutionary Experiments with a Fine-Grained Reconfigurable Architecture for Analog and Digital CMOS Circuits.	Evolvable Hardware	1999	DBLP DOI BibTeX RDF
30	Adrian Stoica	Evolvable Hardware: From On-Chip Circuit Synthesis to Evolvable Space Systems.	ISMVL	2000	DBLP DOI BibTeX RDF	automated circuit design, programmable devices, genetic algorithms, fuzzy logic, reconfigurable hardware, evolvable hardware, triangular norms
30	Asawaree Kalavade, P. A. Subrahmanyam	Hardware/software partitioning for multi-function systems.	ICCAD	1997	DBLP DOI BibTeX RDF	multi-function systems, video encode/decode, system-level design, hardware/software partitioning, hardware-software codesign, core-based design
30	Heidrun Engel	Data flow transformations to detect results which are corrupted by hardware faults.	HASE	1996	DBLP DOI BibTeX RDF	data flow transformations, corrupt result detection, hardware fault coverage, modified instruction, diverse data representation, modified instruction sequences, assembler level, high language level, fault tolerant computing, software faults, design diversity, hardware fault detection
30	Jeremy W. Sheaffer, David P. Luebke, Kevin Skadron	A hardware redundancy and recovery mechanism for reliable scientific computation on graphics processors.	Graphics Hardware	2007	DBLP DOI BibTeX RDF
30	Andreas Kolb 0001, Lutz Latta, Christof Rezk-Salama	Hardware-based simulation and collision detection for large particle systems.	Graphics Hardware	2004	DBLP DOI BibTeX RDF
30	Nolan Goodnight, Cliff Woolley, Gregory Lewin, David P. Luebke, Greg Humphreys	A multigrid solver for boundary value problems using programmable graphics hardware.	Graphics Hardware	2003	DBLP DOI BibTeX RDF
30	Ben I. Hounsell, Tughrul Arslan	Evolutionary Design And Adaptation Of Digital Filters Within An Embedded Fault Tolerant Hardware Platform .	Evolvable Hardware	2001	DBLP DOI BibTeX RDF
30	Jörg Langeheine, Joachim Becker, Simon Fölling, Karlheinz Meier, Johannes Schemmel	A Cmos Fpta Chip For Intrinsic Hardware Evolution Of Analog Electronic Circuits.	Evolvable Hardware	2001	DBLP DOI BibTeX RDF
30	Ho-Sik Seok, Kwang-Ju Lee, Byoung-Tak Zhang, Dong-Wook Lee, Kwee-Bo Sim	Genetic Programming of Process Decomposition Strategies for Evolvable Hardware.	Evolvable Hardware	2000	DBLP DOI BibTeX RDF
30	Jim Tørresen	Scalable Evolvable Hardware Applied to Road Image Recognition.	Evolvable Hardware	2000	DBLP DOI BibTeX RDF
30	George J. Milne	A Model for Dynamic Adaptation in Reconfigurable Hardware Systems.	Evolvable Hardware	1999	DBLP DOI BibTeX RDF
30	Ketil Stølen, Max Fuchs	An Exercise in Conditional Refinement.	Prospects for Hardware Foundations	1998	DBLP DOI BibTeX RDF
30	Mary Sheeran	Categories for the Working Hardware Designer.	Hardware Specification, Verification and Synthesis	1989	DBLP DOI BibTeX RDF
30	Bita Gorjiara, Nader Bagherzadeh, Pai H. Chou	Integrating Power Management into Distributed Real-time Systems at Very Low Implementation Cost.	ASP-DAC	2007	DBLP DOI BibTeX RDF	hardware modifications, software modifications, hardware timers, interrupt controllers, software/device driver, distributed software-defined radio system, hardware measurements, power manager, power management, multiprocessor systems, distributed real-time systems, power constraints, low-power embedded systems
30	Lang Lin, Markus Kasper, Tim Güneysu, Christof Paar, Wayne P. Burleson	Trojan Side-Channels: Lightweight Hardware Trojans through Side-Channel Engineering.	CHES	2009	DBLP DOI BibTeX RDF	Trojan Hardware, Trojan Side-Channel, Hardware Trojan Detection, Covert Channel, Side-Channel Analysis
30	Shinji Kimura, Yasufumi Itou, Makoto Hirao, Katsumasa Watanabe, Mitsuteru Yukishita, Akira Nagoya	A Hardware/Software Codesign Method for a General Purpose Reconfigurable Co-Processor.	CODES	1997	DBLP DOI BibTeX RDF	hardware/software co-operation, a computer architecture using FPGA, bus-based reconfigurable co-processor architecture, high-level synthesis and optimization, C compiler to hardware modules
30	Julian F. Miller, Keith L. Downing	Evolution in materio: Looking Beyond the Silicon Box.	Evolvable Hardware	2002	DBLP DOI BibTeX RDF	Evolvable Matter, Molecular Circuits, Intrinsic evolution, Evolvable Hardware
29	Ken Hayworth	The "Modeling Clay" Approach to Bio-inspired Electronic Hardware.	ICES	1998	DBLP DOI BibTeX RDF
29	Ying-Hsiang Wen, Jen-Wei Huang, Ming-Syan Chen	Hardware-Enhanced Association Rule Mining with Hashing and Pipelining.	IEEE Trans. Knowl. Data Eng.	2008	DBLP DOI BibTeX RDF	hardware-enhanced mining, data mining, Association Rules
29	Greg Stitt, Frank Vahid, Shawn Nematbakhsh	Energy savings and speedups from partitioning critical software loops to hardware in embedded systems.	ACM Trans. Embed. Comput. Syst.	2004	DBLP DOI BibTeX RDF	FPGA, embedded systems, synthesis, platforms, speedup, low energy, Hardware/software partitioning
28	Hayden Kwok-Hay So, Artem Tkachenko, Robert W. Brodersen	A unified hardware/software runtime environment for FPGA-based reconfigurable computers using BORPH.	CODES+ISSS	2006	DBLP DOI BibTeX RDF	hardware process, reconfigurable computers
28	Sean V. Hum, Michal M. Okoniewski, Robert J. Davies	An Evolvable Antenna Platform Based on Reconfigurable Reflectarrays.	Evolvable Hardware	2005	DBLP DOI BibTeX RDF
28	Andrew Riffel, Aaron E. Lefohn, Kiril Vidimce, Mark Leone, John D. Owens	Mio: fast multipass partitioning via priority-based instruction scheduling.	Graphics Hardware	2004	DBLP DOI BibTeX RDF
28	Ann Garrison Darrin, Richard Conde, Bobbie Chern, Phil Luers, Steve Jurczyk, Carl Mills	Adaptive Instrument Module: Space Instrument Controller "brain" Through Programmable Logic Devices.	Evolvable Hardware	2001	DBLP DOI BibTeX RDF
28	Adrian Stoica, Didier Keymeulen, Ricardo Salem Zebulum, Anilkumar P. Thakoor, Taher Daud, Gerhard Klimeck, Y. Jin, Raoul Tawel, Vu Duong	Evolution of Analog Circuits on Field Programmable Transistor Arrays.	Evolvable Hardware	2000	DBLP DOI BibTeX RDF
28	Cesar Ortega-Sanchez, Andrew M. Tyrrell	Reliability Analysis in Self-Repairing Embryonic Systems.	Evolvable Hardware	1999	DBLP DOI BibTeX RDF
28	Hugo de Garis, Norberto Eiji Nawa, Andrzej Buller, Michael Korkin, Felix A. Gers, Michael Hough	ATR's Artificial Brain ("Cam-Brain") Project a Sample of what Individual "CoDi-1Bit" Model Evolved Neural Net Modules can do with Digital and Analog I/O.	Evolvable Hardware	1999	DBLP DOI BibTeX RDF
28	Delon Levi, Steve Guccione	GeneticFPGA: Evolving Stable Circuits on Mainstream FPGA Devices.	Evolvable Hardware	1999	DBLP DOI BibTeX RDF
28	Naoki Iwasaki, Katsumi Wasaki	A Meta Hardware Description Language Melasy for Model-Checking Systems.	ITNG	2008	DBLP DOI BibTeX RDF	Hardware/Software co-design and co-verification, Model Checking, Haskell, Design-for-test, Hardware Compilers
28	Greg Stitt	Hardware/software partitioning with multi-version implementation exploration.	ACM Great Lakes Symposium on VLSI	2008	DBLP DOI BibTeX RDF	fpga, synthesis, hardware/software codesign, hardware/software partitioning
28	Wieland Fischer, Jean-Pierre Seifert	Increasing the Bitlength of a Crypto-Coprocessor.	CHES	2002	DBLP DOI BibTeX RDF	Arithmetical coprocessor, Hardware/Software codesign, Modular multiplication, Hardware architecture
28	Debanjan Saha, Anupam Basu, Raj S. Mitra	Hardware Software Partitioning Using Genetic Algorithm.	VLSI Design	1997	DBLP DOI BibTeX RDF	specification partitioning, genetic algorithm, software engineering, embedded systems, CAD, constraint satisfaction problem, hardware software co-design, hardware software partitioning
28	R. Miller, Hal Carter, K. Davis, Satish Venkatesan	Hardware/software cosynthesis: multiple constraint satisfaction and component retrieval.	ICECCS	1996	DBLP DOI BibTeX RDF	hardware software cosynthesis, multiple constraint satisfaction, high-level system specification, constraint-driven retrieval, candidate solution evaluation, cosynthesis tool, multiple design constraints, two constraint Fidducia-Matheyses approach, flexible component retrieval, design database, ad hoc querying, systems analysis, hardware description language, design space, component retrieval
28	Magnus Strengert, Thomas Klein, Thomas Ertl	A hardware-aware debugger for the OpenGL shading language.	Graphics Hardware	2007	DBLP DOI BibTeX RDF
28	Dmitry Berenson, Nicolás S. Estévez, Hod Lipson	Hardware Evolution of Analog Circuits for In-situ Robotic Fault-Recovery.	Evolvable Hardware	2005	DBLP DOI BibTeX RDF
28	Timothy G. W. Gordon, Peter J. Bentley	Development Brings Scalability to Hardware Evolution.	Evolvable Hardware	2005	DBLP DOI BibTeX RDF
28	James M. Hereford, David A. Gwaltney	Design Space Issues for Intrinsic Evolvable Hardware.	Evolvable Hardware	2004	DBLP DOI BibTeX RDF
28	James M. Hereford, Charles Pruitt	Robust Sensor Systems using Evolvable Hardware.	Evolvable Hardware	2004	DBLP DOI BibTeX RDF
28	Andrew J. Greensted, Andy M. Tyrrell	An Endocrinologic-Inspired Hardware Implementation of a Multicellular System.	Evolvable Hardware	2004	DBLP DOI BibTeX RDF
28	Gregory R. Kramer, John C. Gallagher, Michael L. Raymer	On the Relative Efficacies of *cGA Variants for Intrinsic Evolvable Hardware: Population, Mutation, and Random Immigrants.	Evolvable Hardware	2004	DBLP DOI BibTeX RDF
28	Evangelos F. Stefatos, Tughrul Arslan	An Efficient Fault-Tolerant VLSI Architecture Using Parallel Evolvable Hardware Technology.	Evolvable Hardware	2004	DBLP DOI BibTeX RDF
28	S. G. Lee, W. C. Park, W. J. Lee, T. D. Han, S. B. Yang	An effective hardware architecture for bump mapping using angular operation.	Graphics Hardware	2003	DBLP DOI BibTeX RDF
28	Naga K. Govindaraju, Stephane Redon, Ming C. Lin, Dinesh Manocha	CULLIDE: interactive collision detection between complex models in large environments using graphics hardware.	Graphics Hardware	2003	DBLP DOI BibTeX RDF
28	Le-Jeng Shiue, Vineet Goel, Jörg Peters 0001	Mesh mutation in programmable graphics hardware.	Graphics Hardware	2003	DBLP DOI BibTeX RDF