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GrowBag graphs for keyword ? (Num. hits/coverage)
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Results
Found 360 publication records. Showing 360 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
73 | Kaushik Roy 0001 |
Ultra low voltage CMOS. |
ISLPED |
2009 |
DBLP DOI BibTeX RDF |
adaptive supply scaling, nano-scale cmos system, ultra low voltage design, ultra-dynamic voltage scaling |
71 | Luis Henrique de Carvalho Ferreira, Tales Cleber Pimenta, Robson L. Moreno, Wilhelmus A. M. Van Noije |
Ultra low-voltage ultra low-power CMOS threshold voltage reference. |
SBCCI |
2006 |
DBLP DOI BibTeX RDF |
low power, CMOS, low voltage, threshold voltage, voltage reference |
71 | Paul Ampadu |
Ultra-low voltage VLSI: are we there yet? |
ISCAS |
2006 |
DBLP DOI BibTeX RDF |
|
62 | Omid Mirmotahari, Yngvar Berg |
Low Voltage Design against Power Analysis Attacks. |
DELTA |
2008 |
DBLP DOI BibTeX RDF |
Low Voltage (LV), Floating-Gate (FG) and supply current analysis, Differential Power Analysis (DPA), Ultra Low Voltage (ULV) |
62 | Omid Mirmotahari, Yngvar Berg |
Ultra Low Voltage High Speed Differential CMOS Inverter. |
PATMOS |
2008 |
DBLP DOI BibTeX RDF |
Floating-Gate (FG), High-Speed, Ultra Low Voltage (ULV) |
61 | Wanli Jiang, Eric Peterson |
Performance Comparison of VLV, ULV, and ECR Tests. |
J. Electron. Test. |
2003 |
DBLP DOI BibTeX RDF |
very low voltage test, dynamic current test, test threshold, test effectiveness, test efficiency |
61 | Vivienne Sze, Anantha P. Chandrakasan |
A 0.4-V UWB baseband processor. |
ISLPED |
2007 |
DBLP DOI BibTeX RDF |
baseband processor, parallelism, ultra-wideband, ultra-low voltage |
57 | Yngvar Berg, Omid Mirmotahari |
Ultra low-voltage switched current mirror. |
DDECS |
2009 |
DBLP DOI BibTeX RDF |
|
57 | Chi-Hung Lin, Mohammed Ismail 0001 |
Design and analysis of an ultra low-voltage CMOS class-AB V-I converter for dynamic range enhancement. |
ISCAS (2) |
1999 |
DBLP DOI BibTeX RDF |
|
57 | Fady Abouzeid, Sylvain Clerc, Fabian Firmin, Marc Renaudin, Gilles Sicard |
A 45nm CMOS 0.35v-optimized standard cell library for ultra-low power applications. |
ISLPED |
2009 |
DBLP DOI BibTeX RDF |
bose choudhury hocquenghem, design, low power, methodology, logic, energy, cmos, library, circuit, subthreshold, ultra low voltage |
57 | Martin Margala, Srdjan Dragic, Ahmed El-Abasiry, Samuel Ekpe, Viera Stopjaková |
I-V Fast IDDQ Current Sensor for On-Line Mixed-Signal/Analog Test. |
IOLTW |
2000 |
DBLP DOI BibTeX RDF |
VLSI, Testing, Sensors, Iddq, Ultra-Low-Voltage, Current |
55 | Kiyoo Itoh 0001, Masashi Horiguchi, Takayuki Kawahara |
Ultra-low voltage nano-scale embedded RAMs. |
ISCAS |
2006 |
DBLP DOI BibTeX RDF |
|
55 | S. Alireza Zabihian, Reza Lotfi |
Ultra-Low-Voltage, Low-Power, High-Speed Operational Amplifiers Using Body-Driven Gain-Boosting Technique. |
ISCAS |
2007 |
DBLP DOI BibTeX RDF |
|
52 | Wanli Jiang, Eric Peterson |
Performance Comparison of VLV, ULV, and ECR Tests. |
VTS |
2002 |
DBLP DOI BibTeX RDF |
|
50 | Masaaki Iijima, Masayuki Kitamura, Masahiro Numa, Akira Tada, Takashi Ipposhi |
Ultra Low Voltage Operation with Bootstrap Scheme for Single Power Supply SOI-SRAM. |
VLSI Design |
2007 |
DBLP DOI BibTeX RDF |
|
48 | Jiangmin Gu, Chip-Hong Chang |
Ultra low voltage, low power 4-2 compressor for high speed multiplications. |
ISCAS (5) |
2003 |
DBLP DOI BibTeX RDF |
|
46 | Hesam Amir Aslanzadeh, Saeid Mehrmanesh, Mohammad B. Vahidfar, Amin Quasem Safarian, Reza Lotfi |
A 1-V 1-mW high-speed class AB operational amplifier for high-speed low power pipelined A/D converters using "Slew Boost" technique. |
ISLPED |
2003 |
DBLP DOI BibTeX RDF |
CMOS analog circuit, Slew Boost technique, class AB, low power, high speed, operational amplifier, pipelined analog to digital converter, ultra low voltage |
42 | Amin Ansari, Shuguang Feng, Shantanu Gupta, Scott A. Mahlke |
Enabling ultra low voltage system operation by tolerating on-chip cache failures. |
ISLPED |
2009 |
DBLP DOI BibTeX RDF |
fault-tolerant cache, low voltage operation, dynamic voltage scaling |
39 | Ashutosh Chakraborty, Karthik Duraisami, Ashoka Visweswara Sathanur, Prassanna Sithambaram, Alberto Macii, Enrico Macii, Massimo Poncino |
Implications of ultra low-voltage devices on design techniques for controlling leakage in NanoCMOS circuits. |
ISCAS |
2006 |
DBLP DOI BibTeX RDF |
|
38 | Yngvar Berg, Snorre Aunet, Øivind Næss, Mats Høvin |
Floating-gate CMOS differential analog inverter for ultra low-voltage applications. |
ISCAS (1) |
2001 |
DBLP DOI BibTeX RDF |
|
35 | Zihua Qu, Meng Zhang, Jianhui Wu 0001 |
A switched-capacitor CMOS voltage reference for ultra low-voltage and ultra low-power operation. |
ICECS |
2009 |
DBLP DOI BibTeX RDF |
|
35 | Luis Henrique de Carvalho Ferreira, Tales Cleber Pimenta, Robson L. Moreno |
An Ultra Low-Voltage Ultra Low-Power CMOS Threshold Voltage Reference. |
IEICE Trans. Electron. |
2007 |
DBLP DOI BibTeX RDF |
|
34 | Chih-Jen Cheng, Shuenn-Yuh Lee |
A low-voltage adaptive switched-current SDM for bio-acquisition microsystems. |
ISCAS |
2006 |
DBLP DOI BibTeX RDF |
|
33 | Amara Amara, Bastien Giraud, Olivier Thomas |
An Innovative 6T Hybrid SRAM Cell in sub-32 nm Double-Gate MOS Technology. |
DELTA |
2010 |
DBLP DOI BibTeX RDF |
SRAM cell, Planar Double-Gate (DG), Fully Depleted SOI (FD-SOI), read and write tradeoffs, Ultra Low Voltage (ULV) |
33 | Stephen C. Terry, Mohammad M. Mojarradi, Benjamin J. Blalock, Jesse A. Richmond |
Adaptive gate biasing: a new solution for body-driven current mirrors. |
ACM Great Lakes Symposium on VLSI |
2005 |
DBLP DOI BibTeX RDF |
SOI analog, body driving, current mirrors, ultra-low-voltage analog circuit design |
31 | Saeid Mehrmanesh, Mohammad B. Vahidfar, Hesam Amir Aslanzadeh, Seyed Mojtaba Atarodi |
An ultra low-voltage Gm-C filter for video applications. |
ISCAS (1) |
2003 |
DBLP DOI BibTeX RDF |
|
31 | Yifan He, Yu Pu, Richard P. Kleihorst, Zhenyu Ye, Anteneh A. Abbo, Sebastian M. Londono, Henk Corporaal |
Xetal-Pro: an ultra-low energy and high throughput SIMD processor. |
DAC |
2010 |
DBLP DOI BibTeX RDF |
Xetal-Pro, hybrid memory system, SIMD, low-energy |
30 | Jun Zhou 0017, Chao Wang 0016, Xin Liu 0015, Xin Zhang 0025, Minkyu Je |
An Ultra-Low Voltage Level Shifter Using Revised Wilson Current Mirror for Fast and Energy-Efficient Wide-Range Voltage Conversion from Sub-Threshold to I/O Voltage. |
IEEE Trans. Circuits Syst. I Regul. Pap. |
2015 |
DBLP DOI BibTeX RDF |
|
30 | Tadashi Yasufuku, Koji Hirairi, Yu Pu, Yun Fei Zheng, Ryo Takahashi, Masato Sasaki, Hiroshi Fuketa, Atsushi Muramatsu, Masahiro Nomura, Hirofumi Shinohara, Makoto Takamiya, Takayasu Sakurai |
24% Power reduction by post-fabrication dual supply voltage control of 64 voltage domains in VDDmin limited ultra low voltage logic circuits. |
ISQED |
2012 |
DBLP DOI BibTeX RDF |
|
30 | Burak Çatli, Mona Mostafa Hella |
A 0.5-V 3.6/5.2 GHz CMOS multi-band LC VCO for ultra low-voltage wireless applications. |
ISCAS |
2008 |
DBLP DOI BibTeX RDF |
|
30 | Yngvar Berg, Snorre Aunet, Øivind Næss, Mats Høvin |
Exploiting sinh and tanh shaped ultra low-voltage floating-gate transconductance amplifiers to reduce harmonic distortion. |
ISCAS (4) |
2001 |
DBLP DOI BibTeX RDF |
|
30 | Yngvar Berg, Tor Sverre Lande |
Tunable current mirrors for ultra low voltage. |
ISCAS (2) |
1999 |
DBLP DOI BibTeX RDF |
|
28 | Carmine Paolino, Fabio Pareschi, Mauro Mangia, Riccardo Rovatti, Gianluca Setti |
An architecture for ultra-low-voltage ultra-low-power compressed sensing-based acquisition systems. |
NorCAS |
2021 |
DBLP DOI BibTeX RDF |
|
28 | Omar Abdelfattah, Ishiang Shih, Gordon W. Roberts, Yi-Chi Shih |
A 0.55-V 1-GHz frequency synthesizer PLL for ultra-low-voltage ultra-low-power applications. |
LASCAS |
2015 |
DBLP DOI BibTeX RDF |
|
28 | Gholamreza Karimi, Sedighe Babaei Sedaghat, Roza Banitalebi |
Designing and modeling of ultra low voltage and ultra low power LNA using ANN and ANFIS for Bluetooth applications. |
Neurocomputing |
2013 |
DBLP DOI BibTeX RDF |
|
28 | Farooq Ahmad Khanday, Evdokia Pilavaki, Costas Psychalinos |
Ultra Low-Voltage Ultra Low-Power Sinh-Domain Wavelet Filer for Electrocardiogram Signal Analysis. |
J. Low Power Electron. |
2013 |
DBLP DOI BibTeX RDF |
|
28 | Rodrigo Eduardo Rottava, S. Carlyle Camara, Fernando Rangel de Sousa, Robson Nunes de Lima |
Ultra-low-power, ultra-low-voltage 2.12 GHz colpitts oscillator using inductive gate degeneration. |
NEWCAS |
2013 |
DBLP DOI BibTeX RDF |
|
28 | Ali Reza Dehqan, Ehsan Kargaran, Khalil Mafinezhad, Hooman Nabovati |
An ultra low voltage ultra low power CMOS UWB LNA using forward body biasing. |
MWSCAS |
2012 |
DBLP DOI BibTeX RDF |
|
28 | Hsieh-Hung Hsieh, Huan-Sheng Chen, Ping-Hsi Hung, Liang-Hung Lu |
Experimental 5-GHz RF Frontends for Ultra-Low-Voltage and Ultra-Low-Power Operations. |
IEEE Trans. Very Large Scale Integr. Syst. |
2011 |
DBLP DOI BibTeX RDF |
|
28 | Gholamreza Karimi, Omid Sadeghi |
A novel adder cell for ultra low voltage, ultra low power networks in nanoscale VLSI circuits. |
IEICE Electron. Express |
2011 |
DBLP DOI BibTeX RDF |
|
28 | Luis Henrique de Carvalho Ferreira, Tales Cleber Pimenta, Robson L. Moreno |
An Ultra-Low-Voltage Ultra-Low-Power Weak Inversion Composite MOS Transistor: Concept and Applications. |
IEICE Trans. Electron. |
2008 |
DBLP DOI BibTeX RDF |
|
28 | Luis Henrique de Carvalho Ferreira, Tales Cleber Pimenta, Robson L. Moreno |
An Ultra-Low-Voltage Ultra-Low-Power CMOS Miller OTA With Rail-to-Rail Input/Output Swing. |
IEEE Trans. Circuits Syst. II Express Briefs |
2007 |
DBLP DOI BibTeX RDF |
|
28 | Mingoo Seok, David T. Blaauw, Dennis Sylvester |
Clock network design for ultra-low power applications. |
ISLPED |
2010 |
DBLP DOI BibTeX RDF |
ultra-low power, robust design, clock network |
28 | Jawar Singh, Jimson Mathew, Dhiraj K. Pradhan, Saraju P. Mohanty |
A subthreshold single ended I/O SRAM cell design for nanometer CMOS technologies. |
SoCC |
2008 |
DBLP DOI BibTeX RDF |
|
27 | Yamu Hu, Mohumud Sowan |
A 900 mV 25µW high PSRR CMOS voltage reference dedicated to implantable micro-devices. |
ISCAS (1) |
2003 |
DBLP DOI BibTeX RDF |
|
27 | Quoc-Hoang Duong, Trung-Kien Nguyen, Sang-Gug Lee 0001 |
Ultra low-voltage low-power exponential voltage-mode circuit with tunable output range. |
ISCAS (2) |
2004 |
DBLP BibTeX RDF |
|
25 | Yngvar Berg, Omid Mirmotahari |
Low voltage precharge CMOS logic. |
DDECS |
2009 |
DBLP DOI BibTeX RDF |
|
25 | Taro Niiyama, Piao Zhe, Koichi Ishida, Masami Murakata, Makoto Takamiya, Takayasu Sakurai |
Dependence of Minimum Operating Voltage (VDDmin) on Block Size of 90-nm CMOS Ring Oscillators and its Implications in Low Power DFM. |
ISQED |
2008 |
DBLP DOI BibTeX RDF |
|
24 | Yasuhiro Ogasahara, Tadashi Nakagawa, Toshihiro Sekigawa, Toshiyuki Tsutsumi, Hanpei Koike |
Impacts of flexible Vth control, low process variability, and steep SS with low on-current of new structure transistors to ultra-low voltage designs. |
IEICE Electron. Express |
2015 |
DBLP DOI BibTeX RDF |
|
24 | Mu-Tien Chang, Po-Tsang Huang, Wei Hwang |
A robust ultra-low power asynchronous FIFO memory with self-adaptive power control. |
SoCC |
2008 |
DBLP DOI BibTeX RDF |
|
24 | Xi Chen 0062, Ting Zhou, Jiajie Huang, Guoxing Wang, Yongfu Li 0002 |
A Sub-100mV Ultra-Low Voltage Level-Shifter Using Current Limiting Cross-Coupled Technique for Wide-Range Conversion to I/O Voltage. |
IEEE Access |
2020 |
DBLP DOI BibTeX RDF |
|
24 | Luis Henrique Rodovalho |
Schmitt Trigger Based Single-Ended Voltage Amplifier with Positive Feedback Control for Ultra-Low-Voltage Supplies. |
NorCAS |
2020 |
DBLP DOI BibTeX RDF |
|
24 | Somayeh Hossein Zadeh, Trond Ytterdal, Snorre Aunet |
Multi-threshold Voltage and Dynamic Body Biasing Techniques for Energy Efficient Ultra Low Voltage Subthreshold Adders. |
NorCAS |
2020 |
DBLP DOI BibTeX RDF |
|
24 | Jie Lin, Lidan Wang, Chenchang Zhan, Yan Lu 0002 |
A 1-nW Ultra-Low Voltage Subthreshold CMOS Voltage Reference With 0.0154%/V Line Sensitivity. |
IEEE Trans. Circuits Syst. II Express Briefs |
2019 |
DBLP DOI BibTeX RDF |
|
24 | Daniel Arbet, Martin Kovác, Viera Stopjaková, Miroslav Potocný |
Voltage-to-Frequency Converter for Ultra-Low-Voltage Applications. |
MIPRO |
2019 |
DBLP DOI BibTeX RDF |
|
24 | Md Shazzad Hossain, Ioannis Savidis |
Multi-Voltage Domain Power Distribution Network for Optimized Ultra-Low Voltage Clock Delivery. |
IGSC |
2018 |
DBLP DOI BibTeX RDF |
|
24 | Yuichiro Nakazawa, Tetsuya Hirose, Toshihiro Ozaki, Yuto Tsuji, Shuto Kanzaki, Hiroki Asano, Nobutaka Kuroki, Masahiro Numa |
Analytical Study of Multi-stage Switched-Capacitor Voltage Boost Converter for Ultra-low Voltage Energy Harvesting. |
ISCAS |
2018 |
DBLP DOI BibTeX RDF |
|
24 | Ting-Chou Lu, Ming-Dou Ker, Hsiao-Wen Zan |
An Ultra-Low Voltage CMOS Voltage Controlled Oscillator with Process and Temperature Compensation. |
IEICE Trans. Electron. |
2017 |
DBLP DOI BibTeX RDF |
|
24 | Harikrishna Veldandi, Rafi Ahamed Shaik |
An Ultra-Low-Voltage Bulk-Driven Analog Voltage Buffer with Rail-to-Rail Input/Output Range. |
Circuits Syst. Signal Process. |
2017 |
DBLP DOI BibTeX RDF |
|
24 | Omid Mirmotahari, Ali Dadashi, Mehdi Azadmehr, Yngvar Berg |
Novel high-speed dynamic differential ultra low voltage logic for supply-voltage below 300 mV. |
ICECS |
2015 |
DBLP DOI BibTeX RDF |
|
24 | Yongfu Li 0002, Wei Mao 0002, Zhe Zhang 0008, Yong Lian 0001 |
An ultra-low voltage comparator with improved comparison time and reduced offset voltage. |
APCCAS |
2014 |
DBLP DOI BibTeX RDF |
|
24 | Amir Hossein Masnadi Shirazi, Shahriar Mirabbasi |
An ultra-low-voltage CMOS mixer using switched-transconductance, current-reuse and dynamic-threshold-voltage gain-boosting techniques. |
NEWCAS |
2012 |
DBLP DOI BibTeX RDF |
|
24 | Mingoo Seok, Dongsuk Jeon, Chaitali Chakrabarti, David T. Blaauw, Dennis Sylvester |
Extending energy-saving voltage scaling in ultra low voltage integrated circuit designs. |
ICICDT |
2012 |
DBLP DOI BibTeX RDF |
|
24 | Tianwang Li, Jinguang Jiang, Bo Ye, Xingcheng Han |
Ultra low voltage, wide tuning range voltage controlled ring oscillator. |
ASICON |
2011 |
DBLP DOI BibTeX RDF |
|
24 | Ranjith Kumar, Volkan Kursun |
Temperature-adaptive voltage tuning for enhanced energy efficiency in ultra-low-voltage circuits. |
Microelectron. J. |
2008 |
DBLP DOI BibTeX RDF |
|
24 | Masaaki Iijima, Masayuki Kitamura, Masahiro Numa, Akira Tada, Takashi Ipposhi, Shigeto Maegawa |
Boosted Voltage Scheme with Active Body-Biasing Control on PD-SOI for Ultra Low Voltage Operation. |
IEICE Trans. Electron. |
2007 |
DBLP DOI BibTeX RDF |
|
24 | Luis Henrique de Carvalho Ferreira, Tales Cleber Pimenta |
A CMOS voltage reference for ultra low-voltage applications. |
ICECS |
2005 |
DBLP DOI BibTeX RDF |
|
21 | Wei-Bin Yang, Chi-Hsuan Sun, Diptendu Sinha Roy, Yi-Mei Chen |
Asynchronous Digital Low-Dropout Regulator With Dual Adjustment Mode in Ultra-Low Voltage Input. |
IEEE Access |
2021 |
DBLP DOI BibTeX RDF |
|
21 | Peiyi Zhao, Zisong Wang, Congyi Zhu, Tom Springer, Jacob Anabi, Yinshui Xia, Lingli Wang |
Ultra-low-voltage Low-power Self-adaptive Static Pulsed Latch. |
ASICON |
2021 |
DBLP DOI BibTeX RDF |
|
21 | Saeideh Kabirpour, Mohsen Jalali |
Analysis and design of ultra-low-voltage low-power rail-to-rail VCO-based comparator in subthreshold region. |
Microelectron. J. |
2019 |
DBLP DOI BibTeX RDF |
|
21 | Ali Asghar Vatanjou, Trond Ytterdal, Snorre Aunet |
An Ultra-Low Voltage and Low-Energy Level Shifter in 28-nm UTBB-FDSOI. |
IEEE Trans. Circuits Syst. II Express Briefs |
2019 |
DBLP DOI BibTeX RDF |
|
21 | Jiacong Sun, Hailong Jiao |
A 12T Low-Power Standard-Cell Based SRAM Circuit for Ultra-Low-Voltage Operations. |
ICICDT |
2019 |
DBLP DOI BibTeX RDF |
|
21 | Wei-Bin Yang, Yu-Yao Lin, Yu-Lung Lo |
Design of Fast-Locked Digitally Controlled Low-Dropout Regulator for Ultra-low Voltage Input. |
Circuits Syst. Signal Process. |
2017 |
DBLP DOI BibTeX RDF |
|
21 | Pantre Kompitaya, Khanittha Kaewdang |
An Ultra-Low-Voltage Low-Power Current-Mode True RMS-to-DC Converter. |
J. Circuits Syst. Comput. |
2016 |
DBLP DOI BibTeX RDF |
|
21 | Anna Richelli |
Ultra Low Voltage and Low Power Biopotential Amplifier with High Electromagnetic Interference Immunity. |
J. Low Power Electron. |
2016 |
DBLP DOI BibTeX RDF |
|
21 | Dina Kamel, Guerric de Streel, Santos Merino Del Pozo, Kashif Nawaz, François-Xavier Standaert, Denis Flandre, David Bol |
Towards Securing Low-Power Digital Circuits with Ultra-Low-Voltage Vdd Randomizers. |
SPACE |
2016 |
DBLP DOI BibTeX RDF |
|
21 | Zina Saheb, Ezz I. El-Masry, Jean-Francois Bousquet |
Ultra-low voltage and low power ring oscillator for wireless sensor network using CMOS varactor. |
CCECE |
2016 |
DBLP DOI BibTeX RDF |
|
21 | Seongjong Kim, Mingoo Seok |
Variation-Tolerant, Ultra-Low-Voltage Microprocessor With a Low-Overhead, Within-a-Cycle In-Situ Timing-Error Detection and Correction Technique. |
IEEE J. Solid State Circuits |
2015 |
DBLP DOI BibTeX RDF |
|
21 | Mahdi Parvizi, Karim Allidina, Mourad N. El-Gamal |
A Sub-mW, Ultra-Low-Voltage, Wideband Low-Noise Amplifier Design Technique. |
IEEE Trans. Very Large Scale Integr. Syst. |
2015 |
DBLP DOI BibTeX RDF |
|
21 | Seied Zaniar Hoseini, Johar Abdekhoda, Kye-Shin Lee |
An Ultra Low Voltage Low Power Self Biased Latched Comparator with Wide Input Common Mode Range for Biomedical Applications. |
J. Circuits Syst. Comput. |
2015 |
DBLP DOI BibTeX RDF |
|
21 | Meng-Fan Chang, Che-Wei Wu, Jui-Yu Hung, Ya-Chin King, Chomg-Jung Lin, Mon-Shu Ho, Chia-Cheng Kuo, Shyh-Shyuan Sheu |
A low-power subthreshold-to-superthreshold level-shifter for sub-0.5V embedded resistive RAM (ReRAM) macro in ultra low-voltage chips. |
APCCAS |
2014 |
DBLP DOI BibTeX RDF |
|
21 | Gim Heng Tan, Roslina Mohd Sidek, Maryam bt. Mohd Isa |
Design of ultra-low voltage and low-power CMOS current bleeding mixer. |
APCCAS |
2014 |
DBLP DOI BibTeX RDF |
|
21 | Costas Laoudias, Costas Psychalinos |
Ultra Low-Voltage Low-Power Realization of Non-Linear Energy Operator for Spike Detection. |
J. Low Power Electron. |
2013 |
DBLP DOI BibTeX RDF |
|
21 | I-Chyn Wey, Yi-Jung Lan, Chien-Chang Peng |
Reliable ultra-low-voltage low-power probabilistic-based noise-tolerant latch design. |
Microelectron. Reliab. |
2013 |
DBLP DOI BibTeX RDF |
|
21 | Suat U. Ay |
Boosted CMOS APS Pixel Readout for Ultra Low-Voltage and Low-Power Operation. |
IEEE Trans. Circuits Syst. II Express Briefs |
2013 |
DBLP DOI BibTeX RDF |
|
21 | Wen-Pin Tu, Chung-Han Chou, Shih-Hsu Huang, Shih-Chieh Chang, Yow-Tyng Nieh, Chien-Yung Chou |
Low-power timing closure methodology for ultra-low voltage designs. |
ICCAD |
2013 |
DBLP DOI BibTeX RDF |
|
21 | David Bol, Julien De Vos, Cédric Hocquet, François Botman, François Durvaux, Sarah Boyd, Denis Flandre, Jean-Didier Legat |
A 25MHz 7μW/MHz ultra-low-voltage microcontroller SoC in 65nm LP/GP CMOS for low-carbon wireless sensor nodes. |
ISSCC |
2012 |
DBLP DOI BibTeX RDF |
|
21 | Yongtae Kim, Peng Li 0001 |
An ultra-low voltage digitally controlled low-dropout regulator with digital background calibration. |
ISQED |
2012 |
DBLP DOI BibTeX RDF |
|
21 | Ajay Balankutty, Peter R. Kinget |
An Ultra-Low Voltage, Low-Noise, High Linearity 900-MHz Receiver With Digitally Calibrated In-Band Feed-Forward Interferer Cancellation in 65-nm CMOS. |
IEEE J. Solid State Circuits |
2011 |
DBLP DOI BibTeX RDF |
|
21 | Arash Ahmadpour |
An Ultra Low-Voltage and Low-Power OTA Using Bulk-Input Technique and Its Application in Active-RC Filters. |
Circuits Syst. |
2011 |
DBLP DOI BibTeX RDF |
|
21 | Chip-Hong Chang, Jiangmin Gu, Mingyan Zhang |
Ultra low-voltage low-power CMOS 4-2 and 5-2 compressors for fast arithmetic circuits. |
IEEE Trans. Circuits Syst. I Regul. Pap. |
2004 |
DBLP DOI BibTeX RDF |
|
18 | Yanjie Wang, M. Zamin Khan, Kris Iniewski |
A 0.65V, 1.9mW CMOS Low-Noise Amplifier at 5GHz. |
IWSOC |
2005 |
DBLP DOI BibTeX RDF |
|
17 | Léopold Van Brandt, Jean-Charles Delvenne, Denis Flandre |
Variability-Aware Noise-Induced Dynamic Instability of Ultra-Low-Voltage SRAM Bitcells. |
CoRR |
2024 |
DBLP DOI BibTeX RDF |
|
17 | Léopold Van Brandt, Jean-Charles Delvenne, Denis Flandre |
Variability-Aware Noise-Induced Dynamic Instability of Ultra-Low-Voltage SRAM Bitcells. |
LASCAS |
2024 |
DBLP DOI BibTeX RDF |
|
17 | Carlos Galup-Montoro, Márcio C. Schneider, Thiago Darós Fernandes, Deni Germano Alves Neto |
A brief Survey of Ultra-Low-Voltage CMOS: Approaching the Diffusion Limit. |
LASCAS |
2024 |
DBLP DOI BibTeX RDF |
|
17 | Chao Chen, Dan Huang, Yan Zhao, Yuemin Jin, Jun Yang 0006 |
An Ultra-Low-Voltage 2.4-GHz Flicker-Noise-Free RF Receiver Front End Based on Switched-Capacitor Hybrid TIA With 4.5-dB NF and 11.5-dBm OIP3. |
IEEE J. Solid State Circuits |
2023 |
DBLP DOI BibTeX RDF |
|
17 | Chongsoo Jung, Hoyong Seong, Injun Choi, Sohmyung Ha, Minkyu Je |
A Process-Scalable Ultra-Low-Voltage Sleep Timer With a Time-Domain Amplifier and a Switch-Less Resistance Multiplier. |
IEEE J. Solid State Circuits |
2023 |
DBLP DOI BibTeX RDF |
|
17 | Viet Nguyen, Filippo Schembari, Robert Bogdan Staszewski |
Exploring Speed Maximization of Frequency-to-Digital Conversion for Ultra-Low-Voltage VCO-Based ADCs. |
IEEE Trans. Circuits Syst. I Regul. Pap. |
2023 |
DBLP DOI BibTeX RDF |
|
17 | Liwen Lin, Ka-Meng Lei, Pui-In Mak, Rui Paulo Martins |
An Ultra-Low-Voltage Single-Crystal Oscillator-Timer (XO-Timer) Delivering 16-MHz and 32.258-kHz Clocks for Sub-0.5-V Energy-Harvesting BLE Radios in 28-nm CMOS. |
IEEE Open J. Circuits Syst. |
2023 |
DBLP DOI BibTeX RDF |
|
17 | Ankur Mukherjee, Ashik C. Jayamon, R. Sai Chandra Teja, Ashudeb Dutta |
Ultra-low voltage start-up clock generators for micro-scale energy harvesting: New variants of body-biased stacked inverter based ring oscillators. |
Microelectron. J. |
2023 |
DBLP DOI BibTeX RDF |
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