Search results for "VCO"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
105	Dhruva Ghai, Saraju P. Mohanty, Elias Kougianos	Unified P4 (power-performance-process-parasitic) fast optimization of a Nano-CMOS VCO.	ACM Great Lakes Symposium on VLSI	2009	DBLP DOI BibTeX RDF	dual oxide technology, nano-cmos, performance aware design, vco, process variation, parasitics, power aware design
93	Dongmin Park, SeongHwan Cho	A power-optimized CMOS LC VCO with wide tuning range in 0.5-V supply.	ISCAS	2006	DBLP DOI BibTeX RDF
93	Byunghoo Jung, Shubha Bommalingaiahnapallya, Ramesh Harjani	Power optimized LC VCO and mixer co-design.	ISCAS (5)	2005	DBLP DOI BibTeX RDF
82	Rafaella Fiorelli, Fernando Silveira, Eduardo J. Peralías	Phase noise - consumption trade-off in low power RF-LC-VCO design in micro and nanometric technologies.	SBCCI	2009	DBLP DOI BibTeX RDF	design methodology, power consumption, VCO, radio-frequency
82	Yun Cheol Han, Kwang Il Kim, Jun Kim, Kwang Sub Yoon	A dual band CMOS VCO with a balanced duty cycle buffer.	ACM Great Lakes Symposium on VLSI	2003	DBLP DOI BibTeX RDF	dual band, VCO
81	Chung-Yu Wu, Chi-Yao Yu	A 0.8 V 5.9 GHz wide tuning range CMOS VCO using inversion-mode bandswitching varactors.	ISCAS (5)	2005	DBLP DOI BibTeX RDF
81	Huiting Chen, Edward Lee, Randall L. Geiger	A 2 GHz VCO with process and temperature compensation.	ISCAS (2)	1999	DBLP DOI BibTeX RDF
79	Min-Yi Wang, Robin R.-B. Sheen, Oscal T.-C. Chen, R. Y. J. Tsen	A dual-band RF front-end for WCDMA and GPS applications.	ISCAS (4)	2002	DBLP DOI BibTeX RDF
70	Z. Wang, Hüseyin Serif Savci, Numan Sadi Dogan	1-V ultra-low-power CMOS LC VCO for UHF quadrature signal generation.	ISCAS	2006	DBLP DOI BibTeX RDF
70	Baris Koc, Adil Koukab, Günhan Dündar	Phase noise in bipolar and CMOS VCO's - an analytical comparison.	ISCAS	2006	DBLP DOI BibTeX RDF
70	Jader A. De Lima, Peterson R. Agostinho	A low-voltage low sensitivity sinusoidal VCO for DPLL realizations.	ISCAS (1)	2004	DBLP DOI BibTeX RDF
70	Lin Jia, Alper Cabuk, Jianguo Ma, Kiat Seng Yeo	A 52 GHz VCO with Low Phase Noise Implemented in SiGe BiCMOS Technology.	IWSOC	2003	DBLP DOI BibTeX RDF
70	Kazuma Ohashi, Yusaku Ito, Yoshiaki Yoshihara, Kenichi Okada, Kazuya Masu	A Wideband CMOS LC-VCO Using Variable Inductor.	ASP-DAC	2007	DBLP DOI BibTeX RDF	wideband CMOS LC-VCO, variable inductor, tunable CMOS voltage controlled oscillator, switched capacitors, 1.28 to 2.75 GHz, CMOS process, 0.18 micron
68	S.-L. Jang, Y.-H. Chuang, C.-C. Chen, S.-H. Lee, J.-F. Lee	A CMOS Dual-Band Voltage Controlled Oscillator.	APCCAS	2006	DBLP DOI BibTeX RDF
59	Tian Xia, Peilin Song, Hao Zheng 0001	Characterizing the VCO jitter due to the digital simultaneous switching noise.	ACM Great Lakes Symposium on VLSI	2005	DBLP DOI BibTeX RDF	buffer, jitter, VCO, simultaneous switching noise
59	Jiwei Chen, Bingxue Shi	Circuit design of a wide tuning range CMOS VCO with automatic amplitude control.	ACM Great Lakes Symposium on VLSI	2003	DBLP DOI BibTeX RDF	automatic amplitude control, tuning range, CMOS, VCO
59	Tjaart A. K. Opperman, Saurabh Sinha	A 5 GHz BiCMOS I/Q VCO with 360degree variable phase outputs using the vector sum method.	PIMRC	2008	DBLP DOI BibTeX RDF
59	Nathalie Deltimple, Yann Deval, Didier Belot, Eric Kerherve	Design of Class-E power VCO in 65nm CMOS technology: Application to RF transmitter architecture.	ISCAS	2008	DBLP DOI BibTeX RDF
59	Zhujin Zhou, Ning Li 0007, Wei Li 0038, Junyan Ren	A Power-Optimized CMOS Quadrature VCO with Wide-Tuning Range for UWB Receivers.	ISCAS	2007	DBLP DOI BibTeX RDF
59	Sudip Shekhar, Sankaran Aniruddhan, David J. Allstot	A fully-differential CMOS Clapp VCO for IEEE 802.11a applications.	ISCAS	2006	DBLP DOI BibTeX RDF
59	Wang-Chi Cheng, Cheong-Fat Chan, Kong-Pang Pun, Oliver Chiu-sing Choy	0.8 V GPS band CMOS VCO with 29% Tuning Range.	APCCAS	2006	DBLP DOI BibTeX RDF
59	Ali Fard	Phase noise and amplitude issues of a wide-band VCO utilizing a switched tuning resonator.	ISCAS (3)	2005	DBLP DOI BibTeX RDF
59	Lin Jia, Jianguo Ma, Kiat Seng Yeo, Manh Anh Do	A novel methodology for the design of LC tank VCO with low phase noise.	ISCAS (1)	2005	DBLP DOI BibTeX RDF
59	V. Vibhute, David Fitrio, Jugdutt Singh, Aladin Zayegh, Aleksandar Stojcevski	A Tunable VCO for Multistandard Mobile Receiver.	DELTA	2004	DBLP DOI BibTeX RDF
59	M. Nakamura, Toshimasa Matsuoka, Kenji Taniguchi 0001	CMOS phase-shift VCO for short-range wireless communication.	ISCAS (4)	2002	DBLP DOI BibTeX RDF
57	José Vieira do Vale Neto	Design sequence for a LC-tank voltage controlled oscillator in CMOS for RF.	SBCCI	2004	DBLP DOI BibTeX RDF	LC-tank, ASIC, CMOS, VCO, radio frequency
56	Richard Geisler, John C. Liobe, Martin Margala	Process and Temperature Calibration of PLLs with BiST Capabilities.	ISCAS	2007	DBLP DOI BibTeX RDF
56	Prabir K. Saha, Ashudeb Dutta, Amit Patra, T. K. Bhattacharyya	Design of a 1 V Low Power 900 MHz QVCO.	VLSI Design	2006	DBLP DOI BibTeX RDF
56	Debapriya Sahu	A Completely Integrated Low Jitter CMOS PLL for Analog Front Ends in Systems on Chip Environment.	ASP-DAC/VLSI Design	2002	DBLP DOI BibTeX RDF
48	C. N. M. Marins, Luiz C. Kretly	Minimizing the mismatch errors at the VCO and cascode buffer connections in front end of BiCMOS RFICs operating on S band.	SBCCI	2007	DBLP DOI BibTeX RDF	Gm LC configuration oscillator, SiGe BiCMOS .35?m technology, cascode configuration, VCO, front-ends
48	Jonghae Kim, Jean-Olivier Plouchart, Noah Zamdmer, Melanie Sherony, Yue Tan, Meeyoung Yoon, Robert Trzcinski, Mohamed Talbi, John Safran, Asit Ray, Lawrence F. Wagner	A power-optimized widely-tunable 5-GHz monolithic VCO in a digital SOI CMOS technology on high resistivity substrate.	ISLPED	2003	DBLP DOI BibTeX RDF	SOI CMOS, high resistivity substrate, phase NoiseFOM, low power, VCO, RF design
48	Devesh Nema, Thomas Toifl	Active compensation of supply noise for a 5-GHz VCO in 45-nm CMOS SOI technology.	ISCAS	2008	DBLP DOI BibTeX RDF
48	Dhruva Ghai, Saraju P. Mohanty, Elias Kougianos	Parasitic Aware Process Variation Tolerant Voltage Controlled Oscillator (VCO) Design.	ISQED	2008	DBLP DOI BibTeX RDF
48	Ki-Jin Kim, Kwang-Ho Ahn, T. H. Lim	Low Phase Noise Bond Wire VCO for DVB-H.	DELTA	2008	DBLP DOI BibTeX RDF	bond wire, low phase noise, DVB-H
48	Stephane Bronckers, Charlotte Soens, Geert Van der Plas, Gerd Vandersteen, Yves Rolain	Interactive presentation: Simulation methodology and experimental verification for the analysis of substrate noise on LC-VCO's.	DATE	2007	DBLP DOI BibTeX RDF
48	Wei Dong 0002, Zhuo Feng, Peng Li 0001	Efficient VCO phase macromodel generation considering statistical parametric variations.	ICCAD	2007	DBLP DOI BibTeX RDF
48	Ahmed Saad, Khaled M. Sharaf	A Fully Integrated 2.4GHz CMOS Frequency Synthesizer Using a Ring-Based VCO with Inductive Peaking.	ISCAS	2007	DBLP DOI BibTeX RDF
48	Sohrab Samadian	A Low Phase Noise Quad-Band CMOS VCO with Minimized Gain Variation for GSM/GPRS/EDGE.	ISCAS	2007	DBLP DOI BibTeX RDF
48	Le Wang, Parag Upadhyaya, Pinping Sun, Yang Zhang, Deuk Hyoun Heo, Yi-Jan Emery Chen, DongHo Jeong	A 5.3GHz low-phase-noise LC VCO with harmonic filtering resistor.	ISCAS	2006	DBLP DOI BibTeX RDF
48	Dongkyu Park, Byunghoo Jung	Low power LC-VCO design using direct cross-coupled cell biasing.	ISCAS	2006	DBLP DOI BibTeX RDF
48	Liming Xiu, Zhihong You	A "Flying-Adder" frequency synthesis architecture of reducing VCO stages.	IEEE Trans. Very Large Scale Integr. Syst.	2005	DBLP DOI BibTeX RDF
48	Kari Stadius, Kari Halonen	Development of 4-GHz flip-chip VCO module.	ISCAS (3)	2005	DBLP DOI BibTeX RDF
48	Tser-Yu Lin, Ying-Zong Juang, Hung-Yu Wang, Chin-Fong Chiu	A low power 2.2-2.6GHz CMOS VCO with a symmetrical spiral inductor.	ISCAS (1)	2003	DBLP DOI BibTeX RDF
48	M. Jamal Deen, Mehdi H. Kazemeini, Susan Nuseh	Performance characteristics of an ultra-low power VCO.	ISCAS (1)	2003	DBLP DOI BibTeX RDF
48	Youcef Fouzar, Yvon Savaria, Mohamad Sawan	A CMOS phase-locked loop with an auto-calibrated VCO.	ISCAS (3)	2002	DBLP DOI BibTeX RDF
48	Masayuki Takahashi, Kimihiro Ogawa, Kenneth S. Kundert	VCO Jitter Simulation and Its Comparison With Measurement.	ASP-DAC	1999	DBLP DOI BibTeX RDF
48	Pete M. Campbell, Hans J. Greub, Atul Garg, Sam A. Steidl, Steven R. Carlough, Matthew W. Ernest, Robert F. Philhower, Cliff A. Maier, Russell P. Kraft, John F. McDonald 0001	A very wide bandwidth digital VCO using quadrature frequency multiplication and division implemented in AlGaAs/GaAs HBT's.	IEEE Trans. Very Large Scale Integr. Syst.	1998	DBLP DOI BibTeX RDF
47	Sergio Gagliolo, Giacomo Pruzzo, Daniele D. Caviglia	Phase noise performances of a cross-coupled CMOS VCO with resistor tail biasing.	SBCCI	2005	DBLP DOI BibTeX RDF	resistor biasing, low power, wireless, CMOS, low voltage, voltage controlled oscillator (VCO), phase noise
46	Himanshu Arora, Nikolaus Klemmer, Patrick D. Wolf	A 900 MHz ISM band mash-12 fractional-n frequency synthesizer for 5-Mbps data transmission.	ACM Great Lakes Symposium on VLSI	2007	DBLP DOI BibTeX RDF	RMS phase error, delta-sigma, fractional-N, gain mismatch, phase frequency detector, spurs, thermal noise, VCO, phase noise, frequency synthesizer, charge pump
45	Takashi Kawamoto, Masaru Kokubo	A low-jitter 1.5-GHz and large-EMI reduction 10-dBm spread-spectrum clock generator for Serial-ATA.	ASP-DAC	2009	DBLP DOI BibTeX RDF
45	Kris Hermus, Laurent Girin, Hugo Van hamme, Sufian Irhimeh	Estimation of the voicing cut-off frequency contour of natural speech based on harmonic and aperiodic energies.	ICASSP	2008	DBLP DOI BibTeX RDF
45	Sangho Shin, Kwyro Lee, Sung-Mo Kang	Low-power 2.4GHz CMOS frequency synthesizer with differentially controlled MOS varactors.	ISCAS	2006	DBLP DOI BibTeX RDF
45	Igor Miletic, Ralph Mason	Quantization noise reduction using multiphase PLLs.	ISCAS	2006	DBLP DOI BibTeX RDF
45	Igor Miletic, Ralph Mason	Bandwidth Expansion in Sigma-Delta PLLs Using Multiphase VCOs.	CCECE	2006	DBLP DOI BibTeX RDF
45	Sadeka Ali, Gregory Briggs, Martin Margala	A High Frequency, Low Jitter Auto-Calibration Phase-Locked Loop with Built-in-Self-Test.	DFT	2005	DBLP DOI BibTeX RDF
45	Dong-Shong Liang, Kwang-Jow Gan, Chung-Chih Hsiao, Cher-Shiung Tsai, Yaw-Hwang Chen, Shih-Yu Wang, Shun-Huo Kuo, Feng-Chang Chiang, Long-Xian Su	Novel Voltage-Controlled Oscillator Design by MOS-NDR Devices and Circuits.	IWSOC	2005	DBLP DOI BibTeX RDF
45	Ian Brynjolfson, Zeljko Zilic	A new PLL design for clock management applications.	ISCAS (4)	2001	DBLP DOI BibTeX RDF
45	Tsung-Hsien Lin, Henry Sanchez, Razieh Rofougaran, William J. Kaiser	CMOS front end components for micropower RF wireless systems.	ISLPED	1998	DBLP DOI BibTeX RDF
37	Yonghong Yan 0002, Yan Xie, Wei Peng, Yun Zeng	Wide-Band Low-Noise Quadrature VCO Design.	IIH-MSP	2008	DBLP DOI BibTeX RDF	CMOS, VCO, Quadrature, Wide-band
36	Shizhong Mei	Timing Jitter and Power Spectral Density of Random Walk Noise in VCO.	IEEE Trans. Very Large Scale Integr. Syst.	2008	DBLP DOI BibTeX RDF
36	Shoichi Hara, Takeshi Ito, Kenichi Okada, Akira Matsuzawa	Design space exploration of low-phase-noise LC-VCO using multiple-divide technique.	ISCAS	2008	DBLP DOI BibTeX RDF
36	Yu-Te Liao, C.-J. Richard Shi	A 6-11GHz multi-phase VCO design with active inductors.	ISCAS	2008	DBLP DOI BibTeX RDF
36	Erkan Acar, Sule Ozev	Go/No-Go Testing of VCO Modulation RF Transceivers Through the Delayed-RF Setup.	IEEE Trans. Very Large Scale Integr. Syst.	2007	DBLP DOI BibTeX RDF
36	Muhammad Usama, Tad A. Kwasniewski	A 40 GHz Quadrature LC VCO and Frequency Divider in 90-nm CMOS Technology.	ISCAS	2007	DBLP DOI BibTeX RDF
36	Ryan J. Kier, Reid R. Harrison	Power minimization of a 433-MHz LC VCO for an implantable neural recording system.	ISCAS	2006	DBLP DOI BibTeX RDF
36	Ting Wu 0003, Un-Ku Moon, Kartikeya Mayaram	Dependence of LC VCO oscillation frequency on bias current.	ISCAS	2006	DBLP DOI BibTeX RDF
36	Shao-Hua Lee, Yun-Hsueh Chuang, Li-Ren Chi, Sheng-Lyang Jang, Jian-Feng Lee	A Low-Voltage 2.4GHz VCO with 3D Helical Inductors.	APCCAS	2006	DBLP DOI BibTeX RDF
36	Gaowei Yan, Gang Xie 0001, Yuxia Qiu, Zehua Chen	MEA Based Nonlinearity Correction Algorithm for the VCO of LFMCW Radar Level Gauge.	RSFDGrC (1)	2005	DBLP DOI BibTeX RDF
36	Gaowei Yan, Jun Xie, Keming Xie	The Application of IMEA in Nonlinearity Correction of VCO Frequency Modulation.	ICNC (2)	2005	DBLP DOI BibTeX RDF
36	Ram Singh Rana, Xiangdong Zhou, Yong Lian 0001	An optimized 2.4 GHz CMOS LC-tank VCO with 0.55 %/V frequency pushing and 516 MHz tuning range.	ISCAS (5)	2005	DBLP DOI BibTeX RDF
36	Pedram Sameni, Chris Siu, Shahriar Mirabbasi, Hormoz Djahanshahi, Marwa Hamour, Krzysztof Iniewski, Jatinder Chana	Modeling of MOS varactors and characterizing the tuning curve of a 5-6 GHz LC VCO.	ISCAS (5)	2005	DBLP DOI BibTeX RDF
36	Jie Long, Jo Yi Foo, Robert J. Weber	A 2.4 GHz Low-Power Low-Phase-Noise CMOS LC VCO.	ISVLSI	2004	DBLP DOI BibTeX RDF
36	Takahito Miyazaki, Masanori Hashimoto, Hidetoshi Onodera	A performance comparison of PLLs for clock generation using ring oscillator VCO and LC oscillator in a digital CMOS process.	ASP-DAC	2004	DBLP DOI BibTeX RDF
36	Ghanshyam Nayak, P. R. Mukund	Chip Package Co-Design of a Heterogeneously Integrated 2.45GHz CMOS VCO using Embedded Passives in a Silicon Package.	VLSI Design	2004	DBLP DOI BibTeX RDF
36	Mehdi H. Kazemeini, M. Jamal Deen, Susan Nuseh	Phase noise in a back-gate biased low-voltage VCO.	ISCAS (1)	2003	DBLP DOI BibTeX RDF
36	Hyung Ki Ahn, In-Cheol Park, Beomsup Kim	A 5-GHz self-calibrated I/Q clock generator using a quadrature LC-VCO.	ISCAS (1)	2003	DBLP DOI BibTeX RDF
36	Marc Tiebout	Physical scaling of integrated inductor layout and model and its application to WLAN VCO design at 11GHz and 17GHz.	ISCAS (1)	2003	DBLP DOI BibTeX RDF
36	Sau-Mou Wu, Ron-Yi Liu, Wei-Liang Chen	A 5.8-GHz High Efficient, Low Power, Low Phase Noise CMOS VCO for IEEE 802.11a.	IWSOC	2003	DBLP DOI BibTeX RDF
36	J. Bhattacharjee, D. Mukherjee, Joy Laskar	A monolithic CMOS VCO for wireless LAN applications.	ISCAS (3)	2002	DBLP DOI BibTeX RDF
36	Fikret Dülger, Edgar Sánchez-Sinencio	Design trade-offs of a symmetric linearized CMOS LC VCO.	ISCAS (4)	2002	DBLP DOI BibTeX RDF
36	Ye-Ming Li, J. Alvin Connelly	Modeling a resonant LC tank circuit embedded in a VCO.	ISCAS (3)	2002	DBLP DOI BibTeX RDF
36	H. Parthasarathy, Ghanshyam Nayak, Ponnathpur R. Mukund	Analysis of VCO jitter in chip-package co-design.	ISCAS (3)	2002	DBLP DOI BibTeX RDF
36	Chua-Chin Wang, Yu-Tsun Chien, Ying-Pei Chen	A practical load-optimized VCO design for low-jitter 5 V 500 MHz digital phase-locked loop.	ISCAS (2)	1999	DBLP DOI BibTeX RDF
35	Marcio Barbosa Lucks, Nobuo Oki	Radial basis function network applied to the linearization of a voltage controlled oscillator.	SBCCI	2007	DBLP DOI BibTeX RDF	artificial neural networks, radial basis function, linearization, VCO, operational transconductance amplifier
35	Hamid Reza Sadr M. N	A Novel Approach to the Design of a Linearized Widely Tunable Very Low Power and Low Noise Differential Transconductor.	PATMOS	2005	DBLP DOI BibTeX RDF	Differential transconductors, negative resistors, analog circuits and filters, widely tunable circuits, GHz range frequencies, continuous-time filters, Q-enhanced active filters, Gm-C filters, low power, RF, VCO, low noise
34	Luciano Severino de Paula, Altamiro Amadeu Susin, Sergio Bampi	A wide band CMOS differential voltage-controlled ring oscillator.	SBCCI	2008	DBLP DOI BibTeX RDF	SSB mixer, wide-band oscillators, voltage-controlled oscillator, frequency synthesizer
34	Chorng-Sii Hwang, Huan-Chun Li, Hen-Wai Tsao	A spread spectrum clock generator using digital modulation scheme.	SoCC	2008	DBLP DOI BibTeX RDF
34	Luciano Severino de Paula, Eric E. Fabris, Sergio Bampi, Altamiro Amadeu Susin	A High Swing Low Power CMOS Differential Voltage-Controlled Ring Oscillator.	ISVLSI	2007	DBLP DOI BibTeX RDF
34	Raghuram Jonnalagedda, Kartikeya Mayaram	Design of Very Low Noise 4.2GHz Clapp VCOs.	ISCAS	2007	DBLP DOI BibTeX RDF
34	Mostafa Savadi Oskooei, Ali Afzali-Kusha, Seyed Mojtaba Atarodi	A High-Speed and Low-Power Voltage Controlled Oscillator in 0.18-µm CMOS Process.	ISCAS	2007	DBLP DOI BibTeX RDF
34	Kenneth K. O, Changhua Cao, Eunyoung Seok, Swaminathan Sankaran	CMOS Millimeter-Wave Signal Sources and Detectors.	ISCAS	2007	DBLP DOI BibTeX RDF
34	Yan Huang 0016, Emmanuel M. Drakakis, Chris Toumazou	A Wide Tuning Range CMOS Oscillator for an Optoelectronic Retinal Prosthesis System.	ISCAS	2007	DBLP DOI BibTeX RDF
34	Andreas Tritschler	A Continuous Time Analog-to-Digital Converter With 90µW and 1.8µV/LSB Based on Differential Ring Oscillator Structures.	ISCAS	2007	DBLP DOI BibTeX RDF
34	Li Zhang 0023, Baoyong Chi, Zhihua Wang 0001, Hongyi Chen, Jinke Yao, Ende Wu	A 2-GHz 6.1-mA Fully-Differential CMOS Phase-Locked Loop.	ISCAS	2007	DBLP DOI BibTeX RDF
34	Meng-Ting Tsai, Ching-Yuan Yang	A frequency synthesizer realized by a transformer-based voltage-controlled oscillator for IEEE 802.11a/b/g channels.	ISCAS	2006	DBLP DOI BibTeX RDF
34	Jaewook Kim, SeongHwan Cho	A time-based analog-to-digital converter using a multi-phase voltage controlled oscillator.	ISCAS	2006	DBLP DOI BibTeX RDF
34	Sadeka Ali, Martin Margala	A 2.4-GHz auto-calibration frequency synthesizer with on-chip built-in-self-test solution.	ISCAS	2006	DBLP DOI BibTeX RDF
34	Hong Zhang, Guican Chen, Ning Li	A 2.4-GHz linear-tuning CMOS LC voltage-controlled oscillator.	ASP-DAC	2005	DBLP DOI BibTeX RDF
34	Tony Pialis, Eric W. Hu, Khoman Phang	A 1.8V low-jitter CMOS ring oscillator with supply regulation.	ISCAS (3)	2005	DBLP DOI BibTeX RDF
34	Falguni Bala, Tapas Nandy	Conventional RC oscillators, though offer inexpensiveProgrammable High Frequency RC Oscillator.	VLSI Design	2005	DBLP DOI BibTeX RDF