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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 189 occurrences of 87 keywords
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Results
Found 273 publication records. Showing 273 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
80 | Sang Jeong Lee, Pen-Chung Yew |
On Augmenting Trace Cache for High-Bandwidth Value Prediction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 51(9), pp. 1074-1088, 2002. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
Instruction Level Parallelism, data dependences, Value prediction, trace cache, dynamic classification |
72 | Yiannakis Sazeides, James E. Smith 0001 |
The Predictability of Data Values. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: Proceedings of the Thirtieth Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 30, Research Triangle Park, North Carolina, USA, December 1-3, 1997, pp. 248-258, 1997, ACM/IEEE Computer Society, 0-8186-7977-8. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
Context Based Prediction, Stride Prediction, Last Value Prediction, Prediction, Value Prediction |
65 | Freddy Gabbay, Avi Mendelson |
Can Program Profiling Support Value Prediction? ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: Proceedings of the Thirtieth Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 30, Research Triangle Park, North Carolina, USA, December 1-3, 1997, pp. 270-280, 1997, ACM/IEEE Computer Society, 0-8186-7977-8. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
instruction-level parallelism, speculative execution, Value-prediction |
62 | Ravi Bhargava, Lizy Kurian John |
Latency and energy aware value prediction for high-frequency processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICS ![In: Proceedings of the 16th international conference on Supercomputing, ICS 2002, New York City, NY, USA, June 22-26, 2002, pp. 45-56, 2002, ACM, 1-58113-483-5. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
complexity-effective design, trace cache processors, low power, data speculation |
60 | Sang Jeong Lee, Pen-Chung Yew |
On Some Implementation Issues for Value Prediction on Wide-Issue ILP Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE PACT ![In: Proceedings of the 2000 International Conference on Parallel Architectures and Compilation Techniques (PACT'00), Philadelphia, Pennsylvania, USA, October 15-19, 2000, pp. 145-156, 2000, IEEE Computer Society, 0-7695-0622-4. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
60 | Sang Jeong Lee, Yuan Wang, Pen-Chung Yew |
Decoupled Value Prediction on Trace Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCA ![In: Proceedings of the Sixth International Symposium on High-Performance Computer Architecture, Toulouse, France, January 8-12, 2000, pp. 231-240, 2000, IEEE Computer Society, 0-7695-0550-3. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
Wide-issue superscalar processors, Trace processors, Speculative execution, Value prediction |
60 | Huiyang Zhou, Jill Flanagan, Thomas M. Conte |
Detecting Global Stride Locality in Value Streams. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: 30th International Symposium on Computer Architecture (ISCA 2003), 9-11 June 2003, San Diego, California, USA, pp. 324-335, 2003, IEEE Computer Society, 0-7695-1945-8. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
56 | Freddy Gabbay, Avi Mendelson |
Using Value Prediction to Increase the Power of Speculative Execution Hardware. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Comput. Syst. ![In: ACM Trans. Comput. Syst. 16(3), pp. 234-270, 1998. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
stride value prediction, speculative execution, value prediction |
55 | Toshinori Sato, Akihiko Hamano, Kiichi Sugitani, Itsujiro Arita |
Influence of Compiler Optimizations on Value Prediction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCN ![In: High-Performance Computing and Networking, 9th International Conference, HPCN Europe 2001, Amsterdam, The Netherlands, June 25-27, 2001, Proceedings, pp. 312-321, 2001, Springer, 3-540-42293-5. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
optimization level, high-performance compilers, instruction level parallelism, value prediction, data speculation |
54 | Anasua Bhowmik, Manoj Franklin |
Exploiting Data Value Prediction in Compiler Based Thread Formation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HiPC ![In: High Performance Computing - HiPC 2002, 9th International Conference, Bangalore, India, December 18-21, 2002, Proceedings, pp. 506-518, 2002, Springer, 3-540-00303-7. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
data value prediction, parallelization, profiling, data dependency, thread-level parallelism (TLP), speculative multithreading (SpMT) |
51 | Luis Ceze, Karin Strauss, James Tuck 0001, Josep Torrellas, Jose Renau |
CAVA: Using checkpoint-assisted value prediction to hide L2 misses. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Archit. Code Optim. ![In: ACM Trans. Archit. Code Optim. 3(2), pp. 182-208, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
checkpointed processor architectures, multiprocessor, memory hierarchies, Value prediction |
49 | Miroslav N. Velev |
Using Abstraction for Efficient Formal Verification of Pipelined Processors with Value Prediction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 7th International Symposium on Quality of Electronic Design (ISQED 2006), 27-29 March 2006, San Jose, CA, USA, pp. 51-56, 2006, IEEE Computer Society, 0-7695-2523-7. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
48 | Sang Jeong Lee, Pen-Chung Yew |
On Table Bandwidth and Its Update Delay for Value Prediction on Wide-Issue ILP Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 50(8), pp. 847-852, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
Decoupled value prediction, prediction value cache, dynamic classification |
47 | Huiyang Zhou, Thomas M. Conte |
Enhancing memory level parallelism via recovery-free value prediction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICS ![In: Proceedings of the 17th Annual International Conference on Supercomputing, ICS 2003, San Francisco, CA, USA, June 23-26, 2003, pp. 326-335, 2003, ACM, 1-58113-733-8. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
recovery-free value prediction, prefetching, memory disambiguation, memory level parallelism |
45 | Bohuslav Rychlik, John Faistl, Bryon Krug, John Paul Shen |
Efficacy and Performance Impact of Value Prediction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE PACT ![In: Proceedings of the 1998 International Conference on Parallel Architectures and Compilation Techniques, Paris, France, October 12-18, 1998, pp. 148-, 1998, IEEE Computer Society, 0-8186-8591-3. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
usefulness tracking, instruction level parallelism, speculative execution, superscalar processor, value prediction, hybrid predictor |
43 | Dean M. Tullsen, John S. Seng |
Storageless Value Prediction Using Prior Register Values. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: Proceedings of the 26th Annual International Symposium on Computer Architecture, ISCA 1999, Atlanta, Georgia, USA, May 2-4, 1999, pp. 270-279, 1999, IEEE Computer Society, 0-7695-0170-2. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
41 | Po-Jen Chuang, Young-Tzong Hsiao, Yu-Shian Chiu |
An Efficient Value Predictor Dynamically Using Loop and Locality Properties. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Supercomput. ![In: J. Supercomput. 30(1), pp. 19-36, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
loop and locality properties, benchmarks, value prediction, prediction accuracy, hardware cost, experimental performance evaluation |
41 | Karel Driesen, Urs Hölzle |
Multi-stage Cascaded Prediction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Euro-Par ![In: Euro-Par '99 Parallel Processing, 5th International Euro-Par Conference, Toulouse, France, August 31 - September 3, 1999, Proceedings, pp. 1312-1321, 1999, Springer, 3-540-66443-2. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
40 | Mikko H. Lipasti, Christopher B. Wilkerson, John Paul Shen |
Value Locality and Load Value Prediction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASPLOS ![In: ASPLOS-VII Proceedings - Seventh International Conference on Architectural Support for Programming Languages and Operating Systems, Cambridge, Massachusetts, USA, October 1-5, 1996., pp. 138-147, 1996, ACM Press, 0-89791-767-7. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
|
40 | Juan M. Cebrian, Juan L. Aragón, José M. García 0001, Stefanos Kaxiras |
Adaptive VP decay: making value predictors leakage-efficient designs for high performance processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Conf. Computing Frontiers ![In: Proceedings of the 4th Conference on Computing Frontiers, 2007, Ischia, Italy, May 7-9, 2007, pp. 113-122, 2007, ACM, 978-1-59593-683-7. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
leakage, value prediction, energy efficient architectures, cache decay |
39 | Youfeng Wu, Dong-yuan Chen, Jesse Fang |
Better exploration of region-level value locality with integrated computation reuse and value prediction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: Proceedings of the 28th Annual International Symposium on Computer Architecture, ISCA 2001, Göteborg, Sweden, June 30-July 4, 2001, pp. 98-108, 2001, ACM, 0-7695-1162-7. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
Systems Application Architecture |
38 | Xiao-Feng Li, Chen Yang, Zhao-Hui Du, Tin-Fook Ngai |
Exploiting Thread-Level Speculative Parallelism with Software Value Prediction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asia-Pacific Computer Systems Architecture Conference ![In: Advances in Computer Systems Architecture, 10th Asia-Pacific Conference, ACSAC 2005, Singapore, October 24-26, 2005, Proceedings, pp. 367-388, 2005, Springer, 3-540-29643-3. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
38 | J. Gregory Steffan, Christopher B. Colohan, Antonia Zhai, Todd C. Mowry |
Improving Value Communication for Thread-Level Speculation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCA ![In: Proceedings of the Eighth International Symposium on High-Performance Computer Architecture (HPCA'02), Boston, Massachusettes, USA, February 2-6, 2002, pp. 65-75, 2002, IEEE Computer Society, 0-7695-1525-8. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
parallelization, multithreaded, Speculation, value prediction |
38 | Chao-ying Fu, Jill T. Bodine, Thomas M. Conte |
Modeling Value Speculation: An Optimal Edge Selection Problem. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 52(3), pp. 277-292, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
optimal edge selection, critical path reduction, Value prediction, data dependence graph, value speculation |
36 | Chao-ying Fu, Matthew D. Jennings, Sergei Y. Larin, Thomas M. Conte |
Value Speculation Scheduling for High Performance Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASPLOS ![In: ASPLOS-VIII Proceedings of the 8th International Conference on Architectural Support for Programming Languages and Operating Systems, San Jose, California, USA, October 3-7, 1998., pp. 262-271, 1998, ACM Press, 1-58113-107-0. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
VLIW instruction schedulings, instruction level parallelism, value prediction, value speculation |
36 | Weidong Shi, Hsien-Hsin S. Lee |
Accelerating memory decryption and authentication with frequent value prediction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Conf. Computing Frontiers ![In: Proceedings of the 4th Conference on Computing Frontiers, 2007, Ischia, Italy, May 7-9, 2007, pp. 35-46, 2007, ACM, 978-1-59593-683-7. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
message authentication, value prediction, secure processors |
36 | Pedro Marcuello, Antonio González 0001, Jordi Tubella |
Thread Partitioning and Value Prediction for Exploiting Speculative Thread-Level Parallelism. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 53(2), pp. 114-125, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
Speculative thread-level parallelism, thread spawning policies, branch prediction, value prediction, clustered architectures |
34 | Brad Calder, Glenn Reinman, Dean M. Tullsen |
Selective Value Prediction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: Proceedings of the 26th Annual International Symposium on Computer Architecture, ISCA 1999, Atlanta, Georgia, USA, May 2-4, 1999, pp. 64-74, 1999, IEEE Computer Society, 0-7695-0170-2. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
33 | Yong Xiao, Xing-Ming Zhou |
Performance Evaluation of Data Value Prediction Schemes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Comput. Sci. Technol. ![In: J. Comput. Sci. Technol. 20(5), pp. 615-623, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
data value predictors, simulation, performance impact |
31 | Huiyang Zhou, Thomas M. Conte |
Enhancing Memory-Level Parallelism via Recovery-Free Value Prediction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 54(7), pp. 897-912, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
Single data stream architectures |
31 | Saroj Kaushik, Naman Singhal |
Pattern Prediction in Stock Market. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Australasian Conference on Artificial Intelligence ![In: AI 2009: Advances in Artificial Intelligence, 22nd Australasian Joint Conference, Melbourne, Australia, December 1-4, 2009. Proceedings, pp. 81-90, 2009, Springer, 978-3-642-10438-1. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
Support Vector Machine, Prediction, Pattern, Finance, Trend, Stock |
31 | Takenori Koushiro, Toshinori Sato, Itsujiro Arita |
A trace-level value predictor for Contrail processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SIGARCH Comput. Archit. News ![In: SIGARCH Comput. Archit. News 31(3), pp. 42-47, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
traceconstruction, energy efficiency, simultaneous multithreading, value prediction, chip multi processors |
31 | Jeffrey T. Oplinger, David L. Heine, Monica S. Lam |
In Search of Speculative Thread-Level Parallelism. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE PACT ![In: Proceedings of the 1999 International Conference on Parallel Architectures and Compilation Techniques, Newport Beach, California, USA, October 12-16, 1999, pp. 303-313, 1999, IEEE Computer Society, 0-7695-0425-6. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
Speculative Threads, Parallelism, Value Prediction |
30 | Milo M. K. Martin, Daniel J. Sorin, Harold W. Cain, Mark D. Hill, Mikko H. Lipasti |
Correctly implementing value prediction in microprocessors that support multithreading or multiprocessing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: Proceedings of the 34th Annual International Symposium on Microarchitecture, Austin, Texas, USA, December 1-5, 2001, pp. 328-337, 2001, ACM/IEEE Computer Society, 0-7695-1369-7. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
30 | Mikko H. Lipasti, John Paul Shen |
Exceeding the Dataflow Limit via Value Prediction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: Proceedings of the 29th Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 29, Paris, France, December 2-4, 1996, pp. 226-237, 1996, ACM/IEEE Computer Society, 0-8186-7641-8. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
|
30 | Ali Imtiaz, Tobias Bürger, Igor O. Popov, Elena Simperl |
Framework for Value Prediction of Knowledge-Based Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
BIS (Workshops) ![In: Business Information Systems Workshops, BIS 2009 International Workshops, Poznan, Poland, April 27-29, 2009. Revised Papers, pp. 153-158, 2009, Springer, 978-3-642-03423-7. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
Framework for Value Prediction, benefit estimation, knowledge-based technologies, cost estimation |
28 | Bart Goeman, Hans Vandierendonck, Koenraad De Bosschere |
Differential FCM: Increasing Value Prediction Accuracy by Improving Table Usage Efficiency. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCA ![In: Proceedings of the Seventh International Symposium on High-Performance Computer Architecture (HPCA'01), Nuevo Leone, Mexico, January 20-24, 2001, pp. 207-216, 2001, IEEE Computer Society, 0-7695-1019-1. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
27 | Freddy Gabbay, Avi Mendelson |
The Effect of Instruction Fetch Bandwidth on Value Prediction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: Proceedings of the 25th Annual International Symposium on Computer Architecture, ISCA 1998, Barcelona, Spain, June 27 - July 1, 1998, pp. 272-281, 1998, IEEE Computer Society, 0-8186-8491-7. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
27 | Kai Wang, Manoj Franklin |
Highly Accurate Data Value Prediction Using Hybrid Predictors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: Proceedings of the Thirtieth Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 30, Research Triangle Park, North Carolina, USA, December 1-3, 1997, pp. 281-290, 1997, ACM/IEEE Computer Society, 0-8186-7977-8. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
Instruction-level parallel (ILP) processing Speculative execution, Stride-based prediction, Two-level prediction, Data speculation |
26 | Nathan Tuck, Dean M. Tullsen |
Multithreaded Value Prediction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCA ![In: 11th International Conference on High-Performance Computer Architecture (HPCA-11 2005), 12-16 February 2005, San Francisco, CA, USA, pp. 5-15, 2005, IEEE Computer Society, 0-7695-2275-0. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
26 | Alain Ketterlin, Philippe Clauss |
Prediction and trace compression of data access addresses through nested loop recognition. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CGO ![In: Sixth International Symposium on Code Generation and Optimization (CGO 2008), April 5-9, 2008, Boston, MA, USA, pp. 94-103, 2008, ACM, 978-1-59593-978-4. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
nested loop recognition, value prediction, data access, trace analysis, trace compression |
26 | Martin Burtscher, Amer Diwan, Matthias Hauswirth |
Static Load Classification for Improving the Value Predictability of Data-Cache Misses. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PLDI ![In: Proceedings of the 2002 ACM SIGPLAN Conference on Programming Language Design and Implementation (PLDI), Berlin, Germany, June 17-19, 2002, pp. 222-233, 2002, ACM, 1-58113-463-0. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
load-value prediction, type-based analysis |
25 | Toshinori Sato, Itsujiro Arita |
Table size reduction for data value predictors by exploiting narrow width values. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICS ![In: Proceedings of the 14th international conference on Supercomputing, ICS 2000, Santa Fe, NM, USA, May 8-11, 2000, pp. 196-205, 2000, ACM, 1-58113-270-0. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
narrow width operands, instruction level parallelism, hardware implementation, value prediction, data speculation |
25 | Tameesh Suri, Aneesh Aggarwal |
Improving performance of simple cores by exploiting loop-level parallelism through value prediction and reconfiguration. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Conf. Computing Frontiers ![In: Proceedings of the 6th Conference on Computing Frontiers, 2009, Ischia, Italy, May 18-20, 2009, pp. 151-160, 2009, ACM, 978-1-60558-413-3. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
data value prediction, dynamic reconfiguration, loop level parallelism |
25 | Salil Mohan Pant, Gregory T. Byrd |
Extending concurrency of transactional memory programs by using value prediction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Conf. Computing Frontiers ![In: Proceedings of the 6th Conference on Computing Frontiers, 2009, Ischia, Italy, May 18-20, 2009, pp. 11-20, 2009, ACM, 978-1-60558-413-3. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
logtm, transactional memory, value prediction |
25 | José González 0002, Antonio González 0001 |
Control-Flow Speculation through Value Prediction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 50(12), pp. 1362-1376, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
path-based selector, Branch prediction, superscalar processors, value prediction, hybrid predictor |
25 | Martin Burtscher, Benjamin G. Zorn |
Exploring Last n Value Prediction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE PACT ![In: Proceedings of the 1999 International Conference on Parallel Architectures and Compilation Techniques, Newport Beach, California, USA, October 12-16, 1999, pp. 66-76, 1999, IEEE Computer Society, 0-7695-0425-6. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
predictor design, value prediction, processor performance, value locality, behavior prediction |
25 | José González 0002, Antonio González 0001 |
Control-Flow Speculation through Value Prediction for Superscalar Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE PACT ![In: Proceedings of the 1999 International Conference on Parallel Architectures and Compilation Techniques, Newport Beach, California, USA, October 12-16, 1999, pp. 57-65, 1999, IEEE Computer Society, 0-7695-0425-6. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
Path-based Selector, Branch Prediction, Value Prediction, Hybrid predictor |
24 | Haibin Cheng, Pang-Ning Tan, Jing Gao, Jerry Scripps |
Multistep-Ahead Time Series Prediction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PAKDD ![In: Advances in Knowledge Discovery and Data Mining, 10th Pacific-Asia Conference, PAKDD 2006, Singapore, April 9-12, 2006, Proceedings, pp. 765-774, 2006, Springer, 3-540-33206-5. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
24 | Yong Xiao, Kun Deng, Xingming Zhou |
Performance Impact of Different Data Value Predictors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asia-Pacific Computer Systems Architecture Conference ![In: Advances in Computer Systems Architecture, 9th Asia-Pacific Conference, ACSAC 2004, Beijing, China, September 7-9, 2004, Proceedings, pp. 414-425, 2004, Springer, 3-540-23003-3. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
23 | Eric Rotenberg |
AR-SMT: A Microarchitectural Approach to Fault Tolerance in Microprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FTCS ![In: Digest of Papers: FTCS-29, The Twenty-Ninth Annual International Symposium on Fault-Tolerant Computing, Madison, Wisconsin, USA, June 15-18, 1999, pp. 84-91, 1999, IEEE Computer Society, 0-7695-0213-X. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
branch prediction and value prediction, trace processors, transient faults, simultaneous multithreading, time redundancy |
23 | Salil Mohan Pant, Gregory T. Byrd |
Limited early value communication to improve performance of transactional memory. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICS ![In: Proceedings of the 23rd international conference on Supercomputing, 2009, Yorktown Heights, NY, USA, June 8-12, 2009, pp. 421-429, 2009, ACM, 978-1-60558-498-0. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
parallel programming, transactional memory, value prediction |
23 | Lucian Codrescu, D. Scott Wills, James D. Meindl |
Architecture of the Atlas Chip-Multiprocessor: Dynamically Parallelizing Irregular Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 50(1), pp. 67-82, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
Thread speculation, multiscalar, parallelization, chip-multiprocessor, multithreading, value prediction |
20 | Lois Orosa 0001, Rodolfo Azevedo, Onur Mutlu |
AVPP: Address-first Value-next Predictor with Value Prefetching for Improving the Efficiency of Load Value Prediction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Archit. Code Optim. ![In: ACM Trans. Archit. Code Optim. 15(4), pp. 49:1-49:30, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
20 | Easwaran Raman, Neil Vachharajani, Ram Rangan, David I. August |
Spice: speculative parallel iteration chunk execution. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CGO ![In: Sixth International Symposium on Code Generation and Optimization (CGO 2008), April 5-9, 2008, Boston, MA, USA, pp. 175-184, 2008, ACM, 978-1-59593-978-4. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
automatic paralleization, thread level parallelism, multicore architectures, speculative parallelization, value speculation |
20 | Juan M. Cebrian, Juan L. Aragón, José M. García 0001 |
Leakage Energy Reduction in Value Predictors through Static Decay. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 21th International Parallel and Distributed Processing Symposium (IPDPS 2007), Proceedings, 26-30 March 2007, Long Beach, California, USA, pp. 1-7, 2007, IEEE. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
20 | Maurício L. Pilla, Philippe Olivier Alexandre Navaux, Bruce R. Childers, Amarildo T. da Costa, Felipe Maia Galvão França |
Value Predictors for Reuse through Speculation on Traces. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SBAC-PAD ![In: 16th Symposium on Computer Architecture and High Performance Computing (SBAC-PAD 2004), 27-29 October 2004, Foz do Iguacu, Brazil, pp. 48-55, 2004, IEEE Computer Society, 0-7695-2240-8. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
19 | Chen-Yong Cher, Il Park 0001, T. N. Vijaykumar |
Do Trace Cache, Value Prediction and Prefetching Improve SMT Throughput?. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ARCS ![In: Architecture of Computing Systems - ARCS 2006, 19th International Conference, Frankfurt/Main, Germany, March 13-16, 2006, Proceedings, pp. 232-251, 2006, Springer, 3-540-32765-7. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
18 | Jian Huang, David J. Lilja |
Balancing Reuse Opportunities and Performance Gains with Subblock Value Reuse. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 52(8), pp. 1032-1050, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
Block reuse, subblock reuse, compiler flow analysis, value reuse, value locality |
18 | Yong Xiao, Xingming Zhou, Kun Deng |
Making Power-Efficient Data Value Predictions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asia-Pacific Computer Systems Architecture Conference ![In: Advances in Computer Systems Architecture, 10th Asia-Pacific Conference, ACSAC 2005, Singapore, October 24-26, 2005, Proceedings, pp. 310-322, 2005, Springer, 3-540-29643-3. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
17 | Tarun Nakra, Rajiv Gupta 0001, Mary Lou Soffa |
Value Prediction in VLIW Machines. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: Proceedings of the 26th Annual International Symposium on Computer Architecture, ISCA 1999, Atlanta, Georgia, USA, May 2-4, 1999, pp. 258-269, 1999, IEEE Computer Society, 0-7695-0170-2. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
17 | Eric Tune, Dongning Liang, Dean M. Tullsen, Brad Calder |
Dynamic Prediction of Critical Path Instructions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCA ![In: Proceedings of the Seventh International Symposium on High-Performance Computer Architecture (HPCA'01), Nuevo Leone, Mexico, January 20-24, 2001, pp. 185-195, 2001, IEEE Computer Society, 0-7695-1019-1. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
16 | Toshinori Sato, Itsujiro Arita |
Reducing Energy Consumption via Low-Cost Value Prediction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PATMOS ![In: Integrated Circuit Design. Power and Timing Modeling, Optimization and Simulation, 12th International Workshop, PATMOS 2002, Seville, Spain, September 11-13, 2002, pp. 380-389, 2002, Springer, 3-540-44143-3. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
16 | Arpad Gellert, Adrian Florea, Maria N. Vintan, Colin Egan, Lucian N. Vintan |
Unbiased Branches: An Open Problem. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asia-Pacific Computer Systems Architecture Conference ![In: Advances in Computer Systems Architecture, 12th Asia-Pacific Conference, ACSAC 2007, Seoul, Korea, August 23-25, 2007, Proceedings, pp. 16-27, 2007, Springer, 978-3-540-74308-8. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
unbiased branch, branch difference value prediction, Branch prediction |
16 | Onur Mutlu, Hyesoon Kim, Yale N. Patt |
Address-Value Delta (AVD) Prediction: A Hardware Technique for Efficiently Parallelizing Dependent Cache Misses. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 55(12), pp. 1491-1508, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
value prediction, memory-level parallelism, runahead execution, Single data stream architectures |
16 | Peng Chen 0012, Krishna M. Kavi, Robert Akl |
Performance Enhancement by Eliminating Redundant Function Execution. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Annual Simulation Symposium ![In: Proceedings 39th Annual Simulation Symposium (ANSS-39 2006), 2-6 April 2006, Huntsville, Alabama, USA, pp. 143-151, 2006, IEEE Computer Society, 0-7695-2559-8. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
Function reuse, Basic Block Reuse, SimpleScalar, Instruction Level Parallelism, Speculative Execution, Value Prediction, Instruction Reuse |
16 | Vimal K. Reddy, Eric Rotenberg, Sailashri Parthasarathy |
Understanding prediction-based partial redundant threading for low-overhead, high- coverage fault tolerance. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASPLOS ![In: Proceedings of the 12th International Conference on Architectural Support for Programming Languages and Operating Systems, ASPLOS 2006, San Jose, CA, USA, October 21-25, 2006, pp. 83-94, 2006, ACM, 1-59593-451-0. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
redundant multithreading, simultaneous multithreading (SMT), slipstream processor, chip multiprocessor (CMP), branch prediction, transient faults, value prediction, time redundancy |
16 | G. Surendra, Subhasis Banerjee, S. K. Nandy 0001 |
On the Effectiveness of Flow Aggregation in Improving Instruction Reuse in Network Processing Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Int. J. Parallel Program. ![In: Int. J. Parallel Program. 31(6), pp. 469-487, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
multiprocessors, network processors, value prediction, instruction reuse |
16 | Martin Burtscher, Benjamin G. Zorn |
Hybrid Load-Value Predictors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 51(7), pp. 759-774, 2002. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
load-value predictor, performance metrics, Value prediction, value locality, hybrid predictor |
16 | Yiannakis Sazeides |
Modeling Value Speculation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCA ![In: Proceedings of the Eighth International Symposium on High-Performance Computer Architecture (HPCA'02), Boston, Massachusettes, USA, February 2-6, 2002, pp. 211-222, 2002, IEEE Computer Society, 0-7695-1525-8. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
microarchitecture modeling, speculation, value prediction, value speculation |
16 | Kevin M. Lepak, Gordon B. Bell, Mikko H. Lipasti |
Silent Stores and Store Value Locality. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 50(11), pp. 1174-1190, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
store optimization, cache coherence, value prediction, false sharing, Value locality |
16 | Pedro Marcuello, Antonio González 0001 |
A Quantitative Assessment of Thread-Level Speculation Techniques. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: Proceedings of the 14th International Parallel & Distributed Processing Symposium (IPDPS'00), Cancun, Mexico, May 1-5, 2000, pp. 595-601, 2000, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
Speculative Thread-level Parallelism, Thread Spawning Policies, Branch Prediction, Value prediction |
16 | Toshinori Sato, Itsujiro Arita |
Partial Resolution in Data Value Predictors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICPP ![In: Proceedings of the 2000 International Conference on Parallel Processing, ICPP 2000, Toronto, Canada, August 21-24, 2000, pp. 69-76, 2000, IEEE Computer Society, 0-7695-0768-9. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
partial resolution, tag bitwidth, instruction level parallelism, value prediction, data speculation |
16 | Bryan Black, Brian Mueller, Stephanie Postal, Ryan N. Rakvic, Noppanunt Utamaphethai, John Paul Shen |
Load Execution Latency Reduction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
International Conference on Supercomputing ![In: Proceedings of the 12th international conference on Supercomputing, ICS 1998, Melbourne, Australia, July 13-17, 1998, pp. 29-36, 1998, ACM, 0-89791-998-X. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
load address prediction, load execution, load/store alias, speculative execution, value prediction |
16 | José González 0002, Antonio González 0001 |
The Potential of Data Value Speculation to Boost ILP. ![Search on Bibsonomy](Pics/bibsonomy.png) |
International Conference on Supercomputing ![In: Proceedings of the 12th international conference on Supercomputing, ICS 1998, Melbourne, Australia, July 13-17, 1998, pp. 21-28, 1998, ACM, 0-89791-998-X. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
data value speculation, limits of ILP, value prediction |
16 | Eric Rotenberg, Quinn Jacobson, Yiannakis Sazeides, James E. Smith 0001 |
Trace Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: Proceedings of the Thirtieth Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 30, Research Triangle Park, North Carolina, USA, December 1-3, 1997, pp. 138-148, 1997, ACM/IEEE Computer Society, 0-8186-7977-8. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
trace processors, multiscalar processors, next trace prediction, selective reissuing, context-based value prediction, trace cache |
15 | Nevin Kirman, Meyrem Kirman, Mainak Chaudhuri, José F. Martínez |
Checkpointed Early Load Retirement. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCA ![In: 11th International Conference on High-Performance Computer Architecture (HPCA-11 2005), 12-16 February 2005, San Francisco, CA, USA, pp. 16-27, 2005, IEEE Computer Society, 0-7695-2275-0. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
15 | Jian Huang, David J. Lilja |
Exploiting Basic Block Value Locality with Block Reuse. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCA ![In: Proceedings of the Fifth International Symposium on High-Performance Computer Architecture, Orlando, FL, USA, January 9-12, 1999, pp. 106-114, 1999, IEEE Computer Society, 0-7695-0004-8. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
15 | Rafet Sifa, Julian Runge, Christian Bauckhage, Daniel Klapper |
Customer Lifetime Value Prediction in Non-Contractual Freemium Settings: Chasing High-Value Users Using Deep Neural Networks and SMOTE. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HICSS ![In: 51st Hawaii International Conference on System Sciences, HICSS 2018, Hilton Waikoloa Village, Hawaii, USA, January 3-6, 2018, pp. 1-10, 2018, ScholarSpace / AIS Electronic Library (AISeL). The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP BibTeX RDF |
|
15 | Sparsh Mittal |
A survey of value prediction techniques for leveraging value locality. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Concurr. Comput. Pract. Exp. ![In: Concurr. Comput. Pract. Exp. 29(21), 2017. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
15 | Luis Piñuel, Rafael A. Moreno, Francisco Tirado |
Analysing value substitution and confidence estimation for value prediction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Syst. Archit. ![In: J. Syst. Archit. 47(5), pp. 459-475, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
14 | Chen Tian 0002, Min Feng 0001, Rajiv Gupta 0001 |
Speculative parallelization using state separation and multiple value prediction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISMM ![In: Proceedings of the 9th International Symposium on Memory Management, ISMM 2010, Toronto, Ontario, Canada, June 5-6, 2010, pp. 63-72, 2010, ACM, 978-1-4503-0054-4. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
multicore processors, speculative parallelization |
14 | Chi-Chun Huang, Hahn-Ming Lee |
A Grey-Based Nearest Neighbor Approach for Missing Attribute Value Prediction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Appl. Intell. ![In: Appl. Intell. 20(3), pp. 239-252, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
missing attribute values, grey-based nearest neighbor approach, the nearest neighbor concept, grey relational analysis |
13 | Robby Goetschalckx, Scott Sanner, Kurt Driessens |
Reinforcement Learning with the Use of Costly Features. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EWRL ![In: Recent Advances in Reinforcement Learning, 8th European Workshop, EWRL 2008, Villeneuve d'Ascq, France, June 30 - July 3, 2008, Revised and Selected Papers, pp. 124-135, 2008, Springer, 978-3-540-89721-7. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
13 | Martin Burtscher, Ilya Ganusov, Sandra J. Jackson, Jian Ke, Paruj Ratanaworabhan, Nana B. Sam |
The VPC Trace-Compression Algorithms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 54(11), pp. 1329-1344, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
performance analysis and design aids, Data compaction and compression |
12 | Eli Simhayev, Gilad Katz, Lior Rokach |
PIVEN: A Deep Neural Network for Prediction Intervals with Specific Value Prediction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2006.05139, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP BibTeX RDF |
|
12 | Rami Sheikh, Harold W. Cain, Raguram Damodaran |
Load value prediction via path-based address prediction: avoiding mispredictions due to conflicting stores. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: Proceedings of the 50th Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 2017, Cambridge, MA, USA, October 14-18, 2017, pp. 423-435, 2017, ACM, 978-1-4503-4952-9. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
12 | Arthur Perais |
Increasing the performance of superscalar processors through value prediction. (La prédiction de valeurs comme moyen d'augmenter la performance des processeurs superscalaires). ![Search on Bibsonomy](Pics/bibsonomy.png) |
|
2015 |
RDF |
|
12 | Martin Burtscher, Benjamin G. Zorn |
Prediction Outcome History-Based Confidence Estimation for Load Value Prediction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Instr. Level Parallelism ![In: J. Instr. Level Parallelism 1, 1999. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP BibTeX RDF |
|
12 | Nana B. Sam, Martin Burtscher |
Improving memory system performance with energy-efficient value speculation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SIGARCH Comput. Archit. News ![In: SIGARCH Comput. Archit. News 33(4), pp. 121-127, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
11 | Aneesh Aggarwal, Manoj Franklin |
Putting Data Value Predictors to Work in Fine-Grain Parallel Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HiPC ![In: High Performance Computing - HiPC 2001, 8th International Conference, Hyderabad, India, December, 17-20, 2001, Proceedings, pp. 204-213, 2001, Springer, 3-540-43009-1. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
11 | Jian Huang, David J. Lilja |
Extending Value Reuse to Basic Blocks with Compiler Support. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 49(4), pp. 331-347, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
Block history buffer, block reuse, compiler flow analysis, value reuse, value locality |
11 | Zibin Zheng, Hao Ma 0001, Michael R. Lyu, Irwin King |
WSRec: A Collaborative Filtering Based Web Service Recommender System. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICWS ![In: IEEE International Conference on Web Services, ICWS 2009, Los Angeles, CA, USA, 6-10 July 2009, pp. 437-444, 2009, IEEE Computer Society, 978-0-7695-3709-2. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
10 | Maurício L. Pilla, Bruce R. Childers, Amarildo T. da Costa, Felipe M. G. França, Philippe Olivier Alexandre Navaux |
A Speculative Trace Reuse Architecture with Reduced Hardware Requirements. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SBAC-PAD ![In: 18th Symposium on Computer Architecture and High Performance Computing (SBAC-PAD 2006), 17-20 October 2006, Ouro Preto, Minas Gerais, Brazil, pp. 47-54, 2006, IEEE Computer Society, 0-7695-2704-3. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
10 | Lucian Codrescu, S. Nugent, James D. Meindl, D. Scott Wills |
Modeling technology impact on cluster microprocessor performance. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 11(5), pp. 909-920, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
10 | Veerle Desmet, Bart Goeman, Koenraad De Bosschere |
Independent Hashing as Confidence Mechanism for Value Predictors in Microprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Euro-Par ![In: Euro-Par 2002, Parallel Processing, 8th International Euro-Par Conference Paderborn, Germany, August 27-30, 2002, Proceedings, pp. 458-467, 2002, Springer, 3-540-44049-6. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
10 | Rafael A. Moreno, Luis Piñuel, Silvia Del Pino, Francisco Tirado |
A Power Perspective of Value Speculation for Superscalar Microprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: Proceedings of the IEEE International Conference On Computer Design: VLSI In Computers & Processors, ICCD '00, Austin, Texas, USA, September 17-20, 2000, pp. 147-154, 2000, IEEE Computer Society, 0-7695-0801-4. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
9 | Gordana Ispirova, Tome Eftimov, Saso Dzeroski, Barbara Korousic-Seljak |
MsGEN: Measuring generalization of nutrient value prediction across different recipe datasets. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Expert Syst. Appl. ![In: Expert Syst. Appl. 237(Part B), pp. 121507, March 2024. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
|
9 | Jun Shi, Peiyi Zhang, Sihan Du, Wanyong Liang, Weifeng Cao, Qingbo Li, Hechao Hou |
Chipping value prediction for dicing saw based on sparrow search algorithm and neural networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Supercomput. ![In: J. Supercomput. 80(6), pp. 7483-7506, April 2024. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
|
9 | Yongliang Zhang, Yitong Rong, Xuyang Duan, Zhen Yang, Qiang Li, Ziyu Guo, Xu Cheng 0002, Xiaoyang Zeng, Jun Han 0003 |
An Energy-Efficient BNN Accelerator With Two-Stage Value Prediction for Sparse-Edge Gesture Recognition. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. I Regul. Pap. ![In: IEEE Trans. Circuits Syst. I Regul. Pap. 71(1), pp. 320-333, January 2024. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
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