The FacetedDBLP logo    Search for: in:

Disable automatic phrases ?     Syntactic query expansion: ?

Searching for phrase back-bias (changed automatically) with no syntactic query expansion in all metadata.

Publication years (Num. hits)
1994-2021 (16) 2022-2023 (5)
Publication types (Num. hits)
article(4) inproceedings(17)
Venues (Conferences, Journals, ...)
GrowBag graphs for keyword ? (Num. hits/coverage)

Group by:
The graphs summarize 2 occurrences of 2 keywords

Results
Found 21 publication records. Showing 21 according to the selection in the facets
Hits ? Authors Title Venue Year Link Author keywords
27Rabiul Islam, Adam Brand, Dave Lippincott Low power SRAM techniques for handheld products. Search on Bibsonomy ISLPED The full citation details ... 2005 DBLP  DOI  BibTeX  RDF back-bias, bitcell, memory, leakage
17Adrian Kneip, David Bol A 7T-NDR Dual-Supply 28-nm FD-SOI Ultra-Low Power SRAM With 0.23-nW/kB Sleep Retention and 0.8 pJ/32b Access at 64 MHz With Forward Back Bias. Search on Bibsonomy IEEE Trans. Circuits Syst. I Regul. Pap. The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
17Maxime Schramme, David Bol UFBBR: A Unified Frequency and Back-Bias Regulation Unit for Ultralow-Power Microcontrollers in 28-nm FDSOI. Search on Bibsonomy IEEE Trans. Circuits Syst. I Regul. Pap. The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
17N. Bhattacharjee, Maximilian Reuter, Klaus Hofmann, Thomas Mikolajick, Jens Trommer Single Transistor Analog Building Blocks: Exploiting Back-Bias Reconfigurable Devices. Search on Bibsonomy NEWCAS The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
17Xinze Li, Yuxuan Wu, Qiao Teng, Ying Sun, Xiao Gong, Guillaume Besnard, Christophe Maleville, Olivier Weber, Rui Zhang, Bing Chen, Dawei Gao, Ran Cheng Investigation of Random Telegraph Noise in Advanced Silicon-On-Insulator N-FETs: The Impact of Back Bias, Strain, and Hot Carrier Stress. Search on Bibsonomy ICICDT The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
17Maxime Schramme, Léopold Van Brandt, Denis Flandre, David Bol Comprehensive Analytical Comparison of Ring Oscillators in FDSOI Technology: Current Starving Versus Back-Bias Control. Search on Bibsonomy IEEE Trans. Circuits Syst. I Regul. Pap. The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
17Rémi Dekimpe, Maxime Schramme, Martin Lefebvre 0002, Adrian Kneip, Roghayeh Saeidi, Mathieu Xhonneux, Ludovic Moreau, Marco Gonzalez, Thibault Pirson, David Bol SleepRider: a 5.5μW/MHz Cortex-M4 MCU in 28nm FD-SOI with ULP SRAM, Biomedical AFE and Fully-Integrated Power, Clock and Back-Bias Management. Search on Bibsonomy VLSI Circuits The full citation details ... 2021 DBLP  DOI  BibTeX  RDF
17Ming-Yu Chang, Po-Yu Chao, Meng-Hsueh Chiang Back-Bias Modulated UTBB SOI for System-on-Chip I/O Cells. Search on Bibsonomy ISQED The full citation details ... 2021 DBLP  DOI  BibTeX  RDF
17Luca Pirro, Alban Zaka, Olaf Zimmerhackl, T. Hermann, Michael Otto, E. M. Bazizi, Jan Hoentschel, X. Li, R. Taylor Low-Frequency Noise Reduction in 22FDX®: Impact of Device Geometry and Back Bias. Search on Bibsonomy IRPS The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
17Somayeh Hossein Zadeh, Trond Ytterdal, Snorre Aunet Exploring optimal back bias voltages for ultra low voltage CMOS digital Circuits in 22 nm FDSOI Technology. Search on Bibsonomy NORCAS The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
17David Bol, Maxime Schramme, Ludovic Moreau, Thomas Haine, Pengcheng Xu 0002, Charlotte Frenkel, Remi Dekimpe, François Stas, Denis Flandre A 40-to-80MHz Sub-4μW/MHz ULV Cortex-M0 MCU SoC in 28nm FDSOI With Dual-Loop Adaptive Back-Bias Generator for 20μs Wake-Up From Deep Fully Retentive Sleep Mode. Search on Bibsonomy ISSCC The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
17Arif Siddiqi, Navneet Jain, Mahbub Rashed Back-bias generator for post-fabrication threshold voltage tuning applications in 22nm FD-SOI process. Search on Bibsonomy ISQED The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
17Daniele Jahier Pagliari, Yves Durand, David Coriat, Anca Molnos, Edith Beigné, Enrico Macii, Massimo Poncino A methodology for the design of dynamic accuracy operators by runtime back bias. Search on Bibsonomy DATE The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
17Thomas Haine, Quoc-Khoi Nguyen, François Stas, Ludovic Moreau, Denis Flandre, David Bol An 80-MHz 0.4V ULV SRAM macro in 28nm FDSOI achieving 28-fJ/bit access energy with a ULP bitcell and on-chip adaptive back bias generation. Search on Bibsonomy ESSCIRC The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
17Sebastien Bernard, Marc Belleville, Alexandre Valentian, Jean-Didier Legat, David Bol Experimental analysis of flip-flops minimum operating voltage in 28nm FDSOI and the impact of back bias and temperature. Search on Bibsonomy PATMOS The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
17Michael Ortner, Michael Seger, Marcelo Ribeiro, Armin Satz Signal Analysis in Back Bias Speed Sensor Systems. Search on Bibsonomy EMS The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
17Guillaume Moritz, Bastien Giraud, Jean-Philippe Noel, David Turgis, Anuj Grover Optimization of a voltage sense amplifier operating in ultra wide voltage range with back bias design techniques in 28nm UTBB FD-SOI technology. Search on Bibsonomy ICICDT The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
17Yasuhiko Tsukikawa, Takeshi Kajimoto, Yasuhiko Okasaka, Yoshikazu Morooka, Kiyohiro Furutani, Hiroshi Miyamoto, Hideyuki Ozaki An efficient back-bias generator with hybrid pumping circuit for 1.5-V DRAMs. Search on Bibsonomy IEEE J. Solid State Circuits The full citation details ... 1994 DBLP  DOI  BibTeX  RDF
9Shuichi Kunie, Takefumi Hiraga, Tatsuya Tokue, Sunao Torii, Taku Ohsawa Low power architecture and design techniques for mobile handset LSI MedityTM M2. Search on Bibsonomy ASP-DAC The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
9Arnaud Turier, Lotfi Ben Ammar, Amara Amara Static power consumption management in CMOS memories. Search on Bibsonomy ISCAS (4) The full citation details ... 2001 DBLP  DOI  BibTeX  RDF
9Vjekoslav Svilan, Masataka Matsui, James B. Burr Energy-efficient 32 × 32-bit multiplier in tunable near-zero threshold CMOS. Search on Bibsonomy ISLPED The full citation details ... 2000 DBLP  DOI  BibTeX  RDF
Displaying result #1 - #21 of 21 (100 per page; Change: )
Valid XHTML 1.1! Valid CSS! [Valid RSS]
Maintained by L3S.
Previously maintained by Jörg Diederich.
Based upon DBLP by Michael Ley.
open data data released under the ODC-BY 1.0 license