Search results for "body-biasing"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
119	Alyssa Bonnoit, Lawrence T. Pileggi	Reducing variability in chip-multiprocessors with adaptive body biasing.	ISLPED	2010	DBLP DOI BibTeX RDF	dynamic voltage/frequency scaling, body biasing
111	Po-Yuan Chen, Chiao-Chen Fang, TingTing Hwang, Hsi-Pin Ma	Leakage reduction, delay compensation using partition-based tunable body-biasing techniques.	ACM Trans. Design Autom. Electr. Syst.	2009	DBLP DOI BibTeX RDF	low-power design, process variations, leakage current, Body biasing
109	Jinseob Jeong, Seungwhun Paik, Youngsoo Shin	Statistical mixed Vt allocation of body-biased circuits for reduced leakage variation.	ASP-DAC	2008	DBLP DOI BibTeX RDF
68	Alyssa Bonnoit, Sebastian Herbert, Diana Marculescu, Lawrence T. Pileggi	Integrating dynamic voltage/frequency scaling and adaptive body biasing using test-time voltage selection.	ISLPED	2009	DBLP DOI BibTeX RDF	dynamic voltage / frequency scaling, body biasing
68	Vishal Khandelwal, Ankur Srivastava 0001	Active mode leakage reduction using fine-grained forward body biasing strategy.	ISLPED	2004	DBLP DOI BibTeX RDF	forward body biasing, leakage power optimization
60	Amlan Ghosh, Rahul M. Rao, Richard B. Brown	A centralized supply voltage and local body bias-based compensation approach to mitigate within-die process variation.	ISLPED	2009	DBLP DOI BibTeX RDF	fine-grain body-biasing, process variation compensation, slewrate
60	Jabulani Nyathi, Brent Bero	Logic circuits operating in subthreshold voltages.	ISLPED	2006	DBLP DOI BibTeX RDF	logic styles, medium-to-high speed, off current, ultra-low power, noise margins, subthreshold, body biasing
60	Chris H. Kim, Jae-Joon Kim, Saibal Mukhopadhyay, Kaushik Roy 0001	A forward body-biased low-leakage SRAM cache: device and architecture considerations.	ISLPED	2003	DBLP DOI BibTeX RDF	forward body-biasing, super high VT, SRAM, leakage power
59	Koichi Hamamoto, Hiroshi Fuketa, Masanori Hashimoto, Yukio Mitsuyama, Takao Onoye	Experimental study on body-biasing layout style-- negligible area overhead enables sufficient speed controllability --.	ACM Great Lakes Symposium on VLSI	2008	DBLP DOI BibTeX RDF	layout, body bias
56	Tom W. Chen, Justin Gregg	A Low Cost Individual-Well Adaptive Body Bias (IWABB) Scheme for Leakage Power Reduction and Performance Enhancement in the Presence of Intra-Die Variations.	DATE	2004	DBLP DOI BibTeX RDF
54	Domenik Helms, Olaf Meyer, Marko Hoyer, Wolfgang Nebel	Voltage- and ABB-island optimization in high level synthesis.	ISLPED	2007	DBLP DOI BibTeX RDF	adaptive body biasing, process variation, leakage, voltage islands
54	Yan Zhang 0028, Mircea R. Stan	Temperature-aware circuit design using adaptive body biasing.	ACM Great Lakes Symposium on VLSI	2007	DBLP DOI BibTeX RDF	adaptive body biasing, temperature-aware design
51	Bipul C. Paul, Kaushik Roy 0001	Impact of Body Bias on Delay Fault Testing of Sub-100 nm CMOS Circuits.	J. Electron. Test.	2006	DBLP DOI BibTeX RDF	adaptive body bias design, statistical analysis, process variation, delay fault testing
51	Bipul Chandra Paul, Cassondra Neau, Kaushik Roy 0001	Impact of Body Bias on Delay Fault Testing of Nanoscale CMOS Circuits.	ITC	2004	DBLP DOI BibTeX RDF
51	Radu Teodorescu, Jun Nakano, Abhishek Tiwari 0002, Josep Torrellas	Mitigating Parameter Variation with Dynamic Fine-Grain Body Biasing.	MICRO	2007	DBLP DOI BibTeX RDF
51	Walid Elgharbawy, Pradeep Golconda, Ashok Kumar 0001, Magdy A. Bayoumi	A new gate-level body biasing technique for PMOS transistors in subthreshold CMOS circuits.	ISCAS (5)	2005	DBLP DOI BibTeX RDF
48	Byunghee Choi, Youngsoo Shin	Lookup Table-Based Adaptive Body Biasing of Multiple Macros.	ISQED	2007	DBLP DOI BibTeX RDF
46	Yuan Cai, Marcus T. Schmitz, Bashir M. Al-Hashimi, Sudhakar M. Reddy	Workload-ahead-driven online energy minimization techniques for battery-powered embedded systems with time-constraints.	ACM Trans. Design Autom. Electr. Syst.	2007	DBLP DOI BibTeX RDF	adaptive body biasing, embedded systems, Dynamic voltage scaling, battery
46	Nikhil Jayakumar, Sandeep Dhar, Sunil P. Khatri	A self-adjusting scheme to determine the optimum RBB by monitoring leakage currents.	DAC	2005	DBLP DOI BibTeX RDF	leakage power, self-adjusting, body-biasing
46	Le Yan, Lin Zhong 0001, Niraj K. Jha	User-perceived latency driven voltage scaling for interactive applications.	DAC	2005	DBLP DOI BibTeX RDF	adaptive body biasing, computer responsiveness, dynamic voltage scaling, power consumption
44	Xin He, Syed Al-Kadry, Afshin Abdollahi	Adaptive leakage control on body biasing for reducing power consumption in CMOS VLSI circuit.	ISQED	2009	DBLP DOI BibTeX RDF
44	Kiyotaka Imai, Yasushi Yamagata, Sadaaki Masuoka, Naohiko Kimuzuka, Yuri Yasuda, Mitsuhiro Togo, Masahiro Ikeda, Yasutaka Nakashiba	Device technology for body biasing scheme.	ISCAS (1)	2005	DBLP DOI BibTeX RDF
44	Steven M. Martin, Krisztián Flautner, Trevor N. Mudge, David T. Blaauw	Combined dynamic voltage scaling and adaptive body biasing for lower power microprocessors under dynamic workloads.	ICCAD	2002	DBLP DOI BibTeX RDF
43	Bo Fu, Paul Ampadu	Techniques for robust energy efficient subthreshold domino CMOS circuits.	ISCAS	2006	DBLP DOI BibTeX RDF
43	Andrea Lodi 0002, Luca Ciccarelli, Roberto Giansante	Combining low-leakage techniques for FPGA routing design.	FPGA	2005	DBLP DOI BibTeX RDF	low leakage, FPGA, power
40	Justin Gregg, Tom W. Chen	Post Silicon Power/Performance Optimization in the Presence of Process Variations Using Individual Well-Adaptive Body Biasing.	IEEE Trans. Very Large Scale Integr. Syst.	2007	DBLP DOI BibTeX RDF
40	Le Yan, Jiong Luo, Niraj K. Jha	Joint dynamic voltage scaling and adaptive body biasing for heterogeneous distributed real-time embedded systems.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2005	DBLP DOI BibTeX RDF
38	Mahipal Dargupally, Lomash Chandra Acharya, Khoirom Johnson Singh, Neha Gupta, Arvind K. Sharma, Sudeb Dasgupta, Anand Bulusu	An Efficient Standard Cell Design Methodology by Exploiting Body Biasing and Poly Biasing in FDSOI for NTV Regime.	APCCAS	2023	DBLP DOI BibTeX RDF
38	Andrew Whetzel, Mircea R. Stan	Gate Overdrive with Split-Circuit Biasing to Substitute for Body Biasing in FinFET and UTB FDSOI Circuits.	ISVLSI	2016	DBLP DOI BibTeX RDF
37	Po-Kuan Huang, Soheil Ghiasi	Power-aware compilation for embedded processors with dynamic voltage scaling and adaptive body biasing capabilities.	DATE	2006	DBLP DOI BibTeX RDF
37	Maurice Meijer, Francesco Pessolano, José Pineda de Gyvez	Limits to performance spread tuning using adaptive voltage and body biasing.	ISCAS (1)	2005	DBLP DOI BibTeX RDF
37	Le Yan, Jiong Luo, Niraj K. Jha	Combined Dynamic Voltage Scaling and Adaptive Body Biasing for Heterogeneous Distributed Real-time Embedded Systems.	ICCAD	2003	DBLP DOI BibTeX RDF
31	Amlan Ghosh, Rob Franklin, Richard B. Brown	Analog Circuit Design Methodologies to Improve Negative-Bias Temperature Instability Degradation.	VLSI Design	2010	DBLP DOI BibTeX RDF	analog circuit design methodologies, input switching, NBTI, body biasing
31	Georges Nabaa, Navid Azizi, Farid N. Najm	An adaptive FPGA architecture with process variation compensation and reduced leakage.	DAC	2006	DBLP DOI BibTeX RDF	FPGA, process variations, leakage, body-biasing
31	Nikhil Jayakumar, Sunil P. Khatri	A variation tolerant subthreshold design approach.	DAC	2005	DBLP DOI BibTeX RDF	variation-toleran, self-adjusting, body-biasing, sub-threshold
30	Siddharth Garg, Diana Marculescu	System-level mitigation of WID leakage power variability using body-bias islands.	CODES+ISSS	2008	DBLP DOI BibTeX RDF	design, algorithms
30	Masayuki Miyazaki, Goichi Ono, Takayuki Kawahara	Optimum threshold-voltage tuning for low-power, high-performance microprocessor.	ISCAS (1)	2005	DBLP DOI BibTeX RDF
29	Guochen Hua, Meng Wang 0005, Zili Shao, Hui Liu 0006, Chun Xue	Real-Time Loop Scheduling with Energy Optimization Via DVS and ABB for Multi-core Embedded System.	EUC	2007	DBLP DOI BibTeX RDF
29	Sang-Soo Lee, Edward Boling, Augustine Kuo, Robert Rogenmoser	A slew-rate based process monitor and bi-directional body bias circuit for adaptive body biasing in SoC applications.	CICC	2013	DBLP DOI BibTeX RDF
26	Koichi Hamamoto, Masanori Hashimoto, Yukio Mitsuyama, Takao Onoye	Tuning-friendly body bias clustering for compensating random variability in subthreshold circuits.	ISLPED	2009	DBLP DOI BibTeX RDF	body bias clustering, performance compensation, layout, manufacturing variability, subthreshold circuits
25	Josef Haid, Bernd Zimek, Thomas Leutgeb, Thomas Künemund	Impact of Leakage Current on Data Retention of RF-powered Devices During Amplitude-Modulation-based Communication.	DATE	2008	DBLP DOI BibTeX RDF
22	Sarvesh H. Kulkarni, Dennis Sylvester, David T. Blaauw	Design-Time Optimization of Post-Silicon Tuned Circuits Using Adaptive Body Bias.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2008	DBLP DOI BibTeX RDF
22	Alexandru Andrei, Petru Eles, Zebo Peng, Marcus T. Schmitz, Bashir M. Al-Hashimi	Energy Optimization of Multiprocessor Systems on Chip by Voltage Selection.	IEEE Trans. Very Large Scale Integr. Syst.	2007	DBLP DOI BibTeX RDF
22	Sarvesh H. Kulkarni, Dennis Sylvester, David T. Blaauw	A statistical framework for post-silicon tuning through body bias clustering.	ICCAD	2006	DBLP DOI BibTeX RDF
22	Francesco Conti 0001, Gianna Paulin, Angelo Garofalo, Davide Rossi, Alfio Di Mauro, Georg Rutishauser, Gianmarco Ottavi, Manuel Eggimann, Hayate Okuhara, Luca Benini	Marsellus: A Heterogeneous RISC-V AI-IoT End-Node SoC With 2-8 b DNN Acceleration and 30%-Boost Adaptive Body Biasing.	IEEE J. Solid State Circuits	2024	DBLP DOI BibTeX RDF
22	Rohan Sinha, Devraj M. Rajagopal, Aditya Madhavan	Voltage Mode Charge Pump Regulator with Improved Compensation and Dynamic Body Biasing Scheme.	VLSID	2024	DBLP DOI BibTeX RDF
22	Francesco Conti 0001, Gianna Paulin, Davide Rossi, Alfio Di Mauro, Georg Rutishauser, Gianmarco Ottavi, Manuel Eggimann, Hayate Okuhara, Luca Benini	Marsellus: A Heterogeneous RISC-V AI-IoT End-Node SoC with 2-to-8b DNN Acceleration and 30%-Boost Adaptive Body Biasing.	CoRR	2023	DBLP DOI BibTeX RDF
22	Brunno Alves de Abreu, Albi Mema, Simon Thomann, Guilherme Paim, Paulo F. Flores, Sergio Bampi, Hussam Amrouch	Compact CMOS-Compatible Majority Gate Using Body Biasing in FDSOI Technology.	IEEE J. Emerg. Sel. Topics Circuits Syst.	2023	DBLP DOI BibTeX RDF
22	Jiho Jung, Ickjin Kwon	A Capacitive DC-DC Boost Converter with Gate Bias Boosting and Dynamic Body Biasing for an RF Energy Harvesting System.	Sensors	2023	DBLP DOI BibTeX RDF
22	Valerio Spinogatti, Cristian Bocciarelli, Francesco Centurelli, Riccardo Della Sala, Alessandro Trifiletti	Robust Body Biasing Techniques for Dynamic Comparators.	PRIME	2023	DBLP DOI BibTeX RDF
22	Robert M. Comaling, Mike Martin C. Diangco, Jefferson A. Hora	22nm FDSOI Forward Body Biasing in Designing Ultra-Low Power, High PSRR Voltage Reference for IoT Power Management Applications.	TENCON	2023	DBLP DOI BibTeX RDF
22	Francesco Conti 0001, Davide Rossi, Gianna Paulin, Angelo Garofalo, Alfio Di Mauro, Georg Rutishauser, Gianmarco Ottavi, Manuel Eggimann, Hayate Okuhara, Vincent Huard, Olivier Montfort, Lionel Jure, Nils Exibard, Pascal Gouedo, Mathieu Louvat, Emmanuel Botte, Luca Benini	A 12.4TOPS/W @ 136GOPS AI-IoT System-on-Chip with 16 RISC-V, 2-to-8b Precision-Scalable DNN Acceleration and 30%-Boost Adaptive Body Biasing.	ISSCC	2023	DBLP DOI BibTeX RDF
22	Geoffrey Chancel, Jean-Marc Gallière, Philippe Maurine	A better practice for Body Biasing Injection.	FDTC	2023	DBLP DOI BibTeX RDF
22	Yutang Chen, Yuxuan Luo, Jianping Guo, Xian Tang, Dihu Chen	A 2-W, 90%-Efficiency Single-Stage Dual-Output Wireless Power Receiver with 0.1 to 700-mA Output Current Range Through Dynamic Delay Compensation and Bootstrap Adaptive Body Biasing Circuit.	A-SSCC	2023	DBLP DOI BibTeX RDF
22	Enis Kobal, Teerachot Siriburanon, Xi Chen 0070, Hieu Minh Nguyen, Robert Bogdan Staszewski, Anding Zhu	A Gm-Boosting Technique for Millimeter-Wave Low-Noise Amplifiers in 28-nm Triple-Well Bulk CMOS Using Floating Resistor in Body Biasing.	IEEE Trans. Circuits Syst. I Regul. Pap.	2022	DBLP DOI BibTeX RDF
22	Wonho Lee, Songcheol Hong	Frequency-Reconfigurable SP4T Switch With Plaid Metal Transistors and Forward Body Biasing for Enhanced RON × COFF Characteristics.	IEEE Trans. Circuits Syst. II Express Briefs	2022	DBLP DOI BibTeX RDF
22	Guillaume Tochou, Andreia Cathelin, Antoine Frappé, Andreas Kaiser, Jan M. Rabaey	Impact of Forward Body-Biasing on Ultra-Low Voltage Switched-Capacitor RF Power Amplifier in 28 nm FD-SOI.	IEEE Trans. Circuits Syst. II Express Briefs	2022	DBLP DOI BibTeX RDF
22	Zhi Li, Huidong Zhao, Jialu Yin, Shushan Qiao, Yumei Zhou	A fully integrated RC oscillator with adaptive-body-biasing.	IEICE Electron. Express	2022	DBLP DOI BibTeX RDF
22	Geoffrey Chancel, Jean Marc Gallière, Philippe Maurine	Body Biasing Injection: To Thin or Not to Thin the Substrate?	COSADE	2022	DBLP DOI BibTeX RDF
22	Clément Beauquier, David Duperray, Chadi Jabbour, Patricia Desgreys, Antoine Frappé, Andreas Kaiser	Foreground Static Error Calibration for Current Sources Using Backgate Body Biasing.	RTSI	2022	DBLP DOI BibTeX RDF
22	Shih-En Chen, Yi-Chung Lin, Kuang-Wei Cheng	A High Sensitivity RF Energy Harvester with Dynamic Body-Biasing CMOS Rectifier.	NEWCAS	2022	DBLP DOI BibTeX RDF
22	Yaopeng Hu, Yibo Zhao, Wanyuan Qu, Le Ye, Menglian Zhao, Zhichao Tan	A 2.87μW 1kHz-BW 94.0dB-SNDR 2-0 MASH ADC Using FIA with Dynamic-Body-Biasing Assisted CLS Technique.	ISSCC	2022	DBLP DOI BibTeX RDF
22	Geoffrey Chancel, Jean Marc Gallière, Philippe Maurine	Body Biasing Injection: Impact of substrate types on the induced disturbancesƒ.	FDTC	2022	DBLP DOI BibTeX RDF
22	Munir Ahmad Al-Absi, Ibrahim M. Alkhalifa, Adel A. Mohammed, Abdulaziz Ahmed Al-Khulaifi	A CMOS Rectifier Employing Body Biasing Scheme for RF Energy Harvesting.	IEEE Access	2021	DBLP DOI BibTeX RDF
22	Carlos A. Pinheiro, Fabián Olivera, Antonio Petraglia	A Three-Stage Charge Pump With Forward Body Biasing in 28 nm UTBB FD-SOI CMOS.	IEEE Trans. Circuits Syst. I Regul. Pap.	2021	DBLP DOI BibTeX RDF
22	Mohammadreza Dolatpoor Lakeh, Jean-Baptiste Kammerer, Enagnon Aguénounon, Dylan Issartel, Jean-Baptiste Schell, Sven Rink, Andreia Cathelin, Françis Calmon, Wilfried Uhring	An Ultrafast Active Quenching Active Reset Circuit with 50% SPAD Afterpulsing Reduction in a 28 nm FD-SOI CMOS Technology Using Body Biasing Technique.	Sensors	2021	DBLP DOI BibTeX RDF
22	Carlos A. Pinheiro, Fabián Olivera, Antonio Petraglia	A Three-Stage Charge Pump with Forward Body Biasing in 28 nm UTBB FD-SOI CMOS.	LASCAS	2021	DBLP DOI BibTeX RDF
22	David Cordova, Wim Cops, Yann Deval, Francois Rivet, Hervé Lapuyade, Nicolas Nodenot, Yohan Piccin	Optimized body-biasing calibration methodology for high-speed comparators in 22nm FDX.	LASCAS	2021	DBLP DOI BibTeX RDF
22	Clément Beauquier, David Duperray, Chadi Jabbour, Patricia Desgreys, Antoine Frappé, Andreas Kaiser	Analog Duty Cycle Controller Using Backgate Body Biasing For 5G Millimeter Wave Applications.	ICECS	2021	DBLP DOI BibTeX RDF
22	Yong-Hun Kim, Hyung-Jin Kim, Jaemin Choi, Min-Su Ahn, Dongkeon Lee, Seung-Hyun Cho, Dong-Yeon Park, Young-Jae Park, Min-Soo Jang, Yong-Jun Kim, Jinyong Choi, Sung-Woo Yoon, Jae-Woo Jung, Jae-Koo Park, Jae-Woo Lee, Dae-Hyun Kwon, Hyung-Seok Cha, Si-Hyeong Cho, Seong-Hoon Kim, Jihwa You, Kyoung-Ho Kim, Dae-Hyun Kim 0003, Byung-Cheol Kim, Young-Kwan Kim, Jun-Ho Kim, Seouk-Kyu Choi, Chanyoung Kim, Byongwook Na, Hye-In Choi, Reum Oh, Jeong-Don Ihm, Seung-Jun Bae, Nam Sung Kim, Jung-Bae Lee	25.2 A 16Gb Sub-1V 7.14Gb/s/pin LPDDR5 SDRAM Applying a Mosaic Architecture with a Short-Feedback 1-Tap DFE, an FSS Bus with Low-Level Swing and an Adaptively Controlled Body Biasing in a 3rd-Generation 10nm DRAM.	ISSCC	2021	DBLP DOI BibTeX RDF
22	Sangwoo Lee, Sungsik Park, Yunhong Kim, Youngcheol Chae	A 0.6V 86.5dB-DR 40kHz-BW Inverter-Based Continuous-Time Delta-Sigma Modulator with PVT-Robust Body-Biasing Technique.	VLSI Circuits	2021	DBLP DOI BibTeX RDF
22	Jian-Ming Wu, Yan-Tsang Lin, Yuan-Chih Lin, Min-Lang Yang	Body Biasing to Compensate for Process Variation in Gain and NF of an LNA RFIC.	ISPACS	2021	DBLP DOI BibTeX RDF
22	Hyo-Jin Lee, Seong-Tae Han, Jong-Ryul Yang	CMOS Plasmon Detector With Three Different Body-Biasing MOSFETs.	IEEE Access	2020	DBLP DOI BibTeX RDF
22	Paul Miresan, Raul Onet, Marius Neag, Marina Dana Topa, Cosmin Chira	Design options for implementing in standard CMOS drivers for MEMS body biasing.	Microelectron. J.	2020	DBLP DOI BibTeX RDF
22	Colin O'Flynn	Low-Cost Body Biasing Injection (BBI) Attacks on WLCSP Devices.	IACR Cryptol. ePrint Arch.	2020	DBLP BibTeX RDF
22	Colin O'Flynn	Low-Cost Body Biasing Injection (BBI) Attacks on WLCSP Devices.	CARDIS	2020	DBLP DOI BibTeX RDF
22	Somayeh Hossein Zadeh, Trond Ytterdal, Snorre Aunet	Multi-threshold Voltage and Dynamic Body Biasing Techniques for Energy Efficient Ultra Low Voltage Subthreshold Adders.	NorCAS	2020	DBLP DOI BibTeX RDF
22	Alfio Di Mauro, Florian Zaruba, Fabian Schuiki, Stefan Mach, Luca Benini	Live Demonstration: Exploiting Body-Biasing for Static Corner Trimming and Maximum Energy Efficiency Operation in 22nm FDX Technology.	ISCAS	2020	DBLP DOI BibTeX RDF
22	Marcel Runge, Dario Schmock, Enne Wittenhagen, Friedel Gerfers	A DAC Linearization Technique Enabling 15-Bit INL through Adaptive Body-Biasing in 22FDX.	ISCAS	2020	DBLP DOI BibTeX RDF
22	Zushuai Xie, Zhiqiang Wu, Jianhui Wu 0001	Low Voltage Cold Start-Up Ring Oscillator with Dynamic Body Biasing Technique for Battery-Assistance DC Energy Harvesting Systems.	EITCE	2020	DBLP DOI BibTeX RDF
22	Pratosh Kumar Pal, Rajendra Kumar Nagaria	A Low-Power, Sub-1-V All-MOSFET Subthreshold Voltage Reference Using Body Biasing.	J. Circuits Syst. Comput.	2019	DBLP DOI BibTeX RDF
22	Woojoo Lee, Taewook Kang, Jae-Jin Lee, Kyuseung Han, Joongheon Kim, Massoud Pedram	TEI-ULP: Exploiting Body Biasing to Improve the TEI-Aware Ultralow Power Methods.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2019	DBLP DOI BibTeX RDF
22	Przemyslaw Mroszczyk, John Goodacre, Vasilis F. Pavlidis	Energy Efficient Flash ADC With PVT Variability Compensation Through Advanced Body Biasing.	IEEE Trans. Circuits Syst. II Express Briefs	2019	DBLP DOI BibTeX RDF
22	Goran HamaAli, Diary R. Sulaiman, Muhammed A. Ibrahim	Power and thermal management in SRAM and DRAM using adaptive body biasing technique.	IEICE Electron. Express	2019	DBLP DOI BibTeX RDF
22	Yan Li, Quan Li, Xin Liu, Xiaosong Wang, Yu Liu 0030	A high efficiency CMOS RF rectifier for RF energy harvesting with dynamic self-body-biasing technique.	IEICE Electron. Express	2019	DBLP DOI BibTeX RDF
22	Tulio Chaves de Albuquerque, Dylan Issartel, Raphael Clerc, Patrick Pittet, Remy Cellier, Wilfried Uhring, Andreia Cathelin, Françis Calmon	Body-biasing considerations with SPAD FDSOI: advantages and drawbacks.	ESSDERC	2019	DBLP DOI BibTeX RDF
22	Sebastian Höppner, Jörg Schreiter, Robert Niebsch, Stephan Scherzer, Ulrich Hensel, Jörg Winkler, Mario Orgis, Holger Eisenreich, Dennis Walter, Uwe Steeb, André Scharfe, Clifford Dmello, Robert Sinkwitz, Heiner Bauer, Alexander Oefelein, Florian Schraut	How to Achieve World-Leading Energy Efficiency using 22FDX with Adaptive Body Biasing on an Arm Cortex-M4 IoT SoC.	ESSDERC	2019	DBLP DOI BibTeX RDF
22	Laurent Fesquet, Yoan Decoudu, Alexis Rodrigo Iga Jadue, Thiago Ferreira de Paiva Leite, Otto Aureliano Rolloff, M. Diallo, Rodrigo Possamai Bastos, Katell Morin-Allory, Sylvain Engels	A Distributed Body-Biasing Strategy for Asynchronous Circuits.	VLSI-SoC	2019	DBLP DOI BibTeX RDF
22	Philex Ming-Yan Fan, Anand Savanth, Benoît Labbé, Pranay Prabhat, James Myers	A 0.98-nW/kHz 33-kHz Fully Integrated Subthreshold-Region Operation RC Oscillator With Forward-Body-Biasing.	ESSCIRC	2019	DBLP DOI BibTeX RDF
22	Ricardo Gomez Gomez, Edwige Bano, Sylvain Clerc	Comparative evaluation of Body Biasing and Voltage Scaling for Low-Power Design on 28nm UTBB FD-SOI Technology.	ISLPED	2019	DBLP DOI BibTeX RDF
22	Florian Schraut, Holger Eisenreich, Sebastian Höppner, Christian Mayr 0001	A Fast Lock-In Ultra Low-Voltage ADPLL Clock Generator with Adaptive Body Biasing in 22nm FDSOI Technology.	ISCAS	2019	DBLP DOI BibTeX RDF
22	Lalit Dani, Neeraj Mishra, Bulusu Anand	MOS Varactor RO Architectures in Near Threshold Regime Using Forward Body Biasing Techniques.	VLSID	2019	DBLP DOI BibTeX RDF
22	Takuya Kojima, Naoki Ando, Hayate Okuhara, Ng. Anh Vu Doan, Hideharu Amano	Optimization of Body Biasing for Variable Pipelined Coarse-Grained Reconfigurable Architectures.	IEICE Trans. Inf. Syst.	2018	DBLP DOI BibTeX RDF
22	Szymon Reszewicz, Krzysztof Siwiec, Witold A. Pleskacz	2.4 GHz LC-VCO with Improved Robustness against PVT Using FD-SOI Body Biasing Technique.	DDECS	2018	DBLP DOI BibTeX RDF
22	Abdullah Alshehri 0003, Mohammed Al-Qadasi, Abdullah S. Almansouri, Talal Al-Attar, Hossein Fariborzi	StrongARM Latch Comparator Performance Enhancement by Implementing Clocked Forward Body Biasing.	ICECS	2018	DBLP DOI BibTeX RDF
22	Jheng-Yi Chen, Ming-Yu Chang, Shi-Hao Chen, Jia-Wei Lee, Meng-Hsueh Chiang	Body-biasing assisted vmin optimization for 5nm-node multi-Vt FD-SOI 6T-SRAM.	ISQED	2018	DBLP DOI BibTeX RDF
22	Karim Zouaq, Abdelhamid Aitoumeri, Abdelmalik Bouyahyaoui, Mustapha Alami	A study of Forward Body Biasing techniques for Subthreshold ring Oscillators.	ICSDE	2018	DBLP DOI BibTeX RDF
22	Abdelhamid Aitoumeri, Abdelmalik Bouyahyaoui, Mustapha Alami	A 28 GHz LC-VCO using Body Biasing and AAC Techniques with Low Power Consumption.	ICSDE	2018	DBLP DOI BibTeX RDF
22	Shu Hokimoto, Tohru Ishihara, Hidetoshi Onodera	A Minimum Energy Point Tracking Algorithm Based on Dynamic Voltage Scaling and Adaptive Body Biasing.	IEICE Trans. Fundam. Electron. Commun. Comput. Sci.	2017	DBLP DOI BibTeX RDF
22	Koki Igawa, Masao Yanagisawa, Nozomu Togawa	A Floorplan Aware High-Level Synthesis Algorithm with Body Biasing for Delay Variation Compensation.	IEICE Trans. Fundam. Electron. Commun. Comput. Sci.	2017	DBLP DOI BibTeX RDF