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CoRR(1658) CODES+ISSS(775) AHS(676) ISCAS(669) FPL(658) DATE(638) CHES(627) DAC(571) IEEE Trans. Computers(535) HOST(510) IPDPS(481) IEEE Trans. Comput. Aided Des....(434) IEEE Trans. Very Large Scale I...(423) IEEE Access(365) FCCM(363) ICES(321) More (+10 of total 4569)
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Found 52619 publication records. Showing 52619 according to the selection in the facets
Hits ? Authors Title Venue Year Link Author keywords
66Mohammad Tehranipoor, Farinaz Koushanfar A Survey of Hardware Trojan Taxonomy and Detection. Search on Bibsonomy IEEE Des. Test Comput. The full citation details ... 2010 DBLP  DOI  BibTeX  RDF hardware Trojans, Trojan taxonomy and detection, security, design and test, ICs
43David Szczesny, Sebastian Hessel, Felix Bruns, Attila Bilgic On-the-fly hardware acceleration for protocol stack processing in next generation mobile devices. Search on Bibsonomy CODES+ISSS The full citation details ... 2009 DBLP  DOI  BibTeX  RDF embedded systems, real-time, hardware acceleration, virtual prototyping, hardware/software co-design, LTE, DMA
43Kees A. Vissers Trade-offs in the design of mixed hardware-software systems-a perspective from industry. Search on Bibsonomy CODES The full citation details ... 1997 DBLP  DOI  BibTeX  RDF consumer electronics devices, dedicated components, end-user applications, hardware interface, hardware-software systems design, on-screen display, programmable components, well defined interfaces, embedded systems, software architecture, operating system, high level synthesis, application programming interfaces, device drivers, television, software interfaces, industry perspective, hardware platform
43Sumit Ghosh Large-Scale Systems Design: A Revolutionary New Approach in Software Hardware Co-design. Search on Bibsonomy AIS The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
41Jainendra Kumar, Noel R. Strader, Jeff Freeman, Michael Miller Emulation verification of the Motorola 68060. Search on Bibsonomy ICCD The full citation details ... 1995 DBLP  DOI  BibTeX  RDF emulation verification, Motorola 68060, hardware logic emulation, configurable hardware, circuit verification, pseudo-random verification vectors, software application programs, formal verification, microprocessors, reconfigurable architectures, logic CAD, digital simulation, circuit analysis computing, RTL, hardware description languages, hardware description language, microprocessor chips, HDL, gate-level
41Ghassan Al Hayek, Chantal Robach On the Adequacy of Deriving Hardware Test Data from the Behavioral Specification. Search on Bibsonomy EUROMICRO The full citation details ... 1996 DBLP  DOI  BibTeX  RDF hardware test data, behavioral fault modeling, gate-level strategies, high-level fault detection, gate-level fault detection, design automation tools, generated test set, gate-level fault coverage, hardware description languages, hardware description languages, behavioral specification
39Timothy J. Purcell, Craig Donner, Mike Cammarano, Henrik Wann Jensen, Pat Hanrahan Photon mapping on programmable graphics hardware. Search on Bibsonomy Graphics Hardware The full citation details ... 2003 DBLP  DOI  BibTeX  RDF global illumination, programmable graphics hardware, photon mapping
37Li-Yi Wei Tile-based texture mapping on graphics hardware. Search on Bibsonomy Graphics Hardware The full citation details ... 2004 DBLP  DOI  BibTeX  RDF texture mapping, texture synthesis, graphics hardware
36Tianyi Ma, Jun Yang, Xinglan Wang Low Power Hardware-Software Partitioning Algorithm for Heterogeneous Distributed Embedded Systems. Search on Bibsonomy EUC The full citation details ... 2006 DBLP  DOI  BibTeX  RDF low power, tabu search, chaotic neural network, Hardware-software co-design, hardware-software partitioning
36Matt Ryan, Sojan Markose, Xiaoqing Frank Liu, Ying Cheng Structured Object-Oriented Co-Analysis/Co-Design of Hardware/Software for the FACTS Power System. Search on Bibsonomy COMPSAC (1) The full citation details ... 2005 DBLP  DOI  BibTeX  RDF Hardware/Software Co-analysis, Structured Object-Oriented Method, Embedded Systems, Integration, Hardware/Software Co-design, Concurrent Process
36Arash Hariri, Reza Rastegar, Keivan Navi, Morteza Saheb Zamani, Mohammad Reza Meybodi Cellular Learning Automata based Evolutionary Computing (CLA-EC) for Intrinsic Hardware Evolution. Search on Bibsonomy Evolvable Hardware The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
36Daniel Roggen, Stephane Hofmann, Yann Thoma, Dario Floreano Hardware spiking neural network with run-time reconfigurable connectivity in. Search on Bibsonomy Evolvable Hardware The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
36Juan-Manuel Moreno Aróstegui, Joan Cabestany, Eduardo Sanchez An In-System Routing Strategy For Evolvable Hardware Programmable Platforms. Search on Bibsonomy Evolvable Hardware The full citation details ... 2001 DBLP  DOI  BibTeX  RDF
36Peter T. Breuer, Natividad Martínez Madrid, Carlos Delgado Kloos The Computational Description of Analogue System Behaviour. Search on Bibsonomy Prospects for Hardware Foundations The full citation details ... 1998 DBLP  DOI  BibTeX  RDF
35Rajat Subhra Chakraborty, Swarup Bhunia Hardware protection and authentication through netlist level obfuscation. Search on Bibsonomy ICCAD The full citation details ... 2008 DBLP  DOI  BibTeX  RDF IP piracy, design for security, hardware authentication, hardware obfuscation, hardware protection
35Adel Baganne, Jean Luc Philippe, Eric Martin 0001 Hardware interface design for real time embedded systems. Search on Bibsonomy Great Lakes Symposium on VLSI The full citation details ... 1997 DBLP  DOI  BibTeX  RDF real time digital signal processing, hardware interface design, codesign approach, storage components, hardware-software components, I/O data modeling style, hardware I/O transfer sequences, high level synthesis tool, GAUT, I/O transfer order, cosynthesis tool, real-time systems, ASICs, timing constraints, generic model, data communication, real time embedded systems, formal technique, interface specification, FFT algorithms, allocation problem
35Mark J. Harris, William V. Baxter III, Thorsten Scheuermann, Anselmo Lastra Simulation of cloud dynamics on graphics hardware. Search on Bibsonomy Graphics Hardware The full citation details ... 2003 DBLP  DOI  BibTeX  RDF graphics hardware, clouds, physically-based simulation, fluid dynamics, light scattering
35Jeffrey J. Joyce Totally Verified Systems: Linking Verified Software to Verified Hardware. Search on Bibsonomy Hardware Specification, Verification and Synthesis The full citation details ... 1989 DBLP  DOI  BibTeX  RDF machine-assisted theorem proving, safety-critical systems, higher-order logic, hardware verification, compiler correctness
35Masatoshi Kameyama, Yoshiyuki Kato, Hitoshi Fujimoto, Hiroyasu Negishi, Yukio Kodama, Yoshitsugu Inoue, Hiroyuki Kawai 3D graphics LSI core for mobile phone "Z3D". Search on Bibsonomy Graphics Hardware The full citation details ... 2003 DBLP  DOI  BibTeX  RDF graphics accelerator, graphics hardware, rendering hardware
34Wei-Chuan Liu, Ken-Hao Liu, Ming-Syan Chen Hardware Enhanced Mining for Association Rules. Search on Bibsonomy PAKDD The full citation details ... 2006 DBLP  DOI  BibTeX  RDF Hardware enhanced mining, association rules
34Harald P. E. Vranken, M. P. J. Stevens, M. T. M. Segers Design-For-Debug in Hardware/Software Co-Design. Search on Bibsonomy CODES The full citation details ... 1997 DBLP  DOI  BibTeX  RDF system integration and test, hardware/software co-design, design validation, design-for-debug
34Péter Arató, Zoltán Ádám Mann, András Orbán Algorithmic aspects of hardware/software partitioning. Search on Bibsonomy ACM Trans. Design Autom. Electr. Syst. The full citation details ... 2005 DBLP  DOI  BibTeX  RDF optimization, graph algorithms, hardware/software codesign, Hardware/software partitioning, graph bipartitioning
34Alan Mycroft, Richard Sharp Higher-level techniques for hardware description and synthesis. Search on Bibsonomy Int. J. Softw. Tools Technol. Transf. The full citation details ... 2003 DBLP  DOI  BibTeX  RDF Static allocation, Behavioural hardware description, High-level synthesis, Functional languages, Hardware/software co-design
34Budirijanto Purnomo, Jonathan Bilodeau, Jonathan D. Cohen 0001, Subodh Kumar 0001 Hardware-compatible vertex compression using quantization and simplification. Search on Bibsonomy Graphics Hardware The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
34John C. Gallagher, Sanjay K. Boddhu, Saranyan A. Vigraham A Reconfigurable Continuous Time Recurrent Neural Network for Evolvable Hardware Applications. Search on Bibsonomy Evolvable Hardware The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
34Theresa Foley, Mike Houston, Pat Hanrahan Efficient partitioning of fragment shaders for multiple-output hardware. Search on Bibsonomy Graphics Hardware The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
34David A. Gwaltney, Michael I. Ferguson Intrinsic Hardware Evolution for the Design and Reconfiguration of Analog Speed Controllers for a DC Motor. Search on Bibsonomy Evolvable Hardware The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
34Adrian Stoica, Didier Keymeulen, Ricardo Salem Zebulum, Michael I. Ferguson On Two New Trends in Evolvable Hardware: Employment of HDL-Based Structuring, and Design of Multi-Functional Circuits. Search on Bibsonomy Evolvable Hardware The full citation details ... 2002 DBLP  DOI  BibTeX  RDF
34Michael Korkin, Gary Fehr, Gregory Jeffery Evolving Hardware on a Large Scale. Search on Bibsonomy Evolvable Hardware The full citation details ... 2000 DBLP  DOI  BibTeX  RDF
34Marek A. Perkowski, Alan Mishchenko, Anatoli N. Chebotarev Evolvable Hardware or Learning Hardware? Induction of State Machines from Temporal Logic Constraints. Search on Bibsonomy Evolvable Hardware The full citation details ... 1999 DBLP  DOI  BibTeX  RDF
34Jan Philipps, Peter Scholz Formal Verification and Hardware Design with Statecharts. Search on Bibsonomy Prospects for Hardware Foundations The full citation details ... 1998 DBLP  DOI  BibTeX  RDF
34Bernhard Möller Deductive Hardware Design: A Functional Approach. Search on Bibsonomy Prospects for Hardware Foundations The full citation details ... 1998 DBLP  DOI  BibTeX  RDF
33Mark Genoe, Paul Vanoostende, Geert van Wauwe On the use of VHDL-based behavioral synthesis for telecom ASIC design. Search on Bibsonomy ISSS The full citation details ... 1995 DBLP  DOI  BibTeX  RDF Alcatel-Bell, RTL-synthesizable description, behavioral synthesis tools, hardware CAD tool, system level design methodology, telecom ASIC design, telecom system hardware design, high level synthesis, VHDL, VHDL, application specific integrated circuits, ASIC, logic synthesis, integrated circuit design, hardware description languages, integrated logic circuits, behavioral synthesis, telecommunication computing, hardware software codesign, design complexities
32Sangkil Jung, Sangjin Hong Network/hardware cross-layer evaluation for ROHC and packet aggregation on wireless mesh networks. Search on Bibsonomy Wirel. Networks The full citation details ... 2009 DBLP  DOI  BibTeX  RDF Network/hardware cross-layer evaluation, ROHC, Wireless mesh network
32Lance Saldanha, Roman L. Lysecky Hardware/software partitioning of floating point software applications to fixed-pointed coprocessor circuits. Search on Bibsonomy CODES+ISSS The full citation details ... 2008 DBLP  DOI  BibTeX  RDF floating point to fixed conversion, floating point, fixed point, hardware/software partitioning
32Gregor Wetekam, Dirk Staneker, Urs Kanus, Michael Wand 0001 A hardware architecture for multi-resolution volume rendering. Search on Bibsonomy Graphics Hardware The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
32Nicholas J. Macias, Lisa J. K. Durbeck A Hardware Implementation of the Cell Matrix Self-Configurable Architecture: The Cell Matrix MOD 88. Search on Bibsonomy Evolvable Hardware The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
32Heng Liu 0006, Julian F. Miller, Andy M. Tyrrell Intrinsic Evolvable Hardware Implementation of a Robust Biological Development Model for Digital Systems. Search on Bibsonomy Evolvable Hardware The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
32Ju Hui Li, Meng-Hiot Lim, Qi Cao 0002 An Intrinsic Evolvable and Online Adaptive Evolvable Fuzzy Hardware Scheme for Packet Switching Network. Search on Bibsonomy Evolvable Hardware The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
32Yang Zhang, Stephen L. Smith 0002, Andy M. Tyrrell Digital Circuit Design using Intrinsic Evolvable Hardware. Search on Bibsonomy Evolvable Hardware The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
32Josh C. Bongard, Hod Lipson Automated Robot Function Recovery after Unanticipated Failure or Environmental Change using a Minimum of Hardware Trials. Search on Bibsonomy Evolvable Hardware The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
32Juan Manuel Moreno, Yann Thoma, Eduardo Sanchez, Oriol Torres, Gianluca Tempesti Hardware Realization of a Bio-inspired POEtic Tissue. Search on Bibsonomy Evolvable Hardware The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
32Jonathan R. Evans, Tughrul Arslan The Implementation of an Evolvable Hardware System for Real Time Image Registration on a System-on-Chip Platform. Search on Bibsonomy Evolvable Hardware The full citation details ... 2002 DBLP  DOI  BibTeX  RDF
32John W. Lockwood Evolvable Internet Hardware Platforms. Search on Bibsonomy Evolvable Hardware The full citation details ... 2001 DBLP  DOI  BibTeX  RDF
32Reid B. Porter, Kevin McCabe, Neil W. Bergmann An Applications Approach to Evolvable Hardware. Search on Bibsonomy Evolvable Hardware The full citation details ... 1999 DBLP  DOI  BibTeX  RDF
32Gunnar Tufte, Pauline C. Haddow Prototyping a GA Pipeline for Complete Hardware Evolution. Search on Bibsonomy Evolvable Hardware The full citation details ... 1999 DBLP  DOI  BibTeX  RDF
32Moritoshi Yasunaga, Ikuo Yoshihara, Jung Hwan Kim Gene Finding Using Evolvable Reasoning Hardware. Search on Bibsonomy ICES The full citation details ... 2003 DBLP  DOI  BibTeX  RDF evolving hardware system, evolutionary hardware design methodologies, genome informatics
32Ghassan Al Hayek, Yves Le Traon, Chantal Robach Considering Test Economics in the Process of Hardware/Software Partitioning. Search on Bibsonomy EUROMICRO The full citation details ... 1996 DBLP  DOI  BibTeX  RDF hardware/software testing, specifications, logic testing, estimate, testability, co-design, mutation-test, hardware/software partitioning, test economics
32Marc Olano, Bob Kuehne, Maryann Simmons Automatic shader level of detail. Search on Bibsonomy Graphics Hardware The full citation details ... 2003 DBLP  DOI  BibTeX  RDF multi-pass rendering, computer games, level of detail, languages, simplification, interactive rendering, rendering systems, hardware systems, reflectance & shading models, procedural shading
32Alvin J. Surkan, Amiran Khuskivadze Evolution of Quantum Algorithms for Computer of Reversible Operators. Search on Bibsonomy Evolvable Hardware The full citation details ... 2002 DBLP  DOI  BibTeX  RDF evolutionary design and discovery of evolvable hardware, CCNOT Toffoli quantum gates, genetic programming, quantum computation, Program synthesis, qubits, circuit models
30Norihiro Fujii, Nobuhiko Koike A New Remote Laboratory for Hardware Experiment with Shared Resources and Service Management. Search on Bibsonomy ICITA (2) The full citation details ... 2005 DBLP  DOI  BibTeX  RDF Hardware Experiment, Shared-Lab, Web services, Distance learning, Remote laboratory, shared service
30Kevin Fan, Manjunath Kudlur, Hyunchul Park 0001, Scott A. Mahlke Increasing hardware efficiency with multifunction loop accelerators. Search on Bibsonomy CODES+ISSS The full citation details ... 2006 DBLP  DOI  BibTeX  RDF multifunction design, high-level synthesis, modulo scheduling, loop accelerator, application-specific hardware
30Lejla Batina, David Hwang 0001, Alireza Hodjat, Bart Preneel, Ingrid Verbauwhede Hardware/Software Co-design for Hyperelliptic Curve Cryptography (HECC) on the 8051µP. Search on Bibsonomy CHES The full citation details ... 2005 DBLP  DOI  BibTeX  RDF HECC, genus 2 curves, embedded implementation, hardware/software co- design
30Peter Voigt Knudsen, Jan Madsen PACE: A Dynamic Programming Algorithm for Hardware/Software Partitioning. Search on Bibsonomy CODES The full citation details ... 1996 DBLP  DOI  BibTeX  RDF communication, Codesign, hardware/software partitioning, performance estimation, area estimation, co-synthesis
30Jorge Luís Machado do Amaral, José Franco Machado do Amaral, Cristina Costa Santini, Ricardo Tanscheit, Marley M. B. R. Vellasco, Marco Aurélio Cavalcanti Pacheco, Antonio Carneiro de Mesquita Filho Evolvable Building Blocks for Analog Fuzzy Logic Controllers. Search on Bibsonomy Evolvable Hardware The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
30Adrian Stoica, Didier Keymeulen, Raoul Tawel, Carlos Salazar-Lazaro, Wei-Te Li Evolutionary Experiments with a Fine-Grained Reconfigurable Architecture for Analog and Digital CMOS Circuits. Search on Bibsonomy Evolvable Hardware The full citation details ... 1999 DBLP  DOI  BibTeX  RDF
30Adrian Stoica Evolvable Hardware: From On-Chip Circuit Synthesis to Evolvable Space Systems. Search on Bibsonomy ISMVL The full citation details ... 2000 DBLP  DOI  BibTeX  RDF automated circuit design, programmable devices, genetic algorithms, fuzzy logic, reconfigurable hardware, evolvable hardware, triangular norms
30Asawaree Kalavade, P. A. Subrahmanyam Hardware/software partitioning for multi-function systems. Search on Bibsonomy ICCAD The full citation details ... 1997 DBLP  DOI  BibTeX  RDF multi-function systems, video encode/decode, system-level design, hardware/software partitioning, hardware-software codesign, core-based design
30Heidrun Engel Data flow transformations to detect results which are corrupted by hardware faults. Search on Bibsonomy HASE The full citation details ... 1996 DBLP  DOI  BibTeX  RDF data flow transformations, corrupt result detection, hardware fault coverage, modified instruction, diverse data representation, modified instruction sequences, assembler level, high language level, fault tolerant computing, software faults, design diversity, hardware fault detection
30Jeremy W. Sheaffer, David P. Luebke, Kevin Skadron A hardware redundancy and recovery mechanism for reliable scientific computation on graphics processors. Search on Bibsonomy Graphics Hardware The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
30Andreas Kolb 0001, Lutz Latta, Christof Rezk-Salama Hardware-based simulation and collision detection for large particle systems. Search on Bibsonomy Graphics Hardware The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
30Nolan Goodnight, Cliff Woolley, Gregory Lewin, David P. Luebke, Greg Humphreys A multigrid solver for boundary value problems using programmable graphics hardware. Search on Bibsonomy Graphics Hardware The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
30Ben I. Hounsell, Tughrul Arslan Evolutionary Design And Adaptation Of Digital Filters Within An Embedded Fault Tolerant Hardware Platform . Search on Bibsonomy Evolvable Hardware The full citation details ... 2001 DBLP  DOI  BibTeX  RDF
30Jörg Langeheine, Joachim Becker, Simon Fölling, Karlheinz Meier, Johannes Schemmel A Cmos Fpta Chip For Intrinsic Hardware Evolution Of Analog Electronic Circuits. Search on Bibsonomy Evolvable Hardware The full citation details ... 2001 DBLP  DOI  BibTeX  RDF
30Ho-Sik Seok, Kwang-Ju Lee, Byoung-Tak Zhang, Dong-Wook Lee, Kwee-Bo Sim Genetic Programming of Process Decomposition Strategies for Evolvable Hardware. Search on Bibsonomy Evolvable Hardware The full citation details ... 2000 DBLP  DOI  BibTeX  RDF
30Jim Tørresen Scalable Evolvable Hardware Applied to Road Image Recognition. Search on Bibsonomy Evolvable Hardware The full citation details ... 2000 DBLP  DOI  BibTeX  RDF
30George J. Milne A Model for Dynamic Adaptation in Reconfigurable Hardware Systems. Search on Bibsonomy Evolvable Hardware The full citation details ... 1999 DBLP  DOI  BibTeX  RDF
30Ketil Stølen, Max Fuchs An Exercise in Conditional Refinement. Search on Bibsonomy Prospects for Hardware Foundations The full citation details ... 1998 DBLP  DOI  BibTeX  RDF
30Mary Sheeran Categories for the Working Hardware Designer. Search on Bibsonomy Hardware Specification, Verification and Synthesis The full citation details ... 1989 DBLP  DOI  BibTeX  RDF
30Bita Gorjiara, Nader Bagherzadeh, Pai H. Chou Integrating Power Management into Distributed Real-time Systems at Very Low Implementation Cost. Search on Bibsonomy ASP-DAC The full citation details ... 2007 DBLP  DOI  BibTeX  RDF hardware modifications, software modifications, hardware timers, interrupt controllers, software/device driver, distributed software-defined radio system, hardware measurements, power manager, power management, multiprocessor systems, distributed real-time systems, power constraints, low-power embedded systems
30Lang Lin, Markus Kasper, Tim Güneysu, Christof Paar, Wayne P. Burleson Trojan Side-Channels: Lightweight Hardware Trojans through Side-Channel Engineering. Search on Bibsonomy CHES The full citation details ... 2009 DBLP  DOI  BibTeX  RDF Trojan Hardware, Trojan Side-Channel, Hardware Trojan Detection, Covert Channel, Side-Channel Analysis
30Shinji Kimura, Yasufumi Itou, Makoto Hirao, Katsumasa Watanabe, Mitsuteru Yukishita, Akira Nagoya A Hardware/Software Codesign Method for a General Purpose Reconfigurable Co-Processor. Search on Bibsonomy CODES The full citation details ... 1997 DBLP  DOI  BibTeX  RDF hardware/software co-operation, a computer architecture using FPGA, bus-based reconfigurable co-processor architecture, high-level synthesis and optimization, C compiler to hardware modules
30Julian F. Miller, Keith L. Downing Evolution in materio: Looking Beyond the Silicon Box. Search on Bibsonomy Evolvable Hardware The full citation details ... 2002 DBLP  DOI  BibTeX  RDF Evolvable Matter, Molecular Circuits, Intrinsic evolution, Evolvable Hardware
29Ken Hayworth The "Modeling Clay" Approach to Bio-inspired Electronic Hardware. Search on Bibsonomy ICES The full citation details ... 1998 DBLP  DOI  BibTeX  RDF
29Ying-Hsiang Wen, Jen-Wei Huang, Ming-Syan Chen Hardware-Enhanced Association Rule Mining with Hashing and Pipelining. Search on Bibsonomy IEEE Trans. Knowl. Data Eng. The full citation details ... 2008 DBLP  DOI  BibTeX  RDF hardware-enhanced mining, data mining, Association Rules
29Greg Stitt, Frank Vahid, Shawn Nematbakhsh Energy savings and speedups from partitioning critical software loops to hardware in embedded systems. Search on Bibsonomy ACM Trans. Embed. Comput. Syst. The full citation details ... 2004 DBLP  DOI  BibTeX  RDF FPGA, embedded systems, synthesis, platforms, speedup, low energy, Hardware/software partitioning
28Hayden Kwok-Hay So, Artem Tkachenko, Robert W. Brodersen A unified hardware/software runtime environment for FPGA-based reconfigurable computers using BORPH. Search on Bibsonomy CODES+ISSS The full citation details ... 2006 DBLP  DOI  BibTeX  RDF hardware process, reconfigurable computers
28Sean V. Hum, Michal M. Okoniewski, Robert J. Davies An Evolvable Antenna Platform Based on Reconfigurable Reflectarrays. Search on Bibsonomy Evolvable Hardware The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
28Andrew Riffel, Aaron E. Lefohn, Kiril Vidimce, Mark Leone, John D. Owens Mio: fast multipass partitioning via priority-based instruction scheduling. Search on Bibsonomy Graphics Hardware The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
28Ann Garrison Darrin, Richard Conde, Bobbie Chern, Phil Luers, Steve Jurczyk, Carl Mills Adaptive Instrument Module: Space Instrument Controller "brain" Through Programmable Logic Devices. Search on Bibsonomy Evolvable Hardware The full citation details ... 2001 DBLP  DOI  BibTeX  RDF
28Adrian Stoica, Didier Keymeulen, Ricardo Salem Zebulum, Anilkumar P. Thakoor, Taher Daud, Gerhard Klimeck, Y. Jin, Raoul Tawel, Vu Duong Evolution of Analog Circuits on Field Programmable Transistor Arrays. Search on Bibsonomy Evolvable Hardware The full citation details ... 2000 DBLP  DOI  BibTeX  RDF
28Cesar Ortega-Sanchez, Andrew M. Tyrrell Reliability Analysis in Self-Repairing Embryonic Systems. Search on Bibsonomy Evolvable Hardware The full citation details ... 1999 DBLP  DOI  BibTeX  RDF
28Hugo de Garis, Norberto Eiji Nawa, Andrzej Buller, Michael Korkin, Felix A. Gers, Michael Hough ATR's Artificial Brain ("Cam-Brain") Project a Sample of what Individual "CoDi-1Bit" Model Evolved Neural Net Modules can do with Digital and Analog I/O. Search on Bibsonomy Evolvable Hardware The full citation details ... 1999 DBLP  DOI  BibTeX  RDF
28Delon Levi, Steve Guccione GeneticFPGA: Evolving Stable Circuits on Mainstream FPGA Devices. Search on Bibsonomy Evolvable Hardware The full citation details ... 1999 DBLP  DOI  BibTeX  RDF
28Naoki Iwasaki, Katsumi Wasaki A Meta Hardware Description Language Melasy for Model-Checking Systems. Search on Bibsonomy ITNG The full citation details ... 2008 DBLP  DOI  BibTeX  RDF Hardware/Software co-design and co-verification, Model Checking, Haskell, Design-for-test, Hardware Compilers
28Greg Stitt Hardware/software partitioning with multi-version implementation exploration. Search on Bibsonomy ACM Great Lakes Symposium on VLSI The full citation details ... 2008 DBLP  DOI  BibTeX  RDF fpga, synthesis, hardware/software codesign, hardware/software partitioning
28Wieland Fischer, Jean-Pierre Seifert Increasing the Bitlength of a Crypto-Coprocessor. Search on Bibsonomy CHES The full citation details ... 2002 DBLP  DOI  BibTeX  RDF Arithmetical coprocessor, Hardware/Software codesign, Modular multiplication, Hardware architecture
28Debanjan Saha, Anupam Basu, Raj S. Mitra Hardware Software Partitioning Using Genetic Algorithm. Search on Bibsonomy VLSI Design The full citation details ... 1997 DBLP  DOI  BibTeX  RDF specification partitioning, genetic algorithm, software engineering, embedded systems, CAD, constraint satisfaction problem, hardware software co-design, hardware software partitioning
28R. Miller, Hal Carter, K. Davis, Satish Venkatesan Hardware/software cosynthesis: multiple constraint satisfaction and component retrieval. Search on Bibsonomy ICECCS The full citation details ... 1996 DBLP  DOI  BibTeX  RDF hardware software cosynthesis, multiple constraint satisfaction, high-level system specification, constraint-driven retrieval, candidate solution evaluation, cosynthesis tool, multiple design constraints, two constraint Fidducia-Matheyses approach, flexible component retrieval, design database, ad hoc querying, systems analysis, hardware description language, design space, component retrieval
28Magnus Strengert, Thomas Klein, Thomas Ertl A hardware-aware debugger for the OpenGL shading language. Search on Bibsonomy Graphics Hardware The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
28Dmitry Berenson, Nicolás S. Estévez, Hod Lipson Hardware Evolution of Analog Circuits for In-situ Robotic Fault-Recovery. Search on Bibsonomy Evolvable Hardware The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
28Timothy G. W. Gordon, Peter J. Bentley Development Brings Scalability to Hardware Evolution. Search on Bibsonomy Evolvable Hardware The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
28James M. Hereford, David A. Gwaltney Design Space Issues for Intrinsic Evolvable Hardware. Search on Bibsonomy Evolvable Hardware The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
28James M. Hereford, Charles Pruitt Robust Sensor Systems using Evolvable Hardware. Search on Bibsonomy Evolvable Hardware The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
28Andrew J. Greensted, Andy M. Tyrrell An Endocrinologic-Inspired Hardware Implementation of a Multicellular System. Search on Bibsonomy Evolvable Hardware The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
28Gregory R. Kramer, John C. Gallagher, Michael L. Raymer On the Relative Efficacies of *cGA Variants for Intrinsic Evolvable Hardware: Population, Mutation, and Random Immigrants. Search on Bibsonomy Evolvable Hardware The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
28Evangelos F. Stefatos, Tughrul Arslan An Efficient Fault-Tolerant VLSI Architecture Using Parallel Evolvable Hardware Technology. Search on Bibsonomy Evolvable Hardware The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
28S. G. Lee, W. C. Park, W. J. Lee, T. D. Han, S. B. Yang An effective hardware architecture for bump mapping using angular operation. Search on Bibsonomy Graphics Hardware The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
28Naga K. Govindaraju, Stephane Redon, Ming C. Lin, Dinesh Manocha CULLIDE: interactive collision detection between complex models in large environments using graphics hardware. Search on Bibsonomy Graphics Hardware The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
28Le-Jeng Shiue, Vineet Goel, Jörg Peters 0001 Mesh mutation in programmable graphics hardware. Search on Bibsonomy Graphics Hardware The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
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