Search results for "charge-pump"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
144	Jaehong Ko, Wookwan Lee, Soo-Won Kim	2.5GHz PLL with current matching charge-pump for 10Gbps transmitter design.	ACM Great Lakes Symposium on VLSI	2005	DBLP DOI BibTeX RDF	jitter, PLL, output buffer, charge-pump
121	Won Hyo Lee, Jun Dong Cho, Sung Dae Lee	A High Speed and Low Power Phase-Frequency Detector and Charge - pump.	ASP-DAC	1999	DBLP DOI BibTeX RDF
114	Kuo-Hsing Cheng, Chung-Yu Chang, Chia-Hung Wei	A CMOS charge pump for sub-2.0 V operation.	ISCAS (5)	2003	DBLP DOI BibTeX RDF
108	Shantanu A. Bhalerao, Abhishek V. Chaudhary, Rajendra M. Patrikar	A CMOS Low Voltage Charge Pump.	VLSI Design	2007	DBLP DOI BibTeX RDF
104	Wen Chang Huang, Jin Chang Cheng, Po Chih Liou	A Charge Pump Circuit - Cascading High-Voltage Clock Generator.	DELTA	2008	DBLP DOI BibTeX RDF	voltage doubler, Charge pump
103	Vineela Manne, Akhilesh Tyagi	An Adiabatic Charge Pump Based Charge Recycling Design Style.	PATMOS	2003	DBLP DOI BibTeX RDF
97	Alessandro Cabrini, Laura Gobbi, Guido Torelli	Theoretical and experimental analysis of Dickson charge pump output resistance.	ISCAS	2006	DBLP DOI BibTeX RDF
93	André Mansano, Jader A. De Lima, Jacobus W. Swart	A compact fast-response charge-pump gate driver.	SBCCI	2009	DBLP DOI BibTeX RDF	gate driver, switched-capacitor converters, charge-pump
93	Tian Xia, Stephen Wyatt	High Output Resistance and Wide Swing Voltage Charge Pump Circuit.	ISQED	2008	DBLP DOI BibTeX RDF	Wide Swing, output resistance, current match, charge pump
93	Chi-Hao Wu 0001	Multi-Phase Charge Pump Generating Positive and Negative High Voltages for TFT-LCD Gate Driving.	DELTA	2008	DBLP DOI BibTeX RDF	regulated charge pump, TFT-LCD gate driver
93	Chun Yu Cheng, Ka Nang Leung, Yi Ki Sun, Pui Ying Or	Design of a Low-Voltage CMOS Charge Pump.	DELTA	2008	DBLP DOI BibTeX RDF	efficiency, Charge pump
90	Zhenyu Yang, Zhangwen Tang, Hao Min	A fully differential charge pump with accurate current matching and rail-to-rail common-mode feedback circuit.	ISCAS	2008	DBLP DOI BibTeX RDF
90	Kyung-Soo Ha, Lee-Sup Kim	Charge-pump reducing current mismatch in DLLs and PLLs.	ISCAS	2006	DBLP DOI BibTeX RDF
86	Cameron T. Charles, David J. Allstot	A buffered charge pump with zero charge sharing.	ISCAS	2008	DBLP DOI BibTeX RDF
84	Joseph S. Shor, Yan Polansky, Yaen Yaacov Sofer, Eduardo Maayan	Self-regulated four-phased charge pump with boosted wells.	ISCAS (1)	2003	DBLP DOI BibTeX RDF
84	Osama Khouri, Stefano Gregori, Dario Soltesz, Guido Torelli, Rino Micheloni	Low Output Resistance Charge Pump for Flash Memory Programming.	MTDT	2001	DBLP DOI BibTeX RDF
80	Mohammad R. Hoque, T. Ahmad, Todd R. McNutt, H. Alan Mantooth, Mohammad M. Mojarradi	Design technique of an on-chip, high-voltage charge pump in SOI.	ISCAS (1)	2005	DBLP DOI BibTeX RDF
80	Yuan Yao, Yin Shi, Foster F. Dai	A novel low-power input-independent MOS AC/DC charge pump.	ISCAS (1)	2005	DBLP DOI BibTeX RDF
80	Ryan Perigny, Un-Ku Moon, Gabor C. Temes	Area efficient CMOS charge pump circuits.	ISCAS (1)	2001	DBLP DOI BibTeX RDF
73	Alberto Saiz-Vela, Pedro Lluís Miribel-Català, Manel Puig-Vidal, Josep Samitier	An electron mobility independent pulse skipping regulator for a programmable CMOS charge pump.	ISCAS (1)	2005	DBLP DOI BibTeX RDF
73	R. Arona, Edoardo Bonizzoni, Franco Maloberti, Guido Torelli	Heap charge pump optimisation by a tapered architecture.	ISCAS (2)	2005	DBLP DOI BibTeX RDF
73	Ka-Ming Keung, Vineela Manne, Akhilesh Tyagi	A Novel Charge Recycling Design Scheme Based on Adiabatic Charge Pump.	IEEE Trans. Very Large Scale Integr. Syst.	2007	DBLP DOI BibTeX RDF
69	Anna Richelli, Luca Mensi, Luigi Colalongo, Zsolt Miklós Kovács-Vajna, Pier Luigi Rolandi	A 1.2V-5V High Efficiency CMOS Charge Pump for Non-Volatile Memories.	ISCAS	2007	DBLP DOI BibTeX RDF
69	Mohammad M. Ahmadi, Graham A. Jullien	A new CMOS charge pump for low voltage applications.	ISCAS (5)	2005	DBLP DOI BibTeX RDF
63	Jeongwon Cha, Minsik Ahn, Changhyuk Cho, Chang-Ho Lee, Joy Laskar	A charge-pump based 0.35µm CMOS RF switch driver for multi-standard operations.	ISCAS	2008	DBLP DOI BibTeX RDF
60	Sheng-Yeh Lai, Jinn-Shyan Wang	A high-efficiency CMOS charge pump circuit.	ISCAS (4)	2001	DBLP DOI BibTeX RDF
58	Laura Gobbi, Alessandro Cabrini, Guido Torelli	Impact of parasitic elements on CMOS charge pumps: a numerical analysis.	ISCAS	2006	DBLP DOI BibTeX RDF
56	Ping-Ying Wang, Hsiu-Ming Chang 0001	A charge pump-based direct frequency modulator.	ISCAS	2008	DBLP DOI BibTeX RDF
56	T. Hasan, Torsten Lehmann, Chee Yee Kwok	A 5V charge pump in a standard 1.8-V 0.18-µm CMOS process.	ISCAS (2)	2005	DBLP DOI BibTeX RDF
56	Mikko Saukoski, Lasse Aaltonen, Kari Halonen	Fully integrated charge pump for high voltage excitation of a bulk micromachined gyroscope.	ISCAS (6)	2005	DBLP DOI BibTeX RDF
56	D. S. Hong, Mourad N. El-Gamal	Low operating voltage and short settling time CMOS charge pump for MEMS applications.	ISCAS (5)	2003	DBLP DOI BibTeX RDF
54	Tadashi Yasufuku, Koichi Ishida, Shinji Miyamoto, Hiroto Nakai, Makoto Takamiya, Takayasu Sakurai, Ken Takeuchi	Inductor design of 20-V boost converter for low power 3D solid state drive with NAND flash memories.	ISLPED	2009	DBLP DOI BibTeX RDF	boost converter, inductor design, SSD, charge pump
54	Jae-Hyung Lee, Gyu-Ho Lim, Ji-Hong Kim, Mu-Hun Park, Kyo-Hong Jin, Jeong-Won Cha, Pan-Bong Ha, Yung-Jin Gang, Young-Hee Kim	A Low-Power 512-Bit EEPROM Design for UHF RFID Tag Chips.	International Conference on Computational Science (4)	2007	DBLP DOI BibTeX RDF	EEPROM, UHF RFID, Low-Power, Tag, Charge pump
54	Himanshu Arora, Nikolaus Klemmer, Patrick D. Wolf	A 900 MHz ISM band mash-12 fractional-n frequency synthesizer for 5-Mbps data transmission.	ACM Great Lakes Symposium on VLSI	2007	DBLP DOI BibTeX RDF	RMS phase error, delta-sigma, fractional-N, gain mismatch, phase frequency detector, spurs, thermal noise, VCO, phase noise, frequency synthesizer, charge pump
51	Youcef Fouzar, Yvon Savaria, Mohamad Sawan	A new controlled gain phase-locked loop technique.	ISCAS (4)	2001	DBLP DOI BibTeX RDF
47	Mark Hooper, Matt Kucic, Paul E. Hasler	Integration of high voltage charge-pumps in a submicron standard CMOS process for programming analog floating-gate circuits.	ISCAS (1)	2005	DBLP DOI BibTeX RDF
47	W. Rhee	Design of high-performance CMOS charge pumps in phase-locked loops.	ISCAS (2)	1999	DBLP DOI BibTeX RDF
47	Hiroyuki Yamauchi, Toru Iwata, Hironori Akamatsu, Akira Matsuzawa	A 0.5 V single power supply operated high-speed boosted and offset-grounded data storage (BOGS) SRAM cell architecture.	IEEE Trans. Very Large Scale Integr. Syst.	1997	DBLP DOI BibTeX RDF
44	Toru Tanzawa	A Behavior Model of a Dickson Charge Pump Circuit for Designing a Multiple Charge Pump System Distributed in LSIs.	IEEE Trans. Circuits Syst. II Express Briefs	2010	DBLP DOI BibTeX RDF
43	Ka-Ming Keung, Akhilesh Tyagi	SRAM CP: A Charge Recycling Design Schema for SRAM.	PATMOS	2006	DBLP DOI BibTeX RDF
42	Steve Ngueya W., Jean-Michel Portal, Hassen Aziza, Julien Mellier, Stephane Ricard	A Power Efficient Regulated Charge Pump Based on Charge Sharing for Contactless Devices: An Alternative to Four-Phase Charge Pumps.	J. Low Power Electron.	2017	DBLP DOI BibTeX RDF
41	Balaji Srinivasan, Vinay Bhaskar Chandratre, Menka Tewani	0.35µ, 1 GHz, CMOS Timing Generator Using Array of Digital Delay Lock Loops.	VLSI Design	2008	DBLP DOI BibTeX RDF
41	Davide Baderna, Alessandro Cabrini, Guido Torelli, Marco Pasotti	Efficiency comparison between doubler and Dickson charge pumps.	ISCAS (2)	2005	DBLP DOI BibTeX RDF
41	Debapriya Sahu	A Completely Integrated Low Jitter CMOS PLL for Analog Front Ends in Systems on Chip Environment.	ASP-DAC/VLSI Design	2002	DBLP DOI BibTeX RDF
39	Sinisa Milicevic, Leonard MacEachern	A phase-frequency detector and a charge pump design for PLL applications.	ISCAS	2008	DBLP DOI BibTeX RDF
39	R. G. Raghavendra, Bharadwaj Amrutur	Area efficient loop filter design for charge pump phase locked loop.	ACM Great Lakes Symposium on VLSI	2007	DBLP DOI BibTeX RDF	dual-path loop filter
39	Sergey Alenin, David Spady, Vadim Ivanov	A low ripple on-chip charge pump for bootstrapping of the noise-sensitive nodes.	ISCAS	2006	DBLP DOI BibTeX RDF
39	Tord Johnson, Johnny Holmberg	Nonlinear state-space model of charge-pump based frequency synthesizers.	ISCAS (5)	2005	DBLP DOI BibTeX RDF
39	Kuo-Hsing Cheng, Wei-Bin Yang, Shu-Chang Kuo	A dual-slope phase frequency detector and charge pump architecture to achieve fast locking of phased-locked loop.	ISCAS (1)	2004	DBLP DOI BibTeX RDF
39	Martin John Burbidge, Frédéric Poullet, Jim Tijou, Andrew Richardson 0001	Investigations for Minimum Invasion Digital Only Built-In "Ramp" Based Test Techniques for Charge Pump PLL's.	J. Electron. Test.	2003	DBLP DOI BibTeX RDF	test, DfT, BIST, jitter, phase locked loop
39	Martin John Burbidge, Jim Tijou, Andrew Richardson 0001	Techniques for Automatic On Chip Closed Loop Transfer Function Monitoring For Embedded Charge Pump Phase Locked Loops.	DATE	2003	DBLP DOI BibTeX RDF	CP-PLL, TEST, DfT, BIST, PLL
39	Jefferson B. D. Soldera, Andre Vilas Boas, Alfredo Olmos	A Low Ripple Fully Integrated Charge Pump Regulator.	SBCCI	2003	DBLP DOI BibTeX RDF
39	Rola A. Baki, Mourad N. El-Gamal	A new CMOS charge pump for low-voltage (1V) high-speed PLL applications.	ISCAS (1)	2003	DBLP DOI BibTeX RDF
39	Chang-Hyeon Lee, K. McCellan, John Choma Jr.	Supply noise insensitive bandgap regulator using capacitive charge pump DC-DC converter.	ISCAS (6)	1999	DBLP DOI BibTeX RDF
39	Benoît R. Veillette, Gordon W. Roberts	Stimulus generation for built-in self-test of charge-pump phase-locked loops.	ITC	1998	DBLP DOI BibTeX RDF
37	Dongsheng Ma, Janet Meiling Wang, Mohankumar N. Somasundaram, Zongqi Hu	Design and optimization on dynamic power system for self-powered integrated wireless sensing nodes.	ISLPED	2005	DBLP DOI BibTeX RDF	dynamic power loss control, wireless sensing node, power efficiency, DC-DC converter, charge pump
37	Hui Shao, Chi-Ying Tsui, Wing-Hung Ki	A charge based computation system and control strategy for energy harvesting applications.	ISCAS	2006	DBLP DOI BibTeX RDF
34	Chao Lu 0005, Sang Phill Park, Vijay Raghunathan, Kaushik Roy 0001	Analysis and design of ultra low power thermoelectric energy harvesting systems.	ISLPED	2010	DBLP DOI BibTeX RDF	thermoelectric energy harvesting, ultra low power
34	Hui Shao, Chi-Ying Tsui, Wing-Hung Ki	An inductor-less MPPT design for light energy harvesting systems.	ASP-DAC	2009	DBLP DOI BibTeX RDF
34	Richard Geisler, John C. Liobe, Martin Margala	Process and Temperature Calibration of PLLs with BiST Capabilities.	ISCAS	2007	DBLP DOI BibTeX RDF
34	Jiefeng Yan, Lei Xie, Xiaoyang Zeng, Tingao Tang	Adaptive bandwidth PLL with compact current mode filter.	ISCAS	2006	DBLP DOI BibTeX RDF
34	Kuo-Hsing Cheng, Kai-Fei Chang, Yu-Lung Lo, Ching-Wen Lai, Yuh-Kuang Tseng	A 100MHz-1GHz adaptive bandwidth phase-locked loop in 90nm process.	ISCAS	2006	DBLP DOI BibTeX RDF
34	Ferdinando Bedeschi, Chiara Boffino, Edoardo Bonizzoni, Osama Khouri, Giorgio Pollaccia, Claudio Resta, Guido Torelli	A low-ripple voltage tripler.	ISCAS	2006	DBLP DOI BibTeX RDF
34	Chia-Yu Yao, Chun-Te Hsu, Chin-Chih Yeh	The Analysis of Phase-jitter Variance in the Third-order CPPLL Frequency Synthesizer.	APCCAS	2006	DBLP DOI BibTeX RDF
34	Jun Zou, Daniel Mueller 0001, Helmut E. Graeb, Ulf Schlichtmann	A CPPLL hierarchical optimization methodology considering jitter, power and locking time.	DAC	2006	DBLP DOI BibTeX RDF	hierarchical optimization, pareto-optimal fronts
34	Gerhard Nebel, Thomas Baglin, Iker San Sebastian, Holger Sedlak, Uwe Weder	A very low drop voltage regulator using an NMOS output transistor.	ISCAS (4)	2005	DBLP DOI BibTeX RDF
34	Rainer Krenzke, Cang Ji, Dirk Killat	A 36-V H-bridge driver interface in a standard 0.35-μm CMOS process.	ISCAS (4)	2005	DBLP DOI BibTeX RDF
34	Abdelohahab Djemouai, Mohamad Sawan	Fast-locking low-jitter integrated CMOS phase-locked loop.	ISCAS (1)	2001	DBLP DOI BibTeX RDF
34	Hongchin Lin, Nai-Hsien Chen	New four-phase generation circuits for low-voltage charge pumps.	ISCAS (1)	2001	DBLP DOI BibTeX RDF
34	Woogeun Rhee, Akbar Ali	An on-chip phase compensation technique in fractional-N frequency synthesis.	ISCAS (3)	1999	DBLP DOI BibTeX RDF
32	Jing Gao 0002, Rui Li, Kaiming Nie, Jiangtao Xu	A linear charge pump with novel adaptive charge compensation structure for transient-response improvement in CMOS image sensors.	Microelectron. J.	2022	DBLP DOI BibTeX RDF
32	Hui Peng, Herbert De Pauw, Pieter Bauwens, Jan Doutreloigne	A high-efficiency charge pump with charge recycling scheme and finger boost capacitor.	Integr.	2020	DBLP DOI BibTeX RDF
32	Hui Peng, Pieter Bauwens, Herbert De Pauw, Jan Doutreloigne	Implementation of a 16-Phase 8-Branch Charge Pump with Advanced Charge Recycling Strategy.	IEICE Trans. Electron.	2020	DBLP DOI BibTeX RDF
32	Susan M. Schober, John Choma Jr.	A charge transfer-based high performance, ultra-low power PLL charge pump.	LASCAS	2015	DBLP DOI BibTeX RDF
32	Youngil Kim, Sangsun Lee	Soft pre-charge H/V switch for charge pump with NAND flash memory using external power.	IEICE Electron. Express	2013	DBLP DOI BibTeX RDF
32	Mengshu Huang, Yimeng Zhang, Tsutomu Yoshihara	An Efficient Dual Charge Pump Circuit Using Charge Sharing Clock Scheme.	IEICE Trans. Fundam. Electron. Commun. Comput. Sci.	2012	DBLP DOI BibTeX RDF
32	Seung-Jae Choi, Young-Hyun Jun, Bai-Sun Kong	CMOS charge pump with separated charge sharing for improved boosting ratio and relaxed timing restriction.	ASICON	2011	DBLP DOI BibTeX RDF
32	Mengshu Huang, Yimeng Zhang, Hao Zhang 0087, Tsutomu Yoshihara	Double charge pump circuit with triple charge sharing clock scheme.	ASICON	2011	DBLP DOI BibTeX RDF
32	Jiemin Zhou, Mengshu Huang, Yimeng Zhang, Hao Zhang 0087, Tsutomu Yoshihara	A novel charge sharing charge pump for energy harvesting application.	ISOCC	2011	DBLP DOI BibTeX RDF
32	Masahiro Yoshioka, Nobuo Fujii	Reduction of Charge Injection and Current-Mismatch Errors of Charge Pump for Phase-Locked Loop.	IEICE Trans. Fundam. Electron. Commun. Comput. Sci.	2009	DBLP DOI BibTeX RDF
32	Wing-Hung Ki, Feng Su, Chi-Ying Tsui	Charge redistribution loss consideration in optimal charge pump design.	ISCAS (2)	2005	DBLP DOI BibTeX RDF
32	Marco Bucci, Raimondo Luzzi, Salvatore Pennisi, Alessandro Trifiletti	A charge injection based CMOS charge-pump.	ICECS	2003	DBLP DOI BibTeX RDF
32	Yido Koo, Hyungki Huh, Yongsik Cho, Jeongwoo Lee, Joonbae Park, Kyeongho Lee, Deog-Kyoon Jeong, Wonchan Kim	A fully integrated CMOS frequency synthesizer with charge-averaging charge pump and dual-path loop filter for PCS- and cellular-CDMA wireless systems.	IEEE J. Solid State Circuits	2002	DBLP DOI BibTeX RDF
30	Ngok-Man Sze, Feng Su, Yat-Hei Lam, Wing-Hung Ki, Chi-Ying Tsui	Integrated single-inductor dual-input dual-output boost converter for energy harvesting applications.	ISCAS	2008	DBLP DOI BibTeX RDF
30	Alessandro Cabrini, Laura Gobbi, Guido Torelli	Design of Maximum-Efficiency Integrated Voltage Doubler.	ISCAS	2007	DBLP DOI BibTeX RDF
24	Hui Shao, Chi-Ying Tsui, Wing-Hung Ki	A micro power management system and maximum output power control for solar energy harvesting applications.	ISLPED	2007	DBLP DOI BibTeX RDF	PV cell, power management, energy harvesting, MPPT
24	Hui Shao, Chi-Ying Tsui, Wing-Hung Ki	An Inductor-less Micro Solar Power Management System Design for Energy Harvesting Applications.	ISCAS	2007	DBLP DOI BibTeX RDF
24	Chi-Ying Tsui, Hui Shao, Wing-Hung Ki, Feng Su	Ultra-low voltage power management circuit and computation methodology for energy harvesting applications.	ASP-DAC	2006	DBLP DOI BibTeX RDF
24	Xinhua Chen, Qiuting Huang	A 9.5mW 4GHz WCDMA frequency synthesizer in 0.13µm CMOS.	ISLPED	2005	DBLP DOI BibTeX RDF	low power, CMOS, WCDMA, phase-locked loop, frequency synthesizer
24	Tian Xia, Jien-Chung Lo	On-Chip Short-Time Interval Measurement for High-Speed Signal Timing Characterization.	Asian Test Symposium	2003	DBLP DOI BibTeX RDF
22	Ping Yang, Yusheng Peng, Yijie Sun, Hongchen Liu, Jianping Xu	Variable Turn Ratio Current-Source Charge Pump Power Factor Correction Converter With High Power Factor and Wide Input Voltage Range.	IEEE Trans. Ind. Electron.	2024	DBLP DOI BibTeX RDF
22	Rezaul Haque, Siraj Fulum Mossa	On-chip charge pump design for 3D non-volatile flash memory: from industry perspective.	Integr.	2024	DBLP DOI BibTeX RDF
22	Vasiliki Gogolou, Savvas Karipidis, Thomas Noulis, Stylianos Siskos	A frequency boosting technique for cold-start charge pump units.	Integr.	2024	DBLP DOI BibTeX RDF
22	Julian A. Singer, Jonas Hasmann, Anton Geläschus, Andreas Bahr, Matthias Kuhl	A Fully Integrated Negative Output Voltage Charge Pump for Implantable Single Photon Imagers.	IEEE Trans. Circuits Syst. II Express Briefs	2024	DBLP DOI BibTeX RDF
22	Depeng Sun, Linguo Huang, Rong Zhou, Feng Bu, Lisheng Chen, Xiaoteng Zhao, Ruixue Ding, Shubin Liu, Zhangming Zhu	A 3.96-4.84-GHz Dual-Path Charge Pump PLL Achieving 89.7-fsrms Integrated Jitter and -250.8-dB FOMPLL.	IEEE Trans. Circuits Syst. II Express Briefs	2024	DBLP DOI BibTeX RDF
22	Zhiwen Niu, Xinquan Lai, Bingyuan Wang	A wide input voltage range, high power supply rejection low-dropout regulator with a closed-loop charge pump for sensor front-end circuits.	Int. J. Circuit Theory Appl.	2024	DBLP DOI BibTeX RDF
22	Menghan Song, Tamio Ikehashi	A Capacitance Varying Charge Pump with Exponential Stage-Number Dependence and Its Implementation by MEMS Technology.	IEICE Trans. Electron.	2024	DBLP DOI BibTeX RDF
22	Sumit Kumar, Gaurab Banerjee	An Improved Charge-Pump Design to Increase Tuning Range and Reduce Spurs in FMCW Radar Synthesizers.	VLSID	2024	DBLP DOI BibTeX RDF
22	Rohan Sinha, Devraj M. Rajagopal, Aditya Madhavan	Voltage Mode Charge Pump Regulator with Improved Compensation and Dynamic Body Biasing Scheme.	VLSID	2024	DBLP DOI BibTeX RDF
22	Jack Kee Yong, Harikrishnan Ramiah, Kishore Kumar Pakkirisami Churchill, Gabriel Chong, Saad Mekhilef, Nai Shyan Lai, Yong Chen 0005, Pui-In Mak, Rui Paulo Martins	A Subthreshold Operation Series-Parallel Charge Pump Incorporating Dynamic Source-Fed Oscillator for Wide-Input-Voltage Energy Harvesting Application.	IEEE Access	2023	DBLP DOI BibTeX RDF