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GrowBag graphs for keyword ? (Num. hits/coverage)
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Found 12776 publication records. Showing 12776 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
81 | Biranchinath Sahu, Gabriel A. Rincón-Mora |
A High-Efficiency, Dual-Mode, Dynamic, Buck-Boost Power Supply IC for Portable Applications. |
VLSI Design |
2005 |
DBLP DOI BibTeX RDF |
Buck-boost converter IC, integrated power management, dual-mode converter |
66 | Michal Pavlik, Michal Kuban, Radimir Vrba |
Switched Current Flash Analog to Digital Converter. |
ICONS |
2008 |
DBLP DOI BibTeX RDF |
Switched current, AD Converter, flash converter, Sigma Delta modulator |
66 | Mehdi Ehsanian, Bozena Kaminska, Karim Arabi |
A new digital test approach for analog-to-digital converter testing. |
VTS |
1996 |
DBLP DOI BibTeX RDF |
digital test approach, analog/digital converter testing, BIST circuitry, offset error, gain error, DNL, INL, area overhead reduction, medium resolution ADC, high resolution pipelined ADC, A/D converter testing, differential nonlinearity, integral nonlinearity, 1.5 micron, VLSI, built-in self test, built-in self-test, integrated circuit testing, CMOS integrated circuits, CMOS technology, analogue-digital conversion |
66 | Chin-Long Wey, Haiyan Wang, Cheng-Ping Wang |
A self-timed redundant-binary number to binary number converter for digital arithmetic processors. |
ICCD |
1995 |
DBLP DOI BibTeX RDF |
convertors, self-timed redundant-binary number to binary number converter, digital arithmetic processors, self-timed converter circuit, variable conversion time, statistical upper bound, delays, digital arithmetic, propagation delay, redundant number systems |
66 | Hui Shao, Chi-Ying Tsui, Wing-Hung Ki |
A single inductor dual input dual output DC-DC converter with hybrid supplies for solar energy harvesting applications. |
ISLPED |
2009 |
DBLP DOI BibTeX RDF |
PV cells, dual-input-dual-output, single inductor, energy harvesting, DC-DC converter, MPPT |
59 | Alejandro Polleri, Taufik, Makbul Anwari |
Modeling and Simulation of Paralleled Series-Loaded-Resonant Converter. |
Asia International Conference on Modelling and Simulation |
2008 |
DBLP DOI BibTeX RDF |
Resonant converter, paralleled-series-loaded resonant converter |
59 | P. V. Ratna Kumar, Kaushik Bhattacharyya, Tamal Das, Pradip Mandal |
Improvement of power efficiency in switched capacitor DC-DC converter by shoot-through current elimination. |
ISLPED |
2009 |
DBLP DOI BibTeX RDF |
shoot-through current, switched capacitor converter, time interleaving |
59 | Tadashi Yasufuku, Koichi Ishida, Shinji Miyamoto, Hiroto Nakai, Makoto Takamiya, Takayasu Sakurai, Ken Takeuchi |
Inductor design of 20-V boost converter for low power 3D solid state drive with NAND flash memories. |
ISLPED |
2009 |
DBLP DOI BibTeX RDF |
boost converter, inductor design, SSD, charge pump |
59 | T. Satish, Krushna K. Mohapatra, Ned Mohan |
Carrier-based control of matrix converter in linear and over-modulation modes. |
SCSC |
2007 |
DBLP BibTeX RDF |
over-modulation, matrix converter, pulse-width modulation |
59 | Shiming Han, Xiaobo Wu, Yang Liu |
High-efficiency synchronous dual-output switched-capacitor dc-dc converter with digital state machine control. |
ISLPED |
2007 |
DBLP DOI BibTeX RDF |
dual-output, gain-hopping, multiple gain pair conversion, switched-capacitor DC-DC converter, state machine |
59 | Yongseok Choi, Naehyuck Chang, Taewhan Kim |
DC-DC converter-aware power management for battery-operated embedded systems. |
DAC |
2005 |
DBLP DOI BibTeX RDF |
low power, voltage scaling, DC-DC converter |
59 | Mehdi Hakimi, Seyyed Masoud Moghaddas Tafreshi, M. R. Rajati |
Unit Sizing of a Stand-Alone Hybrid Power System Using Model-Free Optimization. |
GrC |
2007 |
DBLP DOI BibTeX RDF |
reformer, hybrid power system, optimal sizing, particle swarm optimization I. NOMENCLATURE P conv wg - Power delivered from wind turbines to converter (kw) P el wg - Power delivered from wind turbines to electrolyzer (kw) P k el tan - Power delive, K. N. Toosi University of Technology, Tehran-Iran (e-mail: sm_hakimi@yahoo.com). S.M.M.Tafreshi is with the Department of Electrical Engineering, K. N. Toosi University of Technology, Tehran-Iran (e-mail: tafreshi@eetd.kntu.ac.ir). M. R. Rajati is with the Department of Electrical Engineering, K. N. Toosi University of Technology, Tehran-Iran (e-mail: mohammadreza.rajati@gmail.com). P wt Power generated by wind turbines (kw) Pload Load power (kw) E k tan Stored energy in the hydrogen tank (kwh) fc, el, conv Efficiency of fuel cell, electrolyzer, converter NPCindex Net present cost (the index shows the corresponding component) ($) S Single-payment present worth factor R Life time of project (year) L Life time of each components (year) Ir Inter, fuel cell, wind turbine |
59 | Young-Hyok Ji, Jae-Hyung Kim, Su-Jin Jang, Chung-Yuen Won, Soo-Seok Kim |
Fuel cell generation system with SEPIC-flyback converter. |
ICUIMC |
2008 |
DBLP DOI BibTeX RDF |
|
59 | Yougui Guo, Jianlin Zhu, Cheng Deng |
Three Modulation Modes of SVM for AC-AC Matrix Converter. |
RAM |
2008 |
DBLP DOI BibTeX RDF |
|
59 | Khalid H. Abed, Raymond E. Siferd |
CMOS VLSI Implementation of a Low-Power Logarithmic Converter. |
IEEE Trans. Computers |
2003 |
DBLP DOI BibTeX RDF |
Anti-logarithm, binary logarithms, floating-point normalization, leading-one detector, elementary functions, logarithmic number system, low-power circuits |
59 | Volkan Kursun, Siva G. Narendra, Vivek De, Eby G. Friedman |
Monolithic DC-DC Converter Analysis And Mosfet Gate Voltage Optimization. |
ISQED |
2003 |
DBLP DOI BibTeX RDF |
|
52 | Ngok-Man Sze, Wing-Hung Ki, Chi-Ying Tsui |
Threshold Voltage Start-up Boost Converter for Sub-mA Applications. |
DELTA |
2008 |
DBLP DOI BibTeX RDF |
Boost converter, PFM, energy harvesting, DC-DC converter, start up |
51 | Minkyu Song, Dongsheng Ma 0001 |
A fast-transient over-sampled delta-sigma adaptive DC-DC converter for power-efficient noise-sensitive devices. |
ISLPED |
2007 |
DBLP DOI BibTeX RDF |
noise shaping, switching converter, dynamic voltage scaling, sigma-delta modulation |
51 | Alberto Reatti, L. Pellegrini, Marian K. Kazimierczuk |
Measurement of open-loop small-signal control-to-output transfer function of a PWM boost converter operated in DCM. |
ISCAS (5) |
2002 |
DBLP DOI BibTeX RDF |
|
51 | Y. Botteron, Behrouz Nowrouzian, Arthur T. G. Fuller |
Design and switched-capacitor implementation of a new cascade-of-resonators Sigma-Delta converter configuration. |
ISCAS (2) |
1999 |
DBLP DOI BibTeX RDF |
|
44 | Chien-Chun Lu, Ming-Ching Kuo |
A 5V output voltage boost switching converter with hybrid digital and analog PWM control. |
ISLPED |
2010 |
DBLP DOI BibTeX RDF |
digital PWM, switching converter, boost |
44 | Karin Avnit, Vijay D'Silva, Arcot Sowmya, S. Ramesh, Sri Parameswaran |
Provably correct on-chip communication: A formal approach to automatic protocol converter synthesis. |
ACM Trans. Design Autom. Electr. Syst. |
2009 |
DBLP DOI BibTeX RDF |
converter synthesis, protocol compatibility, System-on-chip, automatic design |
44 | Dongsheng Ma |
Robust multiple-phase switched-capacitor DC-DC converter with digital interleaving regulation scheme. |
ISLPED |
2006 |
DBLP DOI BibTeX RDF |
interleaving regulation, switched-capacitor DC-DC converter |
44 | Quoc-Hoang Duong, Trung-Kien Nguyen, Sang-Gug Lee 0001 |
Low-voltage low-power high dB-linear CMOS exponential function generator using highly-linear V-I converter. |
ISLPED |
2003 |
DBLP DOI BibTeX RDF |
VGA, dB-linear, exponential V-I converter |
44 | Lu Ruan 0001, Ding-Zhu Du, Xiao-Dong Hu 0001, Xiaohua Jia, Deying Li 0001, Zheng Sun |
Converter Placement Supporting Broadcast in WDM Optical Networks. |
IEEE Trans. Computers |
2001 |
DBLP DOI BibTeX RDF |
converter placement, Color-Covering, Vertex Color-Covering, optical networks, WDM, Network optimization |
44 | DongHyun Ko, Ji-Hoon Jung, YoungGun Pu, Sang-Kyung Sung, Kang-Yoon Lee, Chul Nam |
A Design of 14-bits ADC and DAC for CODEC Applications in 0.18 µm CMOS Process. |
DELTA |
2008 |
DBLP DOI BibTeX RDF |
ADC(Analog-to-Digital Converter), DAC (Digital-to-Analog Converter), Sigma-Delta Modulator |
44 | Gerhard Schrom, Peter Hazucha, Jae-Hong Hahn, Volkan Kursun, Donald S. Gardner, Siva G. Narendra, Tanay Karnik, Vivek De |
Feasibility of monolithic and 3D-stacked DC-DC converters for microprocessors in 90nm technology generation. |
ISLPED |
2004 |
DBLP DOI BibTeX RDF |
integrated magnetics, on-die switching converter, power delivery, DC-DC converter, 3-D integration |
44 | Pritam Das, Gerry Moschopoulos |
The Design of a Novel ZCT-PWM Converter with Reduced Circulating Current. |
CCECE |
2006 |
DBLP DOI BibTeX RDF |
|
44 | Anawach Sangswang, Chika Nwankpa |
Random noise in switching DC-DC converter: verification and analysis. |
ISCAS (3) |
2003 |
DBLP DOI BibTeX RDF |
|
44 | Shenhong Wang, M. Omair Ahmad |
A switched-current ratio-independent algorithmic D/A converter. |
ISCAS (2) |
1999 |
DBLP DOI BibTeX RDF |
|
44 | Henry Shu-Hung Chung, W. C. Chow |
Development of switched-capacitor-based DC/DC converter with bi-directional power flow. |
ISCAS (5) |
1999 |
DBLP DOI BibTeX RDF |
|
44 | Apurva Somani, Ranjan K. Gupta, T. Satish, Krushna K. Mohapatra |
A PEBB-based direct-link drive for open-ended AC machines. |
SCSC |
2007 |
DBLP BibTeX RDF |
PEBB, common-mode, direct-link drive, open-ended machine, matrix converter |
44 | Yanping Gao, Xianqiang Lv, Xianjiu Guo |
Development and Research of HVDC Light System Based on DSP. |
WKDD |
2009 |
DBLP DOI BibTeX RDF |
|
44 | Edward W. Y. Liu, Alberto L. Sangiovanni-Vincentelli |
Verification of Nyquist data converters using behavioral simulation. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
1995 |
DBLP DOI BibTeX RDF |
|
37 | Tamal Das, Pradip Mandal |
On-Chip Inductor-Less DC-DC Boost Converter with Non-overlapped Rotational-Interleaving Scheme. |
VLSI Design |
2010 |
DBLP DOI BibTeX RDF |
switched capacitor converter, reversion current, non-overlapped rotational-interleaving, dc-dc converter |
37 | Genival Mariano de Araujo, Heider Marconi G. Madureira, José Camargo da Costa |
Design and characterization of a 0.35 micron CMOS voltage-to-current converter. |
SBCCI |
2009 |
DBLP DOI BibTeX RDF |
voltage-to-current converter, system on chip, current reference |
37 | Hong-Hee Lee, Hoang M. Nguyen |
Implementation of Induction Motor Control System Using Matrix Converter Based on CAN Network and Dual-Port RAM. |
ICIC (2) |
2009 |
DBLP DOI BibTeX RDF |
CAN network, dual-port RAM, Matrix converter |
37 | Jiwei Fan, Xin Zhou, Liyu Yang, Alex Chien-Lin Huang |
A low power high noise immunity boost DC-DC converter using the differential difference amplifiers. |
ISLPED |
2009 |
DBLP DOI BibTeX RDF |
boost converter, differential difference amplifier, duty ripple voltage, noise immunity |
37 | Kuei-Hsiang Chao |
Extension Robust Control of a Three-Level Converter for High-Speed Railway Tractions. |
ISNN (2) |
2008 |
DBLP DOI BibTeX RDF |
Three-level converter, power factor correction, extension robust controller, high-speed railway tractions |
37 | Hsiu-Ming Huang, Shih-Hsiung Twu, Shih-Jen Cheng, Huang-Jen Chiu |
A Single-Stage SEPIC PFC Converter for Multiple Lighting LED Lamps. |
DELTA |
2008 |
DBLP DOI BibTeX RDF |
SEPIC PFC Converter, Multiple Lighting LED Lamps, Single-Stage, Burst-Mode |
37 | Drew Guckenberger, Kevin T. Kornegay |
Integrated DC-DC converter design for improved WCDMA power amplifier efficiency in SiGe BiCMOS technology. |
ISLPED |
2003 |
DBLP DOI BibTeX RDF |
CCM-DCM, W-switching, power amplifier, efficiency, WCDMA, DC-DC converter |
37 | Kala Srivatsan, Chaitali Chakrabarti, Lori Lucke |
Low power data format converter design using semi-static register allocation. |
ICCD |
1995 |
DBLP DOI BibTeX RDF |
code convertors, low power data format converter design, semi-static register allocation, processing modules, VLSI, linear programming, integer programming, signal processing, digital signal processing, power consumption, integer linear programming, heuristic programming, heuristic programming, VLSI implementations |
37 | Wang Pengjun, Lu Jingang, Xu Jian |
Application of Neuron MOS in multiple-valued logic. |
Neural Comput. Appl. |
2008 |
DBLP DOI BibTeX RDF |
Neuron MOS transistor, Multiple-valued D/A converter, Multiple-valued A/D converter |
37 | Tamal Das, Pradip Mandal |
Switched-Capacitor Based Buck Converter Design Using Current Limiter for Better Efficiency and Output Ripple. |
VLSI Design |
2009 |
DBLP DOI BibTeX RDF |
|
37 | Dongsheng Ma, Feng Luo |
Robust Multiple-Phase Switched-Capacitor DC-DC Power Converter With Digital Interleaving Regulation Scheme. |
IEEE Trans. Very Large Scale Integr. Syst. |
2008 |
DBLP DOI BibTeX RDF |
|
37 | Inshad Chowdhury, Dongsheng Ma |
An integrated reconfigurable switched-capacitor DC-DC converter with a dual-loop adaptive gain-pulse control. |
ISCAS |
2008 |
DBLP DOI BibTeX RDF |
|
37 | Motoki Katayama, Hiroo Sekiya, Takashi Yahagi |
An interleaved class E2 dc/dc converter. |
ISCAS |
2008 |
DBLP DOI BibTeX RDF |
|
37 | Dhruva Ghai, Saraju P. Mohanty, Elias Kougianos |
A Dual Oxide CMOS Universal Voltage Converter for Power Management in Multi-VDD SoCs. |
ISQED |
2008 |
DBLP DOI BibTeX RDF |
|
37 | K. H. Abed, K. Y. Wong, Marian K. Kazimierczuk |
CMOS zero cross-conduction low-power driver and power MOSFETs for integrated synchronous buck converter. |
ISCAS |
2006 |
DBLP DOI BibTeX RDF |
|
37 | Shinya Terada, Ichirou Oota, Kei Eguchi, Fumio Ueno |
Separate type switched-capacitor (SC) AC-DC converter. |
ISCAS |
2006 |
DBLP DOI BibTeX RDF |
|
37 | Mohankumar N. Somasundaram, Dongsheng Ma |
Integrated low-ripple-voltage fast-response switched-capacitor power converter with interleaving regulation scheme. |
ISCAS |
2006 |
DBLP DOI BibTeX RDF |
|
37 | Jen-Wei Yang, Po-Tsang Huang, Wei Hwang |
On-Chip DC-DC Converter with Frequency Detector for Dynamic Voltage Scaling Technology. |
APCCAS |
2006 |
DBLP DOI BibTeX RDF |
|
37 | Xin-huai Chen, Yufei Zhou, Jun-Ning Chen, Lili Wang |
Study on Complex Behavior in Phase-Shifting Full-Bridge ZVS Converter. |
APCCAS |
2006 |
DBLP DOI BibTeX RDF |
|
37 | Haipeng Ren, Chunfeng Jin, Tamotsu Ninomiya |
Low-frequency bifurcation behaviors of PFC converter. |
ISCAS (3) |
2005 |
DBLP DOI BibTeX RDF |
|
37 | J. Huynh, B. Ngo, M. Pham, Lili He 0001 |
Design of a 10-bit TSMC 0.25um CMOS Digital to Analog Converter. |
ISQED |
2005 |
DBLP DOI BibTeX RDF |
|
37 | Shubha Bommalingaiahnapallya, Ramesh Harjani |
Low power implementation of an n-tone Sigma Delta converter. |
ISCAS (1) |
2004 |
DBLP DOI BibTeX RDF |
|
37 | Jan Vandenbussche, Erik Lauwers, Koen Uyttenhove, Michiel Steyaert, Georges G. E. Gielen |
Systematic Design of a 200 Ms/S 8-bit Interpolating A/D Converter. |
DATE |
2002 |
DBLP DOI BibTeX RDF |
|
37 | A. N. Mohieldin, Ahmed Emira, Edgar Sánchez-Sinencio |
A 2-V 11-bit incremental A/D converter using floating gate technique. |
ISCAS (4) |
2002 |
DBLP DOI BibTeX RDF |
|
37 | Jan Vandenbussche, Koen Uyttenhove, Erik Lauwers, Michiel Steyaert, Georges G. E. Gielen |
Systematic design of a 200 MS/s 8-bit interpolating/averaging A/D converter. |
DAC |
2002 |
DBLP DOI BibTeX RDF |
simulated annealing, interpolating, flash, A/D converters |
37 | Shamala A. Chickamenahalli, S. Mahadevan, V. Nallaperumal |
A three-phase TMS320C30 DSP based resonant-commutated converter. |
ISCAS (5) |
1999 |
DBLP DOI BibTeX RDF |
|
37 | D. Shmilovitz, Dariusz Czarkowski, Zivan Zabar |
Simple criteria to evaluate converter dynamics suitability for operation in active power factor correction systems. |
ISCAS (5) |
1999 |
DBLP DOI BibTeX RDF |
|
37 | Shui-Sheng Qiu, Igor M. Filanovsky |
Harmonic analysis of PWM switching power converter state variable in steady-state operation. |
ISCAS (5) |
1999 |
DBLP DOI BibTeX RDF |
|
37 | A. Tezel, T. Akin |
A low-power switched-current algorithmic A/D converter. |
ISCAS (1) |
1999 |
DBLP DOI BibTeX RDF |
|
37 | Ferdinand Sluijs, Kees Hart, Wouter Groeneveld, Stephan Haag |
Integrated DC/DC converter with digital controller. |
ISLPED |
1998 |
DBLP DOI BibTeX RDF |
|
37 | Young-Kiu Choi, Byung-Wook Jung |
Parameter Tuning for Buck Converters Using Genetic Algorithms. |
ICIC (2) |
2007 |
DBLP DOI BibTeX RDF |
buck converter, output voltage control, genetic algorithm |
37 | Hui-Chin Tseng, Hsin-Hung Ou, Chi-Sheng Lin, Bin-Da Liu |
A low-power rail-to-rail 6-bit flash ADC based on a novel complementary average-value approach. |
ISLPED |
2004 |
DBLP DOI BibTeX RDF |
CMOS analog circuit, flash analog-to-digital converter, rail-to-rail, low power, comparator |
36 | Ja-Hyun Koo 0001, Yun-Jeong Kim, Bong-Hyuck Park, Sang-Seong Choi, Shin-Il Lim, Suki Kim |
A 4-bit 1.356 Gsps ADC Using Current Processing Method. |
APCCAS |
2006 |
DBLP DOI BibTeX RDF |
|
36 | Bor-Ren Lin, Chun-Hao Huang, Zheng-Zhang Yang |
Three-phase power factor corrector based on capacitor-clamped topology. |
ISCAS (4) |
2005 |
DBLP DOI BibTeX RDF |
|
36 | Wieslaw Juszczyk, Zygmunt Kich, Mieczyslaw Zajac |
Diagnostics of a Selected AC Drive Using Parallel Processing. |
PARELEC |
2002 |
DBLP DOI BibTeX RDF |
|
30 | Yufei Zhou, Jiacheng Huang, Shi-Bing Wang, Wei Jiang, Jun-Ning Chen |
Principle of designing slope compensation in PFC Boost converter. |
Sci. China Ser. F Inf. Sci. |
2009 |
DBLP DOI BibTeX RDF |
PFC Boost converter, peak current mode control, slope compensation, fast-scale bifurcation, bifurcation control |
30 | Mohammad Jafari 0002, Zahra Malekjamshidi |
Design, Simulation and Implementation of a Fuzzy-PID Controller for Controlling a DC-DC Converter. |
ISNN (2) |
2009 |
DBLP DOI BibTeX RDF |
Simulation, DC-DC Converter, Fuzzy-PID controller |
30 | Rodrigo Maciel, Marco Sobrino, Diego Pinto, Benjamín Barán, Carlos A. Brizuela |
Optimal wavelength converter allocation: a new approach based MOEA. |
LANC |
2009 |
DBLP DOI BibTeX RDF |
evolutionary algorithms, multi-objective optimization, optical network, allocation, wavelength converter |
30 | Yufei Zhou, Xuedong Jiang, Jun-Ning Chen |
Analysis of complex intermittency in Boost converter from a bifurcation control viewpoint. |
Sci. China Ser. F Inf. Sci. |
2008 |
DBLP DOI BibTeX RDF |
power converter, intermittency, bifurcation control, bifurcation |
30 | Dhruva Ghai, Saraju P. Mohanty, Elias Kougianos |
A process and supply variation tolerant nano-CMOS low voltage, high speed, a/d converter for system-on-chip. |
ACM Great Lakes Symposium on VLSI |
2008 |
DBLP DOI BibTeX RDF |
flash adc, nano-cmos, ti comparator, process variation, analog-to-digital converter, low voltage, high speed |
30 | Zhenghao Zhang, Yuanyuan Yang |
On-line optimal wavelength assignment in WDM networks with shared wavelength converter pool. |
IEEE/ACM Trans. Netw. |
2007 |
DBLP DOI BibTeX RDF |
shared wavelength converter pool, routing, multicast, optical networks, on-line algorithms, wavelength division multiplexing (WDM), wavelength assignment, unicast, wavelength conversion |
30 | Carsten Wegener, Michael Peter Kennedy |
Hard-Fault Detection and Diagnosis During the Application of Model-Based Data Converter Testing. |
J. Electron. Test. |
2007 |
DBLP DOI BibTeX RDF |
Mixed-signal and analog test, Test and diagnosis methodologies, Converter testing, Output response analysis |
30 | Krushna K. Mohapatra, Ned Mohan |
Open-end winding induction motor driven with indirect matrix converter for common-mode elimination. |
SCSC |
2007 |
DBLP BibTeX RDF |
bearing current, common-mode voltage, open-end, three-phase motor, matrix converter |
30 | Krushna K. Mohapatra, Ned Mohan |
Open-ended three-phase drive with matrix converter for common-mode elimination with deadband compensation. |
SCSC |
2007 |
DBLP BibTeX RDF |
bearing current, common-mode voltage, open-end, three-phase motor, matrix converter |
30 | A. A. Mariano, B. Boumballa, Dominique Dallet, Yann Deval, Jean-Baptiste Bégueret |
High-speed CMOS analog-to-digital converter for front-end receiver applications. |
SBCCI |
2007 |
DBLP DOI BibTeX RDF |
flash structure, analog-to-digital converter, data-conversion |
30 | Qianneng Zhou, Fengchang Lai, Mingyan Yu |
On-chip 3.3V-to-1.8V voltage down converter for low-power VLSI chips. |
ACM Great Lakes Symposium on VLSI |
2006 |
DBLP DOI BibTeX RDF |
3.3V-to-1.8V, DC-to-DC, forward-biased source-to-bulk technique, voltage down converter |
30 | Douglas Mercer |
A low power current steering digital to analog converter in 0.18 Micron CMOS. |
ISLPED |
2005 |
DBLP DOI BibTeX RDF |
CMOS, DAC, converter, current mode |
30 | Shih-Chang Hsia, Wen-Ching Lee |
A Very Low-Power Flash A/D Converter Based on Cmos Inverter Circuit. |
IWSOC |
2005 |
DBLP DOI BibTeX RDF |
CMOS inverter, flash, A/D converter |
30 | Jincheol Yoo, Kyusun Choi, Jahan Ghaznavi |
CMOS flash analog-to-digital converter for high speed and low voltage applications. |
ACM Great Lakes Symposium on VLSI |
2003 |
DBLP DOI BibTeX RDF |
TIQ comparator, fat tree encoder, flash ADC, analog-to-digital converter, low voltage, high speed |
30 | M. Braun, Martin Hahn 0001, Jens-Rainer Ohm, Maati Talmi |
Motion-Compensating Real-Time Format Converter for Video on Multimedia Displays. |
ICIP (1) |
1997 |
DBLP DOI BibTeX RDF |
motion-compensating real-time format converter, multimedia displays, interlaced TV signals, progressive display formats, frame repetition rate, motion compensated filtering, candidate vector, temporal predecessors, spatial predecessors, DFD error criterion, optimal candidate, pixel recursive steps, fallback mode, single-chip integration, displayed field differences error criterion, motion estimation, motion estimation, video, median filter |
30 | Chanchal Chatterjee, Vwani P. Roychowdhury |
An efficient contrast-enhancement method using the analog to digital converter. |
Mach. Vis. Appl. |
1996 |
DBLP DOI BibTeX RDF |
Analog enhancement, Analog to digital converter |
30 | Yuan-Tzu Ting, Li Wei Chao, Wei Chung Chao |
A Practical Implementation Of Dynamic Testing Of An Ad Converter. |
Asian Test Symposium |
1996 |
DBLP DOI BibTeX RDF |
AD converter, effective bits, differential nonlinearity, integral nonlinearity, mixed frequency estimation algorithm, weighted least square method, spectral average method, frequency domain estimation, logical analyzer, instrument controller, high speed data acquisition device, GPIB, Datel ADC-HS12B, programmable signal generator, algorithm, software, automatic testing, histogram, PC, signal to noise ratio, analogue-digital conversion, dynamic testing |
29 | Byoungho Kim, Nash Khouzam, Jacob A. Abraham |
Efficient Loopback Test for Aperture Jitter in Embedded Mixed-Signal Circuits. |
VTS |
2008 |
DBLP DOI BibTeX RDF |
Loopback Test, Aperture Jitter, Digital-to-Analog Converter, Analog-to-Digital Converter, ADC, Mixed-Signal Testing, DAC |
29 | Jing Cao, Albert Nymeyer |
Formally Synthesising a Protocol Converter: A Case Study. |
CIAA |
2009 |
DBLP DOI BibTeX RDF |
|
29 | Nuno Dias, Marcelino B. Santos, Floriberto A. Lima, Beatriz Vieira Borges, Júlio Paisana |
Monolithic Multi-mode DC-DC Converter with Gate Voltage Optimization. |
PATMOS |
2008 |
DBLP DOI BibTeX RDF |
DC-DC power conversion, light-load efficiency, Step-Down, Buck, low swing |
29 | Karin Avnit, Vijay D'Silva, Arcot Sowmya, S. Ramesh, Sri Parameswaran |
A Formal Approach To The Protocol Converter Problem. |
DATE |
2008 |
DBLP DOI BibTeX RDF |
|
29 | Enrico Dallago, Daniele Miatton, Giuseppe Venchi, Valeria Bottarel, Giovanni Frattini, Giulio Ricotti, Monica Schipani |
Active self supplied AC-DC converter for piezoelectric energy scavenging systems with supply independent bias. |
ISCAS |
2008 |
DBLP DOI BibTeX RDF |
|
29 | Rajarshi Paul, Dragan Maksimovic |
Smooth transition and ripple reduction in 4-switch non-inverting buck-boost power converter for WCDMA RF power amplifier. |
ISCAS |
2008 |
DBLP DOI BibTeX RDF |
|
29 | Xiaoru Xu, Xiaobo Wu, Xiaolang Yan |
A quasi fixed frequency constant on time controlled boost converter. |
ISCAS |
2008 |
DBLP DOI BibTeX RDF |
|
29 | Santanu Kapat, Amit Patra, Soumitro Banerjee |
A novel current controlled tri-state boost converter with superior dynamic performance. |
ISCAS |
2008 |
DBLP DOI BibTeX RDF |
|
29 | Jorg Daniels, Wim Dehaene, Michiel Steyaert, Andreas Wiesbauer |
A/D conversion using an Asynchronous Delta-Sigma Modulator and a time-to-digital converter. |
ISCAS |
2008 |
DBLP DOI BibTeX RDF |
|
29 | Ji-Man Park, Sung-Ik Jun |
A resistance deviation-to-time interval converter for resistive sensors. |
SoCC |
2008 |
DBLP DOI BibTeX RDF |
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29 | Yongseok Choi, Naehyuck Chang, Taewhan Kim |
DC-DC Converter-Aware Power Management for Low-Power Embedded Systems. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
2007 |
DBLP DOI BibTeX RDF |
|
29 | Yuichi Nakagawa, Masahiro Muraguchi, Hideki Kawamura, Kyoji Ohashi, Kei Sakaguchi, Kiyomichi Araki |
Novel Multi-Stage Transmultiplexing Digital Down Converter for Implementation of RFID (ISO18000-3 MODE 2) Reader/Writer. |
VTC Spring |
2007 |
DBLP DOI BibTeX RDF |
|
29 | Shi-Bing Wang, Yufei Zhou, Herbert H. C. Iu, Jun-Ning Chen |
Complex Phenomena in SEPIC Converter Based on Sliding Mode Control. |
ISCAS |
2007 |
DBLP DOI BibTeX RDF |
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29 | Chi-Chang Lu, Jyun-Yi Wu, Tsung-Sum Lee |
A 1.5V 10-b 30-MS/s CMOS Pipelined Analog-to-Digital Converter. |
ISCAS |
2007 |
DBLP DOI BibTeX RDF |
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