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Publication years (Num. hits)
1988-2004 (21) 2005-2006 (19) 2007-2009 (15) 2010-2014 (16) 2015-2021 (17) 2022-2024 (7)
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article(28) inproceedings(67)
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Found 95 publication records. Showing 95 according to the selection in the facets
Hits ? Authors Title Venue Year Link Author keywords
99Yee Jern Chong, Sri Parameswaran Flexible multi-mode embedded floating-point unit for field programmable gate arrays. Search on Bibsonomy FPGA The full citation details ... 2009 DBLP  DOI  BibTeX  RDF dual-precision, embedded block, fpu, fpga, floating-point, fpga architecture
85Yongsoon Lee, Seok-Bum Ko FPGA Implementation of a Face Detector using Neural Networks. Search on Bibsonomy CCECE The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
77In-hye Seo, Heau-Jo Kang, Tai-Hoon Kim Performance Analysis of Adaptive Digital FPU Transmission System in Fading Environment. Search on Bibsonomy ICIC (1) The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
68Kingshuk Karuri, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Monu Kedia Design and implementation of a modular and portable IEEE 754 compliant floating-point unit. Search on Bibsonomy DATE Designers' Forum The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
68Ajay Naini, Atul Dhablania, Warren James, Debjit Das Sarma 1-GHz HAL SPARC64 Dual Floating Point Unit with RAS Features. Search on Bibsonomy IEEE Symposium on Computer Arithmetic The full citation details ... 2001 DBLP  DOI  BibTeX  RDF
52Dmitry E. Pelinovsky, Guido Schneider The monoatomic FPU system as a limit of a diatomic FPU system. Search on Bibsonomy Appl. Math. Lett. The full citation details ... 2020 DBLP  DOI  BibTeX  RDF
52Jing Pu, Sameh Galal, Xuan Yang, Ofer Shacham, Mark Horowitz FPMax: a 106GFLOPS/W at 217GFLOPS/mm2 Single-Precision FPU, and a 43.7GFLOPS/W at 74.6GFLOPS/mm2 Double-Precision FPU, in 28nm UTBB FDSOI. Search on Bibsonomy CoRR The full citation details ... 2016 DBLP  BibTeX  RDF
51Yee Jern Chong, Sri Parameswaran Automatic application specific floating-point unit generation. Search on Bibsonomy DATE The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
51Silvia M. Müller, Christian Jacobi 0002, Hwa-Joon Oh, Kevin D. Tran, Scott R. Cottier, Brad W. Michael, Hiroo Nishikawa, Yonetaro Totsuka, Tatsuya Namatame, Naoka Yano, Takashi Machida, Sang H. Dhong The Vector Floating-Point Unit in a Synergistic Processor Element of a CELL Processor. Search on Bibsonomy IEEE Symposium on Computer Arithmetic The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
51Leonardo R. Bachega, Siddhartha Chatterjee, Kenneth A. Dockser, John A. Gunnels, Manish Gupta 0002, Fred G. Gustavson, Christopher A. Lapkowski, Gary K. Liu, Mark P. Mendell, Charles D. Wait, T. J. Christopher Ward A High-Performance SIMD Floating Point Unit for BlueGene/L: Architecture, Compilation, and Algorithm Design. Search on Bibsonomy IEEE PACT The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
51Zhenyu Tang, Lei He 0001, Norman Chang, Shen Lin, Weize Xie, O. Sam Nakagawa Instruction Prediction for Step Power Reduction. Search on Bibsonomy ISQED The full citation details ... 2001 DBLP  DOI  BibTeX  RDF
51Zhenyu Tang, Norman Chang, Shen Lin, Weize Xie, O. Sam Nakagawa, Lei He 0001 Ramp Up/Down Functional Unit to Reduce Step Power. Search on Bibsonomy PACS The full citation details ... 2000 DBLP  DOI  BibTeX  RDF
34Seyed Mohammad Hossein Shekarian, Alireza Ejlali, Seyed Ghassem Miremadi A Low Power Error Detection Technique for Floating-Point Units in Embedded Applications. Search on Bibsonomy EUC (1) The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
34Yee Jern Chong, Sri Parameswaran Rapid application specific floating-point unit generation with bit-alignment. Search on Bibsonomy DAC The full citation details ... 2008 DBLP  DOI  BibTeX  RDF bit-alignment, datapath merging, floating-point
34Thomas Y. Yeh, Petros Faloutsos, Milos D. Ercegovac, Sanjay J. Patel, Glenn Reinman The Art of Deception: Adaptive Precision Reduction for Area Efficient Physics Acceleration. Search on Bibsonomy MICRO The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
34J. Gonzalez-Gomez, Iván González, Francisco J. Gomez-Arribas, Eduardo I. Boemo Evaluation of a Locomotion Algorithm for Worm-Like Robots on FPGA-Embedded Processors. Search on Bibsonomy ARC The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
34Neil Burgess Prenormalization rounding in IEEE floating-point operations using a flagged prefix adder. Search on Bibsonomy IEEE Trans. Very Large Scale Integr. Syst. The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
34Christian Jacobi 0002, Christoph Berg Formal Verification of the VAMP Floating Point Unit. Search on Bibsonomy Formal Methods Syst. Des. The full citation details ... 2005 DBLP  DOI  BibTeX  RDF IEEE standard 754, formal verification, theorem proving, PVS, floating point unit
34Christian Jacobi 0002, Kai Weber 0001, Viresh Paruthi, Jason Baumgartner Automatic Formal Verification of Fused-Multiply-Add FPUs. Search on Bibsonomy DATE The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
34Marc Epalza, Paolo Ienne, Daniel Mlynek Adding Limited Reconfigurability to Superscalar Processors. Search on Bibsonomy IEEE PACT The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
34Jens Peter Wittenburg, Ulrich Schreiber, Ulrich Gries, Markus Schneider 0003, Tim Niggemeier A Cost-Efficient RISC Processor Platform for Real Time Audio Applications. Search on Bibsonomy SAMOS The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
34Eric M. Schwarz, Ronald M. Smith, Christopher A. Krygowski The S/390 G5 Floating Point Unit Supporting Hex and Binary Architectures. Search on Bibsonomy IEEE Symposium on Computer Arithmetic The full citation details ... 1999 DBLP  DOI  BibTeX  RDF
32David Monniaux The pitfalls of verifying floating-point computations. Search on Bibsonomy ACM Trans. Program. Lang. Syst. The full citation details ... 2008 DBLP  DOI  BibTeX  RDF AMD64, FPU, IA32, x87, Verification, Static analysis, Abstract interpretation, Program testing, Embedded software, Floating point, Safety-Critical Software, Rounding, PowerPC, IEEE-754
32Michael J. Beauchamp, Scott Hauck, Keith D. Underwood, K. Scott Hemmert Embedded floating-point units in FPGAs. Search on Bibsonomy FPGA The full citation details ... 2006 DBLP  DOI  BibTeX  RDF FPU, FPGA, floating-point, FPGA architecture
26Lyle Parsons, Guang Deng, Robert Ross Detecting image edges in IOT nodes without FPU. Search on Bibsonomy Multim. Tools Appl. The full citation details ... 2024 DBLP  DOI  BibTeX  RDF
26Bastian Hilder, Björn de Rijk, Guido Schneider Moving Modulating Pulse and Front Solutions of Permanent Form in a FPU Model with Nearest and Next-to-Nearest Neighbor Interaction. Search on Bibsonomy SIAM J. Appl. Dyn. Syst. The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
26Chris Keilbart, Yuhui Gao, Martin Chua, Eric Matthews, Steven J. E. Wilton, Lesley Shannon Designing a configurable IEEE-compliant FPU that supports variable precision for soft processors. Search on Bibsonomy FCCM The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
26Jina Park, Kyuseung Han, Eunjin Choi, Sukho Lee, Jae-Jin Lee, Woojoo Lee, Massoud Pedram Florian: Developing a Low-Power RISC-V Multicore Processor with a Shared Lightweight FPU. Search on Bibsonomy ISLPED The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
26Sridutt Bhalachandra, Brian Austin, Samuel Williams 0001, Nicholas J. Wright Understanding the Impact of Input Entropy on FPU, CPU, and GPU Power. Search on Bibsonomy CoRR The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
26Henry Duran, Jesús Cuevas-Maraver, Panayotis G. Kevrekidis, Anna Vainchtein Moving discrete breathers in a β-FPU lattice revisited. Search on Bibsonomy Commun. Nonlinear Sci. Numer. Simul. The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
26Won Jeon, Yong Cheol Peter Cho, Hyun-Mi Kim, Hyeji Kim, Jaehoon Chung, Ju-Yeob Kim, Miyoung Lee, Chun-Gi Lyuh, Jinho Han, Youngsu Kwon M3FPU: Multiformat Matrix Multiplication FPU Architectures for Neural Network Computations. Search on Bibsonomy AICAS The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
26Davide Zoni, Andrea Galimberti, William Fornaciari An FPU design template to optimize the accuracy-efficiency-area trade-off. Search on Bibsonomy Sustain. Comput. Informatics Syst. The full citation details ... 2021 DBLP  DOI  BibTeX  RDF
26Peng Chen Periodic motion for FPU lattice dynamical systems with the strongly indefinite case. Search on Bibsonomy Appl. Math. Lett. The full citation details ... 2021 DBLP  DOI  BibTeX  RDF
26Chiara Caracciolo, Ugo Locatelli Elliptic tori in FPU non-linear chains with a small number of nodes. Search on Bibsonomy Commun. Nonlinear Sci. Numer. Simul. The full citation details ... 2021 DBLP  DOI  BibTeX  RDF
26Noureddine Ait Said, Mounir Benabdenbi, Katell Morin-Allory FPU Reduced Variable Precision in Time: Application to the Jacobi Iterative Method. Search on Bibsonomy ISVLSI The full citation details ... 2021 DBLP  DOI  BibTeX  RDF
26Luca Bertaccini, Matteo Perotti, Stefan Mach, Pasquale Davide Schiavone, Florian Zaruba, Luca Benini Tiny-FPU: Low-Cost Floating-Point Support for Small RISC-V MCU Cores. Search on Bibsonomy ISCAS The full citation details ... 2021 DBLP  DOI  BibTeX  RDF
26Luca Cremona, William Fornaciari, Andrea Galimberti, Andrea Romanoni, Davide Zoni VGM-Bench: FPU Benchmark Suite for Computer Vision, Computer Graphics and Machine Learning Applications. Search on Bibsonomy SAMOS The full citation details ... 2020 DBLP  DOI  BibTeX  RDF
26Noureddine Ait Said, Mounir Benabdenbi, Katell Morin-Allory FPU Bit-Width Optimization for Approximate Computing: A Non-Intrusive Approach. Search on Bibsonomy DTIS The full citation details ... 2020 DBLP  DOI  BibTeX  RDF
26Athanassios Tziouvaras, Georgios Dimitriou, Michael F. Dossis, Georgios I. Stamoulis Adaptive Operation-Based ALU and FPU Clocking. Search on Bibsonomy MOCAST The full citation details ... 2020 DBLP  DOI  BibTeX  RDF
26Roelof Bruggeman, Ferdinand Verhulst Near-Integrability and Recurrence in FPU Chains with Alternating Masses. Search on Bibsonomy J. Nonlinear Sci. The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
26Xiang Yi, Shixiao Liu Mobility of Discrete Breather in a FPU-KG Chain. Search on Bibsonomy CIS The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
26Aneesh Raveendran, Vinay Kumar, Vivian Desalphine, David Selvakumar Functional Simulation Verification of RISC-V Instruction Set Based High Level Language Modeled FPU. Search on Bibsonomy VDAT The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
26Julian Stecklina, Thomas Prescher 0002 LazyFP: Leaking FPU Register State using Microarchitectural Side-Channels. Search on Bibsonomy CoRR The full citation details ... 2018 DBLP  BibTeX  RDF
26Michael Herrmann High-Energy Waves in Superpolynomial FPU-Type Chains. Search on Bibsonomy J. Nonlinear Sci. The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
26Ferdinand Verhulst Near-Integrability and Recurrence in FPU-Cells. Search on Bibsonomy Int. J. Bifurc. Chaos The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
26Alexandre Aminot, Yves Lhuillier, Andrea Castagnetti, Henri-Pierre Charles FPU Speedup Estimation for Task Placement Optimization on Asymmetric Multicore Designs. Search on Bibsonomy MCSoC The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
26Jeremy Gaison, Shari Moskow, J. Douglas Wright, Qimin Zhang Approximation of Polyatomic FPU Lattices by KdV Equations. Search on Bibsonomy Multiscale Model. Simul. The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
26Aarti Gupta, V. M. Achutha KiranKumar, Rajnish Ghughal Formally Verifying Graphics FPU - An Intel® Experience. Search on Bibsonomy FM The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
26Bogdan Pasca 0001 Low-cost multiplier-based FPU for embedded processing on FPGA. Search on Bibsonomy FPL The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
26Angelos Ntasios, Minas Dasygenis Design, Implementation and Verification of a Customizing IP Soft Core With FPU Support. Search on Bibsonomy Panhellenic Conference on Informatics The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
26Michail Maniatakos, Prabhakar Kudva, Bruce M. Fleischer, Yiorgos Makris Low-Cost Concurrent Error Detection for Floating-Point Unit (FPU) Controllers. Search on Bibsonomy IEEE Trans. Computers The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
26Marat Dukhan What a fast FPU means for algorithms: A story of vector elementary functions. Search on Bibsonomy Hot Chips Symposium The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
26Sameh Galal, Ofer Shacham, John S. Brunhaver, Jing Pu, Artem Vassiliev, Mark Horowitz FPU Generator for Design Space Exploration. Search on Bibsonomy IEEE Symposium on Computer Arithmetic The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
26Abbas Rahimi, Andrea Marongiu, Rajesh K. Gupta 0001, Luca Benini A variability-aware OpenMP environment for efficient execution of accuracy-configurable computation on shared-FPU processor clusters. Search on Bibsonomy CODES+ISSS The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
26Mohammad Reza Kakoee, Igor Loi, Luca Benini A shared-FPU architecture for ultra-low power MPSoCs. Search on Bibsonomy Conf. Computing Frontiers The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
26V. M. Achutha KiranKumar, Aarti Gupta, Rajnish Ghughal Symbolic Trajectory Evaluation: The primary validation Vehicle for next generation Intel® Processor Graphics FPU. Search on Bibsonomy FMCAD The full citation details ... 2012 DBLP  BibTeX  RDF
26Michael Herrmann Action Minimising Fronts in General FPU-type Chains. Search on Bibsonomy J. Nonlinear Sci. The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
26Jaume Joven, Per Strict, David Castells-Rufas, Akash Bagdia, Giovanni De Micheli, Jordi Carrabina HW-SW implementation of a decoupled FPU for ARM-based Cortex-M1 SoCs in FPGAs. Search on Bibsonomy SIES The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
26Minh Thien Trieu, Huong Thien Hoang, Phong The Vo, Hung Bao Vo, Yoichi Yuyama Saving 78.11% Dhrystone power consumption in FPU by clock gating while still keeping co-operation with CPU. Search on Bibsonomy ASICON The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
26Michail Maniatakos, Yiorgos Makris, Prabhakar Kudva, Bruce M. Fleischer Exponent monitoring for low-cost concurrent error detection in FPU control logic. Search on Bibsonomy VTS The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
26Michael Herrmann, Jens D. M. Rademacher Heteroclinic Travelling Waves in Convex FPU-Type Chains. Search on Bibsonomy SIAM J. Math. Anal. The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
26T. R. Gopalakrishnan Nair, R. Selvarani, Vighnaraju Saraf Execution and Result Integration Scheme in FPU Farms for Co-ordinated Performance Search on Bibsonomy CoRR The full citation details ... 2010 DBLP  BibTeX  RDF
26Bob Rink Fermi Pasta Ulam systems (FPU): mathematical aspects. Search on Bibsonomy Scholarpedia The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
26Fumio Arakawa, Takashi Okada, Tomoichi Hayashi, Osamu Nishii, Toshihiro Hattori An embedded processor core for consumer appliances with 5.6 GFLOPS and 73M polygons/s FPU. Search on Bibsonomy Microprocess. Microsystems The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
26Hartmut Schwetlick, Johannes Zimmer Solitary Waves for Nonconvex FPU Lattices. Search on Bibsonomy J. Nonlinear Sci. The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
26Yung-Ming Chang, Juan-Ming Yuan, Chin-Chieh Chiang FPU Recurrence in the KdV-Type Equations. Search on Bibsonomy ICICIC (2) The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
26Charles D. Wait IBM PowerPC 440 FPU with complex-arithmetic extensions. Search on Bibsonomy IBM J. Res. Dev. The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
26Juergen Lorenz, Stefan Kral, Franz Franchetti, Christoph W. Ueberhuber Vectorization techniques for the Blue Gene/L double FPU. Search on Bibsonomy IBM J. Res. Dev. The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
26Eric M. Schwarz, Martin S. Schmookler, Son Dao Trong FPU Implementations with Denormalized Numbers. Search on Bibsonomy IEEE Trans. Computers The full citation details ... 2005 DBLP  DOI  BibTeX  RDF Denormalized numbers, subnormals, floating-point hardware, underflow trap, IEEE 754 Standard
26Claudio Brunelli, Fabio Campi, Juha Kylliäinen, Jari Nurmi A reconfigurable FPU as IP component for SoCs. Search on Bibsonomy SoC The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
26Franz Franchetti, Stefan Kral, Juergen Lorenz, Markus Püschel, Christoph W. Ueberhuber Automatically Tuned FFTs for BlueGene/L's Double FPU. Search on Bibsonomy VECPAR The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
26Mourad Aberbour, A. Houelle, Habib Mehrez, Nicolas Vaucher, Alain Guyot On portable macrocell FPU generators for division and square root operators complying to the full IEEE-754 standard. Search on Bibsonomy IEEE Trans. Very Large Scale Integr. Syst. The full citation details ... 1998 DBLP  DOI  BibTeX  RDF
17Florent de Dinechin, Jérémie Detrey, Octavian Cret, Radu Tudoran When FPGAs are better at floating-point than microprocessors. Search on Bibsonomy FPGA The full citation details ... 2008 DBLP  DOI  BibTeX  RDF FPGA, floating-point, arithmetic
17Andrew G. Schmidt, William V. Kritikos, Siddhartha Datta, Ron Sass Reconfigurable Computing Cluster Project: Phase I Brief. Search on Bibsonomy FCCM The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
17Karthik Ganesan 0006, Lizy Kurian John, Valentina Salapura, James C. Sexton A Performance Counter Based Workload Characterization on Blue Gene/P. Search on Bibsonomy ICPP The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
17Xuehai Qian, He Huang, Zhenzhong Duan, Junchao Zhang, Nan Yuan, Yongbin Zhou, Hao Zhang 0009, Huimin Cui, Dongrui Fan Optimized Register Renaming Scheme for Stack-Based x86 Operations. Search on Bibsonomy ARCS The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
17Libo Huang, Li Shen 0007, Kui Dai, Zhiying Wang 0003 A New Architecture For Multiple-Precision Floating-Point Multiply-Add Fused Unit Design. Search on Bibsonomy IEEE Symposium on Computer Arithmetic The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
17Libo Huang, Ming-che Lai, Kui Dai, Hong Yue, Li Shen 0007 Hardware Support for Arithmetic Units of Processor with Multimedia Extension. Search on Bibsonomy MUE The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
17Viay Holimath, Javier D. Bruguera A Linear Convergent Functional Iterative DivisionWithout a Look-Up Table. Search on Bibsonomy DSD The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
17Dong-Sun Kim 0002, Hyunsik Kim, Duck-Jin Chung Implementation of a Neural Network Processor Based on RISC Architecture for Various Signal Processing Applications. Search on Bibsonomy ISNN (2) The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
17Kyprianos Papademetriou, Apostolos Dollas A Task Graph Approach for Efficient Exploitation of Reconfiguration in Dynamically Reconfigurable Systems. Search on Bibsonomy FCCM The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
17Tim Barrett, Sumit D. Mediratta, Taek-Jun Kwon, Ravinder Singh, Sachit Chandra, Jeff Sondeen, Jeffrey T. Draper A double-data rate (DDR) processing-in-memory (PIM) device with wideword floating-point capability. Search on Bibsonomy ISCAS The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
17Taek-Jun Kwon, Jeff Sondeen, Jeffrey T. Draper Design trade-offs in floating-point unit implementation for embedded and processing-in-memory systems. Search on Bibsonomy ISCAS (4) The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
17François Gygi, Robert K. Yates, Juergen Lorenz, Erik W. Draeger, Franz Franchetti, Christoph W. Ueberhuber, Bronis R. de Supinski, Stefan Kral, John A. Gunnels, James C. Sexton Large-Scale First-Principles Molecular Dynamics simulations on the BlueGene/L Platform using the Qbox code. Search on Bibsonomy SC The full citation details ... 2005 DBLP  DOI  BibTeX  RDF Electronic structure, Ab initio simulations, First-principles simulations, BlueGene/L, Parallel computing, Molecular Dynamics
17Sangsoo Park, Yonghee Lee, Heonshik Shin Experimental Performance Evaluation of Embedded Linux Using Alternative CPU Core Organizations. Search on Bibsonomy EUC The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
17Jiansheng Chen, Yiu Sang Moon, K. F. Fong Efficient Fingerprint Image Enhancement for Mobile Embedded Systems. Search on Bibsonomy ECCV Workshop BioAW The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
17Pavel Tvrdík, Ivan Simecek Analytical Modeling of Optimized Sparse Linear Code. Search on Bibsonomy PPAM The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
17Jeffrey Bolz, Peter Schröder Rapid evaluation of Catmull-Clark subdivision surfaces. Search on Bibsonomy Web3D The full citation details ... 2002 DBLP  DOI  BibTeX  RDF
17Cheol-Ho Jeong, Woo-Chan Park, Tack-Don Han, Moon Key Lee, Sang-Woo Kim In-Order Issue Out-of-Order Execution Floating-Point Coprocessor for CalmRISC32. Search on Bibsonomy IEEE Symposium on Computer Arithmetic The full citation details ... 2001 DBLP  DOI  BibTeX  RDF
17Christoph Berg, Christian Jacobi 0002 Formal Verification of the VAMP Floating Point Unit. Search on Bibsonomy CHARME The full citation details ... 2001 DBLP  DOI  BibTeX  RDF
17Matthias Pflanz, Karsten Walther, Heinrich Theodor Vierhaus On-line Error Detection Techniques for Dependable Embedded Processors with High Complexity. Search on Bibsonomy IOLTW The full citation details ... 2001 DBLP  DOI  BibTeX  RDF
17Gülbin Ezer Xtensa with User Defined DSP Coprocessor Microarchitectures. Search on Bibsonomy ICCD The full citation details ... 2000 DBLP  DOI  BibTeX  RDF
17Stuart F. Oberman, Hesham A. Al-Twaijry, Michael J. Flynn The SNAP Project: Design of Floating Point Arithmetic Unit. Search on Bibsonomy IEEE Symposium on Computer Arithmetic The full citation details ... 1997 DBLP  DOI  BibTeX  RDF performance-area tradeoffs, computer arithmetic, multiplication, division, Addition, floating point unit
17Peter Soderquist, Miriam Leeser An Area/Performance Comparison of Subtractive and Multiplicative Divide/Square Root Implementations. Search on Bibsonomy IEEE Symposium on Computer Arithmetic The full citation details ... 1995 DBLP  DOI  BibTeX  RDF Newton-Raphson method, Goldschmidt's algorithm, microprocessor, Floating-point, division, square root, SRT
17Michael H. Arnold, Walter S. Scott An Interactive Maze Router with Hints. Search on Bibsonomy DAC The full citation details ... 1988 DBLP  BibTeX  RDF
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