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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 31594 occurrences of 8245 keywords
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Results
Found 52619 publication records. Showing 52619 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
66 | Mohammad Tehranipoor, Farinaz Koushanfar |
A Survey of Hardware Trojan Taxonomy and Detection. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Des. Test Comput. ![In: IEEE Des. Test Comput. 27(1), pp. 10-25, 2010. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
hardware Trojans, Trojan taxonomy and detection, security, design and test, ICs |
43 | David Szczesny, Sebastian Hessel, Felix Bruns, Attila Bilgic |
On-the-fly hardware acceleration for protocol stack processing in next generation mobile devices. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CODES+ISSS ![In: Proceedings of the 7th International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2009, Grenoble, France, October 11-16, 2009, pp. 155-162, 2009, ACM, 978-1-60558-628-1. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
embedded systems, real-time, hardware acceleration, virtual prototyping, hardware/software co-design, LTE, DMA |
43 | Kees A. Vissers |
Trade-offs in the design of mixed hardware-software systems-a perspective from industry. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CODES ![In: Proceedings of the Fifth International Workshop on Hardware/Software Codesign, CODES/CASHE 1997, March 24-26, 1997, Braunschweig, Germany, 1997, IEEE Computer Society, 0-8186-7895-X. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
consumer electronics devices, dedicated components, end-user applications, hardware interface, hardware-software systems design, on-screen display, programmable components, well defined interfaces, embedded systems, software architecture, operating system, high level synthesis, application programming interfaces, device drivers, television, software interfaces, industry perspective, hardware platform |
43 | Sumit Ghosh |
Large-Scale Systems Design: A Revolutionary New Approach in Software Hardware Co-design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AIS ![In: Artificial Intelligence and Simulation, 13th International Conference on AI, Simulation, and Planning in High Autonomy Systems, AIS 2004, Jeju Island, Korea, October 4-6, 2004, Revised Selected Papers, pp. 270-274, 2004, Springer, 3-540-24476-X. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
41 | Jainendra Kumar, Noel R. Strader, Jeff Freeman, Michael Miller |
Emulation verification of the Motorola 68060. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 1995 International Conference on Computer Design (ICCD '95), VLSI in Computers and Processors, October 2-4, 1995, Austin, TX, USA, Proceedings, pp. 150-158, 1995, IEEE Computer Society, 0-8186-7165-3. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
emulation verification, Motorola 68060, hardware logic emulation, configurable hardware, circuit verification, pseudo-random verification vectors, software application programs, formal verification, microprocessors, reconfigurable architectures, logic CAD, digital simulation, circuit analysis computing, RTL, hardware description languages, hardware description language, microprocessor chips, HDL, gate-level |
41 | Ghassan Al Hayek, Chantal Robach |
On the Adequacy of Deriving Hardware Test Data from the Behavioral Specification. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EUROMICRO ![In: 22rd EUROMICRO Conference '96, Beyond 2000: Hardware and Software Design Strategies, September 2-5, 1996, Prague, Czech Republic, pp. 337-342, 1996, IEEE Computer Society, 0-8186-7487-3. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
hardware test data, behavioral fault modeling, gate-level strategies, high-level fault detection, gate-level fault detection, design automation tools, generated test set, gate-level fault coverage, hardware description languages, hardware description languages, behavioral specification |
39 | Timothy J. Purcell, Craig Donner, Mike Cammarano, Henrik Wann Jensen, Pat Hanrahan |
Photon mapping on programmable graphics hardware. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Graphics Hardware ![In: Proceedings of the 2003 ACM SIGGRAPH/EUROGRAPHICS Workshop on Graphics Hardware, San Diego, California, USA, July 26-27, 2003, pp. 41-50, 2003, Eurographics Association, 1-58113-739-7. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
global illumination, programmable graphics hardware, photon mapping |
37 | Li-Yi Wei |
Tile-based texture mapping on graphics hardware. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Graphics Hardware ![In: Proceedings of the ACM SIGGRAPH/EUROGRAPHICS Symposium on Graphics Hardware 2004, Grenoble, France, August 29-30, 2004, pp. 55-63, 2004, Eurographics Association, 3-905673-15-0. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
texture mapping, texture synthesis, graphics hardware |
36 | Tianyi Ma, Jun Yang, Xinglan Wang |
Low Power Hardware-Software Partitioning Algorithm for Heterogeneous Distributed Embedded Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EUC ![In: Embedded and Ubiquitous Computing, International Conference, EUC 2006, Seoul, Korea, August 1-4, 2006, Proceedings, pp. 702-711, 2006, Springer, 3-540-36679-2. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
low power, tabu search, chaotic neural network, Hardware-software co-design, hardware-software partitioning |
36 | Matt Ryan, Sojan Markose, Xiaoqing Frank Liu, Ying Cheng |
Structured Object-Oriented Co-Analysis/Co-Design of Hardware/Software for the FACTS Power System. ![Search on Bibsonomy](Pics/bibsonomy.png) |
COMPSAC (1) ![In: 29th Annual International Computer Software and Applications Conference, COMPSAC 2005, Edinburgh, Scotland, UK, July 25-28, 2005. Volume 1, pp. 396-402, 2005, IEEE Computer Society, 0-7695-2413-3. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
Hardware/Software Co-analysis, Structured Object-Oriented Method, Embedded Systems, Integration, Hardware/Software Co-design, Concurrent Process |
36 | Arash Hariri, Reza Rastegar, Keivan Navi, Morteza Saheb Zamani, Mohammad Reza Meybodi |
Cellular Learning Automata based Evolutionary Computing (CLA-EC) for Intrinsic Hardware Evolution. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Evolvable Hardware ![In: 2005 NASA / DoD Conference on Evolvable Hardware (EH 2005), 29 June - 1 July 2005, Washington, DC, USA, pp. 294-297, 2005, IEEE Computer Society, 0-7695-2399-4. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
36 | Daniel Roggen, Stephane Hofmann, Yann Thoma, Dario Floreano |
Hardware spiking neural network with run-time reconfigurable connectivity in. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Evolvable Hardware ![In: 5th NASA / DoD Workshop on Evolvable Hardware (EH 2003), 9-11 July 2002, Chicago, IL, USA, pp. 199-208, 2003, IEEE Computer Society, 0-7695-1977-6. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
36 | Juan-Manuel Moreno Aróstegui, Joan Cabestany, Eduardo Sanchez |
An In-System Routing Strategy For Evolvable Hardware Programmable Platforms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Evolvable Hardware ![In: 3rd NASA / DoD Workshop on Evolvable Hardware (EH 2001), 12-14 July 2001, Long Beach, CA, USA, pp. 157-166, 2001, IEEE Computer Society, 0-7695-1180-5. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
36 | Peter T. Breuer, Natividad Martínez Madrid, Carlos Delgado Kloos |
The Computational Description of Analogue System Behaviour. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Prospects for Hardware Foundations ![In: Prospects for Hardware Foundations, ESPRIT Working Group 8533, NADA - New Hardware Design Methods, Survey Chapters, pp. 309-332, 1998, Springer, 3-540-65461-5. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
35 | Rajat Subhra Chakraborty, Swarup Bhunia |
Hardware protection and authentication through netlist level obfuscation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: 2008 International Conference on Computer-Aided Design, ICCAD 2008, San Jose, CA, USA, November 10-13, 2008, pp. 674-677, 2008, IEEE Computer Society, 978-1-4244-2820-5. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
IP piracy, design for security, hardware authentication, hardware obfuscation, hardware protection |
35 | Adel Baganne, Jean Luc Philippe, Eric Martin 0001 |
Hardware interface design for real time embedded systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Great Lakes Symposium on VLSI ![In: 7th Great Lakes Symposium on VLSI (GLS-VLSI '97), 13-15 March 1997, Urbana, IL, USA, pp. 58-63, 1997, IEEE Computer Society, 0-8186-7904-2. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
real time digital signal processing, hardware interface design, codesign approach, storage components, hardware-software components, I/O data modeling style, hardware I/O transfer sequences, high level synthesis tool, GAUT, I/O transfer order, cosynthesis tool, real-time systems, ASICs, timing constraints, generic model, data communication, real time embedded systems, formal technique, interface specification, FFT algorithms, allocation problem |
35 | Mark J. Harris, William V. Baxter III, Thorsten Scheuermann, Anselmo Lastra |
Simulation of cloud dynamics on graphics hardware. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Graphics Hardware ![In: Proceedings of the 2003 ACM SIGGRAPH/EUROGRAPHICS Workshop on Graphics Hardware, San Diego, California, USA, July 26-27, 2003, pp. 92-101, 2003, Eurographics Association, 1-58113-739-7. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
graphics hardware, clouds, physically-based simulation, fluid dynamics, light scattering |
35 | Jeffrey J. Joyce |
Totally Verified Systems: Linking Verified Software to Verified Hardware. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Hardware Specification, Verification and Synthesis ![In: Hardware Specification, Verification and Synthesis: Mathematical Aspects, Mathematical Science Institute Workshop, Cornall University, Ithaca, New York, USA, July 5-7, 1989, Proceedings, pp. 177-201, 1989, Springer, 3-540-97226-9. The full citation details ...](Pics/full.jpeg) |
1989 |
DBLP DOI BibTeX RDF |
machine-assisted theorem proving, safety-critical systems, higher-order logic, hardware verification, compiler correctness |
35 | Masatoshi Kameyama, Yoshiyuki Kato, Hitoshi Fujimoto, Hiroyasu Negishi, Yukio Kodama, Yoshitsugu Inoue, Hiroyuki Kawai |
3D graphics LSI core for mobile phone "Z3D". ![Search on Bibsonomy](Pics/bibsonomy.png) |
Graphics Hardware ![In: Proceedings of the 2003 ACM SIGGRAPH/EUROGRAPHICS Workshop on Graphics Hardware, San Diego, California, USA, July 26-27, 2003, pp. 60-67, 2003, Eurographics Association, 1-58113-739-7. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
graphics accelerator, graphics hardware, rendering hardware |
34 | Wei-Chuan Liu, Ken-Hao Liu, Ming-Syan Chen |
Hardware Enhanced Mining for Association Rules. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PAKDD ![In: Advances in Knowledge Discovery and Data Mining, 10th Pacific-Asia Conference, PAKDD 2006, Singapore, April 9-12, 2006, Proceedings, pp. 729-738, 2006, Springer, 3-540-33206-5. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
Hardware enhanced mining, association rules |
34 | Harald P. E. Vranken, M. P. J. Stevens, M. T. M. Segers |
Design-For-Debug in Hardware/Software Co-Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CODES ![In: Proceedings of the Fifth International Workshop on Hardware/Software Codesign, CODES/CASHE 1997, March 24-26, 1997, Braunschweig, Germany, pp. 35-39, 1997, IEEE Computer Society, 0-8186-7895-X. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
system integration and test, hardware/software co-design, design validation, design-for-debug |
34 | Péter Arató, Zoltán Ádám Mann, András Orbán |
Algorithmic aspects of hardware/software partitioning. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Design Autom. Electr. Syst. ![In: ACM Trans. Design Autom. Electr. Syst. 10(1), pp. 136-156, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
optimization, graph algorithms, hardware/software codesign, Hardware/software partitioning, graph bipartitioning |
34 | Alan Mycroft, Richard Sharp |
Higher-level techniques for hardware description and synthesis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Int. J. Softw. Tools Technol. Transf. ![In: Int. J. Softw. Tools Technol. Transf. 4(3), pp. 271-297, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
Static allocation, Behavioural hardware description, High-level synthesis, Functional languages, Hardware/software co-design |
34 | Budirijanto Purnomo, Jonathan Bilodeau, Jonathan D. Cohen 0001, Subodh Kumar 0001 |
Hardware-compatible vertex compression using quantization and simplification. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Graphics Hardware ![In: Proceedings of the ACM SIGGRAPH/EUROGRAPHICS Symposium on Graphics Hardware 2005, Los Angeles, California, USA, July 30-31, 2005, pp. 53-61, 2005, Eurographics Association, 1-59593-086-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
34 | John C. Gallagher, Sanjay K. Boddhu, Saranyan A. Vigraham |
A Reconfigurable Continuous Time Recurrent Neural Network for Evolvable Hardware Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Evolvable Hardware ![In: 2005 NASA / DoD Conference on Evolvable Hardware (EH 2005), 29 June - 1 July 2005, Washington, DC, USA, pp. 247-250, 2005, IEEE Computer Society, 0-7695-2399-4. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
34 | Theresa Foley, Mike Houston, Pat Hanrahan |
Efficient partitioning of fragment shaders for multiple-output hardware. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Graphics Hardware ![In: Proceedings of the ACM SIGGRAPH/EUROGRAPHICS Symposium on Graphics Hardware 2004, Grenoble, France, August 29-30, 2004, pp. 45-53, 2004, Eurographics Association, 3-905673-15-0. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
34 | David A. Gwaltney, Michael I. Ferguson |
Intrinsic Hardware Evolution for the Design and Reconfiguration of Analog Speed Controllers for a DC Motor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Evolvable Hardware ![In: 5th NASA / DoD Workshop on Evolvable Hardware (EH 2003), 9-11 July 2002, Chicago, IL, USA, pp. 81-90, 2003, IEEE Computer Society, 0-7695-1977-6. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
34 | Adrian Stoica, Didier Keymeulen, Ricardo Salem Zebulum, Michael I. Ferguson |
On Two New Trends in Evolvable Hardware: Employment of HDL-Based Structuring, and Design of Multi-Functional Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Evolvable Hardware ![In: 4th NASA / DoD Workshop on Evolvable Hardware (EH 2002), 15-18 July 2002, Alexandria, VA, USA, pp. 56-59, 2002, IEEE Computer Society, 0-7695-1718-8. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
34 | Michael Korkin, Gary Fehr, Gregory Jeffery |
Evolving Hardware on a Large Scale. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Evolvable Hardware ![In: 2nd NASA / DoD Workshop on Evolvable Hardware (EH 2000), 13-15 July 2000, Palo Alto, CA, USA, pp. 173-182, 2000, IEEE Computer Society, 0-7695-0762-X. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
34 | Marek A. Perkowski, Alan Mishchenko, Anatoli N. Chebotarev |
Evolvable Hardware or Learning Hardware? Induction of State Machines from Temporal Logic Constraints. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Evolvable Hardware ![In: 1st NASA / DoD Workshop on Evolvable Hardware (EH '99), July 19-21, 1999, Pasadena, CA, USA, pp. 129-138, 1999, IEEE Computer Society, 0-7695-0256-3. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
34 | Jan Philipps, Peter Scholz |
Formal Verification and Hardware Design with Statecharts. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Prospects for Hardware Foundations ![In: Prospects for Hardware Foundations, ESPRIT Working Group 8533, NADA - New Hardware Design Methods, Survey Chapters, pp. 356-389, 1998, Springer, 3-540-65461-5. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
34 | Bernhard Möller |
Deductive Hardware Design: A Functional Approach. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Prospects for Hardware Foundations ![In: Prospects for Hardware Foundations, ESPRIT Working Group 8533, NADA - New Hardware Design Methods, Survey Chapters, pp. 421-468, 1998, Springer, 3-540-65461-5. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
33 | Mark Genoe, Paul Vanoostende, Geert van Wauwe |
On the use of VHDL-based behavioral synthesis for telecom ASIC design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSS ![In: Proceedings of the 8th International Symposium on System Synthesis (ISSS 1995), September 13-15, 1995, Cannes, France, pp. 96-103, 1995, ACM, 0-89791-771-5. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
Alcatel-Bell, RTL-synthesizable description, behavioral synthesis tools, hardware CAD tool, system level design methodology, telecom ASIC design, telecom system hardware design, high level synthesis, VHDL, VHDL, application specific integrated circuits, ASIC, logic synthesis, integrated circuit design, hardware description languages, integrated logic circuits, behavioral synthesis, telecommunication computing, hardware software codesign, design complexities |
32 | Sangkil Jung, Sangjin Hong |
Network/hardware cross-layer evaluation for ROHC and packet aggregation on wireless mesh networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Wirel. Networks ![In: Wirel. Networks 15(8), pp. 1086-1101, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
Network/hardware cross-layer evaluation, ROHC, Wireless mesh network |
32 | Lance Saldanha, Roman L. Lysecky |
Hardware/software partitioning of floating point software applications to fixed-pointed coprocessor circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CODES+ISSS ![In: Proceedings of the 6th International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2008, Atlanta, GA, USA, October 19-24, 2008, pp. 49-54, 2008, ACM, 978-1-60558-470-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
floating point to fixed conversion, floating point, fixed point, hardware/software partitioning |
32 | Gregor Wetekam, Dirk Staneker, Urs Kanus, Michael Wand 0001 |
A hardware architecture for multi-resolution volume rendering. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Graphics Hardware ![In: Proceedings of the ACM SIGGRAPH/EUROGRAPHICS Symposium on Graphics Hardware 2005, Los Angeles, California, USA, July 30-31, 2005, pp. 45-51, 2005, Eurographics Association, 1-59593-086-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
32 | Nicholas J. Macias, Lisa J. K. Durbeck |
A Hardware Implementation of the Cell Matrix Self-Configurable Architecture: The Cell Matrix MOD 88. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Evolvable Hardware ![In: 2005 NASA / DoD Conference on Evolvable Hardware (EH 2005), 29 June - 1 July 2005, Washington, DC, USA, pp. 103-106, 2005, IEEE Computer Society, 0-7695-2399-4. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
32 | Heng Liu 0006, Julian F. Miller, Andy M. Tyrrell |
Intrinsic Evolvable Hardware Implementation of a Robust Biological Development Model for Digital Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Evolvable Hardware ![In: 2005 NASA / DoD Conference on Evolvable Hardware (EH 2005), 29 June - 1 July 2005, Washington, DC, USA, pp. 87-92, 2005, IEEE Computer Society, 0-7695-2399-4. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
32 | Ju Hui Li, Meng-Hiot Lim, Qi Cao 0002 |
An Intrinsic Evolvable and Online Adaptive Evolvable Fuzzy Hardware Scheme for Packet Switching Network. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Evolvable Hardware ![In: 6th NASA / DoD Workshop on Evolvable Hardware (EH 2004), 24-26 June 2004, Seattle, WA, USA, pp. 109-, 2004, IEEE Computer Society, 0-7695-2145-2. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
32 | Yang Zhang, Stephen L. Smith 0002, Andy M. Tyrrell |
Digital Circuit Design using Intrinsic Evolvable Hardware. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Evolvable Hardware ![In: 6th NASA / DoD Workshop on Evolvable Hardware (EH 2004), 24-26 June 2004, Seattle, WA, USA, pp. 55-62, 2004, IEEE Computer Society, 0-7695-2145-2. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
32 | Josh C. Bongard, Hod Lipson |
Automated Robot Function Recovery after Unanticipated Failure or Environmental Change using a Minimum of Hardware Trials. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Evolvable Hardware ![In: 6th NASA / DoD Workshop on Evolvable Hardware (EH 2004), 24-26 June 2004, Seattle, WA, USA, pp. 169-176, 2004, IEEE Computer Society, 0-7695-2145-2. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
32 | Juan Manuel Moreno, Yann Thoma, Eduardo Sanchez, Oriol Torres, Gianluca Tempesti |
Hardware Realization of a Bio-inspired POEtic Tissue. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Evolvable Hardware ![In: 6th NASA / DoD Workshop on Evolvable Hardware (EH 2004), 24-26 June 2004, Seattle, WA, USA, pp. 237-244, 2004, IEEE Computer Society, 0-7695-2145-2. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
32 | Jonathan R. Evans, Tughrul Arslan |
The Implementation of an Evolvable Hardware System for Real Time Image Registration on a System-on-Chip Platform. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Evolvable Hardware ![In: 4th NASA / DoD Workshop on Evolvable Hardware (EH 2002), 15-18 July 2002, Alexandria, VA, USA, pp. 142-146, 2002, IEEE Computer Society, 0-7695-1718-8. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
32 | John W. Lockwood |
Evolvable Internet Hardware Platforms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Evolvable Hardware ![In: 3rd NASA / DoD Workshop on Evolvable Hardware (EH 2001), 12-14 July 2001, Long Beach, CA, USA, pp. 271-279, 2001, IEEE Computer Society, 0-7695-1180-5. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
32 | Reid B. Porter, Kevin McCabe, Neil W. Bergmann |
An Applications Approach to Evolvable Hardware. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Evolvable Hardware ![In: 1st NASA / DoD Workshop on Evolvable Hardware (EH '99), July 19-21, 1999, Pasadena, CA, USA, pp. 170-174, 1999, IEEE Computer Society, 0-7695-0256-3. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
32 | Gunnar Tufte, Pauline C. Haddow |
Prototyping a GA Pipeline for Complete Hardware Evolution. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Evolvable Hardware ![In: 1st NASA / DoD Workshop on Evolvable Hardware (EH '99), July 19-21, 1999, Pasadena, CA, USA, pp. 18-25, 1999, IEEE Computer Society, 0-7695-0256-3. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
32 | Moritoshi Yasunaga, Ikuo Yoshihara, Jung Hwan Kim |
Gene Finding Using Evolvable Reasoning Hardware. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICES ![In: Evolvable Systems: From Biology to Hardware, 5th International Conference, ICES 2003, Trondheim, Norway, March 17-20, 2003, Proceedings, pp. 198-207, 2003, Springer, 3-540-00730-X. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
evolving hardware system, evolutionary hardware design methodologies, genome informatics |
32 | Ghassan Al Hayek, Yves Le Traon, Chantal Robach |
Considering Test Economics in the Process of Hardware/Software Partitioning. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EUROMICRO ![In: 22rd EUROMICRO Conference '96, Beyond 2000: Hardware and Software Design Strategies, September 2-5, 1996, Prague, Czech Republic, pp. 28-, 1996, IEEE Computer Society, 0-8186-7487-3. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
hardware/software testing, specifications, logic testing, estimate, testability, co-design, mutation-test, hardware/software partitioning, test economics |
32 | Marc Olano, Bob Kuehne, Maryann Simmons |
Automatic shader level of detail. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Graphics Hardware ![In: Proceedings of the 2003 ACM SIGGRAPH/EUROGRAPHICS Workshop on Graphics Hardware, San Diego, California, USA, July 26-27, 2003, pp. 7-14, 2003, Eurographics Association, 1-58113-739-7. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
multi-pass rendering, computer games, level of detail, languages, simplification, interactive rendering, rendering systems, hardware systems, reflectance & shading models, procedural shading |
32 | Alvin J. Surkan, Amiran Khuskivadze |
Evolution of Quantum Algorithms for Computer of Reversible Operators. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Evolvable Hardware ![In: 4th NASA / DoD Workshop on Evolvable Hardware (EH 2002), 15-18 July 2002, Alexandria, VA, USA, pp. 186-190, 2002, IEEE Computer Society, 0-7695-1718-8. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
evolutionary design and discovery of evolvable hardware, CCNOT Toffoli quantum gates, genetic programming, quantum computation, Program synthesis, qubits, circuit models |
30 | Norihiro Fujii, Nobuhiko Koike |
A New Remote Laboratory for Hardware Experiment with Shared Resources and Service Management. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICITA (2) ![In: Third International Conference on Information Technology and Applications (ICITA 2005), 4-7 July 2005, Sydney, Australia, pp. 153-158, 2005, IEEE Computer Society, 0-7695-2316-1. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
Hardware Experiment, Shared-Lab, Web services, Distance learning, Remote laboratory, shared service |
30 | Kevin Fan, Manjunath Kudlur, Hyunchul Park 0001, Scott A. Mahlke |
Increasing hardware efficiency with multifunction loop accelerators. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CODES+ISSS ![In: Proceedings of the 4th International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2006, Seoul, Korea, October 22-25, 2006, pp. 276-281, 2006, ACM, 1-59593-370-0. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
multifunction design, high-level synthesis, modulo scheduling, loop accelerator, application-specific hardware |
30 | Lejla Batina, David Hwang 0001, Alireza Hodjat, Bart Preneel, Ingrid Verbauwhede |
Hardware/Software Co-design for Hyperelliptic Curve Cryptography (HECC) on the 8051µP. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2005, 7th International Workshop, Edinburgh, UK, August 29 - September 1, 2005, Proceedings, pp. 106-118, 2005, Springer, 3-540-28474-5. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
HECC, genus 2 curves, embedded implementation, hardware/software co- design |
30 | Peter Voigt Knudsen, Jan Madsen |
PACE: A Dynamic Programming Algorithm for Hardware/Software Partitioning. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CODES ![In: Proceedings of the Forth International Workshop on Hardware/Software Codesign, CODES 1996, Pittsburgh, PA, USA, March 18-20, 1996, pp. 85-93, 1996, IEEE Computer Society, 0-8186-7243-9. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
communication, Codesign, hardware/software partitioning, performance estimation, area estimation, co-synthesis |
30 | Jorge Luís Machado do Amaral, José Franco Machado do Amaral, Cristina Costa Santini, Ricardo Tanscheit, Marley M. B. R. Vellasco, Marco Aurélio Cavalcanti Pacheco, Antonio Carneiro de Mesquita Filho |
Evolvable Building Blocks for Analog Fuzzy Logic Controllers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Evolvable Hardware ![In: 5th NASA / DoD Workshop on Evolvable Hardware (EH 2003), 9-11 July 2002, Chicago, IL, USA, pp. 101-110, 2003, IEEE Computer Society, 0-7695-1977-6. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
30 | Adrian Stoica, Didier Keymeulen, Raoul Tawel, Carlos Salazar-Lazaro, Wei-Te Li |
Evolutionary Experiments with a Fine-Grained Reconfigurable Architecture for Analog and Digital CMOS Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Evolvable Hardware ![In: 1st NASA / DoD Workshop on Evolvable Hardware (EH '99), July 19-21, 1999, Pasadena, CA, USA, pp. 76-84, 1999, IEEE Computer Society, 0-7695-0256-3. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
30 | Adrian Stoica |
Evolvable Hardware: From On-Chip Circuit Synthesis to Evolvable Space Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISMVL ![In: 30th IEEE International Symposium on Multiple-Valued Logic, ISMVL 2000, Portland, Oregon, USA, May 23-25, 2000, Proceedings, pp. 161-172, 2000, IEEE Computer Society, 0-7695-0692-5. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
automated circuit design, programmable devices, genetic algorithms, fuzzy logic, reconfigurable hardware, evolvable hardware, triangular norms |
30 | Asawaree Kalavade, P. A. Subrahmanyam |
Hardware/software partitioning for multi-function systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: Proceedings of the 1997 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 1997, San Jose, CA, USA, November 9-13, 1997, pp. 516-521, 1997, IEEE Computer Society / ACM, 0-8186-8200-0. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
multi-function systems, video encode/decode, system-level design, hardware/software partitioning, hardware-software codesign, core-based design |
30 | Heidrun Engel |
Data flow transformations to detect results which are corrupted by hardware faults. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HASE ![In: 1st High-Assurance Systems Engineering Workshop (HASE '96), October 22, 1996, Niagara, Canada, Proceedings, pp. 279-, 1996, IEEE Computer Society, 0-8186-7629-9. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
data flow transformations, corrupt result detection, hardware fault coverage, modified instruction, diverse data representation, modified instruction sequences, assembler level, high language level, fault tolerant computing, software faults, design diversity, hardware fault detection |
30 | Jeremy W. Sheaffer, David P. Luebke, Kevin Skadron |
A hardware redundancy and recovery mechanism for reliable scientific computation on graphics processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Graphics Hardware ![In: Proceedings of the ACM SIGGRAPH/EUROGRAPHICS Conference on Graphics Hardware 2007, San Diego, California, USA, August 4-5, 2007, pp. 55-64, 2007, Eurographics Association, 978-1-59593-625-7. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
30 | Andreas Kolb 0001, Lutz Latta, Christof Rezk-Salama |
Hardware-based simulation and collision detection for large particle systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Graphics Hardware ![In: Proceedings of the ACM SIGGRAPH/EUROGRAPHICS Symposium on Graphics Hardware 2004, Grenoble, France, August 29-30, 2004, pp. 123-131, 2004, Eurographics Association, 3-905673-15-0. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
30 | Nolan Goodnight, Cliff Woolley, Gregory Lewin, David P. Luebke, Greg Humphreys |
A multigrid solver for boundary value problems using programmable graphics hardware. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Graphics Hardware ![In: Proceedings of the 2003 ACM SIGGRAPH/EUROGRAPHICS Workshop on Graphics Hardware, San Diego, California, USA, July 26-27, 2003, pp. 102-111, 2003, Eurographics Association, 1-58113-739-7. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
30 | Ben I. Hounsell, Tughrul Arslan |
Evolutionary Design And Adaptation Of Digital Filters Within An Embedded Fault Tolerant Hardware Platform . ![Search on Bibsonomy](Pics/bibsonomy.png) |
Evolvable Hardware ![In: 3rd NASA / DoD Workshop on Evolvable Hardware (EH 2001), 12-14 July 2001, Long Beach, CA, USA, pp. 127-135, 2001, IEEE Computer Society, 0-7695-1180-5. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
30 | Jörg Langeheine, Joachim Becker, Simon Fölling, Karlheinz Meier, Johannes Schemmel |
A Cmos Fpta Chip For Intrinsic Hardware Evolution Of Analog Electronic Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Evolvable Hardware ![In: 3rd NASA / DoD Workshop on Evolvable Hardware (EH 2001), 12-14 July 2001, Long Beach, CA, USA, pp. 172-175, 2001, IEEE Computer Society, 0-7695-1180-5. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
30 | Ho-Sik Seok, Kwang-Ju Lee, Byoung-Tak Zhang, Dong-Wook Lee, Kwee-Bo Sim |
Genetic Programming of Process Decomposition Strategies for Evolvable Hardware. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Evolvable Hardware ![In: 2nd NASA / DoD Workshop on Evolvable Hardware (EH 2000), 13-15 July 2000, Palo Alto, CA, USA, pp. 25-36, 2000, IEEE Computer Society, 0-7695-0762-X. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
30 | Jim Tørresen |
Scalable Evolvable Hardware Applied to Road Image Recognition. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Evolvable Hardware ![In: 2nd NASA / DoD Workshop on Evolvable Hardware (EH 2000), 13-15 July 2000, Palo Alto, CA, USA, pp. 245-252, 2000, IEEE Computer Society, 0-7695-0762-X. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
30 | George J. Milne |
A Model for Dynamic Adaptation in Reconfigurable Hardware Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Evolvable Hardware ![In: 1st NASA / DoD Workshop on Evolvable Hardware (EH '99), July 19-21, 1999, Pasadena, CA, USA, pp. 161-169, 1999, IEEE Computer Society, 0-7695-0256-3. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
30 | Ketil Stølen, Max Fuchs |
An Exercise in Conditional Refinement. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Prospects for Hardware Foundations ![In: Prospects for Hardware Foundations, ESPRIT Working Group 8533, NADA - New Hardware Design Methods, Survey Chapters, pp. 390-420, 1998, Springer, 3-540-65461-5. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
30 | Mary Sheeran |
Categories for the Working Hardware Designer. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Hardware Specification, Verification and Synthesis ![In: Hardware Specification, Verification and Synthesis: Mathematical Aspects, Mathematical Science Institute Workshop, Cornall University, Ithaca, New York, USA, July 5-7, 1989, Proceedings, pp. 380-402, 1989, Springer, 3-540-97226-9. The full citation details ...](Pics/full.jpeg) |
1989 |
DBLP DOI BibTeX RDF |
|
30 | Bita Gorjiara, Nader Bagherzadeh, Pai H. Chou |
Integrating Power Management into Distributed Real-time Systems at Very Low Implementation Cost. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 12th Conference on Asia South Pacific Design Automation, ASP-DAC 2007, Yokohama, Japan, January 23-26, 2007, pp. 872-877, 2007, IEEE Computer Society, 1-4244-0629-3. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
hardware modifications, software modifications, hardware timers, interrupt controllers, software/device driver, distributed software-defined radio system, hardware measurements, power manager, power management, multiprocessor systems, distributed real-time systems, power constraints, low-power embedded systems |
30 | Lang Lin, Markus Kasper, Tim Güneysu, Christof Paar, Wayne P. Burleson |
Trojan Side-Channels: Lightweight Hardware Trojans through Side-Channel Engineering. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2009, 11th International Workshop, Lausanne, Switzerland, September 6-9, 2009, Proceedings, pp. 382-395, 2009, Springer, 978-3-642-04137-2. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
Trojan Hardware, Trojan Side-Channel, Hardware Trojan Detection, Covert Channel, Side-Channel Analysis |
30 | Shinji Kimura, Yasufumi Itou, Makoto Hirao, Katsumasa Watanabe, Mitsuteru Yukishita, Akira Nagoya |
A Hardware/Software Codesign Method for a General Purpose Reconfigurable Co-Processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CODES ![In: Proceedings of the Fifth International Workshop on Hardware/Software Codesign, CODES/CASHE 1997, March 24-26, 1997, Braunschweig, Germany, pp. 147-151, 1997, IEEE Computer Society, 0-8186-7895-X. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
hardware/software co-operation, a computer architecture using FPGA, bus-based reconfigurable co-processor architecture, high-level synthesis and optimization, C compiler to hardware modules |
30 | Julian F. Miller, Keith L. Downing |
Evolution in materio: Looking Beyond the Silicon Box. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Evolvable Hardware ![In: 4th NASA / DoD Workshop on Evolvable Hardware (EH 2002), 15-18 July 2002, Alexandria, VA, USA, pp. 167-176, 2002, IEEE Computer Society, 0-7695-1718-8. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
Evolvable Matter, Molecular Circuits, Intrinsic evolution, Evolvable Hardware |
29 | Ken Hayworth |
The "Modeling Clay" Approach to Bio-inspired Electronic Hardware. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICES ![In: Evolvable Systems: From Biology to Hardware, Second International Conference, ICES 98, Lausanne, Switzerland, September 23-25, 1998, Proceedings, pp. 248-255, 1998, Springer, 3-540-64954-9. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
29 | Ying-Hsiang Wen, Jen-Wei Huang, Ming-Syan Chen |
Hardware-Enhanced Association Rule Mining with Hashing and Pipelining. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Knowl. Data Eng. ![In: IEEE Trans. Knowl. Data Eng. 20(6), pp. 784-795, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
hardware-enhanced mining, data mining, Association Rules |
29 | Greg Stitt, Frank Vahid, Shawn Nematbakhsh |
Energy savings and speedups from partitioning critical software loops to hardware in embedded systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Embed. Comput. Syst. ![In: ACM Trans. Embed. Comput. Syst. 3(1), pp. 218-232, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
FPGA, embedded systems, synthesis, platforms, speedup, low energy, Hardware/software partitioning |
28 | Hayden Kwok-Hay So, Artem Tkachenko, Robert W. Brodersen |
A unified hardware/software runtime environment for FPGA-based reconfigurable computers using BORPH. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CODES+ISSS ![In: Proceedings of the 4th International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2006, Seoul, Korea, October 22-25, 2006, pp. 259-264, 2006, ACM, 1-59593-370-0. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
hardware process, reconfigurable computers |
28 | Sean V. Hum, Michal M. Okoniewski, Robert J. Davies |
An Evolvable Antenna Platform Based on Reconfigurable Reflectarrays. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Evolvable Hardware ![In: 2005 NASA / DoD Conference on Evolvable Hardware (EH 2005), 29 June - 1 July 2005, Washington, DC, USA, pp. 139-146, 2005, IEEE Computer Society, 0-7695-2399-4. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
28 | Andrew Riffel, Aaron E. Lefohn, Kiril Vidimce, Mark Leone, John D. Owens |
Mio: fast multipass partitioning via priority-based instruction scheduling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Graphics Hardware ![In: Proceedings of the ACM SIGGRAPH/EUROGRAPHICS Symposium on Graphics Hardware 2004, Grenoble, France, August 29-30, 2004, pp. 35-44, 2004, Eurographics Association, 3-905673-15-0. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
28 | Ann Garrison Darrin, Richard Conde, Bobbie Chern, Phil Luers, Steve Jurczyk, Carl Mills |
Adaptive Instrument Module: Space Instrument Controller "brain" Through Programmable Logic Devices. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Evolvable Hardware ![In: 3rd NASA / DoD Workshop on Evolvable Hardware (EH 2001), 12-14 July 2001, Long Beach, CA, USA, pp. 256-260, 2001, IEEE Computer Society, 0-7695-1180-5. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
28 | Adrian Stoica, Didier Keymeulen, Ricardo Salem Zebulum, Anilkumar P. Thakoor, Taher Daud, Gerhard Klimeck, Y. Jin, Raoul Tawel, Vu Duong |
Evolution of Analog Circuits on Field Programmable Transistor Arrays. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Evolvable Hardware ![In: 2nd NASA / DoD Workshop on Evolvable Hardware (EH 2000), 13-15 July 2000, Palo Alto, CA, USA, pp. 99-108, 2000, IEEE Computer Society, 0-7695-0762-X. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
28 | Cesar Ortega-Sanchez, Andrew M. Tyrrell |
Reliability Analysis in Self-Repairing Embryonic Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Evolvable Hardware ![In: 1st NASA / DoD Workshop on Evolvable Hardware (EH '99), July 19-21, 1999, Pasadena, CA, USA, pp. 120-128, 1999, IEEE Computer Society, 0-7695-0256-3. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
28 | Hugo de Garis, Norberto Eiji Nawa, Andrzej Buller, Michael Korkin, Felix A. Gers, Michael Hough |
ATR's Artificial Brain ("Cam-Brain") Project a Sample of what Individual "CoDi-1Bit" Model Evolved Neural Net Modules can do with Digital and Analog I/O. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Evolvable Hardware ![In: 1st NASA / DoD Workshop on Evolvable Hardware (EH '99), July 19-21, 1999, Pasadena, CA, USA, pp. 102-110, 1999, IEEE Computer Society, 0-7695-0256-3. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
28 | Delon Levi, Steve Guccione |
GeneticFPGA: Evolving Stable Circuits on Mainstream FPGA Devices. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Evolvable Hardware ![In: 1st NASA / DoD Workshop on Evolvable Hardware (EH '99), July 19-21, 1999, Pasadena, CA, USA, pp. 12-17, 1999, IEEE Computer Society, 0-7695-0256-3. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
28 | Naoki Iwasaki, Katsumi Wasaki |
A Meta Hardware Description Language Melasy for Model-Checking Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITNG ![In: Fifth International Conference on Information Technology: New Generations (ITNG 2008), 7-8 April 2008, Las Vegas, Nevada, USA, pp. 273-278, 2008, IEEE Computer Society, 978-0-7695-3099-4. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Hardware/Software co-design and co-verification, Model Checking, Haskell, Design-for-test, Hardware Compilers |
28 | Greg Stitt |
Hardware/software partitioning with multi-version implementation exploration. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 18th ACM Great Lakes Symposium on VLSI 2008, Orlando, Florida, USA, May 4-6, 2008, pp. 143-146, 2008, ACM, 978-1-59593-999-9. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
fpga, synthesis, hardware/software codesign, hardware/software partitioning |
28 | Wieland Fischer, Jean-Pierre Seifert |
Increasing the Bitlength of a Crypto-Coprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2002, 4th International Workshop, Redwood Shores, CA, USA, August 13-15, 2002, Revised Papers, pp. 71-81, 2002, Springer, 3-540-00409-2. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
Arithmetical coprocessor, Hardware/Software codesign, Modular multiplication, Hardware architecture |
28 | Debanjan Saha, Anupam Basu, Raj S. Mitra |
Hardware Software Partitioning Using Genetic Algorithm. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 10th International Conference on VLSI Design (VLSI Design 1997), 4-7 January 1997, Hyderabad, India, pp. 155-160, 1997, IEEE Computer Society, 0-8186-7755-4. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
specification partitioning, genetic algorithm, software engineering, embedded systems, CAD, constraint satisfaction problem, hardware software co-design, hardware software partitioning |
28 | R. Miller, Hal Carter, K. Davis, Satish Venkatesan |
Hardware/software cosynthesis: multiple constraint satisfaction and component retrieval. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICECCS ![In: 2nd IEEE International Conference on Engineering of Complex Computer Systems (ICECCS '96), 21-25 October 1996, Montreal, Canada, pp. 383-390, 1996, IEEE Computer Society, 0-8186-7614-0. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
hardware software cosynthesis, multiple constraint satisfaction, high-level system specification, constraint-driven retrieval, candidate solution evaluation, cosynthesis tool, multiple design constraints, two constraint Fidducia-Matheyses approach, flexible component retrieval, design database, ad hoc querying, systems analysis, hardware description language, design space, component retrieval |
28 | Magnus Strengert, Thomas Klein, Thomas Ertl |
A hardware-aware debugger for the OpenGL shading language. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Graphics Hardware ![In: Proceedings of the ACM SIGGRAPH/EUROGRAPHICS Conference on Graphics Hardware 2007, San Diego, California, USA, August 4-5, 2007, pp. 81-88, 2007, Eurographics Association, 978-1-59593-625-7. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
28 | Dmitry Berenson, Nicolás S. Estévez, Hod Lipson |
Hardware Evolution of Analog Circuits for In-situ Robotic Fault-Recovery. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Evolvable Hardware ![In: 2005 NASA / DoD Conference on Evolvable Hardware (EH 2005), 29 June - 1 July 2005, Washington, DC, USA, pp. 12-19, 2005, IEEE Computer Society, 0-7695-2399-4. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
28 | Timothy G. W. Gordon, Peter J. Bentley |
Development Brings Scalability to Hardware Evolution. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Evolvable Hardware ![In: 2005 NASA / DoD Conference on Evolvable Hardware (EH 2005), 29 June - 1 July 2005, Washington, DC, USA, pp. 272-279, 2005, IEEE Computer Society, 0-7695-2399-4. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
28 | James M. Hereford, David A. Gwaltney |
Design Space Issues for Intrinsic Evolvable Hardware. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Evolvable Hardware ![In: 6th NASA / DoD Workshop on Evolvable Hardware (EH 2004), 24-26 June 2004, Seattle, WA, USA, pp. 231-, 2004, IEEE Computer Society, 0-7695-2145-2. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
28 | James M. Hereford, Charles Pruitt |
Robust Sensor Systems using Evolvable Hardware. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Evolvable Hardware ![In: 6th NASA / DoD Workshop on Evolvable Hardware (EH 2004), 24-26 June 2004, Seattle, WA, USA, pp. 161-168, 2004, IEEE Computer Society, 0-7695-2145-2. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
28 | Andrew J. Greensted, Andy M. Tyrrell |
An Endocrinologic-Inspired Hardware Implementation of a Multicellular System. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Evolvable Hardware ![In: 6th NASA / DoD Workshop on Evolvable Hardware (EH 2004), 24-26 June 2004, Seattle, WA, USA, pp. 245-252, 2004, IEEE Computer Society, 0-7695-2145-2. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
28 | Gregory R. Kramer, John C. Gallagher, Michael L. Raymer |
On the Relative Efficacies of *cGA Variants for Intrinsic Evolvable Hardware: Population, Mutation, and Random Immigrants. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Evolvable Hardware ![In: 6th NASA / DoD Workshop on Evolvable Hardware (EH 2004), 24-26 June 2004, Seattle, WA, USA, pp. 225-230, 2004, IEEE Computer Society, 0-7695-2145-2. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
28 | Evangelos F. Stefatos, Tughrul Arslan |
An Efficient Fault-Tolerant VLSI Architecture Using Parallel Evolvable Hardware Technology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Evolvable Hardware ![In: 6th NASA / DoD Workshop on Evolvable Hardware (EH 2004), 24-26 June 2004, Seattle, WA, USA, pp. 97-103, 2004, IEEE Computer Society, 0-7695-2145-2. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
28 | S. G. Lee, W. C. Park, W. J. Lee, T. D. Han, S. B. Yang |
An effective hardware architecture for bump mapping using angular operation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Graphics Hardware ![In: Proceedings of the 2003 ACM SIGGRAPH/EUROGRAPHICS Workshop on Graphics Hardware, San Diego, California, USA, July 26-27, 2003, pp. 68-75, 2003, Eurographics Association, 1-58113-739-7. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
28 | Naga K. Govindaraju, Stephane Redon, Ming C. Lin, Dinesh Manocha |
CULLIDE: interactive collision detection between complex models in large environments using graphics hardware. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Graphics Hardware ![In: Proceedings of the 2003 ACM SIGGRAPH/EUROGRAPHICS Workshop on Graphics Hardware, San Diego, California, USA, July 26-27, 2003, pp. 25-32, 2003, Eurographics Association, 1-58113-739-7. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
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28 | Le-Jeng Shiue, Vineet Goel, Jörg Peters 0001 |
Mesh mutation in programmable graphics hardware. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Graphics Hardware ![In: Proceedings of the 2003 ACM SIGGRAPH/EUROGRAPHICS Workshop on Graphics Hardware, San Diego, California, USA, July 26-27, 2003, pp. 15-24, 2003, Eurographics Association, 1-58113-739-7. The full citation details ...](Pics/full.jpeg) |
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