|
|
Venues (Conferences, Journals, ...)
|
|
GrowBag graphs for keyword ? (Num. hits/coverage)
Group by:
The graphs summarize 29 occurrences of 29 keywords
|
|
|
Results
Found 67 publication records. Showing 67 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
61 | Srinivas Bodapati, Farid N. Najm |
High-level current macro-model for power-grid analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 39th Design Automation Conference, DAC 2002, New Orleans, LA, USA, June 10-14, 2002, pp. 385-390, 2002, ACM, 1-58113-461-4. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
current macro-model, DCT, power grid |
52 | Yunsi Fei, Srivaths Ravi 0001, Anand Raghunathan, Niraj K. Jha |
Energy Estimation for Extensible Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2003 Design, Automation and Test in Europe Conference and Exposition (DATE 2003), 3-7 March 2003, Munich, Germany, pp. 10682-10687, 2003, IEEE Computer Society, 0-7695-1870-2. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
44 | Yulei Weng, Alex Doboli |
Digital cell macro-model with regular substrate template and EKV based MOSFET model. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 15th ACM Great Lakes Symposium on VLSI 2005, Chicago, Illinois, USA, April 17-19, 2005, pp. 172-175, 2005, ACM, 1-59593-057-4. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
43 | Nachiketh R. Potlapally, Michael S. Hsiao, Anand Raghunathan, Ganesh Lakshminarayana, Srimat T. Chakradhar |
Accurate Power Macro-modeling Techniques for Complex RTL Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 14th International Conference on VLSI Design (VLSI Design 2001), 3-7 January 2001, Bangalore, India, pp. 235-241, 2001, IEEE Computer Society, 0-7695-0831-6. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
43 | Adelinde M. Uhrmacher, Roland Ewald, Mathias John, Carsten Maus, Matthias Jeschke, Susanne Biermann |
Combining micro and macro-modeling in DEVS for computational biology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
WSC ![In: Proceedings of the Winter Simulation Conference, WSC 2007, Washington, DC, USA, December 9-12, 2007, pp. 871-880, 2007, WSC, 1-4244-1306-0. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
42 | Srinivas Bodapati, Farid N. Najm |
High-level current macro model for logic blocks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(5), pp. 837-855, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
35 | Congzhou Zhou, Nicholas F. Maxemchuk |
Applying a Macro Model of Ad Hoc Networks to Access Control. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICN ![In: Seventh International Conference on Networking (ICN 2008), 13-18 April 2008, Cancun, Mexico, pp. 445-453, 2008, IEEE Computer Society, 978-0-7695-3106-9. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
32 | Nicholas F. Maxemchuk, Congzhou Zhou |
A Macro Model of Frequently Changing Mobile Networks to Perform Flow and Access Control. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Mob. Networks Appl. ![In: Mob. Networks Appl. 11(5), pp. 649-659, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
macro-model, mobile ad hoc networks, access control, flow control |
30 | Yuanzhong (Paul) Zhou, Duane Connerney, Ronald Carroll, Timwah Luk |
Modeling MOS Snapback for Circuit-Level ESD Simulation Using BSIM3 and VBIC Models. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 6th International Symposium on Quality of Electronic Design (ISQED 2005), 21-23 March 2005, San Jose, CA, USA, pp. 476-481, 2005, IEEE Computer Society, 0-7695-2301-3. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
29 | Qing Wu 0002, Qinru Qiu, Massoud Pedram, Chih-Shun Ding |
Cycle-accurate macro-models for RT-level power analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 6(4), pp. 520-528, 1998. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
22 | Yi-Min Jiang, Han Young Koh, Kwang-Ting Cheng |
HRM - A Hierarchical Simulator for Full-Chip Power Network Reliability Analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 2nd International Symposium on Quality of Electronic Design (ISQED 2001), 26-28 March 2001, San Jose, CA, USA, pp. 307-312, 2001, IEEE Computer Society, 0-7695-1025-6. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
22 | Domenik Helms, Eike Schmidt, Arne Schulz, Ansgar Stammermann, Wolfgang Nebel |
An Improved Power Macro-Model for Arithmetic Datapath Components. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PATMOS ![In: Integrated Circuit Design. Power and Timing Modeling, Optimization and Simulation, 12th International Workshop, PATMOS 2002, Seville, Spain, September 11-13, 2002, pp. 16-24, 2002, Springer, 3-540-44143-3. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
22 | Gerd Jochens, Lars Kruse, Eike Schmidt, Wolfgang Nebel |
A New Parameterizable Power Macro-Model for Datapath Components. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 1999 Design, Automation and Test in Europe (DATE '99), 9-12 March 1999, Munich, Germany, pp. 29-, 1999, IEEE Computer Society / ACM, 0-7695-0078-1. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
21 | Fabio Pareschi, Gianluca Setti, Riccardo Rovatti |
A macro-model for the efficient simulation of an ADC-based RNG. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (5) ![In: International Symposium on Circuits and Systems (ISCAS 2005), 23-26 May 2005, Kobe, Japan, pp. 4349-4352, 2005, IEEE, 0-7803-8834-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
15 | Basab Datta, Wayne P. Burleson |
Circuit-level NBTI macro-models for collaborative reliability monitoring. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 20th ACM Great Lakes Symposium on VLSI 2009, Providence, Rhode Island, USA, May 16-18 2010, pp. 453-458, 2010, ACM, 978-1-4503-0012-4. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
macro-models, on-chip sensors, calibration, NBTI |
15 | Adelinde M. Uhrmacher, Daniela Degenring, Bernard P. Zeigler |
Discrete Event Multi-level Models for Systems Biology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Trans. Comp. Sys. Biology ![In: Transactions on Computational Systems Biology I, pp. 66-89, 2005, Springer, 3-540-25422-6. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
15 | Anuradha Agarwal, Glenn Wolfe, Ranga Vemuri |
Accuracy driven performance macromodeling of feasible regions during synthesis of analog circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 15th ACM Great Lakes Symposium on VLSI 2005, Chicago, Illinois, USA, April 17-19, 2005, pp. 482-487, 2005, ACM, 1-59593-057-4. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
performance modeling, circuit sizing, analog synthesis |
15 | Ranga Vemuri, Glenn Wolfe |
Adaptive sampling and modeling of analog circuit performance parameters with pseudo-cubic splines. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: 2004 International Conference on Computer-Aided Design, ICCAD 2004, San Jose, CA, USA, November 7-11, 2004, pp. 931-938, 2004, IEEE Computer Society / ACM, 0-7803-8702-3. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
15 | Tianyi Jiang, Xiaoyong Tang, Prithviraj Banerjee |
Macro-models for high level area and power estimation on FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 14th ACM Great Lakes Symposium on VLSI 2004, Boston, MA, USA, April 26-28, 2004, pp. 162-165, 2004, ACM, 1-58113-853-9. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
model, FPGA, high-level synthesis, power estimation, RTL, area estimation |
15 | Malcolm Slaney, Jayashree Subrahmonia, Paul P. Maglio |
Modeling Multitasking Users. ![Search on Bibsonomy](Pics/bibsonomy.png) |
User Modeling ![In: User Modeling 2003, 9th International Conference, UM 2003, Johnstown, PA, USA, June 22-26, 2003, Proceedings, pp. 188-197, 2003, Springer, 3-540-40381-7. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
15 | Jaeseo Lee, Geoff Hatcher, Lieven Vandenberghe, Chih-Kong Ken Yang |
Evaluation of Fully-Integrated Switching Regulators for CMOS Process Technologies. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 15(9), pp. 1017-1027, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
15 | Shengqi Yang, Wayne H. Wolf, Narayanan Vijaykrishnan, Yuan Xie 0001, Wenping Wang |
Accurate Stacking Effect Macro-Modeling of Leakage Power in Sub-100nm Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 18th International Conference on VLSI Design (VLSI Design 2005), with the 4th International Conference on Embedded Systems Design, 3-7 January 2005, Kolkata, India, pp. 165-170, 2005, IEEE Computer Society, 0-7695-2264-5. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
13 | Snigdha Chowdhury Kolay, Mandakinee Bandyopadhyay, Subrata Chattopadhyay |
Design and Testing of Digital Logic Gates Using HCS Macro-Model. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. II Express Briefs ![In: IEEE Trans. Circuits Syst. II Express Briefs 70(3), pp. 1134-1138, March 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
13 | Tian Zhao, JiaHao Wei, BiJia Lan, Qing Peng, Jing Wan |
A unified black-box macro model for analog circuit based on artificial neural network. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Int. J. Circuit Theory Appl. ![In: Int. J. Circuit Theory Appl. 51(10), pp. 4455-4464, October 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
13 | JiaHao Wei, Tian Zhao, Jing Wan |
An enhanced operational amplifier macro model based on artificial neural network. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Int. J. Circuit Theory Appl. ![In: Int. J. Circuit Theory Appl. 50(12), pp. 4191-4201, December 2022. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
13 | Yusuke Yano, Kengo Iokibe, Toshiaki Teshima, Yoshitaka Toyota, Toshihiro Katashita, Yohei Hori |
Evaluation of Side-Channel Leakage Simulation by Using EMC Macro-Model of Cryptographic Devices. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEICE Trans. Commun. ![In: IEICE Trans. Commun. 104-B(2), pp. 178-186, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP BibTeX RDF |
|
13 | Yiwei Wang, Teng-Fei Zhang, Chun Liu |
A two species micro-macro model of wormlike micellar solutions and its maximum entropy closure approximations: An energetic variational approach. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2101.09838, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP BibTeX RDF |
|
13 | Shu-Jung Chen, Yung-Chuan Wu |
A New Macro-Model of Gas Flow and Parameter Extraction for a CMOS-MEMS Vacuum Sensor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Symmetry ![In: Symmetry 12(10), pp. 1604, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
13 | Ivan I. Argatov, Feodor M. Borodich |
A Macro Model for Electroadhesive Contact of a Soft Finger With a Touchscreen. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Haptics ![In: IEEE Trans. Haptics 13(3), pp. 504-510, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
13 | Akanksha D. Singh, Rajendra M. Patrikar |
Development of Nonlinear Electromechanical Coupled Macro Model for Electrostatic MEMS Cantilever Beam. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Access ![In: IEEE Access 7, pp. 140596-140605, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
13 | Lintu Rajan, Arathy Varghese, C. Periasamy, Vineet Sahula |
Device Design Space Exploration of Thin Film Hydrogen Sensor Based on Macro-model Generated Using Machine Learning. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE SENSORS ![In: 2019 IEEE SENSORS, Montreal, QC, Canada, October 27-30, 2019, pp. 1-4, 2019, IEEE, 978-1-7281-1634-1. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
13 | Pai-Yu Chen, Xiaochen Peng, Shimeng Yu |
NeuroSim: A Circuit-Level Macro Model for Benchmarking Neuro-Inspired Architectures in Online Learning. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37(12), pp. 3067-3080, 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
13 | Pei-Yu Lee, Iris Hui-Ru Jiang |
iTimerM: A Compact and Accurate Timing Macro Model for Efficient Hierarchical Timing Analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Design Autom. Electr. Syst. ![In: ACM Trans. Design Autom. Electr. Syst. 23(4), pp. 48:1-48:21, 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
13 | Luana Chetcuti Zammit, Simon G. Fabri, Kenneth Scerri |
Simultaneous Traffic Flow and Macro Model Estimation for Signalized Junctions with Multiple Input Lanes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VEHITS ![In: Proceedings of the 3rd International Conference on Vehicle Technology and Intelligent Transport Systems, VEHITS 2017, Porto, Portugal, April 22-24, 2017., pp. 157-164, 2017, SciTePress, 978-989-758-242-4. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
13 | Yuhan Zhou, Yong Zhang, Vivek Sarin, Wangqi Qiu, Weiping Shi |
Macro Model of Advanced Devices for Parasitic Extraction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 35(10), pp. 1721-1729, 2016. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
13 | Maryam Ghasemaghaei, Khaled Hassanein |
A macro model of online information quality perceptions: A review and synthesis of the literature. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Comput. Hum. Behav. ![In: Comput. Hum. Behav. 55, pp. 972-991, 2016. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
13 | Hela Almabrouk, Maha Kharroubi, Fares Tounsi, Brahim Mezghani, Yves Bernard |
Macro model analysis of a single mass 6-DOF Inertial Measurement Unit system. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IDT ![In: 11th International Design & Test Symposium, IDT 2016, Hammamet, Tunisia, December 18-20, 2016, pp. 290-295, 2016, IEEE, 978-1-5090-4900-4. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
13 | Shuai Liu 0008, Bart De Schutter, Hans Hellendoorn |
Integrated traffic flow and emission control based on FASTLANE and the multi-class VT-macro model. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ECC ![In: 13th European Control Conference, ECC 2014, Strasbourg, France, June 24-27, 2014, pp. 2908-2913, 2014, IEEE, 978-3-9524269-1-3. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
13 | Kamal Boulil, François Pinet, Sandro Bimonte, Nadia Carluer, Claire Lauvernet, Bruno Cheviron, André Miralles, Jean-Pierre Chanet |
Guaranteeing the quality of multidimensional analysis in data warehouses of simulation results: Application to pesticide transfer data produced by the MACRO model. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Ecol. Informatics ![In: Ecol. Informatics 16, pp. 41-52, 2013. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
13 | Nancy K. Lankton, John F. Tripp |
A Quantitative and Qualitative Study of Facebook Privacy using the Antecedent-Privacy Concern-Outcome Macro Model. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AMCIS ![In: 19th Americas Conference on Information Systems, AMCIS 2013, Chicago, Illinois, USA, August 15-17, 2013, 2013, Association for Information Systems. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP BibTeX RDF |
|
13 | Roberto Dieci, Mauro Gallegati |
Multiple attractors and business fluctuations in a nonlinear macro-model with equity rationing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Math. Comput. Model. ![In: Math. Comput. Model. 53(5-6), pp. 1298-1309, 2011. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
13 | Lingbing He, Ping Zhang |
L2 Decay of Solutions to a Micro-Macro Model for Polymeric Fluids Near Equilibrium. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SIAM J. Math. Anal. ![In: SIAM J. Math. Anal. 40(5), pp. 1905-1922, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
13 | Zexiang Liu, Lan Chen, Xubang Shen |
Macro-Model of Cell-Based Logic Block for Power Ground Network Analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCSCT (1) ![In: 2008 International Symposium on Computer Science and Computational Technology, ISCSCT 2008, 20-22 December 2008, Shanghai, China, 2 Volumes, pp. 380-383, 2008, IEEE Computer Society, 978-0-7695-3498-5. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
13 | Jeremy Chan, Sri Parameswaran |
NoCEE: energy macro-model extraction methodology for network on chip routers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: 2005 International Conference on Computer-Aided Design, ICCAD 2005, San Jose, CA, USA, November 6-10, 2005, pp. 254-259, 2005, IEEE Computer Society, 0-7803-9254-X. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
13 | Rui Tang, Fengming Zhang, Yong-Bin Kim |
Quantum-dot cellular automata SPICE macro model. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 15th ACM Great Lakes Symposium on VLSI 2005, Chicago, Illinois, USA, April 17-19, 2005, pp. 108-111, 2005, ACM, 1-59593-057-4. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
QCA macro modeling |
13 | Nicholas F. Maxemchuk, Congzhou Zhou |
A macro model of frequently changing mobile networks to perform flow and access control. ![Search on Bibsonomy](Pics/bibsonomy.png) |
BROADNETS ![In: 2nd International Conference on Broadband Networks (BROADNETS 2005), 3-7 October 2005, Boston, Massachusetts, USA, pp. 365-374, 2005, IEEE, 0-7803-9276-0. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
13 | Chenggang Xu, Terri S. Fiez, Kartikeya Mayaram |
An improved Z-parameter macro model for substrate noise coupling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (5) ![In: Proceedings of the 2004 International Symposium on Circuits and Systems, ISCAS 2004, Vancouver, BC, Canada, May 23-26, 2004, pp. 161-164, 2004, IEEE, 0-7803-8251-X. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP BibTeX RDF |
|
13 | Srinivas Bodapati, Farid N. Najm |
Frequency-domain supply current macro-model. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: Proceedings of the 2001 International Symposium on Low Power Electronics and Design, 2001, Huntington Beach, California, USA, 2001, pp. 295-298, 2001, ACM, 1-58113-371-5. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
13 | Haifang Liao, Rui Wang, Rajit Chandra, Wayne Wei-Ming Dai |
S-parameter based macro model of distributed-lumped networks using Pade approximation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: 1993 IEEE International Symposium on Circuits and Systems, ISCAS 1993, Chicago, Illinois, USA, May 3-6, 1993, pp. 2319-2322, 1993, IEEE, 0-7803-1281-3. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP BibTeX RDF |
|
13 | Haifang Liao, Wayne Wei-Ming Dai, Rui Wang, Fung-Yuel Chang |
S-Parameter Based Macro Model of Distributed-Lumped Networks Using Exponentially Decayed Polynomial Function. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 30th Design Automation Conference. Dallas, Texas, USA, June 14-18, 1993., pp. 726-731, 1993, ACM Press, 0-89791-577-1. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP DOI BibTeX RDF |
|
13 | Drazen Kostelski, John A. Buzacott, Kenneth N. McKay, Xiao-Gao Liu |
Development and validation of a systems macro model using isolated micro models. ![Search on Bibsonomy](Pics/bibsonomy.png) |
WSC ![In: Proceedings of the 19th conference on Winter simulation, WSC 1987, Atlanta, GA, USA, December 14-16, 1987, pp. 669-676, 1987, ACM, 0-911801-32-4. The full citation details ...](Pics/full.jpeg) |
1987 |
DBLP DOI BibTeX RDF |
|
13 | James A. Storer, Thomas G. Szymanski |
The Macro Model for Data Compression (Extended Abstract) ![Search on Bibsonomy](Pics/bibsonomy.png) |
STOC ![In: Proceedings of the 10th Annual ACM Symposium on Theory of Computing, May 1-3, 1978, San Diego, California, USA, pp. 30-39, 1978, ACM. The full citation details ...](Pics/full.jpeg) |
1978 |
DBLP DOI BibTeX RDF |
|
13 | N. B. Rabbat, William D. Ryan |
Implementation of a transient macro-model in large logic systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AFIPS Spring Joint Computing Conference ![In: American Federation of Information Processing Societies: AFIPS Conference Proceedings: 1972 Spring Joint Computer Conference, Atlantic City, NJ, USA, May 16-18, 1972, pp. 1071-1078, 1972, AFIPS, 978-1-4503-7909-0. The full citation details ...](Pics/full.jpeg) |
1972 |
DBLP DOI BibTeX RDF |
|
9 | Chin-Lung Su, Chih-Wea Tsai, Cheng-Wen Wu, Chien-Chung Hung, Young-Shying Chen, Ding-Yeong Wang, Yuan-Jen Lee, Ming-Jer Kao |
Write Disturbance Modeling and Testing for MRAM. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 16(3), pp. 277-288, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
9 | Aigars Gertners, Valery Zagursky, Dzintra Saldava |
Behavior model of mixed ADC systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 9(1-2), pp. 19-27, 1996. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
identification, behavior model, nonlinear system, high-level modeling, mixed system |
8 | Calin Ciufudean, Otilia Ciufudean, Constantin Filote |
New Models for Immune Mechanism Diagnosis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MDA ![In: Advances in Mass Data Analysis of Images and Signals in Medicine, Biotechnology, Chemistry and Food Industry, Third International Conference, MDA 2008, Leipzig, Germany, July 14, 2008, Proceedings, pp. 1-11, 2008, Springer, 978-3-540-70714-1. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Markov Decision Processes (MDPs), Immune mechanisms diagnosis, Petri nets |
8 | Mahmoud Moradi, Stéphane Brunel, Marc Zolghadri, Bruno Vallespir |
Design for Learning and Teaching: A Knowledge-Based Approach to Design Products. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PAKM ![In: Practical Aspects of Knowledge Management, 7th International Conference, PAKM 2008, Yokohama, Japan, November 22-23, 2008. Proceedings, pp. 244-255, 2008, Springer, 978-3-540-89446-9. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
ingenition process, Knowledge management, learning theory, design theory |
8 | Hao Yu 0001, Lei He 0001, Zhenyu Qi, Sheldon X.-D. Tan |
A wideband hierarchical circuit reduction for massively coupled interconnects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 2005 Conference on Asia South Pacific Design Automation, ASP-DAC 2005, Shanghai, China, January 18-21, 2005, pp. 111-114, 2005, ACM Press, 0-7803-8737-6. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
8 | Luca Benini, Alessandro Bogliolo, Enrico Macii, Massimo Poncino, Mihai Surmei |
Regression-based RTL power models for controllers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 10th ACM Great Lakes Symposium on VLSI 2000, Chicago, Illinois, USA, March 2-4, 2000, pp. 147-152, 2000, ACM, 1-58113-251-4. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
8 | Emmanuel Lorin, André D. Bandrauk |
Efficient Parallel Computing for Laser-Gas Quantum Interaction and Propagation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCS ![In: 22nd Annual International Symposium on High Performance Computing Systems and Applications (HPCS 2008), June 9-11, 2008, Québec City, Canada, pp. 4-8, 2008, IEEE Computer Society, 978-0-7695-3250-9. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Maxwell, Schroedinger, HPC, Lasers |
8 | Edith Kussener, Hervé Barthélemy, Alexandre Malherbe, Andreas Kaiser |
Versatile macromodel for the power supply of submicronic CMOS microprocessors based on voltage down DC-DC converter. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (5) ![In: Proceedings of the 2002 International Symposium on Circuits and Systems, ISCAS 2002, Scottsdale, Arizona, USA, May 26-29, 2002, pp. 821-824, 2002, IEEE, 0-7803-7448-7. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
7 | Tamal Das, Pradip Mandal |
Switched-Capacitor Based Buck Converter Design Using Current Limiter for Better Efficiency and Output Ripple. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: VLSI Design 2009: Improving Productivity through Higher Abstraction, The 22nd International Conference on VLSI Design, New Delhi, India, 5-9 January 2009, pp. 181-186, 2009, IEEE Computer Society, 978-0-7695-3506-7. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
7 | Xiaoji Ye, Min Zhao 0001, Rajendran Panda, Peng Li 0001, Jiang Hu |
Accelerating Clock Mesh Simulation Using Matrix-Level Macromodels and Dynamic Time Step Rounding. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 9th International Symposium on Quality of Electronic Design (ISQED 2008), 17-19 March 2008, San Jose, CA, USA, pp. 627-632, 2008, IEEE Computer Society, 978-0-7695-3117-5. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
clock mesh, dynamic time step rounding, simulation, macromodel |
7 | Jin Shi, Yici Cai, Sheldon X.-D. Tan, Jeffrey Fan, Xianlong Hong |
Pattern-Based Iterative Method for Extreme Large Power/Ground Analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26(4), pp. 680-692, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
7 | Marko Hoyer, Domenik Helms, Wolfgang Nebel |
Modelling the Impact of High Level Leakage Optimization Techniques on the Delay of RT-Components. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PATMOS ![In: Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation, 17th International Workshop, PATMOS 2007, Gothenburg, Sweden, September 3-5, 2007, Proceedings, pp. 171-180, 2007, Springer, 978-3-540-74441-2. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
7 | Philippe Maurine, Nadine Azémard, Daniel Auvergne |
Structure Independent Representation of Output Transition Time for CMOS Library. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PATMOS ![In: Integrated Circuit Design. Power and Timing Modeling, Optimization and Simulation, 12th International Workshop, PATMOS 2002, Seville, Spain, September 11-13, 2002, pp. 247-257, 2002, Springer, 3-540-44143-3. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
7 | Tim Wichmann, Manfred Thole |
Computer Aided Generation of Analytic Models for Nonlinear Function Blocks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PATMOS ![In: Integrated Circuit Design, Power and Timing Modeling, Optimization and Simulation, 10th International Workshop, PATMOS 2000, Göttingen, Germany, September 13-15, 2000, Proceedings, pp. 327-335, 2000, Springer, 3-540-41068-6. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
Displaying result #1 - #67 of 67 (100 per page; Change: )
|
|