Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
120 | Amit Golander, Shlomo Weiss |
Hiding the misprediction penalty of a resource-efficient high-performance processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Archit. Code Optim. ![In: ACM Trans. Archit. Code Optim. 4(4), pp. 6:1-6:32, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
misprediction, Checkpoints, out-of-order execution, scalable architecture, rollback |
120 | Peng Zhou, Soner Önder, Steve Carr 0001 |
Fast branch misprediction recovery in out-of-order superscalar processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICS ![In: Proceedings of the 19th Annual International Conference on Supercomputing, ICS 2005, Cambridge, Massachusetts, USA, June 20-22, 2005, pp. 41-50, 2005, ACM, 1-59593-167-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
processor state, checkpoint, recovery, branch misprediction |
105 | James O. Bondi, Ashwini K. Nanda, Simonjit Dutta |
Integrating a Misprediction Recovery Cache (MRC) into a Superscalar Pipeline. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: Proceedings of the 29th Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 29, Paris, France, December 2-4, 1996, pp. 14-23, 1996, ACM/IEEE Computer Society, 0-8186-7641-8. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
branch target buffer technology, deep pipelines, misprediction recovery cache integration, performance loss, residual misprediction penalty, superscalar pipeline, microprocessor chips, microprocessor designs, CISC, multiple instructions |
95 | Enrique F. Torres, Pablo Ibáñez, Víctor Viñals, José María Llabería |
Counteracting Bank Misprediction in Sliced First-Level Caches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Euro-Par ![In: Euro-Par 2003. Parallel Processing, 9th International Euro-Par Conference, Klagenfurt, Austria, August 26-29, 2003. Proceedings, pp. 586-596, 2003, Springer, 3-540-40788-X. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
92 | Ahmed S. Al-Zawawi, Vimal K. Reddy, Eric Rotenberg, Haitham Akkary |
Transparent control independence (TCI). ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: 34th International Symposium on Computer Architecture (ISCA 2007), June 9-13, 2007, San Diego, California, USA, pp. 448-459, 2007, ACM, 978-1-59593-706-3. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
control independence, selective re-execution, selective recovery, checkpoints, branch prediction, speculation |
81 | Amit Gandhi, Haitham Akkary, Srikanth T. Srinivasan |
Reducing Branch Misprediction Penalty via Selective Branch Recovery. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCA ![In: 10th International Conference on High-Performance Computer Architecture (HPCA-10 2004), 14-18 February 2004, Madrid, Spain, pp. 254-264, 2004, IEEE Computer Society, 0-7695-2053-7. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
78 | Kenneth A. Ross |
Selection conditions in main memory. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Database Syst. ![In: ACM Trans. Database Syst. 29, pp. 132-161, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
Branch misprediction |
68 | Chang-Ching Yeh, Kuei-Chung Chang, Tien-Fu Chen, Chingwei Yeh |
Reducing Branch Misprediction Penalties Via Adaptive Pipeline Scaling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HiPEAC ![In: High Performance Embedded Architectures and Compilers, Second International Conference, HiPEAC 2007, Ghent, Belgium, January 28-30, 2007, Proceedings, pp. 105-119, 2007, Springer, 978-3-540-69337-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
68 | Ching-Long Su, Alvin M. Despain |
Minimizing branch misprediction penalties for superpipelined processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: Proceedings of the 27th Annual International Symposium on Microarchitecture, San Jose, California, USA, November 30 - December 2, 1994, pp. 138-142, 1994, ACM / IEEE Computer Society, 0-89791-707-3. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
|
65 | Juan L. Aragón, José González 0002, Antonio González 0001, James E. Smith 0001 |
Dual path instruction processing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICS ![In: Proceedings of the 16th international conference on Supercomputing, ICS 2002, New York City, NY, USA, June 22-26, 2002, pp. 220-229, 2002, ACM, 1-58113-483-5. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
branch misprediction penalty, dual path processing, pre-scheduling, confidence estimation |
55 | Resit Sendag, Joshua J. Yi, Peng-fei Chuang |
Branch Misprediction Prediction: Complementary Branch Predictors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Comput. Archit. Lett. ![In: IEEE Comput. Archit. Lett. 6(2), pp. 49-52, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
55 | David N. Armstrong, Hyesoon Kim, Onur Mutlu, Yale N. Patt |
Wrong Path Events: Exploiting Unusual and Illegal Program Behavior for Early Misprediction Detection and Recovery. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: 37th Annual International Symposium on Microarchitecture (MICRO-37 2004), 4-8 December 2004, Portland, OR, USA, pp. 119-128, 2004, IEEE Computer Society, 0-7695-2126-6. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
55 | Enric Morancho, José María Llabería, Àngel Olivé |
Recovery Mechanism for Latency Misprediction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE PACT ![In: 2001 International Conference on Parallel Architectures and Compilation Techniques (PACT 2001), 8-12 September 2001, Barcelona, Spain, pp. 118-128, 2001, IEEE Computer Society, 0-7695-1363-8. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
53 | Mohamed M. Zahran, Manoj Franklin |
Dynamic Thread Resizing for Speculative Multithreaded Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 21st International Conference on Computer Design (ICCD 2003),VLSI in Computers and Processors, 13-15 October 2003, San Jose, CA, USA, Proceedings, pp. 313-, 2003, IEEE Computer Society, 0-7695-2025-1. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
53 | Jared Stark, Marius Evers, Yale N. Patt |
Variable Length Path Branch Prediction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASPLOS ![In: ASPLOS-VIII Proceedings of the 8th International Conference on Architectural Support for Programming Languages and Operating Systems, San Jose, California, USA, October 3-7, 1998., pp. 170-179, 1998, ACM Press, 1-58113-107-0. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
42 | Srinivas Mantripragada, Alexandru Nicolau |
Using profiling to reduce branch misprediction costs on a dynamically scheduled processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICS ![In: Proceedings of the 14th international conference on Supercomputing, ICS 2000, Santa Fe, NM, USA, May 8-11, 2000, pp. 206-214, 2000, ACM, 1-58113-270-0. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
40 | Nitya Ranganathan, Doug Burger, Stephen W. Keckler |
Analysis of the TRIPS prototype block predictor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPASS ![In: IEEE International Symposium on Performance Analysis of Systems and Software, ISPASS 2009, April 26-28, 2009, Boston, Massachusetts, USA, Proceedings, pp. 195-206, 2009, IEEE Computer Society, 978-1-4244-4184-6. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
40 | Kenneth A. Ross |
Conjunctive Selection Conditions in Main Memory. (PDF / PS) ![Search on Bibsonomy](Pics/bibsonomy.png) |
PODS ![In: Proceedings of the Twenty-first ACM SIGACT-SIGMOD-SIGART Symposium on Principles of Database Systems, June 3-5, Madison, Wisconsin, USA, pp. 109-120, 2002, ACM, 1-58113-507-6. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
40 | Daniel A. Jiménez, Heather L. Hanson, Calvin Lin |
Boolean Formula-Based Branch Prediction for Future Technologies. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE PACT ![In: 2001 International Conference on Parallel Architectures and Compilation Techniques (PACT 2001), 8-12 September 2001, Barcelona, Spain, pp. 97-106, 2001, IEEE Computer Society, 0-7695-1363-8. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
40 | Juan L. Aragón, José González 0002, José M. García 0001, Antonio González 0001 |
Confidence Estimation for Branch Prediction Reversal. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HiPC ![In: High Performance Computing - HiPC 2001, 8th International Conference, Hyderabad, India, December, 17-20, 2001, Proceedings, pp. 214-223, 2001, Springer, 3-540-43009-1. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
38 | Nicholas Nethercote, Alan Mycroft |
The cache behaviour of large lazy functional programs on stock hardware. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MSP/ISMM ![In: Proceedings of The Workshop on Memory Systems Performance (MSP 2002), June 16, 2002 and The International Symposium on Memory Management (ISMM 2002), June 20-21, 2002, Berlin, Germany, pp. 44-55, 2002, ACM, 1-58113-539-4. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
Glasgow Haskell Compiler, cache measurement, Haskell, Haskell, cache simulation, hardware counters, branch misprediction |
29 | Adrus Mohamad Tazuddin, Azizi Abdullah, Zainal Rasyid Mahayuddin |
Hierarchical CNN Automated Hierarchy Creation Using Output Prediction Analysis With Misprediction Matrix. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICEEI ![In: International Conference on Electrical Engineering and Informatics, ICEEI 2023, Bandung, Indonesia, October 10-11, 2023, pp. 1-6, 2023, IEEE, 979-8-3503-8129-0. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
29 | Jiri Gesi, Xinyun Shen, Yunfan Geng, Qihong Chen, Iftekhar Ahmed 0001 |
Leveraging Feature Bias for Scalable Misprediction Explanation of Machine Learning Models. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICSE ![In: 45th IEEE/ACM International Conference on Software Engineering, ICSE 2023, Melbourne, Australia, May 14-20, 2023, pp. 1559-1570, 2023, IEEE, 978-1-6654-5701-9. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
29 | Tanvir Ahmed Khan, Muhammed Ugur, Krishnendra Nathella, Dam Sunwoo, Heiner Litz, Daniel A. Jiménez, Baris Kasikci |
Whisper: Profile-Guided Branch Misprediction Elimination for Data Center Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: 55th IEEE/ACM International Symposium on Microarchitecture, MICRO 2022, Chicago, IL, USA, October 1-5, 2022, pp. 19-34, 2022, IEEE, 978-1-6654-6272-3. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
29 | Michael Mitzenmacher |
Scheduling with Predictions and the Price of Misprediction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITCS ![In: 11th Innovations in Theoretical Computer Science Conference, ITCS 2020, January 12-14, 2020, Seattle, Washington, USA., pp. 14:1-14:18, 2020, Schloss Dagstuhl - Leibniz-Zentrum für Informatik, 978-3-95977-134-4. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
29 | Lu Yang, Yunhui Huang, Yi-Chun (Chad) Ho, Zhijie Lin |
Is online multiple-stores cooperative promotion better than single-store promotion? Misprediction from evaluation mode. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Inf. Manag. ![In: Inf. Manag. 56(7), 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
29 | Michael Mitzenmacher |
Scheduling with Predictions and the Price of Misprediction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/1902.00732, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP BibTeX RDF |
|
29 | Wolfgang Puffitsch |
Persistence-based branch misprediction bounds for WCET analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SAC ![In: Proceedings of the 30th Annual ACM Symposium on Applied Computing, Salamanca, Spain, April 13-17, 2015, pp. 1898-1905, 2015, ACM, 978-1-4503-3196-8. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
29 | Zhaoxiang Jin, Görkem Asilioglu, Soner Önder |
Mower: A New Design for Non-blocking Misprediction Recovery. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICS ![In: Proceedings of the 29th ACM on International Conference on Supercomputing, ICS'15, Newport Beach/Irvine, CA, USA, June 08 - 11, 2015, pp. 285-294, 2015, ACM, 978-1-4503-3559-1. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
29 | Divino Cesar S. Lucas, Rafael Auler, Rafael Dalibera, Sandro Rigo, Edson Borin, Guido Araujo |
Modeling virtual machines misprediction overhead. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IISWC ![In: Proceedings of the IEEE International Symposium on Workload Characterization, IISWC 2013, Portland, OR, USA, September 22-24, 2013, pp. 153-162, 2013, IEEE Computer Society, 978-1-4799-0553-9. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
29 | Huatao Zhao, Jiongyao Ye, Yuxin Sun, Takahiro Watanabe |
Pseudo Dual Path Processing to reduce the branch misprediction penalty in embedded processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASICON ![In: IEEE 10th International Conference on ASIC, ASICON 2013, Shenzhen, China, October 28-31, 2013, pp. 1-4, 2013, IEEE, 978-1-4673-6415-7. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
29 | Jiongyao Ye, Yu Wan 0002, Takahiro Watanabe |
A New Recovery Mechanism in Superscalar Microprocessors by Recovering Critical Misprediction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEICE Trans. Fundam. Electron. Commun. Comput. Sci. ![In: IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 94-A(12), pp. 2639-2648, 2011. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
29 | Jaime Ruiz, Edward Lank |
Speeding pointing in tiled widgets: understanding the effects of target expansion and misprediction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IUI ![In: Proceedings of the 15th International Conference on Intelligent User Interfaces, IUI 2010, Hong Kong, China, February 7-10, 2010, pp. 229-238, 2010, ACM, 978-1-60558-515-4. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
target expansion, tiled targets, Fitts' law, pointing, human performance |
29 | Guan-Ying Chiu, Hui-Chin Yang, Walter Yuan-Hwa Li, Chung-Ping Chung |
Mechanism for return stack and branch history corrections under misprediction in deep pipeline design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACSAC ![In: 13th Asia-Pacific Computer Systems Architecture Conference, ACSAC 2008, Hsinchu, China, August 4-6, 2008, pp. 1-8, 2008, IEEE Computer Society, 978-1-4244-2682-9. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
29 | Stijn Eyerman, James E. Smith 0001, Lieven Eeckhout |
Characterizing the branch misprediction penalty. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPASS ![In: 2006 IEEE International Symposium on Performance Analysis of Systems and Software, ISPASS 2006, March 19-21, 2006, Austin, Texas, USA, Proceedings, pp. 48-58, 2006, IEEE Computer Society, 1-4244-0186-0. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
29 | Yuan C. Chou, Jason Fung, John Paul Shen |
Reducing branch misprediction penalties via dynamic control independence detection. ![Search on Bibsonomy](Pics/bibsonomy.png) |
International Conference on Supercomputing ![In: Proceedings of the 13th international conference on Supercomputing, ICS 1999, Rhodes, Greece, June 20-25, 1999, pp. 109-118, 1999, ACM, 1-58113-164-X. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
29 | Ashwini K. Nanda, James O. Bondi, Simonjit Dutta |
The Misprediction Recovery Cache. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Int. J. Parallel Program. ![In: Int. J. Parallel Program. 26(4), pp. 383-415, 1998. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
29 | Milena Petrovic, Igor Tartalja, Veljko M. Milutinovic |
Two Branch Predictor Schemes for Reduction of Misprediction Rate in Conditions of Frequent Context Switches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SRDS ![In: The Seventeenth Symposium on Reliable Distributed Systems, SRDS 1998, West Lafayette, Indiana, USA, October 20-22, 1998, Proceedings, pp. 354-359, 1998, IEEE Computer Society, 0-8186-9218-9. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
29 | James E. Pierce |
Cache behavior in the presence of speculative execution: The benefits of misprediction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
|
1995 |
RDF |
|
26 | Gabriel H. Loh, Daniel A. Jiménez |
Modulo Path History for the Reduction of Pipeline Overheads in Path-based Neural Branch Predictors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Int. J. Parallel Program. ![In: Int. J. Parallel Program. 36(2), pp. 267-286, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Computer architecture, Branch prediction |
26 | Sung Woo Chung, Kevin Skadron |
On-Demand Solution to Minimize I-Cache Leakage Energy with Maintaining Performance. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 57(1), pp. 7-24, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Low-power design, Microprocessors, Cache memories, Energy-aware systems |
26 | Hans Vandierendonck, André Seznec |
Speculative return address stack management revisited. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Archit. Code Optim. ![In: ACM Trans. Archit. Code Optim. 5(3), pp. 15:1-15:20, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Return address prediction, back-up predictor, corruption detection |
26 | Tao Li 0006, Lizy Kurian John, Anand Sivasubramaniam, Narayanan Vijaykrishnan, Juan Rubio 0001 |
OS-Aware Branch Prediction: Improving Microprocessor Control Flow Prediction for Operating Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 56(1), pp. 2-17, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
branch prediction, processor architectures, Pipeline processors, performance of systems, hardware/software interfaces, computer system implementation |
26 | C. Y. Ho, Anthony Shi-Sheung Fong |
Combining Local and Global History Hashing in Perceptron Branch Prediction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACIS-ICIS ![In: 6th Annual IEEE/ACIS International Conference on Computer and Information Science (ICIS 2007), 11-13 July 2007, Melbourne, Australia, pp. 54-59, 2007, IEEE Computer Society, 0-7695-2841-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
26 | Jiajin Tu, Jian Chen 0030, Lizy K. John |
Hardware Efficient Piecewise Linear Branch Predictor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 20th International Conference on VLSI Design (VLSI Design 2007), Sixth International Conference on Embedded Systems (ICES 2007), 6-10 January 2007, Bangalore, India, pp. 673-678, 2007, IEEE Computer Society, 0-7695-2762-0. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
26 | Sung Woo Chung, Kevin Skadron |
Using Branch Prediction Information for Near-Optimal I-Cache Leakage. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asia-Pacific Computer Systems Architecture Conference ![In: Advances in Computer Systems Architecture, 11th Asia-Pacific Conference, ACSAC 2006, Shanghai, China, September 6-8, 2006, Proceedings, pp. 24-37, 2006, Springer, 3-540-40056-7. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
Low Power, Branch Prediction, Leakage, Instruction Cache, Drowsy Cache |
26 | Daniel A. Jiménez, Gabriel H. Loh |
Controlling the Power and Area of Neural Branch Predictors for Practical Implementation in High-Performance Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SBAC-PAD ![In: 18th Symposium on Computer Architecture and High Performance Computing (SBAC-PAD 2006), 17-20 October 2006, Ouro Preto, Minas Gerais, Brazil, pp. 55-62, 2006, IEEE Computer Society, 0-7695-2704-3. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
26 | Smruti R. Sarangi, Wei Liu, Yuanyuan Zhou |
ReSlice: Selective Re-Execution of Long-Retired Misspeculated Instructions Using Forward Slicing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: 38th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-38 2005), 12-16 November 2005, Barcelona, Spain, pp. 257-270, 2005, IEEE Computer Society, 0-7695-2440-0. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
26 | Matteo Monchiero, Gianluca Palermo |
The Combined Perceptron Branch Predictor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Euro-Par ![In: Euro-Par 2005, Parallel Processing, 11th International Euro-Par Conference, Lisbon, Portugal, August 30 - September 2, 2005, Proceedings, pp. 487-496, 2005, Springer, 3-540-28700-0. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
26 | Alex Pajuelo, Antonio González 0001, Mateo Valero |
Control-Flow Independence Reuse via Dynamic Vectorization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 19th International Parallel and Distributed Processing Symposium (IPDPS 2005), CD-ROM / Abstracts Proceedings, 4-8 April 2005, Denver, CO, USA, 2005, IEEE Computer Society, 0-7695-2312-9. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
26 | Yuanyuan Zhang, Yasushi Inoguchi |
Influence of Performance Prediction Inaccuracy on Task Scheduling in Grid Environment. ![Search on Bibsonomy](Pics/bibsonomy.png) |
APWeb ![In: Web Technologies Research and Development - APWeb 2005, 7th Asia-Pacific Web Conference, Shanghai, China, March 29 - April 1, 2005, Proceedings, pp. 838-844, 2005, Springer, 3-540-25207-X. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
task selection, processor selection, grid computing, performance prediction, task scheduling |
26 | Zhigang Hu, Alper Buyuktosunoglu, Viji Srinivasan, Victor V. Zyuban, Hans M. Jacobson, Pradip Bose |
Microarchitectural techniques for power gating of execution units. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: Proceedings of the 2004 International Symposium on Low Power Electronics and Design, 2004, Newport Beach, California, USA, August 9-11, 2004, pp. 32-37, 2004, ACM. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
execution units, low power, microarchitecture, power-gating |
26 | Chao-ying Fu, Jill T. Bodine, Thomas M. Conte |
Modeling Value Speculation: An Optimal Edge Selection Problem. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 52(3), pp. 277-292, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
optimal edge selection, critical path reduction, Value prediction, data dependence graph, value speculation |
26 | Haitham Akkary, Srikanth T. Srinivasan, Konrad Lai |
Recycling waste: exploiting wrong-path execution to improve branch prediction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICS ![In: Proceedings of the 17th Annual International Conference on Supercomputing, ICS 2003, San Francisco, CA, USA, June 23-26, 2003, pp. 12-21, 2003, ACM, 1-58113-733-8. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
deep pipelines, branch prediction, instruction reuse |
26 | Weihaw Chuang, Brad Calder |
Predicate prediction for efficient out-of-order execution. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICS ![In: Proceedings of the 17th Annual International Conference on Supercomputing, ICS 2003, San Francisco, CA, USA, June 23-26, 2003, pp. 183-192, 2003, ACM, 1-58113-733-8. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
predicate prediction, predicated execution |
26 | Timothy Sherwood, Erez Perelman, Brad Calder |
Basic Block Distribution Analysis to Find Periodic Behavior and Simulation Points in Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE PACT ![In: 2001 International Conference on Parallel Architectures and Compilation Techniques (PACT 2001), 8-12 September 2001, Barcelona, Spain, pp. 3-14, 2001, IEEE Computer Society, 0-7695-1363-8. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
26 | Aneesh Aggarwal, Manoj Franklin |
Putting Data Value Predictors to Work in Fine-Grain Parallel Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HiPC ![In: High Performance Computing - HiPC 2001, 8th International Conference, Hyderabad, India, December, 17-20, 2001, Proceedings, pp. 204-213, 2001, Springer, 3-540-43009-1. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
26 | Yul Chu, Mabo Robert Ito |
An Efficient Indirect Branch Predictor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Euro-Par ![In: Euro-Par 2001: Parallel Processing, 7th International Euro-Par Conference Manchester, UK August 28-31, 2001, Proceedings, pp. 394-402, 2001, Springer, 3-540-42495-4. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
26 | Jayanth Gummaraju, Manoj Franklin |
Branch Prediction in Multi-Threaded Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE PACT ![In: Proceedings of the 2000 International Conference on Parallel Architectures and Compilation Techniques (PACT'00), Philadelphia, Pennsylvania, USA, October 15-19, 2000, pp. 179-188, 2000, IEEE Computer Society, 0-7695-0622-4. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
26 | Jan Hoogerbrugge |
Dynamic Branch Prediction for a VLIW Processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE PACT ![In: Proceedings of the 2000 International Conference on Parallel Architectures and Compilation Techniques (PACT'00), Philadelphia, Pennsylvania, USA, October 15-19, 2000, pp. 207-216, 2000, IEEE Computer Society, 0-7695-0622-4. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
26 | Steven Wallace, Brad Calder, Dean M. Tullsen |
Threaded Multiple Path Execution. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: Proceedings of the 25th Annual International Symposium on Computer Architecture, ISCA 1998, Barcelona, Spain, June 27 - July 1, 1998, pp. 238-249, 1998, IEEE Computer Society, 0-8186-8491-7. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
26 | Po-Yung Chang, Eric Hao, Yale N. Patt |
Target Prediction for Indirect Jumps. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: Proceedings of the 24th International Symposium on Computer Architecture, Denver, Colorado, USA, June 2-4, 1997, pp. 274-283, 1997, ACM, 0-89791-901-7. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
25 | Amit Golander, Shlomo Weiss |
Checkpoint allocation and release. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Archit. Code Optim. ![In: ACM Trans. Archit. Code Optim. 6(3), pp. 10:1-10:27, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
early register release, misprediction, Checkpoint, leakage, out-of-order execution, rollback |
25 | Andrew D. Hilton, Amir Roth |
Ginger: control independence using tag rewriting. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: 34th International Symposium on Computer Architecture (ISCA 2007), June 9-13, 2007, San Diego, California, USA, pp. 436-447, 2007, ACM, 978-1-59593-706-3. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
control independence, out-of-order renaming, selective re-dispatch, branch misprediction |
25 | Patrick Akl, Andreas Moshovos |
BranchTap: improving performance with very few checkpoints through adaptive speculation control. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICS ![In: Proceedings of the 20th Annual International Conference on Supercomputing, ICS 2006, Cairns, Queensland, Australia, June 28 - July 01, 2006, pp. 36-45, 2006, ACM, 1-59593-282-8. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
speculation control, state checkpointing, state recovery, branch misprediction |
13 | Muawya Al-Otoom, Elliott Forbes, Eric Rotenberg |
EXACT: explicit dynamic-branch prediction with active updates. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Conf. Computing Frontiers ![In: Proceedings of the 7th Conference on Computing Frontiers, 2010, Bertinoro, Italy, May 17-19, 2010, pp. 165-176, 2010, ACM, 978-1-4503-0044-5. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
branch prediction, microarchitecture, superscalar processors |
13 | Amit Golander, Shlomo Weiss |
Reexecution and Selective Reuse in Checkpoint Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Trans. High Perform. Embed. Archit. Compil. ![In: Transactions on High-Performance Embedded Architectures and Compilers II, pp. 242-268, 2009, Springer, 978-3-642-00903-7. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
13 | Daniel A. Jiménez |
Generalizing neural branch prediction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Archit. Code Optim. ![In: ACM Trans. Archit. Code Optim. 5(4), pp. 17:1-17:27, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
machine learning, Branch prediction |
13 | Uwe Brinkschulte, Daniel Lohn, Mathias Pacher |
Towards a Statistical Model of a Microprocessor's Throughput by Analyzing Pipeline Stalls. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SEUS ![In: Software Technologies for Embedded and Ubiquitous Systems, 7th IFIP WG 10.2 International Workshop, SEUS 2009, Newport Beach, CA, USA, November 16-18, 2009, Proceedings, pp. 82-90, 2009, Springer, 978-3-642-10264-6. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
13 | Pranav Vaidya, Jaehwan John Lee |
Characterization of TPC-H queries for a column-oriented database on a dual-core amd athlon processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CIKM ![In: Proceedings of the 17th ACM Conference on Information and Knowledge Management, CIKM 2008, Napa Valley, California, USA, October 26-30, 2008, pp. 1411-1412, 2008, ACM, 978-1-59593-991-3. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
column-oriented databases, monetdb, tpc-h, performance profiling |
13 | Michael Ferdman, Thomas F. Wenisch, Anastasia Ailamaki, Babak Falsafi, Andreas Moshovos |
Temporal instruction fetch streaming. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: 41st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-41 2008), November 8-12, 2008, Lake Como, Italy, pp. 1-10, 2008, IEEE Computer Society, 978-1-4244-2836-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
13 | Kshitiz Malik, Mayank Agarwal, Sam S. Stone, Kevin M. Woley, Matthew I. Frank |
Branch-mispredict level parallelism (BLP) for control independence. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCA ![In: 14th International Conference on High-Performance Computer Architecture (HPCA-14 2008), 16-20 February 2008, Salt Lake City, UT, USA, pp. 62-73, 2008, IEEE Computer Society, 978-1-4244-2070-4. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
13 | Hongliang Gao, Yi Ma, Martin Dimitrov, Huiyang Zhou |
Address-branch correlation: A novel locality for long-latency hard-to-predict branches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCA ![In: 14th International Conference on High-Performance Computer Architecture (HPCA-14 2008), 16-20 February 2008, Salt Lake City, UT, USA, pp. 74-85, 2008, IEEE Computer Society, 978-1-4244-2070-4. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
13 | Anthony S. Fong, C. Y. Ho |
Global/Local Hashed Perceptron Branch Prediction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITNG ![In: Fifth International Conference on Information Technology: New Generations (ITNG 2008), 7-8 April 2008, Las Vegas, Nevada, USA, pp. 247-252, 2008, IEEE Computer Society, 978-0-7695-3099-4. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
neural networks, hashing, branch prediction, perceptrons |
13 | Resit Sendag, Joshua J. Yi, Peng-fei Chuang, David J. Lilja |
Low power/area branch prediction using complementary branch predictors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 22nd IEEE International Symposium on Parallel and Distributed Processing, IPDPS 2008, Miami, Florida USA, April 14-18, 2008, pp. 1-12, 2008, IEEE. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
13 | Sounil Biswas, R. D. (Shawn) Blanton |
Test Compaction for Mixed-Signal Circuits Using Pass-Fail Test Data. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 26th IEEE VLSI Test Symposium (VTS 2008), April 27 - May 1, 2008, San Diego, California, USA, pp. 299-308, 2008, IEEE Computer Society, 978-0-7695-3123-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
pass-fail test data, boolean minimization, minimum constrained subset cover, Mixed-signal test, test compaction |
13 | Eui-Young Chung, Cheol Hong Kim, Sung Woo Chung |
An Accurate and Energy-Efficient Way Determination Technique for Instruction Caches by Early Tab Matching. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: 4th IEEE International Symposium on Electronic Design, Test and Applications, DELTA 2008, Hong Kong, January 23-25, 2008, pp. 190-195, 2008, IEEE Computer Society, 978-0-7695-3110-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
way predictioin, low power, Instruction cache |
13 | Shijian Zhang, Weiwu Hu |
Fetching Primary and Redundant Instructions in Turn for a Fault-Tolerant Embedded Microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PRDC ![In: 14th IEEE Pacific Rim International Symposium on Dependable Computing, PRDC 2008, 15-17 December 2008, Taipei, Taiwan, pp. 1-8, 2008, IEEE Computer Society, 978-0-7695-3448-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
13 | Hyesoon Kim, José A. Joao, Onur Mutlu, Yale N. Patt |
Diverge-Merge Processor: Generalized and Energy-Efficient Dynamic Predication. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Micro ![In: IEEE Micro 27(1), pp. 94-104, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
dynamic predication, adaptivity, energy efficiency, pipelining, instruction level parallelism, branch prediction, predication |
13 | Hyesoon Kim, José A. Joao, Onur Mutlu, Yale N. Patt |
Profile-assisted Compiler Support for Dynamic Predication in Diverge-Merge Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CGO ![In: Fifth International Symposium on Code Generation and Optimization (CGO 2007), 11-14 March 2007, San Jose, California, USA, pp. 367-378, 2007, IEEE Computer Society, 978-0-7695-2764-2. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
13 | Eduardo Quiñones, Joan-Manuel Parcerisa, Antonio González 0001 |
Improving Branch Prediction and Predicated Execution in Out-of-Order Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCA ![In: 13st International Conference on High-Performance Computer Architecture (HPCA-13 2007), 10-14 February 2007, Phoenix, Arizona, USA, pp. 75-84, 2007, IEEE Computer Society, 1-4244-0804-0. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
13 | Yefim Shuf, Ian M. Steiner |
Characterizing a Complex J2EE Workload: A Comprehensive Analysis and Opportunities for Optimizations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPASS ![In: 2007 IEEE International Symposium on Performance Analysis of Systems and Software, April 25-27, 2007, San Jose, California, USA, Proceedings, pp. 44-53, 2007, IEEE Computer Society, 1-4244-1081-9. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
J2EE workload, Java benchmarks, SPECjvm98, SPECjbb2000, Java 2 Enterprise Edition, SPECjAppServer2004, systems research, software research, cache-to-cache modified data transfers, intelligent thread co-scheduling, Java heap, bursty data cache, Java virtual method calls, optimizations, performance analysis, garbage collection, instruction cache, data prefetching, commercial workload |
13 | Mojtaba Shakeri, Abolfazl Toroghi Haghighat, Mohammad K. Akbari |
Modeling and Evaluating the Scalability of Instruction Fetching in Superscalar Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITNG ![In: Fourth International Conference on Information Technology: New Generations (ITNG 2007), 2-4 April 2007, Las Vegas, Nevada, USA, pp. 972, 2007, IEEE Computer Society, 978-0-7695-2776-5. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
13 | Haralampos-G. D. Stratigopoulos, Petros Drineas, Mustapha Slamani, Yiorgos Makris |
Non-RF to RF Test Correlation Using Learning Machines: A Case Study. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 25th IEEE VLSI Test Symposium (VTS 2007), 6-10 May 2007, Berkeley, California, USA, pp. 9-14, 2007, IEEE Computer Society, 0-7695-2812-0. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
13 | Troy A. Johnson, Rudolf Eigenmann, T. N. Vijaykumar |
Speculative thread decomposition through empirical optimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PPoPP ![In: Proceedings of the 12th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, PPOPP 2007, San Jose, California, USA, March 14-17, 2007, pp. 205-214, 2007, ACM, 978-1-59593-602-8. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
empirical search, chip multiprocessor, decomposition, multi-core, thread-level speculation |
13 | Dawei Liu, Shan Wang 0001, Biao Qin, Weiwei Gong |
Characterizing DSS Workloads from the Processor Perspective. ![Search on Bibsonomy](Pics/bibsonomy.png) |
APWeb/WAIM Workshops ![In: Advances in Web and Network Technologies, and Information Management, APWeb/WAIM 2007 International Workshops: DBMAN 2007, WebETrends 2007, PAIS 2007 and ASWAN 2007, Huang Shan, China, June 16-18, 2007, Proceedings, pp. 235-240, 2007, Springer, 978-3-540-72908-2. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
13 | Huiyang Zhou |
A case for fault tolerance and performance enhancement using chip multi-processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Comput. Archit. Lett. ![In: IEEE Comput. Archit. Lett. 5(1), pp. 22-25, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
13 | Ram Srinivasan, Jeanine E. Cook, Olaf M. Lubeck |
Performance modeling using Monte Carlo simulation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Comput. Archit. Lett. ![In: IEEE Comput. Archit. Lett. 5(1), pp. 38-41, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
13 | Hyesoon Kim, Onur Mutlu, Yale N. Patt, Jared Stark |
Wish Branches: Enabling Adaptive and Aggressive Predicated Execution. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Micro ![In: IEEE Micro 26(1), pp. 48-58, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
Wish branches, wish loops, branch prediction, predicated execution |
13 | Babak Salamat, Amirali Baniasadi, Kaveh Jokar Deris |
Area-Aware Optimizations for Resource Contrained Branch Predictors Exploited in Embedded Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICSAMOS ![In: Proceedings of 2006 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (IC-SAMOS 2006), Samos, Greece, July 17-20, 2006, pp. 50-55, 2006, IEEE, 1-4244-0155-0. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
13 | Xin Fu, James Poe, Tao Li, José A. B. Fortes |
Characterizing Microarchitecture Soft Error Vulnerability Phase Behavior. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MASCOTS ![In: 14th International Symposium on Modeling, Analysis, and Simulation of Computer and Telecommunication Systems (MASCOTS 2006), 11-14 September 2006, Monterey, California, USA, pp. 147-155, 2006, IEEE Computer Society, 0-7695-2573-3. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
13 | Oswaldo Cadenas, Graham M. Megson |
Verification and FPGA Circuits of a Block-2 Fast Path-Based Predictor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: Proceedings of the 2006 International Conference on Field Programmable Logic and Applications (FPL), Madrid, Spain, August 28-30, 2006, pp. 1-6, 2006, IEEE, 1-4244-0312-X. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
13 | Ian M. Steiner, Yefim Shuf |
A characterization of a java-based commercial workload on a high-end enterprise server. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SIGMETRICS/Performance ![In: Proceedings of the Joint International Conference on Measurement and Modeling of Computer Systems, SIGMETRICS/Performance 2006, Saint Malo, France, June 26-30, 2006, pp. 379-380, 2006, ACM, 1-59593-319-0. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
object co-allocation, Java, locality, garbage collection, memory management, JVM, memory allocation, run-time systems, object placement |
13 | Berkin Özisikyilmaz, Ramanathan Narayanan, Joseph Zambreno, Gokhan Memik, Alok N. Choudhary |
An Architectural Characterization Study of Data Mining and Bioinformatics Workloads. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IISWC ![In: Proceedings of the 2006 IEEE International Symposium on Workload Characterization, IISWC 2006, October 25-27, 2006, San Jose, California, USA, pp. 61-70, 2006, IEEE Computer Society, 1-4244-0508-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
13 | Yong Xiao, Xing-Ming Zhou |
Performance Evaluation of Data Value Prediction Schemes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Comput. Sci. Technol. ![In: J. Comput. Sci. Technol. 20(5), pp. 615-623, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
data value predictors, simulation, performance impact |
13 | Huiyang Zhou, Thomas M. Conte |
Enhancing Memory-Level Parallelism via Recovery-Free Value Prediction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 54(7), pp. 897-912, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
Single data stream architectures |
13 | Emre Özer 0001, Thomas M. Conte |
High-Performance and Low-Cost Dual-Thread VLIW Processor Using Weld Architecture Paradigm. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 16(12), pp. 1132-1142, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
Multithreaded processors, VLIW architectures, modeling of computer architecture |
13 | Babak Salamat, Amirali Baniasadi |
Area-Aware Pipeline Gating for Embedded Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PATMOS ![In: Integrated Circuit and System Design, Power and Timing Modeling, Optimization and Simulation, 15th International Workshop, PATMOS 2005, Leuven, Belgium, September 21-23, 2005, Proceedings, pp. 601-608, 2005, Springer, 3-540-29013-3. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
13 | François Bodin, Isabelle Puaut |
A WCET-Oriented Static Branch Prediction Scheme for Real Time Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ECRTS ![In: 17th Euromicro Conference on Real-Time Systems (ECRTS 2005), 6-8 July 2005, Palma de Mallorca, Spain, Proceedings, pp. 33-40, 2005, IEEE Computer Society, 0-7695-2400-1. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
13 | Hyesoon Kim, Onur Mutlu, Jared Stark, Yale N. Patt |
Wish Branches: Combining Conditional Branching and Predication for Adaptive Predicated Execution. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: 38th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-38 2005), 12-16 November 2005, Barcelona, Spain, pp. 43-54, 2005, IEEE Computer Society, 0-7695-2440-0. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|