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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 9 occurrences of 8 keywords
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Results
Found 12 publication records. Showing 12 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
21 | Seung Min Lee, Hyun Jun Jang, Jong Tae Park 0003 |
Impact of back gate biases on hot carrier effects in multiple gate junctionless transistors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. Reliab. ![In: Microelectron. Reliab. 53(9-11), pp. 1329-1332, 2013. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
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18 | Mihir R. Choudhury, Kartik Mohanram |
Reliability Analysis of Logic Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 28(3), pp. 392-405, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
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17 | Vaidyanathan Subramanian, Abdelkarim Mercha, Bertrand Parvais, Morin Dehan, Guido Groeseneken, Willy M. C. Sansen, Stefaan Decoutere |
Identifying the Bottlenecks to the RF Performance of FinFETs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: VLSI Design 2010: 23rd International Conference on VLSI Design, 9th International Conference on Embedded Systems, Bangalore, India, 3-7 January 2010, pp. 111-116, 2010, IEEE Computer Society, 978-0-7695-3928-7. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
multiple gate FET, multi-gate FET, RF, FinFET |
17 | Hari Ananthan, Kaushik Roy 0001 |
A fully physical model for leakage distribution under process variations in Nanoscale double-gate CMOS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 43rd Design Automation Conference, DAC 2006, San Francisco, CA, USA, July 24-28, 2006, pp. 413-418, 2006, ACM, 1-59593-381-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
leakage distribution, multiple-gate, tri-gate, process variations, finFET, double-gate |
12 | Qi-Lin Gu, Peng Zhang, Yi Ru, Hao Song, Wen-Sheng Zhao, Wen-Yan Yin |
A comparative study on electrothermal characteristics of nanoscale multiple gate MOSFETs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. Reliab. ![In: Microelectron. Reliab. 78, pp. 362-369, 2017. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
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12 | Fayçal Djeffal, Z. Ghoggali, Zohir Dibi, N. Lakhdar |
Analytical analysis of nanoscale multiple gate MOSFETs including effects of hot-carrier induced interface charges. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. Reliab. ![In: Microelectron. Reliab. 49(4), pp. 377-381, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
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12 | Jooyoung Song, Bo Yu, Yu Yuan, Yuan Taur |
A Review on Compact Modeling of Multiple-Gate MOSFETs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. I Regul. Pap. ![In: IEEE Trans. Circuits Syst. I Regul. Pap. 56-I(8), pp. 1858-1869, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
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12 | Alessio Griffoni |
ESD and ionizing radiation effects on ultrathin body SOI and multiple gate technologies. ![Search on Bibsonomy](Pics/bibsonomy.png) |
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2009 |
RDF |
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12 | Yuan Taur, Jooyoung Song, Bo Yu |
Compact modeling of multiple-gate MOSFETs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CICC ![In: Proceedings of the IEEE 2008 Custom Integrated Circuits Conference, CICC 2008, DoubleTree Hotel, San Jose, California, USA, September 21-24, 2008, pp. 257-264, 2008, IEEE, 978-1-4244-2018-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
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12 | Benjamín Iñíguez, Antonio Lázaro 0001, Hamdy Abd Elhamid, Oana Moldovan, Bogdan Nae, Jaume Roig, David Jiménez |
Charge-Based Compact Modeling of Multiple-Gate MOSFET. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CICC ![In: Proceedings of the IEEE 2007 Custom Integrated Circuits Conference, CICC 2007, DoubleTree Hotel, San Jose, California, USA, September 16-19, 2007, pp. 49-56, 2007, IEEE, 978-1-4244-1623-3. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
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10 | Kelin J. Kuhn |
CMOS scaling beyond 32nm: challenges and opportunities. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 46th Design Automation Conference, DAC 2009, San Francisco, CA, USA, July 26-31, 2009, pp. 310-313, 2009, ACM, 978-1-60558-497-3. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
high-k, CMOS, orientation, strain, metal-gate |
5 | Hratch Mangassarian, Andreas G. Veneris, Sean Safarpour, Farid N. Najm, Magdy S. Abadir |
Maximum circuit activity estimation using pseudo-boolean satisfiability. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2007 Design, Automation and Test in Europe Conference and Exposition, DATE 2007, Nice, France, April 16-20, 2007, pp. 1538-1543, 2007, EDA Consortium, San Jose, CA, USA, 978-3-9810801-2-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
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Displaying result #1 - #12 of 12 (100 per page; Change: )
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