Search results for "nano"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
104	Guangyong Li, Ning Xi 0001, Heping Chen, Ali Saeed, Mengmeng Yu	Assembly of Nanostructure using AFM based Nanomanipulation System.	ICRA	2004	DBLP DOI BibTeX RDF
91	Walid Ibrahim, Valeriu Beiu	A Bayesian-Based EDA Tool for Nano-circuits Reliability Calculations.	NanoNet	2009	DBLP DOI BibTeX RDF	nano-circuits, Reliability, Bayesian networks, EDA tools
87	King Wai Chiu Lai, Ning Xi 0001, Uchechukwu C. Wejinya, Yantao Shen 0001, Wen Jung Li	Automated robotic deposition system for manufacturing nano devices.	IROS	2007	DBLP DOI BibTeX RDF
85	Shuen-Lin Jeng, Jye-Chyi Lu, Kaibo Wang	A Review of Reliability Research on Nanotechnology.	IEEE Trans. Reliab.	2007	DBLP DOI BibTeX RDF
82	Weisheng Zhao, Guillaume Agnus, Vincent Derycke, Arianna Filoramo, Christian Gamrat, Jean-Philippe Bourgoin	Functional Model of Carbon Nanotube Programmable Resistors for Hybrid Nano/CMOS Circuit Design.	NanoNet	2009	DBLP DOI BibTeX RDF	Hybrid Nano/CMOS circuits, OG-CNTFET, Verilog-A, Carbon Nanotube, Functional Modelling
79	Toyonobu Yoshida	NEDO Nano Coating Project: Outline and Achievements.	ICMENS	2004	DBLP DOI BibTeX RDF
70	Bao Liu 0001	A Voltage Controlled Nano Addressing Circuit.	NanoNet	2008	DBLP DOI BibTeX RDF	Nano Architecture, Nano Addressing, Nanoelectronics
69	Rajat Subhra Chakraborty, Swarup Bhunia	A study of asynchronous design methodology for robust CMOS-nano hybrid system design.	ACM J. Emerg. Technol. Comput. Syst.	2009	DBLP DOI BibTeX RDF	CMOS-nano co-design, dual-rail circuits, logic degradation, nano-scale crossbar, Asynchronous design, robust design, micropipelines
69	Xavier Martorell, Jesús Labarta, Nacho Navarro, Eduard Ayguadé	Analysis of Several Scheduling Algorithms under the Nano-Thread Programming Model.	IPPS	1997	DBLP DOI BibTeX RDF	scheduling algorithm analysis, nano-threads programming model, dynamic processor allocation environment, uniform-sized chunking, guided self-scheduling, trapezoid self-scheduling, adaptable size chunking, automatic application decomposition, hierarchical task graph, source application, executable graph representation, user-level library, nano-threads library, user-level process, CPU manager, dynamic processor changes, processor scheduling, parallelizing compiler, parallel code
68	Harika Manem, Garrett S. Rose	The effects of logic partitioning in a majority logic based CMOS-NANO FPGA.	ACM Great Lakes Symposium on VLSI	2009	DBLP DOI BibTeX RDF	cmos-nano, fpga
68	Liying Sun, Rajesh Batra, Xiaolei Shi, Lambertus Hesselink	Topology Visualization of the Optical Power Flow through a Novel C-Shaped Nano-Aperture.	IEEE Visualization	2004	DBLP DOI BibTeX RDF	energy flow topology, Finite-Difference-Time-Domain (fdtd), C-aperture, vector field visualization
67	Laurent Bussard, Elisabetta Di Nitto, Anna Nano, Olivier Nano, Gianluca Ripa	An Approach to Identity Management for Service Centric Systems.	ServiceWave	2008	DBLP DOI BibTeX RDF
66	Constantinos Mavroidis, Ajay Ummat	Space Bionanorobotic Systems: Design and Applications.	Evolvable Hardware	2005	DBLP DOI BibTeX RDF
63	Azam Beg	Improving Nano-circuit Reliability Estimates by Using Neural Methods.	NanoNet	2009	DBLP DOI BibTeX RDF	probability of failure, nano-metric circuits, reliability model, neural network model, Reliability estimation
61	Gaël Bringout, Sajjad Saeidlou, Sylvain Martel	Sub-micrometer Network Fabrication for Bacterial Carriers and Electrical Signal Transmission.	NanoNet	2009	DBLP DOI BibTeX RDF	3D network, nano-interconnection, nano-bio paradigm, robotic platform
61	Sandro Carrara, Cristina Boero, Giovanni De Micheli	Quantum Dots and Wires to Improve Enzymes-Based Electrochemical Bio-sensing.	NanoNet	2009	DBLP DOI BibTeX RDF	Quantum Wires, Gold Nano-Particles, Oxidases, Cytochromes, Electrochemical detection, Carbon Nanotubes, Quantum Dots
61	Larkhoon Leem, James A. Weaver, Metha Jeeradit, James S. Harris Jr.	Nano-magnetic non-volatile CMOS circuits for nano-scale FPGAs (abstract only).	FPGA	2010	DBLP DOI BibTeX RDF	spin-torque devices, fpga, spintronics
61	Thor M. Wilbanks, Jeffrey A. Schuster	Aerosol Drug Delivery to the Lung Periphery Using Nano-scale Technologies.	ICMENS	2005	DBLP DOI BibTeX RDF
59	Mohammed Y. Niamat, Sowmya Panuganti, Tejas Raviraj	Modeling and simulation of nano quantum FPGAs (abstract only).	FPGA	2010	DBLP DOI BibTeX RDF	nano, fpga, qca, quantum
59	Akio Nishikawa, Satsuki Yaegashi, Fumiaki Tanaka, Kazumasa Ohtake, Masami Hagiya	Multi-fueled approach to DNA nano-robotics.	Nat. Comput.	2008	DBLP DOI BibTeX RDF	Azobenzene, DNA Nano-robotics, i-Motif, Light fuel, Multi-fueled approach, pH Fuel, Thermal fuel
59	Akio Nishikawa, Satsuki Yaegashi, Kazumasa Ohtake, Masami Hagiya	Multi-fueled Approach to DNA Nano-Robotics.	DNA	2007	DBLP DOI BibTeX RDF	DNA nano-robotics, multi-fueled approach, thermal fuel, pH fuel, light fuel, azobenzene, i-motif
59	Chong Zhao, Xiaoliang Bai, Sujit Dey	A scalable soft spot analysis methodology for compound noise effects in nano-meter circuits.	DAC	2004	DBLP DOI BibTeX RDF	compound noise effect, nano-meter technology, softness distribution, robustness
59	Pallav Gupta, Niraj K. Jha	An Algorithm for Nano-Pipelining of Circuits and Architectures for a Nanotechnology.	DATE	2004	DBLP DOI BibTeX RDF
52	Helia Naeimi, André DeHon	Fault tolerant nano-memory with fault secure encoder and decoder.	Nano-Net	2007	DBLP DOI BibTeX RDF
52	El-Hang Lee	Micro/nano-scale optical circuits and networks: issues, challenges and progresses.	Nano-Net	2007	DBLP DOI BibTeX RDF
52	Yu Cao 0001, Wei Zhao	Predictive Technology Model for Nano-CMOS Design Exploration.	Nano-Net	2006	DBLP DOI BibTeX RDF
52	Luke Demoracski, Fabrizio Lombardi	Connecting and Configuring Defective Nano-Scale Networks for DNA Self-Assembly.	Nano-Net	2006	DBLP DOI BibTeX RDF
51	Valeriu Beiu, Walid Ibrahim, Rafic Z. Makki	On Wires Holding a Handful of Electrons.	NanoNet	2009	DBLP DOI BibTeX RDF	Nano-electronics, interconnects (wires), noise (intrinsic), reliability, communication
51	Jun Ni	HPC for nano-science and technology - 2nd IEEE/ACM international workshop on high performance computing for nano-science and technology.	SC	2006	DBLP DOI BibTeX RDF
49	Harika Manem, Garrett S. Rose, Xiaoli He, Wei Wang 0003	Design considerations for variation tolerant multilevel CMOS/Nano memristor memory.	ACM Great Lakes Symposium on VLSI	2010	DBLP DOI BibTeX RDF	CMOS/nano, memristor, multi level memories
49	Dhruva Ghai, Saraju P. Mohanty, Elias Kougianos	Unified P4 (power-performance-process-parasitic) fast optimization of a Nano-CMOS VCO.	ACM Great Lakes Symposium on VLSI	2009	DBLP DOI BibTeX RDF	dual oxide technology, nano-cmos, performance aware design, vco, process variation, parasitics, power aware design
49	Van-Tsai Liu, Chien-Hung Liu, Tsai-Yuan Chen, Chun-Liang Lin, Yu-Chen Lin	Tracking Control of the Z-Tilts Error Compensation Stage of the Nano-measuring Machine Using Capacitor Insertion Method.	ICIC (1)	2007	DBLP DOI BibTeX RDF	Capacitor Insertion, Nano-measuring Machine, Laser-measuring Systems, Z-tilts, Piezoelectric Actuator
49	Milovan Suvakov, Bosiljka Tadic	Simulation of the Electron Tunneling Paths in Networks of Nano-particle Films.	International Conference on Computational Science (2)	2007	DBLP DOI BibTeX RDF	nano-particles, electron Tunneling Paths, network
49	Mary Mehrnoosh Eshaghian-Wilner, Alexander Khitun, Shiva Navab, Kang L. Wang	A nano-scale reconfigurable mesh with spin waves.	Conf. Computing Frontiers	2006	DBLP DOI BibTeX RDF	nano-scale architectures, reconfigurable mesh, spin waves
49	Lei Fang 0002, Michael S. Hsiao	Bilateral Testing of Nano-scale Fault-Tolerant Circuits.	J. Electron. Test.	2008	DBLP DOI BibTeX RDF	Bilateral fault model, Fault-tolerant, ATPG, Nanoelectronics
49	Lei Fang 0002, Michael S. Hsiao	Bilateral Testing of Nano-scale Fault-tolerant Circuits.	DFT	2006	DBLP DOI BibTeX RDF
49	Jing Huang 0001, Mehdi Baradaran Tahoori, Fabrizio Lombardi	On the Defect Tolerance of Nano-Scale Two-Dimensional Crossbars.	DFT	2004	DBLP DOI BibTeX RDF
49	Xavier Martorell, Jesús Labarta, Nacho Navarro, Eduard Ayguadé	A Library Implementation of the Nano-Threads Programming Model.	Euro-Par, Vol. II	1996	DBLP DOI BibTeX RDF
47	Amrinder S. Nain, Daniel H. Goldman, Metin Sitti	Three-dimensional Nanoscale Manipulation and Manufacturing using Proximal Probes: Controlled Pulling of Polymer Micro/nanofibers.	ICRA	2004	DBLP DOI BibTeX RDF
44	Nikolai Nefedov	Quantum-Like Computations Using Coupled Nano-scale Oscillators.	NanoNet	2009	DBLP DOI BibTeX RDF
42	Ming Liu 0022, Haigang Yang, Sansiri Tanachutiwat, Wei Wang 0003	Carbon Nanotube Nanorelays with Pass-Transistor for FPGA Routing Devices.	NanoNet	2009	DBLP DOI BibTeX RDF	carbon nanorelay, nanoelectromechanical switch, CMOS-nano hybrid, FPGA, carbon nanotube
42	Valeriu Beiu, Basheer A. M. Madappuram, Peter M. Kelly, Liam McDaid	On Two-Layer Hierarchical Networks How Does the Brain Do This?	NanoNet	2009	DBLP DOI BibTeX RDF	nano-architecture, Rent’s rule, neural networks, communication, network-on-chip, Connectivity, network topology, nanotechnology, brain, interconnect topology
41	Marc Stelzner, Falko Dressler, Stefan Fischer 0001	Function Centric Nano-Networking: Addressing nano machines in a medical application scenario.	Nano Commun. Networks	2017	DBLP DOI BibTeX RDF
41	Falko Dressler, Stefan Fischer 0001	Connecting in-body nano communication with body area networks: Challenges and opportunities of the Internet of Nano Things.	Nano Commun. Networks	2015	DBLP DOI BibTeX RDF
41	Dongqing Cai, Hong Zhang, Yi Tang, Paul K. Chu, Zengliang Yu, Zhengyan Wu	Nano-networks have better adsorption capability than nano-rods.	Nano Commun. Networks	2010	DBLP DOI BibTeX RDF
41	Salvatore Coffa (eds.)	2nd Internationa ICST Conference on Nano-Networks, Nano-Net 2007, Catania, Italy, September 24-26, 2007	Nano-Net	2007	DBLP BibTeX RDF
41	Milos Stanisavljevic, Frank Kagan Gürkaynak, Alexandre Schmid, Yusuf Leblebici, Maria Gabrani	A 90nm CMOS cryptographic core with improved fault-tolerance in presence of massive defect density.	Nano-Net	2007	DBLP DOI BibTeX RDF
41	Christof Teuscher	Topology-unaware routing in irregular self-assembled networks-on-chip: an explorative case study.	Nano-Net	2007	DBLP DOI BibTeX RDF
41	Maurizio Casalino, Luigi Sirleto, Luigi Moretti, Francesco Giuseppe Della Corte, Ivo Rendina	Au, Ag and Cu-silicon RCE photodetectors based on the internal photoemission effect at 1.55 micron.	Nano-Net	2007	DBLP DOI BibTeX RDF
41	Sandro Rao, Maria Arcangela Nigro, Francesco Suriano, Francesco Giuseppe Della Corte, Caterina Summonte, Alberto Scandurra	Design, fabrication and characterization of an α - Si: H / α - SiCN waveguide multistack for electro-optical modulation.	Nano-Net	2007	DBLP DOI BibTeX RDF
41	Frank Walsh, Sasitharan Balasubramaniam, Dmitri Botvich, William Donnelly, Sergey Sergeyev	Development of molecular based communication protocols for nanomachines.	Nano-Net	2007	DBLP DOI BibTeX RDF
41	Daniele Mangano, Alberto Scandurra, Carlo Pistritto	Relieving physical issues in new NoC-based SoCs.	Nano-Net	2007	DBLP DOI BibTeX RDF
41	Igor Loi, Federico Angiolini, Luca Benini	Supporting vertical links for 3D networks-on-chip: toward an automated design and analysis flow.	Nano-Net	2007	DBLP DOI BibTeX RDF
41	Davide Urbano, Emilio Arnieri, Gregorio Cappuccino, Giandomenico Amendola	Integrated waveguides for ultra-high speed interconnects.	Nano-Net	2007	DBLP DOI BibTeX RDF
41	Nikolai Nefedov	Spectral sensing with coupled nanoscale oscillators.	Nano-Net	2007	DBLP DOI BibTeX RDF
41	Dan Zhao 0001, Yi Wang 0007, Hongyi Wu	Dual-channel binary-countdown medium access control in wireless network-on-chip.	Nano-Net	2007	DBLP DOI BibTeX RDF
41	Mohammad Azim Karami, Mehdi Ahmadi-Boroujeni, Ali Afzali-Kusha, Reza Faraji-Dana	Semi-analytic model for dispersion relation of nanowire lasers.	Nano-Net	2007	DBLP DOI BibTeX RDF
41	Dimitrios Tsamados, Yogesh Singh Chauhan, Christoph Eggimann, Adrian Mihai Ionescu	Suspended-gate FET as a sleep transistor for ultra-low stand-by power applications.	Nano-Net	2007	DBLP DOI BibTeX RDF
41	Kenichi Fujibayashi, Satoshi Murata	Thermodynamic simulations of DNA tile self-assembly.	Nano-Net	2007	DBLP DOI BibTeX RDF
41	J. V. R. Ravindra, M. B. Srinivas	Generating reduced order models using subspace iteration for linear RLC circuits in nanometer designs.	Nano-Net	2007	DBLP DOI BibTeX RDF
41	Sergio Tota, Mario R. Casu, Paolo Motto Ros, Massimo Ruo Roch, Maurizio Zamboni	A methodology and a case-study for network-on-chip based MP-SoC architectures.	Nano-Net	2007	DBLP DOI BibTeX RDF
41	Luigi Sirleto, Maria Antonietta Ferrara, Bahram Jalali, Ivo Rendina	Raman approach in silicon nanostructure at 1.5 micron.	Nano-Net	2007	DBLP DOI BibTeX RDF
41	Fred Chen, Ajay Joshi, Vladimir Stojanovic, Anantha P. Chandrakasan	Scaling and evaluation of carbon nanotube interconnects for VLSI applications.	Nano-Net	2007	DBLP DOI BibTeX RDF
41	Teijo Lehtonen, Pasi Liljeberg, Juha Plosila	Analysis of forward error correction methods for nanoscale networks-on-chip.	Nano-Net	2007	DBLP DOI BibTeX RDF
41	Alex Yakovlev	Asynchronous links for nanonets.	Nano-Net	2007	DBLP DOI BibTeX RDF
41	Guoqing Chen, Hui Chen, Mikhail Haurylau, Nicholas Nelson 0001, David H. Albonesi, Philippe M. Fauchet, Eby G. Friedman	On-chip optical interconnect for reduced delay uncertainty.	Nano-Net	2007	DBLP DOI BibTeX RDF
41	Kristina Kunert, P. Mattias Weckstén, Magnus Jonsson	Algorithm for the choice of topology in reconfigurable on-chip networks with real-time support.	Nano-Net	2007	DBLP DOI BibTeX RDF
41	Murat Yuksel, Tansel Karabacak, Hasan Guclu	Networking behavior in thin film and nanostructure growth dynamics.	Nano-Net	2007	DBLP DOI BibTeX RDF
41	Gianluca Palermo, Giovanni Mariani, Cristina Silvano, Riccardo Locatelli, Marcello Coppola	A topology design customization approach for STNoC.	Nano-Net	2007	DBLP DOI BibTeX RDF
41	Gian Mario Maggio, Chris Dwyer (eds.)	1st International ICST Conference on Nano-Networks, Nano-Net 2006, Lausanne, Switzerland, September 14-16, 2006	Nano-Net	2006	DBLP BibTeX RDF
41	Hideaki Matsueda	Multipolar Photonic Interactions for Interconnections and Logical Operations in Nanostructure Networks.	Nano-Net	2006	DBLP DOI BibTeX RDF
41	Davide Franceschini, Massimo Donelli, Renzo Azaro, Andrea Massa	Future Trends on Nanoantennas Synthesis.	Nano-Net	2006	DBLP DOI BibTeX RDF
41	Jaidev P. Patwardhan, Chris Dwyer, Alvin R. Lebeck	Self-Assembled Networks: Control vs. Complexity.	Nano-Net	2006	DBLP DOI BibTeX RDF
41	Shinobu Fujita, Kumiko Nomura, Keiko Abe, Thomas H. Lee	3D on-chip networking technology based on post-silicon devices for future networks-on-chip.	Nano-Net	2006	DBLP DOI BibTeX RDF
41	Mosin Mondal, Xiang Wu, Adnan Aziz, Yehia Massoud	Reliability Analysis for On-chip Networks under RC Interconnect Delay Variation.	Nano-Net	2006	DBLP DOI BibTeX RDF
41	Sachin Sonkusale, Paul D. Franzon	Controlled nanowire fabrication by PEDAL process.	Nano-Net	2006	DBLP DOI BibTeX RDF
41	Aranggan Venkataratnam, Ashok K. Goel 0001	Design and Simulation of Logic Circuits with Hybrid Architectures of Single Electron Transistors and Conventional Devices.	Nano-Net	2006	DBLP DOI BibTeX RDF
41	Stephen F. Bush, Sanjay Goel	Graph Spectra of Carbon Nanotube Networks.	Nano-Net	2006	DBLP DOI BibTeX RDF
41	Benjamin Gojman, Raphael Rubin, Concetta Pilotto, André DeHon, Tetsufumi Tanamoto	3D Nanowire-Based Programmable Logic.	Nano-Net	2006	DBLP DOI BibTeX RDF
41	Daniele Mangano, Riccardo Locatelli, Alberto Scandurra, Carlo Pistritto, Marcello Coppola, Luca Fanucci, Francesco Vitullo, Dario Zandri	Skew Insensitive Physical Links for Network on Chip.	Nano-Net	2006	DBLP DOI BibTeX RDF
41	Amir Hosseini, Arthur Nieuwoudt, Yehia Massoud	Optimizing Dielectric Strip Plasmonic Waveguides for Subwavelength On-Chip Optical Communication.	Nano-Net	2006	DBLP DOI BibTeX RDF
41	Wei Wang 0003, Adam Maina Ari, Woon Ket Wong	On-Chip Interconnects and Repeaters Based on NiSi Nanowires.	Nano-Net	2006	DBLP DOI BibTeX RDF
41	Giuseppa Alfano, Daniele Miorandi	On Information Transmission Among Nanomachines.	Nano-Net	2006	DBLP DOI BibTeX RDF
41	Yehia Massoud, Arthur Nieuwoudt	Modeling and Evaluating Carbon Nanotube Bundles for Future VLSI Interconnect Applications.	Nano-Net	2006	DBLP DOI BibTeX RDF
41	Sandro Carrara, Bruno Samorì, Sigrid Bernstorff, Maria Di Pasquale, Alberto Ansaldo, Maria Teresa Parodi, Davide Ricci, Ermanno Di Zitti	Hybrid Nanostructures: Organic Interconnections and Device Applications.	Nano-Net	2006	DBLP DOI BibTeX RDF
41	Ivan Miro Panades, Alain Greiner, Abbas Sheibanyrad	A Low Cost Network-on-Chip with Guaranteed Service Well Suited to the GALS Approach.	Nano-Net	2006	DBLP DOI BibTeX RDF
41	Paolo Meloni, Srinivasan Murali, Salvatore Carta, Massimo Camplani, Luigi Raffo, Giovanni De Micheli	Routing Aware Switch Hardware Customization for Networks on Chips.	Nano-Net	2006	DBLP DOI BibTeX RDF
41	Kaustav Banerjee, Sungjun Im, Navin Srivastava	Can Carbon Nanotubes Extend the Lifetime of On-Chip Electrical Interconnections?	Nano-Net	2006	DBLP DOI BibTeX RDF
41	Kumiko Nomura, Keiko Abe, Shinobu Fujita, André DeHon	Novel Design of Three-Dimensional Crossbar for Future Network on Chip based on Post-Silicon Devices.	Nano-Net	2006	DBLP DOI BibTeX RDF
41	Joseph Tringe, Warren MoberlyChan, Charles Stevens, Albert Davydov, Abhishek Motayed	Electron Beam-induced Light Emission and Transport in GaN Nanowires.	Nano-Net	2006	DBLP DOI BibTeX RDF
41	Paolo Meloni, Salvatore Carta, Roberto Argiolas, Luigi Raffo, Federico Angiolini	Area and Power Modeling Methodologies for Networks-on-Chip.	Nano-Net	2006	DBLP DOI BibTeX RDF
41	Eric Rotenberg, Ravi V. Venkatesan	The State of ZettaRAM.	Nano-Net	2006	DBLP DOI BibTeX RDF
41	Paul P. Sotiriadis	Nanoscale Data Storage Devices Capacity and Encoding Schemes.	Nano-Net	2006	DBLP DOI BibTeX RDF
41	Alberto Scandurra, Maurizio Lenzi, Ranieri Guerra, Francesco Giuseppe Della Corte, Maria Arcangela Nigro	Optical Interconnects for Network on Chip.	Nano-Net	2006	DBLP DOI BibTeX RDF
41	Dongkook Park, Chrysostomos Nicopoulos, Jongman Kim, Narayanan Vijaykrishnan, Chita R. Das	A Distributed Multi-Point Network Interface for Low-Latency, Deadlock-Free On-Chip Interconnects.	Nano-Net	2006	DBLP DOI BibTeX RDF
41	Paul Bogdan, Radu Marculescu	A Theoretical Framework for On-chip Stochastic Communication Analysis.	Nano-Net	2006	DBLP DOI BibTeX RDF
40	Garima Thakral, Saraju P. Mohanty, Dhruva Ghai, Dhiraj K. Pradhan	A DOE-ILP assisted conjugate-gradient based power and stability optimization in High-K Nano-CMOS SRAM.	ACM Great Lakes Symposium on VLSI	2010	DBLP DOI BibTeX RDF	nano-CMOS, power, leakage, SRAM, static noise margin
40	YuHua Cheng	A glance of technology efforts for design-for-manufacturing in nano-scale CMOS processes.	Sci. China Ser. F Inf. Sci.	2008	DBLP DOI BibTeX RDF	nano-CMOS IC design, IC design methodology, CMOS design technology platform, design-for-manufacturing (DFM), design-for-yield
40	Kevin Ryan, Sansiri Tanachutiwat, Wei Wang 0003	3D CMOL Crossnet for Neuromorphic Network Applications.	NanoNet	2008	DBLP DOI BibTeX RDF	CMOS-Nano Hybrid System, CMOL, Crossnet, Neuromorphic Network, 3D IC
40	Aydin Varol, Ihsan Gunev, Cagatay Basdogan	AVirtual Reality Toolkit for Path Planning and Manipulation at Nano-scale.	HAPTICS	2006	DBLP DOI BibTeX RDF	Atomic Force Microscopy (AFM), nano-manipulation, Virtual Reality (VR), haptics, path planning