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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 5436 occurrences of 2452 keywords
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Results
Found 16451 publication records. Showing 16451 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
97 | Natarajan Viswanathan, Min Pan, Chris C. N. Chu |
FastPlace 3.0: A Fast Multilevel Quadratic Placement Algorithm with Placement Congestion Control. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 12th Conference on Asia South Pacific Design Automation, ASP-DAC 2007, Yokohama, Japan, January 23-26, 2007, pp. 135-140, 2007, IEEE Computer Society, 1-4244-0629-3. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
legalization technique, FastPlace 3.0, multilevel quadratic placement algorithm, placement congestion control, large-scale mixed-size designs, multilevel global placement framework, two-level clustering scheme, iterative local refinement, placement blockages, placement congestion constraints |
75 | Viral Shah, Sourav Bhattacharya |
Fault propagation analysis based variable length checkpoint placement for fault-tolerant parallel and distributed systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
COMPSAC ![In: 21st International Computer Software and Applications Conference (COMPSAC '97), 11-15 August 1997, Washington, DC, USA, pp. 612-615, 1997, IEEE Computer Society, 0-8186-8105-5. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
fault propagation analysis based variable length checkpoint placement, fault tolerant parallel systems, optimal checkpoint placement strategies, failure propagation analysis, distributed rollback recovery system, FPA based checkpoint placement strategy, task grouping/allocation, loop stabilization aspects, message communication instructions, checkpoint placement strategy, message send/receive regions, FPA process, checkpoint placement strategies, cyclic relationship, distributed systems, parallel algorithm, fast Fourier transform, FFT, recursion, distributed programs, task allocation, system recovery, link failures |
75 | Andrey Ayupov, Alexander Marchenko, Vladimir Tiourin |
An analytical approach to placement legalization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 18th ACM Great Lakes Symposium on VLSI 2008, Orlando, Florida, USA, May 4-6, 2008, pp. 167-170, 2008, ACM, 978-1-59593-999-9. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
placement legalization, placement spreading, analytical placement, detailed placement |
74 | Majid Sarrafzadeh, Maogang Wang |
NRG: global and detailed placement. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: Proceedings of the 1997 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 1997, San Jose, CA, USA, November 9-13, 1997, pp. 532-537, 1997, IEEE Computer Society / ACM, 0-8186-8200-0. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
NRG, Global Placement, Placement, Detailed Placement |
70 | Ravi Varadarajan |
Convergence of placement technology in physical synthesis: is placement really a point tool? ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPD ![In: Proceedings of the 2003 International Symposium on Physical Design, ISPD 2003, Monterey, CA, USA, April 6-9, 2003, pp. 7, 2003, ACM, 1-58113-650-1. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
68 | Hemant K. Bhargava, Juan Feng |
Paid placement strategies for internet search engines. ![Search on Bibsonomy](Pics/bibsonomy.png) |
WWW ![In: Proceedings of the Eleventh International World Wide Web Conference, WWW 2002, May 7-11, 2002, Honolulu, Hawaii, USA, pp. 117-123, 2002, ACM, 1-58113-449-5. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
information gatekeepers, paid placement, search engines, bias, promotion |
65 | Shin'ichi Wakabayashi, Nobuyuki Iwauchi, Hajime Kubota |
A hierarchical standard cell placement method based on a new cluster placement model. ![Search on Bibsonomy](Pics/bibsonomy.png) |
APCCAS (1) ![In: IEEE Asia Pacific Conference on Circuits and Systems 2002, APCCAS 2002, Singapore, 16-18 December 2002, pp. 273-278, 2002, IEEE, 0-7803-7690-0. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
65 | John A. Chandy, Prithviraj Banerjee |
Parallel simulated annealing strategies for VLSI cell placement. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 9th International Conference on VLSI Design (VLSI Design 1996), 3-6 January 1996, Bangalore, India, pp. 37-42, 1996, IEEE Computer Society, 0-8186-7228-5. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
parallel simulated annealing strategies, VLSI cell placement, cell placement annealing, multiple Markov chains, parallel moves approach, parallel algorithms, VLSI, simulated annealing, Markov processes, VLSI design, circuit layout CAD, integrated circuit layout, speculative computation, standard cell placement |
63 | Herman Schmit, Amit Gupta, Radu Ciobanu |
Placement challenges for structured ASICs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPD ![In: Proceedings of the 2008 International Symposium on Physical Design, ISPD 2008, Portland, Oregon, USA, April 13-16, 2008, pp. 84-86, 2008, ACM, 978-1-60558-048-7. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
field programmable gate arrays, placement, structured ASICs |
63 | Pongstorn Maidee, Cristinel Ababei, Kia Bazargan |
Timing-driven partitioning-based placement for island style FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 24(3), pp. 395-406, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
63 | Bill Halpin, Naresh Sehgal, C. Y. Roger Chen |
Detailed Placement with Net Length Constraints. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IWSOC ![In: Proceedings of the 3rd IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC'03), 30 June - 2 July 2003, Calgary, Alberta, Canada, pp. 22-27, 2003, IEEE Computer Society, 0-7695-1944-X. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
63 | Thomas J. Murray 0002, A. Wayne Madison, James Westall |
Lookahead page placement. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Southeast Regional Conference ![In: Proceedings of the 33th Annual Southeast Regional Conference, 1995, Clemson, South Carolina, USA, March 17-18, 1995, pp. 146-155, 1995, ACM, 978-0-89791-747-6. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
|
60 | Pak K. Chan, Martine D. F. Schlag |
Parallel placement for field-programmable gate arrays. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the ACM/SIGDA International Symposium on Field Programmable Gate Arrays, FPGA 2003, Monterey, CA, USA, February 23-25, 2003, pp. 43-50, 2003, ACM, 1-58113-651-X. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
parallel placement, FPGAs, timing-driven placement, analytical placement |
59 | Tung-Chieh Chen, Yi-Lin Chuang, Yao-Wen Chang |
X-architecture placement based on effective wire models. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPD ![In: Proceedings of the 2007 International Symposium on Physical Design, ISPD 2007, Austin, Texas, USA, March 18-21, 2007, pp. 87-94, 2007, ACM, 978-1-59593-613-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
X architecture, partitioning, placement, physical design, Steiner tree, min cut, net weighting |
59 | Andrew B. Kahng, Sherief Reda, Qinke Wang |
APlace: a general analytic placement framework. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPD ![In: Proceedings of the 2005 International Symposium on Physical Design, ISPD 2005, San Francisco, California, USA, April 3-6, 2005, pp. 233-235, 2005, ACM, 1-59593-021-3. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
mixed size, congestion, multi-level, analytical placement |
59 | Xiaojian Yang, Bo-Kyung Choi, Majid Sarrafzadeh |
Routability driven white space allocation for fixed-die standard-cell placement. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPD ![In: Proceedings of 2002 International Symposium on Physical Design, ISPD 2002, Del Mar, CA, USA, April 7-10, 2002, pp. 42-47, 2002, ACM, 1-58113-460-6. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
placement, physical design, routability |
58 | Gi-Joon Nam, Mehmet Can Yildiz, David Z. Pan, Patrick H. Madden |
ISPD placement contest updates and ISPD 2007 global routing contest. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPD ![In: Proceedings of the 2007 International Symposium on Physical Design, ISPD 2007, Austin, Texas, USA, March 18-21, 2007, pp. 167, 2007, ACM, 978-1-59593-613-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
58 | Xiaojian Yang, Bo-Kyung Choi, Majid Sarrafzadeh |
Routability-driven white space allocation for fixed-die standard-cell placement. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 22(4), pp. 410-419, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
56 | Prashant Saxena, Bill Halpin |
Modeling repeaters explicitly within analytical placement. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 41th Design Automation Conference, DAC 2004, San Diego, CA, USA, June 7-11, 2004, pp. 699-704, 2004, ACM, 1-58113-828-8. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
interconnect, placement, scaling, buffering, repeater insertion, force-directed placement, analytical placement |
56 | Pongstorn Maidee, Cristinel Ababei, Kia Bazargan |
Fast timing-driven partitioning-based placement for island style FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 40th Design Automation Conference, DAC 2003, Anaheim, CA, USA, June 2-6, 2003, pp. 598-603, 2003, ACM, 1-58113-688-9. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
FPGA placement, partitioning based placement, FPGAs, timing-driven placement |
55 | Sooyong Kang, Sungwoo Hong, Youjip Won |
Storage technique for real-time streaming of layered video. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Multim. Syst. ![In: Multim. Syst. 15(2), pp. 63-81, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
Layered encoding, Multimedia, File system, Storage, Scalable streaming |
55 | Renato Fernandes Hentschke, Guilherme Flach, Felipe Pinto, Ricardo Reis 0001 |
Quadratic placement for 3d circuits using z-cell shifting, 3d iterative refinement and simulated annealing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SBCCI ![In: Proceedings of the 19th Annual Symposium on Integrated Circuits and Systems Design, SBCCI 2006, Ouro Preto, MG, Brazil, August 28 - September 1, 2006, pp. 220-225, 2006, ACM. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
3d circuits, cell shifting, placement, quadratic placement |
55 | Tony F. Chan, Jason Cong, Michail Romesis, Joseph R. Shinnerl, Kenton Sze, Min Xie 0004 |
mPL6: a robust multilevel mixed-size placement engine. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPD ![In: Proceedings of the 2005 International Symposium on Physical Design, ISPD 2005, San Francisco, California, USA, April 3-6, 2005, pp. 227-229, 2005, ACM, 1-59593-021-3. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
mixed-size placement, legalization, helmholtz equation, force-directed placement, multilevel optimization |
54 | Jason Cong, Guojie Luo |
An analytical placer for mixed-size 3D placement. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPD ![In: Proceedings of the 2010 International Symposium on Physical Design, ISPD 2010, San Francisco, California, USA, March 14-17, 2010, pp. 61-66, 2010, ACM, 978-1-60558-920-6. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
placement, 3D integration, analytical method |
54 | Philip Chong, Christian Szegedy |
A morphing approach to address placement stability. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPD ![In: Proceedings of the 2007 International Symposium on Physical Design, ISPD 2007, Austin, Texas, USA, March 18-21, 2007, pp. 95-102, 2007, ACM, 978-1-59593-613-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
incremental placement, stability, morphing |
54 | Tung-Chieh Chen, Tien-Chang Hsu, Zhe-Wei Jiang, Yao-Wen Chang |
NTUplace: a ratio partitioning based placement algorithm for large-scale mixed-size designs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPD ![In: Proceedings of the 2005 International Symposium on Physical Design, ISPD 2005, San Francisco, California, USA, April 3-6, 2005, pp. 236-238, 2005, ACM, 1-59593-021-3. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
mincut, ratio cut, placement |
53 | Haixia Yan, Zhuoyuan Li, Xianlong Hong, Qiang Zhou 0001 |
Unified Quadratic Programming Approach For 3-D Mixed Mode Placement. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2007), 27-20 May 2007, New Orleans, Louisiana, USA, pp. 3411-3414, 2007, IEEE, 1-4244-0920-9. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
53 | Deshanand P. Singh, Stephen Dean Brown |
Integrated retiming and placement for field programmable gate arrays. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the ACM/SIGDA International Symposium on Field Programmable Gate Arrays, FPGA 2002, Monterey, CA, USA, February 24-26, 2002, pp. 67-76, 2002, ACM, 1-58113-452-5. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
53 | R. V. Raj, N. S. Murty, P. S. Nagendra Rao, Lalit M. Patnaik |
Effective Heuristics for Timing Driven Constructive Placement. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 10th International Conference on VLSI Design (VLSI Design 1997), 4-7 January 1997, Hyderabad, India, pp. 38-45, 1997, IEEE Computer Society, 0-8186-7755-4. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
53 | Daniel Alexander Ford, Stavros Christodoulakis |
Optimal Placement of High-Probability Randomly Retrieved Blocks on CLV Optical Discs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Inf. Syst. ![In: ACM Trans. Inf. Syst. 9(1), pp. 1-30, 1991. The full citation details ...](Pics/full.jpeg) |
1991 |
DBLP DOI BibTeX RDF |
performance, management |
52 | Natarajan Viswanathan, Min Pan, Chris C. N. Chu |
FastPlace: an analytical placer for mixed-mode designs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPD ![In: Proceedings of the 2005 International Symposium on Physical Design, ISPD 2005, San Francisco, California, USA, April 3-6, 2005, pp. 221-223, 2005, ACM, 1-59593-021-3. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
mixed-mode placement, floorplanning, analytical placement |
52 | Sung-Woo Hur, Tung Cao, Karthik Rajagopal, Yegna Parasuram, Amit Chowdhary, Vladimir Tiourin, Bill Halpin |
Force directed mongrel with physical net constraints. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 40th Design Automation Conference, DAC 2003, Anaheim, CA, USA, June 2-6, 2003, pp. 214-219, 2003, ACM, 1-58113-688-9. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
mongrel, net constraints, timing driven placement, force directed placement |
52 | Haixia Yan, Qiang Zhou 0001, Xianlong Hong |
Efficient Thermal Aware Placement Approach Integrated with 3D DCT Placement Algorithm. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 9th International Symposium on Quality of Electronic Design (ISQED 2008), 17-19 March 2008, San Jose, CA, USA, pp. 289-292, 2008, IEEE Computer Society, 978-0-7695-3117-5. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
placement, DCT, 3D, thermal |
51 | Raoul F. Badaoui, Ranga Vemuri |
Multi-Placement Structures for Fast and Optimized Placement in Analog Circuit Synthesis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2005 Design, Automation and Test in Europe Conference and Exposition (DATE 2005), 7-11 March 2005, Munich, Germany, pp. 138-143, 2005, IEEE Computer Society, 0-7695-2288-2. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
51 | Nikos Hardavellas, Michael Ferdman, Babak Falsafi, Anastasia Ailamaki |
Reactive NUCA: near-optimal block placement and replication in distributed caches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: 36th International Symposium on Computer Architecture (ISCA 2009), June 20-24, 2009, Austin, TX, USA, pp. 184-195, 2009, ACM, 978-1-60558-526-0. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
block migration, block placement, block replication, cache indexing, cache lookup, non-uniform cache access, nuca, r-nuca, reactive nuca, rotational interleaving, cache, replication, chip multiprocessor, cmp, placement, multicore, multi-core, migration, cache coherence, data replication, coherence, interleaving, data migration, data placement, shared cache, cache management, lookup, last-level cache, private cache |
50 | Tony F. Chan, Jason Cong, Joseph R. Shinnerl, Kenton Sze, Min Xie 0004 |
mPL6: enhanced multilevel mixed-size placement. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPD ![In: Proceedings of the 2006 International Symposium on Physical Design, ISPD 2006, San Jose, California, USA, April 9-12, 2006, pp. 212-214, 2006, ACM, 1-59593-299-2. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
mixed-size placement, legalization, Helmholtz equation, force-directed placement, multilevel optimization |
50 | Faris H. Khundakjie, Patrick H. Madden, Nael B. Abu-Ghazaleh, Mehmet Can Yildiz |
Parallel Standard Cell Placement on a Cluster of Workstations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CLUSTER ![In: 2001 IEEE International Conference on Cluster Computing (CLUSTER 2001), 8-11 October 2001, Newport Beach, CA, USA, pp. 85-94, 2001, IEEE Computer Society, 0-7695-1116-3. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
Partitioning based Placement, Parallel VLSI Placement, Message Passing Applications, Standard Cell |
50 | Michael Marchetti, Leonidas I. Kontothanassis, Ricardo Bianchini, Michael L. Scott |
Using simple page placement policies to reduce the cost of cache fills in coherent shared-memory systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPPS ![In: Proceedings of IPPS '95, The 9th International Parallel Processing Symposium, April 25-28, 1995, Santa Barbara, California, USA, pp. 480-485, 1995, IEEE Computer Society, 0-8186-7074-6. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
page placement policies, cache fills, OS-based page placement, page replication, performance, shared memory systems, shared-memory systems, storage management, operating systems (computers), cache storage, paged storage, distributed shared memory multiprocessors, page migration |
49 | Cristinel Ababei |
Parallel placement for FPGAs revisited. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the ACM/SIGDA 17th International Symposium on Field Programmable Gate Arrays, FPGA 2009, Monterey, California, USA, February 22-24, 2009, pp. 280, 2009, ACM, 978-1-60558-410-2. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
fpga placement, multithreading, parallel simulated annealing |
49 | Deepak Ganesan, Razvan Cristescu, Baltasar Beferull-Lozano |
Power-efficient sensor placement and transmission structure for data gathering under distortion constraints. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Sens. Networks ![In: ACM Trans. Sens. Networks 2(2), pp. 155-181, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
sensing distortion, sensor node placement, Sensor networks, energy efficiency, information theory, data gathering |
49 | Alexei A. Karve, Tracy Kimbrel, Giovanni Pacifici, Mike Spreitzer, Malgorzata Steinder, Maxim Sviridenko, Asser N. Tantawi |
Dynamic placement for clustered web applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
WWW ![In: Proceedings of the 15th international conference on World Wide Web, WWW 2006, Edinburgh, Scotland, UK, May 23-26, 2006, pp. 595-604, 2006, ACM, 1-59593-323-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
dynamic application placement, performance management |
49 | Saurabh N. Adya, Igor L. Markov |
Combinatorial techniques for mixed-size placement. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Design Autom. Electr. Syst. ![In: ACM Trans. Design Autom. Electr. Syst. 10(1), pp. 58-90, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
VLSI, placement, floorplanning |
49 | Qinghua Liu, Malgorzata Marek-Sadowska |
A congestion-driven placement framework with local congestion prediction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 15th ACM Great Lakes Symposium on VLSI 2005, Chicago, Illinois, USA, April 17-19, 2005, pp. 488-493, 2005, ACM, 1-59593-057-4. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
cell padding, congestion prediction, placement migration |
49 | Christophe Guillon, Fabrice Rastello, Thierry Bidault, Florent Bouchez |
Procedure placement using temporal-ordering information: dealing with code size expansion. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2004 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2004, Washington DC, USA, September 22 - 25, 2004, pp. 268-279, 2004, ACM, 1-58113-890-3. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
min-matching, profiling, instruction cache, Hamiltonian-path, cache miss, code size, code placement |
49 | Jason Cong, Michail Romesis, Min Xie 0004 |
Optimality, scalability and stability study of partitioning and placement algorithms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPD ![In: Proceedings of the 2003 International Symposium on Physical Design, ISPD 2003, Monterey, CA, USA, April 6-9, 2003, pp. 88-94, 2003, ACM, 1-58113-650-1. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
optimality, scalability, stability, partitioning, placement |
49 | Bo Hu 0006, Malgorzata Marek-Sadowska |
Fine granularity clustering for large scale placement problems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPD ![In: Proceedings of the 2003 International Symposium on Physical Design, ISPD 2003, Monterey, CA, USA, April 6-9, 2003, pp. 67-74, 2003, ACM, 1-58113-650-1. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
clustering, placement |
49 | Guang-Ming Wu, Jai-Ming Lin, Yao-Wen Chang |
Performance-driven placement for dynamically reconfigurable FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Design Autom. Electr. Syst. ![In: ACM Trans. Design Autom. Electr. Syst. 7(4), pp. 628-642, 2002. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
field-programmable gate array, placement, dynamically reconfigurable, layout, Computer-aided design of VLSI |
49 | Tung-Chieh Chen, Yi-Lin Chuang, Yao-Wen Chang |
Effective Wire Models for X-Architecture Placement. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27(4), pp. 654-658, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
49 | Min Pan, Chris C. N. Chu |
IPR: An Integrated Placement and Routing Algorithm. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 44th Design Automation Conference, DAC 2007, San Diego, CA, USA, June 4-8, 2007, pp. 59-62, 2007, IEEE. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
49 | Saurabh N. Adya, S. Chaturvedi, Jarrod A. Roy, David A. Papa, Igor L. Markov |
Unification of partitioning, placement and floorplanning. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: 2004 International Conference on Computer-Aided Design, ICCAD 2004, San Jose, CA, USA, November 7-11, 2004, pp. 550-557, 2004, IEEE Computer Society / ACM, 0-7803-8702-3. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
49 | Stelian Alupoaei, Srinivas Katkoori |
Net-based force-directed macrocell placement for wirelength optimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 10(6), pp. 824-835, 2002. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
49 | Russell Tessier |
Fast placement approaches for FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Design Autom. Electr. Syst. ![In: ACM Trans. Design Autom. Electr. Syst. 7(2), pp. 284-305, 2002. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
field-programmable gate arrays, synthesis, layout, Computer-aided design of VLSI |
49 | Stephen J. Sheel, Deborah Vrooman, René S. Renner, Shanda K. Dawsey |
A Comparison of Neural Networks and Classical Discriminant Analysis in Predicting Students' Mathematics Placement Examination Scores. ![Search on Bibsonomy](Pics/bibsonomy.png) |
International Conference on Computational Science (2) ![In: Computational Science - ICCS 2001, International Conference, San Francisco, CA, USA, May 28-30, 2001. Proceedings, Part II, pp. 952-957, 2001, Springer, 3-540-42233-1. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
48 | Andrew B. Kahng, Qinke Wang |
Implementation and extensibility of an analytic placer. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPD ![In: Proceedings of the 2004 International Symposium on Physical Design, ISPD 2004, Phoenix, Arizona, USA, April 18-21, 2004, pp. 18-25, 2004, ACM, 1-58113-817-2. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
I/O-Core co-placement, hierarchical placement, congestion, geometric constraints, analytical placement |
48 | Wonjoon Choi, Kia Bazargan |
Hierarchical Global Floorplacement Using Simulated Annealing and Network Flow Area Migration. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2003 Design, Automation and Test in Europe Conference and Exposition (DATE 2003), 3-7 March 2003, Munich, Germany, pp. 11104-11105, 2003, IEEE Computer Society, 0-7695-1870-2. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
floorplacement, global placement, area migration, Design, Algorithms, simulated annealing, Management, Floorplanning, network flow, hierarchical, Placement and routing |
47 | Yiu-Cheong Tam, Evangeline F. Y. Young, Chris C. N. Chu |
Analog placement with symmetry and other placement constraints. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: 2006 International Conference on Computer-Aided Design, ICCAD 2006, San Jose, CA, USA, November 5-9, 2006, pp. 349-354, 2006, ACM, 1-59593-389-1. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
symmetry constraints, placement, analog circuits, sequence-pair |
47 | Natarajan Viswanathan, Min Pan, Chris Chu |
FastPlace: An Efficient Multilevel Force-Directed Placement Algorithm. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Modern Circuit Placement ![In: Modern Circuit Placement, Best Practices and Results, pp. 193-228, 2007, Springer, 978-0-387-36837-5. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
47 | Bo Hu 0006, Malgorzata Marek-Sadowska |
mFAR: Multilevel Fixed-Points Addition-Based VLSI Placement. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Modern Circuit Placement ![In: Modern Circuit Placement, Best Practices and Results, pp. 229-245, 2007, Springer, 978-0-387-36837-5. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
47 | Tao Luo 0002, David Z. Pan |
DPlace: Anchor Cell-Based Quadratic Placement with Linear Objective. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Modern Circuit Placement ![In: Modern Circuit Placement, Best Practices and Results, pp. 39-58, 2007, Springer, 978-0-387-36837-5. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
47 | Tony F. Chan, Kenton Sze, Joseph R. Shinnerl, Min Xie 0004 |
mPL6: Enhanced Multilevel Mixed-Size Placement with Congestion Control. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Modern Circuit Placement ![In: Modern Circuit Placement, Best Practices and Results, pp. 247-288, 2007, Springer, 978-0-387-36837-5. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
47 | Jarrod A. Roy, David A. Papa, Igor L. Markov |
Capo: Congestion-Driven Placement for Standard-cell and RTL Netlists with Incremental Capability. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Modern Circuit Placement ![In: Modern Circuit Placement, Best Practices and Results, pp. 97-133, 2007, Springer, 978-0-387-36837-5. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
47 | Taraneh Taghavi, Xiaojian Yang, Bo-Kyung Choi, Maogang Wang, Majid Sarrafzadeh |
Congestion Minimization in Modern Placement Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Modern Circuit Placement ![In: Modern Circuit Placement, Best Practices and Results, pp. 135-163, 2007, Springer, 978-0-387-36837-5. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
47 | Gi-Joon Nam, Charles J. Alpert, Paul G. Villarrubia |
ISPD 2005/2006 Placement Benchmarks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Modern Circuit Placement ![In: Modern Circuit Placement, Best Practices and Results, pp. 3-12, 2007, Springer, 978-0-387-36837-5. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
47 | Jason Cong, Michalis Romesis, Joseph R. Shinnerl, Kenton Sze, Min Xie 0004 |
Locality and Utilization in Placement Suboptimality. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Modern Circuit Placement ![In: Modern Circuit Placement, Best Practices and Results, pp. 13-36, 2007, Springer, 978-0-387-36837-5. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
46 | Stelian Alupoaei, Srinivas Katkoori |
Net Clustering Based Macrocell Placement. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC/VLSI Design ![In: Proceedings of the 7th Asia and South Pacific Design Automation Conference (ASP-DAC 2002), and the 15th International Conference on VLSI Design (VLSI Design 2002), Bangalore, India, January 7-11, 2002, pp. 399-, 2002, IEEE Computer Society, 0-7695-1299-2. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
Macrocell placement, net clustering, net placement, net prioritization, force-directed placement, iterative improvement |
46 | Michael Eick, Martin Strasser, Helmut E. Graeb, Ulf Schlichtmann |
Automatic generation of hierarchical placement rules for analog integrated circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPD ![In: Proceedings of the 2010 International Symposium on Physical Design, ISPD 2010, San Francisco, California, USA, March 14-17, 2010, pp. 47-54, 2010, ACM, 978-1-60558-920-6. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
hierarchical placement rules, constraints, placement, analog integrated circuits |
46 | Natarajan Viswanathan, Chris C. N. Chu |
FastPlace: efficient analytical placement using cell shifting, iterative local refinement and a hybrid net model. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPD ![In: Proceedings of the 2004 International Symposium on Physical Design, ISPD 2004, Phoenix, Arizona, USA, April 18-21, 2004, pp. 26-33, 2004, ACM, 1-58113-817-2. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
net models, analytical placement, standard cell placement |
46 | Ulrich Brenner, Anna Pauli, Jens Vygen |
Almost optimum placement legalization by minimum cost flow and dynamic programming. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPD ![In: Proceedings of the 2004 International Symposium on Physical Design, ISPD 2004, Phoenix, Arizona, USA, April 18-21, 2004, pp. 2-9, 2004, ACM, 1-58113-817-2. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
placement, legalization, minimum-cost flow, detailed placement |
46 | Nikolaos G. Bourbakis, Mohammad Mortazavi |
An efficient building block layout methodology for compact placement. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Great Lakes Symposium on VLSI ![In: 5th Great Lakes Symposium on VLSI (GLS-VLSI '95), March 16-18, 1995, The State University of New York at Buffalo, USA, pp. 118-123, 1995, IEEE Computer Society, 0-8186-7035-5. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
building block layout methodology, compact placement, synthesis placement, GEOMETRIA, geometric reshapings, VLSI regulation, functional performance, connection lines, occupied chip area, neighboring relations, dead space, open holes, channels merging process, legal overlapping, VLSI, formal languages, formal language, network routing, circuit layout CAD, compaction, global routing, integrated circuit layout, integrated circuit interconnections, local routing |
45 | Yi-Lin Chuang, Sangmin Kim, Youngsoo Shin, Yao-Wen Chang |
Pulsed-latch aware placement for timing-integrity optimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 47th Design Automation Conference, DAC 2010, Anaheim, California, USA, July 13-18, 2010, pp. 280-285, 2010, ACM, 978-1-4503-0002-5. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
pulsed latch, placement, physical design |
45 | Jackey Z. Yan, Natarajan Viswanathan, Chris Chu |
Handling complexities in modern large-scale mixed-size placement. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 46th Design Automation Conference, DAC 2009, San Francisco, CA, USA, July 26-31, 2009, pp. 436-441, 2009, ACM, 978-1-60558-497-3. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
incremental placement, mixed-size design, floorplanning |
45 | Zhe-Wei Jiang, Bor-Yiing Su, Yao-Wen Chang |
Routability-driven analytical placement by net overlapping removal for large-scale mixed-size designs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 45th Design Automation Conference, DAC 2008, Anaheim, CA, USA, June 8-13, 2008, pp. 167-172, 2008, ACM, 978-1-60558-115-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
placement, physical design, routability |
45 | Robert Bodor, Andrew Drenner, Paul R. Schrater, Nikolaos Papanikolopoulos |
Optimal Camera Placement for Automated Surveillance Tasks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Intell. Robotic Syst. ![In: J. Intell. Robotic Syst. 50(3), pp. 257-295, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
Robot/camera placement, Vision-based robotics, Optimization, Sensor networks, Observability, Camera networks |
45 | Jaydeep Marathe, Frank Mueller 0001 |
Hardware profile-guided automatic page placement for ccNUMA systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PPoPP ![In: Proceedings of the ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, PPOPP 2006, New York, New York, USA, March 29-31, 2006, pp. 90-99, 2006, ACM, 1-59593-189-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
page placement, NUMA, profile-guided optimization, hardware performance monitoring |
45 | Jason Cong, Joseph R. Shinnerl, Min Xie 0004, Tim Kong, Xin Yuan 0005 |
Large-scale circuit placement. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Design Autom. Electr. Syst. ![In: ACM Trans. Design Autom. Electr. Syst. 10(2), pp. 389-430, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
optimality, scalability, Placement, large-scale optimization |
45 | Bo Yao, Hongyu Chen, Chung-Kuan Cheng, Nan-Chi Chou, Lung-Tien Liu, Peter Suaris |
Unified quadratic programming approach for mixed mode placement. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPD ![In: Proceedings of the 2005 International Symposium on Physical Design, ISPD 2005, San Francisco, California, USA, April 3-6, 2005, pp. 193-199, 2005, ACM, 1-59593-021-3. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
mixed mode placement, discrete cosine transformation, quadratic programming |
45 | Miodrag Vujkovic, David Wadkins, William Swartz, Carl Sechen |
Efficient timing closure without timing driven placement and routing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 41th Design Automation Conference, DAC 2004, San Diego, CA, USA, June 7-11, 2004, pp. 268-273, 2004, ACM, 1-58113-828-8. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
digital design flow, gate sizing, placement and routing, timing closure |
45 | Juan Feng, Hemant K. Bhargava, David M. Pennock |
Comparison of allocation rules for paid placement advertising in search engines. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICEC ![In: Proceedings of the 5th International Conference on Electronic Commerce, ICEC 2003, Pittsburgh, Pennsylvania, USA, September 30 - October 03, 2003, pp. 294-299, 2003, ACM, 1-58113-788-5. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
information gatekeepers, paid placement, slotting auctions, sponsored listings, search engines |
45 | Jason Cong, Xin Yuan 0005 |
Multilevel global placement with retiming. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 40th Design Automation Conference, DAC 2003, Anaheim, CA, USA, June 2-6, 2003, pp. 208-213, 2003, ACM, 1-58113-688-9. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
physical hierarchy, placement, retiming, deep sub-micron |
45 | Madhukar R. Korupolu, Michael Dahlin |
Coordinated Placement and Replacement for Large-Scale Distributed Caches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Knowl. Data Eng. ![In: IEEE Trans. Knowl. Data Eng. 14(6), pp. 1317-1329, 2002. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
Cache, web, distributed, cooperative, placement, hierarchical, replacement |
45 | Nicholas C. Gloy, Michael D. Smith 0001 |
Procedure placement using temporal-ordering information. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Program. Lang. Syst. ![In: ACM Trans. Program. Lang. Syst. 21(5), pp. 977-1027, 1999. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
temporal profiling, working-set optimization, conflict misses, code placement |
44 | Val Pevzner, Andrew A. Kennings, Andy Fox |
Physical optimization for FPGAs using post-placement topology rewriting. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPD ![In: Proceedings of the 2009 International Symposium on Physical Design, ISPD 2009, San Diego, California, USA, March 29 - April 1, 2009, pp. 91-98, 2009, ACM, 978-1-60558-449-2. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
fpga, timing optimization, physical synthesis |
44 | Chen Li 0004, Min Xie 0004, Cheng-Kok Koh, Jason Cong, Patrick H. Madden |
Routability-Driven Placement and White Space Allocation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26(5), pp. 858-871, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
44 | Jason Cong, Min Xie 0004 |
A robust detailed placement for mixed-size IC designs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, Yokohama, Japan, January 24-27, 2006, pp. 188-194, 2006, IEEE, 0-7803-9451-8. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
44 | Haoxing Ren, David Zhigang Pan, Paul Villarrubia |
True crosstalk aware incremental placement with noise map. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: 2004 International Conference on Computer-Aided Design, ICCAD 2004, San Jose, CA, USA, November 7-11, 2004, pp. 402-409, 2004, IEEE Computer Society / ACM, 0-7803-8702-3. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
44 | Benjamin Watson 0001, Neff Walker, Peter Woytiuk, William Ribarsky |
Maintaining Usability During 3D Placement Despite Delay. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VR ![In: IEEE Virtual Reality Conference 2003 (VR 2003), 22-26 March 2003, Los Angeles, CA, USA, Proceedings, pp. 133-140, 2003, IEEE Computer Society, 0-7695-1882-6. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
44 | Xiaoping Tang, D. F. Wong 0001 |
FAST-SP: a fast algorithm for block placement based on sequence pair. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of ASP-DAC 2001, Asia and South Pacific Design Automation Conference 2001, January 30-February 2, 2001, Yokohama, Japan, pp. 521-526, 2001, ACM, 0-7803-6634-4. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
44 | Charles J. Alpert, Tony F. Chan, Dennis J.-H. Huang, Igor L. Markov, Kenneth Yan |
Quadratic Placement Revisited. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 34st Conference on Design Automation, Anaheim, California, USA, Anaheim Convention Center, June 9-13, 1997., pp. 752-757, 1997, ACM Press, 0-89791-920-3. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
44 | David K. Lowenthal, Gregory R. Andrews |
An Adaptive Approach to Data Placement. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPPS ![In: Proceedings of IPPS '96, The 10th International Parallel Processing Symposium, April 15-19, 1996, Honolulu, Hawaii, USA, pp. 349-353, 1996, IEEE Computer Society, 0-8186-7255-2. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
|
44 | Michael D. Osterman, Michael G. Pecht |
Placement for reliability and routability of convectively cooled PWBs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 9(7), pp. 734-744, 1990. The full citation details ...](Pics/full.jpeg) |
1990 |
DBLP DOI BibTeX RDF |
|
42 | Franz-Josef Brandenburg |
On the Complexity of Optimal Drawings of Graphs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
WG ![In: Graph-Theoretic Concepts in Computer Science, 15th International Workshop, WG '89, Castle Rolduc, The Netherlands, June 14-16, 1989, Proceedings, pp. 166-180, 1989, Springer, 3-540-52292-1. The full citation details ...](Pics/full.jpeg) |
1989 |
DBLP DOI BibTeX RDF |
placement graph grammars, NP-completeness, embeddings, graph grammars, graph layout |
42 | Andrew B. Kahng |
How to get real mad. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPD ![In: Proceedings of the 2008 International Symposium on Physical Design, ISPD 2008, Portland, Oregon, USA, April 13-16, 2008, pp. 69, 2008, ACM, 978-1-60558-048-7. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
design-aware manufacturing, integrated circuit physical design, manufacturing-aware design, performance analysis, design for manufacturability |
42 | Jarrod A. Roy, Saurabh N. Adya, David A. Papa, Igor L. Markov |
Min-cut floorplacement. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(7), pp. 1313-1326, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
42 | Steve McKeever, Wayne Luk |
Provably-correct hardware compilation tools based on pass separation techniques. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Formal Aspects Comput. ![In: Formal Aspects Comput. 18(2), pp. 120-142, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
41 | Ashutosh Chakraborty, Anurag Kumar 0002, David Z. Pan |
RegPlace: a high quality open-source placement framework for structured ASICs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 46th Design Automation Conference, DAC 2009, San Francisco, CA, USA, July 26-31, 2009, pp. 442-447, 2009, ACM, 978-1-60558-497-3. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
global placement, regular ASIC, FPGA, placement, legalization, structured ASIC |
41 | Sherief Reda, Amit Chowdhary |
Effective linear programming based placement methods. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPD ![In: Proceedings of the 2006 International Symposium on Physical Design, ISPD 2006, San Jose, California, USA, April 9-12, 2006, pp. 186-191, 2006, ACM, 1-59593-299-2. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
relative placement, whitespace management, linear programming, timing-driven placement |
41 | Ulrich Brenner, Markus Struzyna |
Faster and better global placement by a new transportation algorithm. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 42nd Design Automation Conference, DAC 2005, San Diego, CA, USA, June 13-17, 2005, pp. 591-596, 2005, ACM, 1-59593-058-2. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
VLSI-placement, global placement, transportation problem |
41 | Ali Ahmadinia, Christophe Bobda, Sándor P. Fekete, Jürgen Teich, Jan van der Veen |
Optimal Routing-Conscious Dynamic Placement for Reconfigurable Devices. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: Field Programmable Logic and Application, 14th International Conference , FPL 2004, Leuven, Belgium, August 30-September 1, 2004, Proceedings, pp. 847-851, 2004, Springer, 3-540-22989-2. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
field-programable gate array (FPGA), occupied space manager (OSM), routing-conscious placement, Manhattan metric, line sweep technique, optimal running time, lower bounds, Reconfigurable computing, module placement |
41 | Bernd Obermeier, Frank M. Johannes |
Quadratic placement using an improved timing model. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 41th Design Automation Conference, DAC 2004, San Diego, CA, USA, June 7-11, 2004, pp. 705-710, 2004, ACM, 1-58113-828-8. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
Steiner tree net model, optimization potential, sensitivity, Quadratic placement, timing driven placement |
41 | Karthik Rajagopal, Tal Shaked, Yegna Parasuram, Tung Cao, Amit Chowdhary, Bill Halpin |
Timing driven force directed placement with physical net constraints. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPD ![In: Proceedings of the 2003 International Symposium on Physical Design, ISPD 2003, Monterey, CA, USA, April 6-9, 2003, pp. 60-66, 2003, ACM, 1-58113-650-1. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
net constraints, timing driven placement, force directed placement |
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