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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 705 occurrences of 454 keywords
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Results
Found 5578 publication records. Showing 5578 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
151 | Sylvain Lombardy |
On the Construction of Reversible Automata for Reversible Languages. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICALP ![In: Automata, Languages and Programming, 29th International Colloquium, ICALP 2002, Malaga, Spain, July 8-13, 2002, Proceedings, pp. 170-182, 2002, Springer, 3-540-43864-5. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
reversible languages, reversible automata, universal automata, Finite automata |
105 | Tetsuo Yokoyama, Holger Bock Axelsen, Robert Glück |
Reversible Flowchart Languages and the Structured Reversible Program Theorem. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICALP (2) ![In: Automata, Languages and Programming, 35th International Colloquium, ICALP 2008, Reykjavik, Iceland, July 7-11, 2008, Proceedings, Part II - Track B: Logic, Semantics, and Theory of Programming & Track C: Security and Cryptography Foundations, pp. 258-270, 2008, Springer, 978-3-540-70582-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
105 | Himanshu Thapliyal, A. Prasad Vinod 0001 |
Designing Efficient Online Testable Reversible Adders With New Reversible Gate. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2007), 27-20 May 2007, New Orleans, Louisiana, USA, pp. 1085-1088, 2007, IEEE, 1-4244-0920-9. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
105 | Himanshu Thapliyal, A. Prasad Vinod 0001 |
Transistor Realization of Reversible TSG Gate and Reversible Adder Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
APCCAS ![In: IEEE Asia Pacific Conference on Circuits and Systems 2006, APCCAS 2006, Singapore, 4-7 December 2006, pp. 418-421, 2006, IEEE, 1-4244-0387-1. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
90 | Michael P. Frank |
Introduction to reversible computing: motivation, progress, and challenges. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Conf. Computing Frontiers ![In: Proceedings of the Second Conference on Computing Frontiers, 2005, Ischia, Italy, May 4-6, 2005, pp. 385-390, 2005, ACM, 1-59593-019-1. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
digital logic technologies, field-effect devices, limits of computing, VLSI, high-performance computing, computer architecture, power management, reversible computing, reversible logic, unconventional computing, low-power computing |
87 | Jae-Jin Lee, Dong-Guk Hwang, Gi-Yong Song |
Design of a Reversible PLD Architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ARC ![In: Reconfigurable Computing: Architectures, Tools and Applications, Third International Workshop, ARC 2007, Mangaratiba, Brazil, March 27-29, 2007., pp. 85-90, 2007, Springer, 978-3-540-71430-9. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
85 | Avik Chakraborty |
Synthesis of Reversible Circuits for Testing with Universal Test Set and C-Testability of Reversible Iterative Logic Arrays. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 18th International Conference on VLSI Design (VLSI Design 2005), with the 4th International Conference on Embedded Systems Design, 3-7 January 2005, Kolkata, India, pp. 249-254, 2005, IEEE Computer Society, 0-7695-2264-5. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
Fault models, Testability, Design for test, Iterative logic arrays, Universal test sets, Reversible circuits |
84 | Xiaojun Ma, Jing Huang 0001, Cecilia Metra, Fabrizio Lombardi |
Reversible Gates and Testability of One Dimensional Arrays of Molecular QCA. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 24(1-3), pp. 297-311, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Testing, Emerging technologies, Reversible computing, QCA |
78 | Pallav Gupta, Abhinav Agrawal 0002, Niraj K. Jha |
An Algorithm for Synthesis of Reversible Logic Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(11), pp. 2317-2330, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
76 | Jean Christoph Jung, Stefan Frehse, Robert Wille, Rolf Drechsler |
Enhancing debugging of multiple missing control errors in reversible logic. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 20th ACM Great Lakes Symposium on VLSI 2009, Providence, Rhode Island, USA, May 16-18 2010, pp. 465-470, 2010, ACM, 978-1-4503-0012-4. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
boolean satisfiablity (SAT), debugging, reversible logic |
76 | Min-Lun Chuang, Chun-Yao Wang |
Synthesis of reversible sequential elements. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM J. Emerg. Technol. Comput. Syst. ![In: ACM J. Emerg. Technol. Comput. Syst. 3(4), pp. 4:1-4:19, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
sequential elements, sequential circuits, Reversible logic |
76 | Tetsuo Yokoyama, Holger Bock Axelsen, Robert Glück |
Principles of a reversible programming language. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Conf. Computing Frontiers ![In: Proceedings of the 5th Conference on Computing Frontiers, 2008, Ischia, Italy, May 5-7, 2008, pp. 43-54, 2008, ACM, 978-1-60558-077-7. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
backward determinism, inverse semantics, fast fourier transform, reversible computing, turing completeness |
76 | Xiaojun Ma, Jing Huang 0001, Cecilia Metra, Fabrizio Lombardi |
Testing Reversible 1D Arrays for Molecular QCA. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 21th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2006), 4-6 October 2006, Arlington, Virginia, USA, pp. 71-79, 2006, IEEE Computer Society, 0-7695-2706-X. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
emerging technologies, Reversible computing, QCA |
76 | Erik DeBenedictis |
Reversible logic for supercomputing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Conf. Computing Frontiers ![In: Proceedings of the Second Conference on Computing Frontiers, 2005, Ischia, Italy, May 4-6, 2005, pp. 391-402, 2005, ACM, 1-59593-019-1. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
climate change global warming, computer architecture, supercomputing, reversible logic, quantum dot cellular automata, applications modeling |
73 | Tetsuo Yokoyama, Robert Glück |
A reversible programming language and its invertible self-interpreter. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PEPM ![In: Proceedings of the 2007 ACM SIGPLAN Workshop on Partial Evaluation and Semantics-based Program Manipulation, 2007, Nice, France, January 15-16, 2007, pp. 144-153, 2007, ACM, 978-1-59593-620-2. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
Janus, non-standard interpreter hierarchy, reversible programming language, self-interpreter, reversible computing, program inversion |
71 | Hui Li, Zhijin Guan, Shanli Chen, Yuxin Chen |
The Reversible Network Cascade Based on Reversible Logic Gate Coding Method. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IAS ![In: Proceedings of the Fifth International Conference on Information Assurance and Security, IAS 2009, Xi'An, China, 18-20 August 2009, pp. 213-216, 2009, IEEE Computer Society, 978-0-7695-3744-3. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
71 | Himanshu Thapliyal, M. B. Srinivas |
A Novel Reversible TSG Gate and Its Application for Designing Reversible Carry Look-Ahead and Other Adder Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asia-Pacific Computer Systems Architecture Conference ![In: Advances in Computer Systems Architecture, 10th Asia-Pacific Conference, ACSAC 2005, Singapore, October 24-26, 2005, Proceedings, pp. 805-817, 2005, Springer, 3-540-29643-3. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
69 | Jarkko Kari |
Structure of Reversible Cellular Automata. ![Search on Bibsonomy](Pics/bibsonomy.png) |
UC ![In: Unconventional Computation, 8th International Conference, UC 2009, Ponta Delgada, Azores, Portugal, September 7-11, 2009. Proceedings, pp. 6, 2009, Springer, 978-3-642-03744-3. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
69 | Holger Bock Axelsen, Robert Glück, Tetsuo Yokoyama |
Reversible Machine Code and Its Abstract Processor Architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CSR ![In: Computer Science - Theory and Applications, Second International Symposium on Computer Science in Russia, CSR 2007, Ekaterinburg, Russia, September 3-7, 2007, Proceedings, pp. 56-69, 2007, Springer, 978-3-540-74509-9. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
69 | Himanshu Thapliyal, A. Prasad Vinod 0001 |
Design of Reversible Sequential Elements With Feasibility of Transistor Implementation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2007), 27-20 May 2007, New Orleans, Louisiana, USA, pp. 625-628, 2007, IEEE, 1-4244-0920-9. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
69 | Himanshu Thapliyal, Saurabh Kotiyal, M. B. Srinivas |
Novel BCD Adders and Their Reversible Logic Implementation for IEEE 754r Format. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 19th International Conference on VLSI Design (VLSI Design 2006), 3-7 January 2006, Hyderabad, India, pp. 387-392, 2006, IEEE Computer Society, 0-7695-2502-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
69 | Jin Li |
Low noise reversible MDCT (RMDCT) and its application in progressive-to-lossless embedded audio coding. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Signal Process. ![In: IEEE Trans. Signal Process. 53(5), pp. 1870-1880, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
67 | Oleg Golubitsky, Sean M. Falconer, Dmitri Maslov |
Synthesis of the optimal 4-bit reversible circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 47th Design Automation Conference, DAC 2010, Anaheim, California, USA, July 13-18, 2010, pp. 653-656, 2010, ACM, 978-1-4503-0002-5. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
quantum computing, logic synthesis, reversible circuits |
67 | Wen-Chung Kuo, Dong-Jin Jiang, Yu-Chih Huang |
Reversible Data Hiding Based on Histogram. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICIC (2) ![In: Advanced Intelligent Computing Theories and Applications. With Aspects of Artificial Intelligence, Third International Conference on Intelligent Computing, ICIC 2007, Qingdao, China, August 21-24, 2007, Proceedings, pp. 1152-1161, 2007, Springer, 978-3-540-74201-2. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
Histogram, Reversible data hide |
67 | Yongjian Hu, Byeungwoo Jeon, Zhiquan Lin, Hui Yang |
Analysis and Comparison of Typical Reversible Watermarking Methods. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IWDW ![In: Digital Watermarking, 5th International Workshop, IWDW 2006, Jeju Island, Korea, November 8-10, 2006, Proceedings, pp. 333-347, 2006, Springer, 3-540-48825-1. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
lossless watermark, data compression, data hiding, reversible watermarking |
65 | Ming Li 0001, Paul M. B. Vitányi |
Reversible Simulation of Irreversible Computation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CCC ![In: Proceedings of the Eleveth Annual IEEE Conference on Computational Complexity, Philadelphia, Pennsylvania, USA, May 24-27, 1996, pp. 301-306, 1996, IEEE Computer Society, 0-8186-7386-9. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
Irreversible computation, Computational energy dissipation, Reversible simulation, Storage space versus Energy Tradeoffs, Reversible computation |
63 | Daniel B. Miller, Edward Fredkin |
Two-state, reversible, universal cellular automata in three dimensions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Conf. Computing Frontiers ![In: Proceedings of the Second Conference on Computing Frontiers, 2005, Ischia, Italy, May 4-6, 2005, pp. 45-51, 2005, ACM, 1-59593-019-1. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
billiard ball model, nanoscale computing, nanotech, cellular automata, reversible computation, reversible computing, reversible logic, massively parallel, adiabatic computing |
61 | Yexin Zheng, Chao Huang |
A novel Toffoli network synthesis algorithm for reversible logic. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 14th Asia South Pacific Design Automation Conference, ASP-DAC 2009, Yokohama, Japan, January 19-22, 2009, pp. 739-744, 2009, IEEE, 978-1-4244-2748-2. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
61 | Xiaoyu Song, Guowu Yang, Marek A. Perkowski, Yuke Wang |
Algebraic Characterization of Reversible Logic Gates. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Theory Comput. Syst. ![In: Theory Comput. Syst. 39(2), pp. 311-319, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
61 | D. Michael Miller, Gerhard W. Dueck, Dmitri Maslov |
A Synthesis Method for MVL Reversible Logi. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISMVL ![In: 34th IEEE International Symposium on Multiple-Valued Logic (ISMVL 2004), 19-22 May 2004, Toronto, Canada, pp. 74-80, 2004, IEEE Computer Society, 0-7695-2130-4. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
61 | Pawel Kerntopf |
Synthesis of Multipurpose Reversible Logic Gates. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DSD ![In: 2002 Euromicro Symposium on Digital Systems Design (DSD 2002), Systems-on-Chip, 4-6 September 2002, Dortmund, Germany, pp. 259-267, 2002, IEEE Computer Society, 0-7695-1790-0. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
61 | Kenichi Morita |
A Simple Universal Logic Element and Cellular Automata for Reversible Computing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MCU ![In: Machines, Computations, and Universality, Third International Conference, MCU 2001, Chisinau, Moldova, May 23-27, 2001, Proceedings, pp. 102-113, 2001, Springer, 3-540-42121-1. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
60 | Robert Wille, Daniel Große, Lisa Teuber, Gerhard W. Dueck, Rolf Drechsler |
RevLib: An Online Resource for Reversible Functions and Reversible Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISMVL ![In: 38th IEEE International Symposium on Multiple-Valued Logic (ISMVL 2008), 22-23 May 2008, Dallas, Texas, USA, pp. 220-225, 2008, IEEE Computer Society, 978-0-7695-3155-7. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Benchmarks, Synthesis, Reversible Logic |
59 | Xiaojun Ma, Jing Huang 0001, Cecilia Metra, Fabrizio Lombardi |
Detecting Multiple Faults in One-Dimensional Arrays of Reversible QCA Gates. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 25(1), pp. 39-54, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
Array testing, Nanotechnology, Emerging technology, Reversible computing, QCA |
59 | Himanshu Thapliyal, Hamid R. Arabnia, M. B. Srinivas |
Efficient Reversible Logic Design of BCD Subtractors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Trans. Comput. Sci. ![In: Transactions on Computational Science III, pp. 99-121, 2009, Springer, 978-3-642-00211-3. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
BCD subtractors, BCD adders, Reversible logic |
59 | Robert Wille, Rolf Drechsler |
BDD-based synthesis of reversible logic for large functions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 46th Design Automation Conference, DAC 2009, San Francisco, CA, USA, July 26-31, 2009, pp. 270-275, 2009, ACM, 978-1-60558-497-3. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
synthesis, decision diagrams, reversible logic, quantum logic |
59 | Michael Kirkedal Thomsen, Holger Bock Axelsen |
Parallel Optimization of a Reversible (Quantum) Ripple-Carry Adder. ![Search on Bibsonomy](Pics/bibsonomy.png) |
UC ![In: Unconventional Computing, 7th International Conference, UC 2008, Vienna, Austria, August 25-28, 2008. Proceedings, pp. 228-241, 2008, Springer, 978-3-540-85193-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
quantum computing, adders, circuits, Reversible computing |
59 | Hafizur Rahaman 0001, Dipak Kumar Kole, Debesh Kumar Das, Bhargab B. Bhattacharya |
On the Detection of Missing-Gate Faults in Reversible Circuits by a Universal Test Set. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 21st International Conference on VLSI Design (VLSI Design 2008), 4-8 January 2008, Hyderabad, India, pp. 163-168, 2008, IEEE Computer Society, 0-7695-3083-4. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Missing-gate faults, quantum computing, reversible logic, testable design, universal test set |
59 | Michael Voigt, Bian Yang, Christoph Busch 0001 |
Reversible watermarking of 2D-vector data. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MM&Sec ![In: Proceedings of the 6th workshop on Multimedia & Security, MM&Sec 2004, Magdeburg, Germany, September 20-21, 2004, pp. 160-165, 2004, ACM, 1-58113-854-7. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
DCT, vector data, reversible watermarking |
59 | Pawel Kerntopf |
A new heuristic algorithm for reversible logic synthesis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 41th Design Automation Conference, DAC 2004, San Diego, CA, USA, June 7-11, 2004, pp. 834-837, 2004, ACM, 1-58113-828-8. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
reversible logic circuits, synthesis |
54 | Zeljko Zilic, Katarzyna Radecka, Ali Kazamiphur |
Reversible circuit technology mapping from non-reversible specifications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2007 Design, Automation and Test in Europe Conference and Exposition, DATE 2007, Nice, France, April 16-20, 2007, pp. 558-563, 2007, EDA Consortium, San Jose, CA, USA, 978-3-9810801-2-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
52 | Jarkko Kari, Nicolas Ollinger |
Periodicity and Immortality in Reversible Computing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MFCS ![In: Mathematical Foundations of Computer Science 2008, 33rd International Symposium, MFCS 2008, Torun, Poland, August 25-29, 2008, Proceedings, pp. 419-430, 2008, Springer, 978-3-540-85237-7. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
52 | Mozammel H. A. Khan |
Reversible Realization of Quaternary Decoder, Multiplexer, and Demultiplexer Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISMVL ![In: 38th IEEE International Symposium on Multiple-Valued Logic (ISMVL 2008), 22-23 May 2008, Dallas, Texas, USA, pp. 208-213, 2008, IEEE Computer Society, 978-0-7695-3155-7. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
52 | José M. Sempere |
Learning Reversible Languages with Terminal Distinguishability. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICGI ![In: Grammatical Inference: Algorithms and Applications, 8th International Colloquium, ICGI 2006, Tokyo, Japan, September 20-22, 2006, Proceedings, pp. 354-355, 2006, Springer, 3-540-45264-8. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
52 | HyeRan Lee, KyungHyun Rhee |
Reversible Data Embedding for Tamper-Proof Watermarks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICICIC (3) ![In: First International Conference on Innovative Computing, Information and Control (ICICIC 2006), 30 August - 1 September 2006, Beijing, China, pp. 487-490, 2006, IEEE Computer Society, 0-7695-2616-0. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
52 | Xiaoyun Wu, Xiaoping Liang, Hongmei Liu 0001, Jiwu Huang, Guoping Qiu |
Reversible Semi-fragile Image Authentication Using Zernike Moments and Integer Wavelet Transform. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DRMTICS ![In: Digital Rights Management: Technologies, Issues, Challenges and Systems, First International Conference, DRMTICS 2005, Sydney, Australia, October 31 - November 2, 2005, Revised Selected Papers, pp. 135-145, 2005, Springer, 3-540-35998-2. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
52 | Dmitri Maslov, Gerhard W. Dueck |
Reversible cascades with minimal garbage. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 23(11), pp. 1497-1509, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
52 | Abhinav Agrawal 0002, Niraj K. Jha |
Synthesis of Reversible Logic. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2004 Design, Automation and Test in Europe Conference and Exposition (DATE 2004), 16-20 February 2004, Paris, France, pp. 1384-1385, 2004, IEEE Computer Society, 0-7695-2085-5. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
52 | Hafiz Md. Hasan Babu, Md. Rafiqul Islam 0001, Ahsan Raja Chowdhury, Syed Mostahed Ali Chowdhury |
Reversible Logic Synthesis for Minimization of Full-Adder Circuit. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DSD ![In: 2003 Euromicro Symposium on Digital Systems Design (DSD 2003), Architectures, Methods and Tools, 3-5 September 2003, Belek-Antalya, Turkey, pp. 50-54, 2003, IEEE Computer Society, 0-7695-2003-0. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
52 | Andrzej Buller, Marek A. Perkowski |
Evolved Reversible Cascades Realized on the CAM-Brain Machine. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Evolvable Hardware ![In: 5th NASA / DoD Workshop on Evolvable Hardware (EH 2003), 9-11 July 2002, Chicago, IL, USA, pp. 256-264, 2003, IEEE Computer Society, 0-7695-1977-6. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
52 | Richard Královic |
Time and Space Complexity of Reversible Pebbling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SOFSEM ![In: SOFSEM 2001: Theory and Practice of Informatics, 28th Conference on Current Trends in Theory and Practice of Informatics Piestany, Slovak Republic, November 24 - December 1, 2001, Proceedings, pp. 292-303, 2001, Springer, 3-540-42912-3. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
52 | Artur Przelaskowski |
Lifting-Based Reversible Transforms for Lossy-to-Lossless Wavelet Codecs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CAIP ![In: Computer Analysis of Images and Patterns, 9th International Conference, CAIP 2001 Warsaw, Poland, September 5-7, 2001, Proceedings, pp. 61-70, 2001, Springer, 3-540-42513-6. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
integer-to-integer transform, lifting scheme, wavelet coding |
50 | Jiaoyan Chen, Dilip P. Vasudevan, Emanuel M. Popovici, Michel P. Schellekens |
Reversible online BIST using bidirectional BILBO. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Conf. Computing Frontiers ![In: Proceedings of the 7th Conference on Computing Frontiers, 2010, Bertinoro, Italy, May 17-19, 2010, pp. 257-266, 2010, ACM, 978-1-4503-0044-5. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
bilbo, bist, testing, reversible logic |
50 | Robert Wille, Mathias Soeken, Rolf Drechsler |
Reducing the number of lines in reversible circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 47th Design Automation Conference, DAC 2010, Anaheim, California, USA, July 13-18, 2010, pp. 647-652, 2010, ACM, 978-1-4503-0002-5. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
optimization, quantum computation, reversible logic |
50 | Michal Kukiela |
Reversible and Bijectively Related Posets. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Order ![In: Order 26(2), pp. 119-124, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
Order-preserving bijection, Order isomorphism, Reversible poset, Bijectively related posets |
50 | James Donald, Niraj K. Jha |
Reversible logic synthesis with Fredkin and Peres gates. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM J. Emerg. Technol. Comput. Syst. ![In: ACM J. Emerg. Technol. Comput. Syst. 4(1), pp. 2:1-2:19, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Quantum computing, reversible logic |
50 | Kyung-Su Kim 0001, Min-Jeong Lee, Heung-Kyu Lee, Young-Ho Suh |
Histogram-based reversible data hiding technique using subsampling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MM&Sec ![In: Proceedings of the 10th workshop on Multimedia & Security, MM&Sec 2008, Oxford, UK, September 22-23, 2008, pp. 69-74, 2008, ACM, 978-1-60558-058-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
histogram modification, watermarking, subsampling, reversible data hiding, contents authentication |
50 | Daniel Große, Robert Wille, Gerhard W. Dueck, Rolf Drechsler |
Exact Synthesis of Elementary Quantum Gate Circuits for Reversible Functions with Don't Cares. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISMVL ![In: 38th IEEE International Symposium on Multiple-Valued Logic (ISMVL 2008), 22-23 May 2008, Dallas, Texas, USA, pp. 214-219, 2008, IEEE Computer Society, 978-0-7695-3155-7. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Synthesis, Boolean Satisfiability, Reversible Logic |
50 | Dmitri Maslov, Gerhard W. Dueck, D. Michael Miller |
Techniques for the synthesis of reversible Toffoli networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Design Autom. Electr. Syst. ![In: ACM Trans. Design Autom. Electr. Syst. 12(4), pp. 42, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
reversible logic synthesis, quantum computing, circuit optimization |
50 | Chung-Chuan Wang, Chin-Chen Chang 0001, Xinpeng Zhang 0001, Jinn-ke Jan |
Senary Huffman Compression - A Reversible Data Hiding Scheme for Binary Images. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MCAM ![In: Multimedia Content Analysis and Mining, International Workshop, MCAM 2007, Weihai, China, June 30 - July 1, 2007, Proceedings, pp. 351-360, 2007, Springer. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
visual perception, PSNR, reversible data hiding |
50 | Bian Yang, Martin Schmucker, Christoph Busch 0001, Xiamu Niu, Sheng-He Sun |
Approaching optimal value expansion for reversible watermarking. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MM&Sec ![In: Proceedings of the 7th workshop on Multimedia & Security, MM&Sec 2005, New York, NY, USA, August 1-2, 2005, 2006, pp. 95-102, 2005, ACM, 1-59593-032-9. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
histogram expansion, value expansion, reversible watermarking |
50 | Na Li, Jiajun Bu, Chun Chen 0001 |
A reversible color transform for 16-bit-color picture coding. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Multimedia ![In: Proceedings of the 12th ACM International Conference on Multimedia, New York, NY, USA, October 10-16, 2004, pp. 344-347, 2004, ACM, 1-58113-893-8. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
16-bit color, hicolor image, low-end, picture coding, reversible color transform, coding efficiency |
50 | D. Michael Miller, Dmitri Maslov, Gerhard W. Dueck |
A transformation based algorithm for reversible logic synthesis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 40th Design Automation Conference, DAC 2003, Anaheim, CA, USA, June 2-6, 2003, pp. 318-323, 2003, ACM, 1-58113-688-9. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
templates, minimization, reversible logic, quantum circuits |
50 | Shyh-Kwei Chen, W. Kent Fuchs, Jen-Yao Chung |
Reversible Debugging Using Program Instrumentation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Software Eng. ![In: IEEE Trans. Software Eng. 27(8), pp. 715-727, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
reversible execution, compilers, program instrumentation, Debuggers, assembly language |
50 | Klaus-Jörn Lange, Pierre McKenzie, Alain Tapp |
Reversible Space Equals Deterministic Space. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CCC ![In: Proceedings of the Twelfth Annual IEEE Conference on Computational Complexity, Ulm, Germany, June 24-27, 1997, pp. 45-50, 1997, IEEE Computer Society, 0-8186-7907-7. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
determinism, reversible computation, Complexity classes, space bounds |
49 | Daniel Große, Xiaobo Chen, Gerhard W. Dueck, Rolf Drechsler |
Exact sat-based toffoli network synthesis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 17th ACM Great Lakes Symposium on VLSI 2007, Stresa, Lago Maggiore, Italy, March 11-13, 2007, pp. 96-101, 2007, ACM, 978-1-59593-605-9. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
synthesis, minimization, boolean satisfiability, reversible logic, quantum circuits |
49 | Marek A. Perkowski, Nouraddin Alhagi, Martin Lukac, Neha Saxena, Scott Blakely |
Synthesis of Small Reversible and Pseudo-Reversible Circuits Using Y-Gates and Inverse Y-Gates. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISMVL ![In: 40th IEEE International Symposium on Multiple-Valued Logic, ISMVL 2010, Barcelona, Spain, 26-28 May 2010, pp. 245-251, 2010, IEEE Computer Society, 978-0-7695-4024-5. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
pseudo-reversible logic gates, reversible circuits |
48 | Paul M. B. Vitányi |
Time, space, and energy in reversible computing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Conf. Computing Frontiers ![In: Proceedings of the Second Conference on Computing Frontiers, 2005, Ischia, Italy, May 4-6, 2005, pp. 435-444, 2005, ACM, 1-59593-019-1. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
energy dissipation complexity, low-energy computing, reversible simulation, computational complexity, time complexity, space complexity, reversible computing, tradeoffs, adiabatic computing |
45 | Hafiz Md. Hasan Babu, Ahsan Raja Chowdhury |
Design of a Reversible Binary Coded Decimal Adder by Using Reversible 4-Bit Parallel Adder. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 18th International Conference on VLSI Design (VLSI Design 2005), with the 4th International Conference on Embedded Systems Design, 3-7 January 2005, Kolkata, India, pp. 255-260, 2005, IEEE Computer Society, 0-7695-2264-5. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
45 | Hugo de Garis, Jonathan Dinerstein, Ravichandra Sriram |
Reversible Evolvable Networks: A Reversible Evolvable Boolean Network Architecture and Methodology to Overcome the Heat Generation Problem in Molecular Scale Brain Building. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Evolvable Hardware ![In: 4th NASA / DoD Workshop on Evolvable Hardware (EH 2002), 15-18 July 2002, Alexandria, VA, USA, pp. 274-275, 2002, IEEE Computer Society, 0-7695-1718-8. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
44 | Pengwei Hao |
Reversible Resampling of Integer Signals. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Signal Process. ![In: IEEE Trans. Signal Process. 57(2), pp. 516-525, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
44 | Min-Lun Chuang, Chun-Yao Wang |
Synthesis of Reversible Sequential Elements. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 12th Conference on Asia South Pacific Design Automation, ASP-DAC 2007, Yokohama, Japan, January 23-26, 2007, pp. 420-425, 2007, IEEE Computer Society, 1-4244-0629-3. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
44 | Wenqian Li, Hanwu Chen, Zhiqiang Li 0001 |
Application of Semi-Template in Reversible Logic Circuit. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CSCWD ![In: Proceedings of the 11th International Conference on Computer Supported Cooperative Work in Design, CSCWD 2007, April 26-28, 2007, Melbourne, Australia, pp. 332-336, 2007, IEEE. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
44 | Martin Kutrib, Andreas Malcher |
Real-Time Reversible Iterative Arrays. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FCT ![In: Fundamentals of Computation Theory, 16th International Symposium, FCT 2007, Budapest, Hungary, August 27-30, 2007, Proceedings, pp. 376-387, 2007, Springer, 978-3-540-74239-5. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
44 | Zhicheng Ni, Yun-Qing Shi 0001, Nirwan Ansari, Wei Su 0001 |
Reversible data hiding. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. Video Technol. ![In: IEEE Trans. Circuits Syst. Video Technol. 16(3), pp. 354-362, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
44 | Bill Stoddart, Frank Zeyda, Robert Lynas |
A Design-Based Model of Reversible Computation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
UTP ![In: Unifying Theories of Programming, First International Symposium, UTP 2006, Walworth Castle, County Durham, UK, February 5-7, 2006, Revised Selected Papers, pp. 63-83, 2006, Springer, 3-540-34750-X. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
44 | Himanshu Thapliyal, M. B. Srinivas |
The New BCD Subtractor and Its Reversible Logic Implementation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asia-Pacific Computer Systems Architecture Conference ![In: Advances in Computer Systems Architecture, 11th Asia-Pacific Conference, ACSAC 2006, Shanghai, China, September 6-8, 2006, Proceedings, pp. 466-472, 2006, Springer, 3-540-40056-7. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
44 | Jacqueline E. Rice |
A new look at reversible memory elements. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2006), 21-24 May 2006, Island of Kos, Greece, 2006, IEEE, 0-7803-9389-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
44 | Guowu Yang, Xiaoyu Song, William N. N. Hung, Marek A. Perkowski |
Fast synthesis of exact minimal reversible circuits using group theory. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 2005 Conference on Asia South Pacific Design Automation, ASP-DAC 2005, Shanghai, China, January 18-21, 2005, pp. 1002-1005, 2005, ACM Press, 0-7803-8737-6. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
44 | Mihai Oltean |
Evolving Reversible Circuits for the Even-Parity Problem. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EvoWorkshops ![In: Applications of Evolutionary Computing, EvoWorkshops 2005: EvoBIO, EvoCOMNET, EvoHOT, EvoIASP, EvoMUSART, and EvoSTOC, Lausanne, Switzerland, March 30 - April 1, 2005, Proceedings, pp. 225-234, 2005, Springer, 3-540-25396-3. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
44 | Ya Bing Chen, Tok Wang Ling, Mong-Li Lee |
Maintaining Semantics in the Design of Valid and Reversible SemiStructured Views. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DASFAA ![In: Database Systems for Advanced Applications, 10th International Conference, DASFAA 2005, Beijing, China, April 17-20, 2005, Proceedings, pp. 773-778, 2005, Springer, 3-540-25334-3. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
44 | Alberto Leporati, Claudio Zandron, Giancarlo Mauri |
Universal Families of Reversible P Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MCU ![In: Machines, Computations, and Universality, 4th International Conference, MCU 2004, Saint Petersburg, Russia, September 21-24, 2004, Revised Selected Papers, pp. 257-268, 2004, Springer, 3-540-25261-4. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
44 | Hafiz Md. Hasan Babu, Md. Rafiqul Islam 0001, Syed Mostahed Ali Chowdhury, Ahsan Raja Chowdhury |
Synthesis of Full-Adder Circuit Using Reversible Logic. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 17th International Conference on VLSI Design (VLSI Design 2004), with the 3rd International Conference on Embedded Systems Design, 5-9 January 2004, Mumbai, India, pp. 757-760, 2004, IEEE Computer Society, 0-7695-2072-3. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
44 | Jia Lee, Ferdinand Peper, Susumu Adachi, Kenichi Morita, Shinro Mashiko |
Reversible Computation in Asynchronous Cellular Automata. ![Search on Bibsonomy](Pics/bibsonomy.png) |
UMC ![In: Unconventional Models of Computation, Third International Conference, UMC 2002, Kobe, Japan, October 15-19, 2002, Proceedings, pp. 220-229, 2002, Springer, 3-540-44311-8. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
44 | Michael D. Adams 0002, Faouzi Kossentini |
Reversible integer-to-integer wavelet transforms for image compression: performance evaluation and analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Image Process. ![In: IEEE Trans. Image Process. 9(6), pp. 1010-1024, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
44 | Jean-Eric Pin |
On the Language Accepted by Finite Reversible Automata. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICALP ![In: Automata, Languages and Programming, 14th International Colloquium, ICALP87, Karlsruhe, Germany, July 13-17, 1987, Proceedings, pp. 237-249, 1987, Springer, 3-540-18088-5. The full citation details ...](Pics/full.jpeg) |
1987 |
DBLP DOI BibTeX RDF |
|
43 | André Vital Saúde |
New Higher-Resolution Discrete Euclidean Medial Axis in nD with Linear Time Parallel Algorithm. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SIBGRAPI ![In: SIBGRAPI 2008, Proceedings of the XXI Brazilian Symposium on Computer Graphics and Image Processing, Campo Grande, Brazil, 12-15 October 2008, pp. 212-219, 2008, IEEE Computer Society, 978-0-7695-3358-2. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
43 | Sridhar Srinivasan |
Modulo transforms - an alternative to lifting. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Signal Process. ![In: IEEE Trans. Signal Process. 54(5), pp. 1864-1874, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
42 | Yanan Fan, Gareth W. Peters, Scott A. Sisson |
Automating and evaluating reversible jump MCMC proposal distributions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Stat. Comput. ![In: Stat. Comput. 19(4), pp. 409-421, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
Between-model mappings, Path sampling, Transdimensional MCMC, Markov chain Monte Carlo, Density estimation, Reversible jump |
42 | Dong Wang, Hanwu Chen, Bo An 0008, Zhongming Yang |
A Novel RM-Based Algorithm for Reversible Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISICA ![In: Advances in Computation and Intelligence, 4th International Symposium, ISICA 2009, Huangshi, China, Ocotober 23-25, 2009, Proceedings, pp. 63-69, 2009, Springer, 978-3-642-04842-5. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
quantum reversible circuits, CNOT gate, Toffoli gate, Reed-Muller expansion |
42 | Zhijin Guan, Xiaolin Qin, Xinchun Cui |
Reversible Network Iterative Construct Method Based on the Cascade Operation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITNG ![In: Fifth International Conference on Information Technology: New Generations (ITNG 2008), 7-8 April 2008, Las Vegas, Nevada, USA, pp. 1202-1205, 2008, IEEE Computer Society, 978-0-7695-3099-4. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
reversible network, Boolean permutation, cascade |
42 | Cristina Tîrnauca, Timo Knuutila |
Polynomial Time Algorithms for Learning k -Reversible Languages and Pattern Languages with Correction Queries. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ALT ![In: Algorithmic Learning Theory, 18th International Conference, ALT 2007, Sendai, Japan, October 1-4, 2007, Proceedings, pp. 272-284, 2007, Springer, 978-3-540-75224-0. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
k-reversible languages, pattern languages, polynomial algorithms, Correction queries |
42 | Kenichi Morita, Yoshikazu Yamaguchi |
A Universal Reversible Turing Machine. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MCU ![In: Machines, Computations, and Universality, 5th International Conference, MCU 2007, Orléans, France, September 10-13, 2007, Proceedings, pp. 90-98, 2007, Springer, 978-3-540-74592-1. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
universal Turing machine, cyclic tag system, reversible computing |
42 | Sarah E. Murphy, Erik DeBenedictis, Peter M. Kogge |
General floorplan for reversible quantum-dot cellular automata. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Conf. Computing Frontiers ![In: Proceedings of the 4th Conference on Computing Frontiers, 2007, Ischia, Italy, May 7-9, 2007, pp. 77-82, 2007, ACM, 978-1-59593-683-7. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
reversible computing, quantum-dot cellular automata |
42 | Chin-Chen Chang 0001, Yi-Hui Chen, Yung-Chen Chou |
Reversible Data Embedding Technique for Palette Images Using De-clustering. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MCAM ![In: Multimedia Content Analysis and Mining, International Workshop, MCAM 2007, Weihai, China, June 30 - July 1, 2007, Proceedings, pp. 130-139, 2007, Springer. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
Color palette image, declustering reversible, steganography, data hiding |
42 | Sergio Hernandez-Marin, Andrew M. Wallace, Gavin J. Gibson |
Creating Multi-layered 3D Images Using Reversible Jump MCMC Algorithms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISVC (2) ![In: Advances in Visual Computing, Second International Symposium, ISVC 2006 Lake Tahoe, NV, USA, November 6-8, 2006. Proceedings, Part II, pp. 405-416, 2006, Springer. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
3D ranging and imaging, reversible jump Markov chain Monte Carlo, multi-layered image, time-correlated single photon counting, burst illumination laser, Markov random fields |
42 | Zhe-Ming Lu, Hao Luo 0001, Jeng-Shyang Pan 0001 |
Reversible Watermarking for Error Diffused Halftone Images Using Statistical Features. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IWDW ![In: Digital Watermarking, 5th International Workshop, IWDW 2006, Jeju Island, Korea, November 8-10, 2006, Proceedings, pp. 71-81, 2006, Springer, 3-540-48825-1. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
statistical features, reversible watermarking, halftone image |
42 | Guowu Yang, Xiaoyu Song, William N. N. Hung, Marek A. Perkowski |
Bi-Direction Synthesis for Reversible Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISVLSI ![In: 2005 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2005), New Frontiers in VLSI Design, 11-12 May 2005, Tampa, FL, USA, pp. 14-19, 2005, IEEE Computer Society, 0-7695-2365-X. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
Algorithm, Minimization, Reversible Logic, Quantum Circuits |
42 | Satoshi Nakamura |
Reversible display: content browsing with reverse operations in mobile computing environments. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Mobile HCI ![In: Proceedings of the 7th Conference on Human-Computer Interaction with Mobile Devices and Services, Mobile HCI 2005, 2005, Salzburg, Austria, September 19-22, 2005, pp. 339-340, 2005, ACM, 1-59593-089-2. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
double display, reverse operation, reversible display |
42 | Sabu Emmanuel, Chee Kiang Heng, Amitabha Das |
A Reversible Watermarking Scheme for JPEG-2000 Compressed Images. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICME ![In: Proceedings of the 2005 IEEE International Conference on Multimedia and Expo, ICME 2005, July 6-9, 2005, Amsterdam, The Netherlands, pp. 69-72, 2005, IEEE Computer Society, 0-7803-9331-7. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
Finite State Machine Based Watermarking, Image Authentication, JPEG-2000, Reversible Watermarking |
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