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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
Group by:
The graphs summarize 89 occurrences of 61 keywords
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Results
Found 542 publication records. Showing 542 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
90 | Zhenyu (Peter) Gu, Yonghong Yang, Jia Wang 0003, Robert P. Dick, Li Shang |
TAPHS: thermal-aware unified physical-level and high-level synthesis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, Yokohama, Japan, January 24-27, 2006, pp. 879-885, 2006, IEEE, 0-7803-9451-8. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
80 | Chee How Lim, W. Robert Daasch, George Cai |
A Thermal-Aware Superscalar Microprocessor (invited). ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 3rd International Symposium on Quality of Electronic Design, ISQED 2002, San Jose, CA, USA, March 18-21, 2002, pp. 517-522, 2002, IEEE Computer Society, 0-7695-1561-4. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
79 | Jing Li, Hiroshi Miyashita |
Efficient Thermal Via Planning for Placement of 3D Integrated Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2007), 27-20 May 2007, New Orleans, Louisiana, USA, pp. 145-148, 2007, IEEE, 1-4244-0920-9. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
76 | Haixia Yan, Qiang Zhou 0001, Xianlong Hong |
Efficient Thermal Aware Placement Approach Integrated with 3D DCT Placement Algorithm. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 9th International Symposium on Quality of Electronic Design (ISQED 2008), 17-19 March 2008, San Jose, CA, USA, pp. 289-292, 2008, IEEE Computer Society, 978-0-7695-3117-5. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
placement, DCT, 3D, thermal |
73 | Amit Kumar 0002, Li Shang, Li-Shiuan Peh, Niraj K. Jha |
System-Level Dynamic Thermal Management for High-Performance Microprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27(1), pp. 96-108, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
73 | Jing Li, Hiroshi Miyashita |
Post-placement Thermal Via Planning for 3D Integrated Circuit. ![Search on Bibsonomy](Pics/bibsonomy.png) |
APCCAS ![In: IEEE Asia Pacific Conference on Circuits and Systems 2006, APCCAS 2006, Singapore, 4-7 December 2006, pp. 808-811, 2006, IEEE, 1-4244-0387-1. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
71 | Benjamin Carrión Schäfer, Taewhan Kim |
Hotspots Elimination and Temperature Flattening in VLSI Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 16(11), pp. 1475-1487, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
69 | Alexandre Peixoto Ferreira, Daniel Mossé, Jae C. Oh |
Thermal Faults Modeling Using a RC Model with an Application to Web Farms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ECRTS ![In: 19th Euromicro Conference on Real-Time Systems, ECRTS'07, 4-6 July 2007, Pisa, Italy, Proceedings, pp. 113-124, 2007, IEEE Computer Society, 978-0-7695-2914-1. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
66 | Amit Kumar 0002, Li Shang, Li-Shiuan Peh, Niraj K. Jha |
HybDTM: a coordinated hardware-software approach for dynamic thermal management. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 43rd Design Automation Conference, DAC 2006, San Francisco, CA, USA, July 24-28, 2006, pp. 548-553, 2006, ACM, 1-59593-381-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
hybrid hardware-software management, thermal model, dynamic thermal management |
65 | Yuan Xie 0001, Wei-Lun Hung |
Temperature-Aware Task Allocation and Scheduling for Embedded Multiprocessor Systems-on-Chip (MPSoC) Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. VLSI Signal Process. ![In: J. VLSI Signal Process. 45(3), pp. 177-189, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
thermal-aware design, scheduling, embedded system design, system-on-chip design |
63 | Liqiang He, Cha Narisu |
A Fast Scheme to Investigate Thermal-Aware Scheduling Policy for Multicore Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
APPT ![In: Advanced Parallel Processing Technologies, 8th International Symposium, APPT 2009, Rapperswil, Switzerland, August 24-25, 2009, Proceedings, pp. 1-10, 2009, Springer, 978-3-642-03643-9. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
59 | David Cuesta, José Luis Ayala, José Ignacio Hidalgo, Massimo Poncino, Andrea Acquaviva, Enrico Macii |
Thermal-aware floorplanning exploration for 3D multi-core architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 20th ACM Great Lakes Symposium on VLSI 2009, Providence, Rhode Island, USA, May 16-18 2010, pp. 99-102, 2010, ACM, 978-1-4503-0012-4. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
3D, floorplanning, MPSoC, temperature |
59 | Ting-Yuan Wang, Jeng-Liang Tsai, Charlie Chung-Ping Chen |
Thermal and Power Integrity Based Power/Ground Networks Optimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2004 Design, Automation and Test in Europe Conference and Exposition (DATE 2004), 16-20 February 2004, Paris, France, pp. 830-835, 2004, IEEE Computer Society, 0-7695-2085-5. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
56 | Jin Cui, Douglas L. Maskell |
Dynamic thermal-aware scheduling on chip multiprocessor for soft real-time system. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 19th ACM Great Lakes Symposium on VLSI 2009, Boston Area, MA, USA, May 10-12 2009, pp. 393-396, 2009, ACM, 978-1-60558-522-2. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
dynamic tas, post thermal map, cmp, soft real-time |
55 | Dong Li 0001, Hung-Ching Chang, Hari K. Pyla, Kirk W. Cameron |
System-level, thermal-aware, fully-loaded process scheduling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 22nd IEEE International Symposium on Parallel and Distributed Processing, IPDPS 2008, Miami, Florida USA, April 14-18, 2008, pp. 1-7, 2008, IEEE. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
55 | Thomas Edison Yu, Tomokazu Yoneda, Krishnendu Chakrabarty, Hideo Fujiwara |
Test infrastructure design for core-based system-on-chip under cycle-accurate thermal constraints. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 14th Asia South Pacific Design Automation Conference, ASP-DAC 2009, Yokohama, Japan, January 19-22, 2009, pp. 793-798, 2009, IEEE, 978-1-4244-2748-2. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
TAM design, thermal-aware test, wrapper design, test scheduling, SOC test |
52 | Pilok Lim, Taewhan Kim |
Thermal-aware high-level synthesis based on network flow method. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CODES+ISSS ![In: Proceedings of the 4th International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2006, Seoul, Korea, October 22-25, 2006, pp. 124-129, 2006, ACM, 1-59593-370-0. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
power consumption, temperature, binding |
52 | Jun Yang 0002, Xiuyi Zhou, Marek Chrobak, Youtao Zhang, Lingling Jin |
Dynamic Thermal Management through Task Scheduling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPASS ![In: IEEE International Symposium on Performance Analysis of Systems and Software, ISPASS 2008, April 20-22, 2008, Austin, Texas, USA, Proceedings, pp. 191-201, 2008, IEEE Computer Society, 978-1-4244-2232-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
48 | Wei-Lun Hung, Yuan Xie 0001, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin |
Thermal-Aware Task Allocation and Scheduling for Embedded Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2005 Design, Automation and Test in Europe Conference and Exposition (DATE 2005), 7-11 March 2005, Munich, Germany, pp. 898-899, 2005, IEEE Computer Society, 0-7695-2288-2. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
48 | Xin Li, Yuchun Ma, Xianlong Hong |
A novel thermal optimization flow using incremental floorplanning for 3D ICs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 14th Asia South Pacific Design Automation Conference, ASP-DAC 2009, Yokohama, Japan, January 19-22, 2009, pp. 347-352, 2009, IEEE, 978-1-4244-2748-2. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
45 | Junbo Yu, Qiang Zhou 0001, Jinian Bian |
Peak temperature control in thermal-aware behavioral synthesis through allocating the number of resources. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 14th Asia South Pacific Design Automation Conference, ASP-DAC 2009, Yokohama, Japan, January 19-22, 2009, pp. 85-90, 2009, IEEE, 978-1-4244-2748-2. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
45 | José Luis Ayala, David Atienza, Philip Brisk |
Thermal-aware data flow analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 46th Design Automation Conference, DAC 2009, San Francisco, CA, USA, July 26-31, 2009, pp. 613-614, 2009, ACM, 978-1-60558-497-3. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
compiler, thermal management |
45 | Ja Chun Ku, Yehea I. Ismail |
Thermal-Aware Methodology for Repeater Insertion in Low-Power VLSI Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 15(8), pp. 963-970, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
45 | Ja Chun Ku, Yehea I. Ismail |
Thermal-aware methodology for repeater insertion in low-power VLSI circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: Proceedings of the 2007 International Symposium on Low Power Electronics and Design, 2007, Portland, OR, USA, August 27-29, 2007, pp. 86-91, 2007, ACM, 978-1-59593-709-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
low-power design, repeater insertion, temperature-aware design |
45 | Jeonghwan Choi, Chen-Yong Cher, Hubertus Franke, Hendrik F. Hamann, Alan J. Weger, Pradip Bose |
Thermal-aware task scheduling at the system software level. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: Proceedings of the 2007 International Symposium on Low Power Electronics and Design, 2007, Portland, OR, USA, August 27-29, 2007, pp. 213-218, 2007, ACM, 978-1-59593-709-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
low-power design, repeater insertion, temperature-aware design |
42 | Zhiyuan He 0002, Zebo Peng, Petru Eles, Paul M. Rosinger, Bashir M. Al-Hashimi |
Thermal-Aware SoC Test Scheduling with Test Set Partitioning and Interleaving. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 24(1-3), pp. 247-257, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Thermal-aware testing, Test scheduling, SoC testing |
41 | Ja Chun Ku, Serkan Ozdemir, Gokhan Memik, Yehea I. Ismail |
Thermal Management of On-Chip Caches Through Power Density Minimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 15(5), pp. 592-604, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
41 | Kiran Puttaswamy, Gabriel H. Loh |
Thermal Herding: Microarchitecture Techniques for Controlling Hotspots in High-Performance 3D-Integrated Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCA ![In: 13st International Conference on High-Performance Computer Architecture (HPCA-13 2007), 10-14 February 2007, Phoenix, Arizona, USA, pp. 193-204, 2007, IEEE Computer Society, 1-4244-0804-0. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
41 | Ja Chun Ku, Yehea I. Ismail |
Attaining Thermal Integrity in Nanometer Chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2007), 27-20 May 2007, New Orleans, Louisiana, USA, pp. 3223-3226, 2007, IEEE, 1-4244-0920-9. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
41 | Salvatore Carta, Andrea Acquaviva, Pablo García Del Valle, David Atienza, Giovanni De Micheli, Fernando Rincón, Luca Benini, Jose Manuel Mendias |
Multi-processor operating system emulation framework with thermal feedback for systems-on-chip. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 17th ACM Great Lakes Symposium on VLSI 2007, Stresa, Lago Maggiore, Italy, March 11-13, 2007, pp. 311-316, 2007, ACM, 978-1-59593-605-9. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
thermal studies, FPGA, operating system, emulation, MPSoC |
41 | Kyriakos Stavrou, Pedro Trancoso |
TSIC: Thermal Scheduling Simulator for Chip Multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Panhellenic Conference on Informatics ![In: Advances in Informatics, 10th Panhellenic Conference on Informatics, PCI 2005, Volos, Greece, November 11-13, 2005, Proceedings, pp. 589-599, 2005, Springer, 3-540-29673-5. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
41 | Kostas Siozios, Dimitrios Soudris, Antonios Thanailakis |
Designing Alternative FPGA Implementations Using Spatial Data from Hardware Resources. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PATMOS ![In: Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation, 16th International Workshop, PATMOS 2006, Montpellier, France, September 13-15, 2006, Proceedings, pp. 403-414, 2006, Springer, 3-540-39094-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
39 | Chih-Hao Chao, Kai-Yuan Jheng, Hao-Yu Wang, Jia-Cheng Wu, An-Yeu Wu |
Traffic- and Thermal-Aware Run-Time Thermal Management Scheme for 3D NoC Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NOCS ![In: NOCS 2010, Fourth ACM/IEEE International Symposium on Networks-on-Chip, Grenoble, France, May 3-6, 2010, pp. 223-230, 2010, IEEE Computer Society, 978-0-7695-4053-5. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
run-time thermal management, 3D NoC, routing, 3D IC, traffic-aware, throttling, thermal-aware |
38 | Shahin Golshan, Eli Bozorgzadeh, Benjamin Carrión Schäfer, Kazutoshi Wakabayashi, Houman Homayoun, Alexander V. Veidenbaum |
Exploiting power budgeting in thermal-aware dynamic placement for reconfigurable systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: Proceedings of the 2010 International Symposium on Low Power Electronics and Design, 2010, Austin, Texas, USA, August 18-20, 2010, pp. 49-54, 2010, ACM, 978-1-4503-0146-6. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
computer aided design, placement, dynamic reconfiguration, temperature, reconfigurable systems |
38 | Sushu Zhang, Karam S. Chatha |
System-level thermal aware design of applications with uncertain execution time. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: 2008 International Conference on Computer-Aided Design, ICCAD 2008, San Jose, CA, USA, November 10-13, 2008, pp. 242-249, 2008, IEEE Computer Society, 978-1-4244-2820-5. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
38 | Yici Cai, Bin Liu 0007, Qiang Zhou 0001, Xianlong Hong |
A Thermal Aware Floorplanning Algorithm Supporting Voltage Islands for Low Power SOC Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PATMOS ![In: Integrated Circuit and System Design, Power and Timing Modeling, Optimization and Simulation, 15th International Workshop, PATMOS 2005, Leuven, Belgium, September 21-23, 2005, Proceedings, pp. 257-266, 2005, Springer, 3-540-29013-3. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
38 | Shilpa Bhoj, Dinesh Bhatia |
Thermal Modeling and Temperature Driven Placement for FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2007), 27-20 May 2007, New Orleans, Louisiana, USA, pp. 1053-1056, 2007, IEEE, 1-4244-0920-9. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
38 | Yongpan Liu, Yu Wang 0002, Feng Zhang 0014, Rong Luo, Hui Wang 0004 |
A New Thermal-Conscious System-Level Methodology for Energy-Efficient Processor Voltage Selection. ![Search on Bibsonomy](Pics/bibsonomy.png) |
APCCAS ![In: IEEE Asia Pacific Conference on Circuits and Systems 2006, APCCAS 2006, Singapore, 4-7 December 2006, pp. 968-971, 2006, IEEE, 1-4244-0387-1. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
35 | Kyriakos Stavrou, Pedro Trancoso |
Thermal-Aware Scheduling: A Solution for Future Chip Multiprocessors Thermal Problems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DSD ![In: Ninth Euromicro Conference on Digital System Design: Architectures, Methods and Tools (DSD 2006), 30 August - 1 September 2006, Dubrovnik, Croatia, pp. 123-126, 2006, IEEE Computer Society, 0-7695-2609-8. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
35 | Mohit Pathak, Sung Kyu Lim |
Thermal-aware Steiner routing for 3D stacked ICs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: 2007 International Conference on Computer-Aided Design, ICCAD 2007, San Jose, CA, USA, November 5-8, 2007, pp. 205-211, 2007, IEEE Computer Society, 1-4244-1382-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
35 | Javid Jaffari, Mohab Anis |
Thermal-Aware Placement for FPGAs Using Electrostatic Charge Model. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 8th International Symposium on Quality of Electronic Design (ISQED 2007), 26-28 March 2007, San Jose, CA, USA, pp. 666-671, 2007, IEEE Computer Society, 978-0-7695-2795-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
35 | Chunchen Liu, Ruei-Xi Chen, Jichang Tan, Sharon Fan, Jeffrey Fan, Kia Makki |
Thermal aware clock synthesis considering stochastic variation and correlations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2008), 18-21 May 2008, Sheraton Seattle Hotel, Seattle, Washington, USA, pp. 1204-1207, 2008, IEEE, 978-1-4244-1683-7. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
35 | Syed M. Alam, Donald E. Troxel, Carl V. Thompson |
Thermal aware cell-based full-chip electromigration reliability analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 15th ACM Great Lakes Symposium on VLSI 2005, Chicago, Illinois, USA, April 17-19, 2005, pp. 26-31, 2005, ACM, 1-59593-057-4. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
IC thermal analysis, full-chip reliability, reliability aware design, reliability characterization, electromigration |
34 | Michael Jonas, Georgios Varsamopoulos, Sandeep K. S. Gupta |
On developing a fast, cost-effective and non-invasive method to derive data center thermal maps. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CLUSTER ![In: Proceedings of the 2007 IEEE International Conference on Cluster Computing, 17-20 September 2007, Austin, Texas, USA, pp. 474-475, 2007, IEEE Computer Society, 978-1-4244-1387-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
34 | Ja Chun Ku, Serkan Ozdemir, Gokhan Memik, Yehea I. Ismail |
Thermal Management of On-Chip Caches Through Power Density Minimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: 38th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-38 2005), 12-16 November 2005, Barcelona, Spain, pp. 283-293, 2005, IEEE Computer Society, 0-7695-2440-0. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
34 | Yen-Wei Wu, Chia-Lin Yang, Ping-Hung Yuh, Yao-Wen Chang |
Joint exploration of architectural and physical design spaces with thermal consideration. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: Proceedings of the 2005 International Symposium on Low Power Electronics and Design, 2005, San Diego, California, USA, August 8-10, 2005, pp. 123-126, 2005, ACM, 1-59593-137-6. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
architectural floorplanning, performance, thermal |
34 | Chunchen Liu, Junjie Su, Yiyu Shi 0001 |
Temperature-aware clock tree synthesis considering spatiotemporal hot spot correlations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 26th International Conference on Computer Design, ICCD 2008, 12-15 October 2008, Lake Tahoe, CA, USA, Proceedings, pp. 107-113, 2008, IEEE Computer Society, 978-1-4244-2657-7. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
32 | Mohamed M. Sabry, José L. Ayala, David Atienza |
Thermal-aware compilation for system-on-chip processing architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 20th ACM Great Lakes Symposium on VLSI 2009, Providence, Rhode Island, USA, May 16-18 2010, pp. 221-226, 2010, ACM, 978-1-4503-0012-4. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
compiler, register-file, thermal-aware |
32 | Sushu Zhang, Karam S. Chatha |
Thermal aware task sequencing on embedded processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 47th Design Automation Conference, DAC 2010, Anaheim, California, USA, July 13-18, 2010, pp. 585-590, 2010, ACM, 978-1-4503-0002-5. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
thermal aware sequencing, dynamic power management, dynamic voltage/frequency scaling |
31 | Aseem Gupta, Nikil D. Dutt, Fadi J. Kurdahi, Kamal S. Khouri, Magdy S. Abadir |
Thermal Aware Global Routing of VLSI Chips for Enhanced Reliability. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 9th International Symposium on Quality of Electronic Design (ISQED 2008), 17-19 March 2008, San Jose, CA, USA, pp. 470-475, 2008, IEEE Computer Society, 978-0-7695-3117-5. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
reliability, global routing, thermal |
31 | Wei-Lun Hung, Greg M. Link, Yuan Xie 0001, Narayanan Vijaykrishnan, Mary Jane Irwin |
Interconnect and Thermal-aware Floorplanning for 3D Microprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 7th International Symposium on Quality of Electronic Design (ISQED 2006), 27-29 March 2006, San Jose, CA, USA, pp. 98-104, 2006, IEEE Computer Society, 0-7695-2523-7. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
31 | Shih-An Yu, Pei-Yu Huang, Yu-Min Lee |
A multiple supply voltage based power reduction method in 3-D ICs considering process variations and thermal effects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 14th Asia South Pacific Design Automation Conference, ASP-DAC 2009, Yokohama, Japan, January 19-22, 2009, pp. 55-60, 2009, IEEE, 978-1-4244-2748-2. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
31 | Fabrizio Mulas, Michele Pittau, Marco Buttu, Salvatore Carta, Andrea Acquaviva, Luca Benini, David Atienza, Giovanni De Micheli |
Thermal Balancing Policy for Streaming Computing on Multiprocessor Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: Design, Automation and Test in Europe, DATE 2008, Munich, Germany, March 10-14, 2008, pp. 734-739, 2008, ACM, 978-3-9810801-3-1. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
28 | Prasanth Mangalagiri, Sungmin Bae, Krishnan Ramakrishnan, Yuan Xie 0001, Vijaykrishnan Narayanan |
Thermal-aware reliability analysis for platform FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: 2008 International Conference on Computer-Aided Design, ICCAD 2008, San Jose, CA, USA, November 10-13, 2008, pp. 722-727, 2008, IEEE Computer Society, 978-1-4244-2820-5. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
28 | Qinghui Tang, Naveen Tummala, Sandeep K. S. Gupta, Loren Schwiebert |
TARA: Thermal-Aware Routing Algorithm for Implanted Sensor Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DCOSS ![In: Distributed Computing in Sensor Systems, First IEEE International Conference, DCOSS 2005, Marina del Rey, CA, USA, June 30 - July 1, 2005, Proceedings, pp. 206-217, 2005, Springer, 3-540-26422-1. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
28 | Wei-Lun Hung, Yuan Xie 0001, Narayanan Vijaykrishnan, Charles Addo-Quaye, Theo Theocharides, Mary Jane Irwin |
Thermal-Aware Floorplanning Using Genetic Algorithms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 6th International Symposium on Quality of Electronic Design (ISQED 2005), 21-23 March 2005, San Jose, CA, USA, pp. 634-639, 2005, IEEE Computer Society, 0-7695-2301-3. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
27 | Yousra Alkabani, Farinaz Koushanfar, Miodrag Potkonjak |
N-version temperature-aware scheduling and binding. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: Proceedings of the 2009 International Symposium on Low Power Electronics and Design, 2009, San Fancisco, CA, USA, August 19-21, 2009, pp. 331-334, 2009, ACM, 978-1-60558-684-7. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
N-variants, high-level synthesis, temperature control |
27 | Min Ni, Seda Ogrenci Memik |
Self-heating-aware optimal wire sizing under Elmore delay model. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2007 Design, Automation and Test in Europe Conference and Exposition, DATE 2007, Nice, France, April 16-20, 2007, pp. 1373-1378, 2007, EDA Consortium, San Jose, CA, USA, 978-3-9810801-2-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
27 | Ja Chun Ku, Serkan Ozdemir, Gokhan Memik, Yehea I. Ismail |
Power density minimization for highly-associative caches in embedded processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 16th ACM Great Lakes Symposium on VLSI 2006, Philadelphia, PA, USA, April 30 - May 1, 2006, pp. 100-104, 2006, ACM, 1-59593-347-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
cache, embedded processor, leakage power, temperature |
27 | Tridib Mukherjee, Georgios Varsamopoulos, Sandeep K. S. Gupta, Sanjay Rungta |
Measurement-based power profiling of data center equipment. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CLUSTER ![In: Proceedings of the 2007 IEEE International Conference on Cluster Computing, 17-20 September 2007, Austin, Texas, USA, pp. 476-477, 2007, IEEE Computer Society, 978-1-4244-1387-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
24 | Pei-Yu Huang, Jia-Hong Wu, Yu-Min Lee |
Stochastic thermal simulation considering spatial correlated within-die process variations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 14th Asia South Pacific Design Automation Conference, ASP-DAC 2009, Yokohama, Japan, January 19-22, 2009, pp. 31-36, 2009, IEEE, 978-1-4244-2748-2. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
24 | Yuchun Ma, Yongxiang Liu, Eren Kursun, Glenn Reinman, Jason Cong |
Investigating the effects of fine-grain three-dimensional integration on microarchitecture design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM J. Emerg. Technol. Comput. Syst. ![In: ACM J. Emerg. Technol. Comput. Syst. 4(4), pp. 17:1-17:30, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
3D packing, microarchitecture, 3D integration, thermal |
24 | Love Singhal, Sejong Oh, Eli Bozorgzadeh |
Statistical power profile correlation for realistic thermal estimation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 13th Asia South Pacific Design Automation Conference, ASP-DAC 2008, Seoul, Korea, January 21-24, 2008, pp. 67-70, 2008, IEEE, 978-1-4244-1921-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
24 | Xiuyi Zhou, Yi Xu, Yu Du, Youtao Zhang, Jun Yang 0002 |
Thermal Management for 3D Processors via Task Scheduling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICPP ![In: 2008 International Conference on Parallel Processing, ICPP 2008, September 8-12, 2008, Portland, Oregon, USA, pp. 115-122, 2008, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
24 | Tridib Mukherjee, Qinghui Tang, Corbett Ziesman, Sandeep K. S. Gupta, Phil Cayton |
Software Architecture for Dynamic Thermal Management in Datacenters. ![Search on Bibsonomy](Pics/bibsonomy.png) |
COMSWARE ![In: Proceedings of the Second International Conference on COMmunication System softWAre and MiddlewaRE (COMSWARE 2007), January 7-12, 2007, Bangalore, India, 2007, IEEE, 1-4244-0614-5. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
22 | Shabnam Jalili Marandi, Mehdi Golsorkhtabaramiri, Mehdi Hosseinzadeh 0001, Somayyeh Jafarali Jassbi |
IoT based thermal aware routing protocols in wireless body area networks: Survey: IoT based thermal aware routing in WBAN. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IET Commun. ![In: IET Commun. 16(15), pp. 1753-1771, 2022. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
21 | Jason Cong, Guojie Luo, Jie Wei, Yan Zhang |
Thermal-Aware 3D IC Placement Via Transformation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 12th Conference on Asia South Pacific Design Automation, ASP-DAC 2007, Yokohama, Japan, January 23-26, 2007, pp. 780-785, 2007, IEEE Computer Society, 1-4244-0629-3. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
21 | Zhiyuan He 0002, Zebo Peng, Petru Eles, Paul M. Rosinger, Bashir M. Al-Hashimi |
Thermal-Aware SoC Test Scheduling with Test Set Partitioning and Interleaving. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 21th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2006), 4-6 October 2006, Arlington, Virginia, USA, pp. 477-485, 2006, IEEE Computer Society, 0-7695-2706-X. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
21 | Vivek Chaturvedi, Huang Huang, Gang Quan |
Leakage Aware Scheduling on Maximum Temperature Minimization for Periodic Hard Real-Time Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CIT ![In: 10th IEEE International Conference on Computer and Information Technology, CIT 2010, Bradford, West Yorkshire, UK, June 29-July 1, 2010, pp. 1802-1809, 2010, IEEE Computer Society, 978-0-7695-4108-2. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
leakage-aware, scheduling, real-time, operating systems, thermal-aware |
21 | Gang Quan, Yan Zhang |
Leakage Aware Feasibility Analysis for Temperature-Constrained Hard Real-Time Periodic Tasks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ECRTS ![In: 21st Euromicro Conference on Real-Time Systems, ECRTS 2009, Dublin, Ireland, July 1-3, 2009, pp. 207-216, 2009, IEEE Computer Society, 978-0-7695-3724-5. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
real time scheduling, leakage, temperature, feasibility analysis, thermal aware |
21 | Gang Quan, Yan Zhang, William Wiles, Pei Pei |
Guaranteed scheduling for repetitive hard real-time tasks under the maximal temperature constraint. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CODES+ISSS ![In: Proceedings of the 6th International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2008, Atlanta, GA, USA, October 19-24, 2008, pp. 267-272, 2008, ACM, 978-1-60558-470-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
maximal temperature, real-time scheduling, energy consumption, thermal aware |
21 | David Atienza, Pablo García Del Valle, Giacomo Paci, Francesco Poletti, Luca Benini, Giovanni De Micheli, Jose Manuel Mendias, Román Hermida |
HW-SW emulation framework for temperature-aware design in MPSoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Design Autom. Electr. Syst. ![In: ACM Trans. Design Autom. Electr. Syst. 12(3), pp. 26:1-26:26, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
Thermal-aware design, FPGA, emulation, MPSoC, temperature |
18 | David Cuesta, José L. Risco-Martín, José L. Ayala, José Ignacio Hidalgo |
Thermal-Aware Floorplanner for 3D IC, including TSVs, Liquid Microchannels and Thermal Domains Optimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2402.14627, 2024. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
|
18 | Anthony Dowling, Lin Jiang, Ming-Cheng Cheng, Yu Liu |
Regulating CPU Temperature With Thermal-Aware Scheduling Using a Reduced Order Learning Thermal Model. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2310.00854, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
18 | Irfan Ali, Muhammad Naeem Shehzad, Qaisar Bashir, Haroon Elahi, Muhammad Naeem Awais, Oana Geman, Pin Liu |
A Thermal-Aware Scheduling Algorithm for Reducing Thermal Risks in DAG-Based Applications in Cyber-Physical Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
UbiSec ![In: Ubiquitous Security - Second International Conference, UbiSec 2022, Zhangjiajie, China, December 28-31, 2022, Revised Selected Papers, pp. 497-508, 2022, Springer, 978-981-99-0271-2. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
18 | Jai-Ming Lin, Tai-Ting Chen, Hao-Yuan Hsieh, Ya-Ting Shyu, Yeong-Jar Chang, Juin-Ming Lu |
Thermal-Aware Fixed-Outline Floorplanning Using Analytical Models With Thermal-Force Modulation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 29(5), pp. 985-997, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
18 | Kun-Chih Chen, Yu-Hsien Chen, Yen-Po Lin |
Thermal sensor allocation and full-system temperature characterization for thermal-aware mesh-based NoC system by using compressive sensing technique. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-DAT ![In: 2017 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2017, Hsinchu, Taiwan, April 24-27, 2017, pp. 1-4, 2017, IEEE, 978-1-5090-3969-2. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
18 | Ting-Hao Tsai, Ya-Shu Chen |
Thermal-throttling server: A thermal-aware real-time task scheduling framework for three-dimensional multicore chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Syst. Softw. ![In: J. Syst. Softw. 112, pp. 11-25, 2016. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
18 | David Cuesta, José L. Risco-Martín, José L. Ayala, José Ignacio Hidalgo |
Thermal-aware floorplanner for 3D IC, including TSVs, liquid microchannels and thermal domains optimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Appl. Soft Comput. ![In: Appl. Soft Comput. 34, pp. 164-177, 2015. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
18 | Shih-Ying Sean Liu, Ren-Guo Luo, Suradeth Aroonsantidecha, Ching-Yu Chin, Hung-Ming Chen |
Fast Thermal Aware Placement With Accurate Thermal Analysis Based on Green Function. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 22(6), pp. 1404-1415, 2014. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
18 | Zhigang Jiang, Wei Huang 0024, Ilsun You, Zhuzhong Qian, Sanglu Lu |
Thermal-Aware Task Placement with Dynamic Thermal Model in an Established Datacenter. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IMIS ![In: Eighth International Conference on Innovative Mobile and Internet Services in Ubiquitous Computing, IMIS 2014, Birmingham, United Kingdom, 2-4 July, 2014, pp. 1-8, 2014, IEEE Computer Society, 978-1-4799-4333-3. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
18 | Arpita Dutta, Subhadip Kundu, Santanu Chattopadhyay |
Thermal Aware Don't Care Filling to Reduce Peak Temperature and Thermal Variance during Testing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asian Test Symposium ![In: 22nd Asian Test Symposium, ATS 2013, Yilan County, Taiwan, November 18-21, 2013, pp. 25-30, 2013, IEEE Computer Society, 978-0-7695-5080-0. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
18 | Kun-Chih Chen, Shu-Yen Lin, An-Yeu Wu |
Design of thermal management unit with vertical throttling scheme for proactive thermal-aware 3D NoC systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-DAT ![In: 2013 International Symposium on VLSI Design, Automation, and Test, VLSI-DAT 2013, Hsinchu, Taiwan, April 22-24, 2013, pp. 1-4, 2013, IEEE, 978-1-4673-4435-7. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
18 | Che-Chuan Kuo, Kun-Chih Chen, En-Jui Chang, An-Yeu Wu |
Proactive Thermal-Budget-Based Beltway Routing algorithm for thermal-aware 3D NoC systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSoC ![In: 2013 International Symposium on System on Chip, ISSoC 2013, Tampere, Finland, October 23-24, 2013, pp. 1-4, 2013, IEEE, 978-1-4799-1189-9. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
18 | Jin Cui, Douglas L. Maskell |
A Fast High-Level Event-Driven Thermal Estimator for Dynamic Thermal Aware Scheduling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31(6), pp. 904-917, 2012. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
18 | Suradeth Aroonsantidecha, Shih-Ying Liu, Ching-Yu Chin, Hung-Ming Chen |
A fast thermal aware placement with accurate thermal analysis based on Green function. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 17th Asia and South Pacific Design Automation Conference, ASP-DAC 2012, Sydney, Australia, January 30 - February 2, 2012, pp. 425-430, 2012, IEEE, 978-1-4673-0770-3. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
18 | Jin Cui, Douglas L. Maskell |
High level event driven thermal estimation for thermal aware task allocation and scheduling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 15th Asia South Pacific Design Automation Conference, ASP-DAC 2010, Taipei, Taiwan, January 18-21, 2010, pp. 793-798, 2010, IEEE, 978-1-60558-837-7. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
|
17 | Yongxiang Liu, Yuchun Ma, Eren Kursun, Glenn Reinman, Jason Cong |
Fine grain 3D integration for microarchitecture design through cube packing exploration. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 25th International Conference on Computer Design, ICCD 2007, 7-10 October 2007, Lake Tahoe, CA, USA, Proceedings, pp. 259-266, 2007, IEEE, 1-4244-1258-7. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
15 | Egberto Caballero, Vinicius C. Ferreira 0001, Robson Araújo Lima, Célio Albuquerque 0001, Débora C. Muchaluat-Saade |
LATOR: Link-Quality Aware and Thermal Aware On-Demand Routing Protocol for WBAN. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IWSSIP ![In: 2020 International Conference on Systems, Signals and Image Processing, IWSSIP 2020, Niterói, Brazil, July 1-3, 2020, pp. 337-342, 2020, IEEE, 978-1-7281-7539-3. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
15 | Liang-Ying Lu, Tsung-Yu Hsieh, Pei-En Weng, Lih-Yih Chiou |
Methodology for developing virtual platforms from power-aware to power- and thermal-aware at electronic system level. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IET Cyper-Phys. Syst.: Theory & Appl. ![In: IET Cyper-Phys. Syst.: Theory & Appl. 3(3), pp. 150-157, 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
15 | Kun-Chih Jimmy Chen |
Game-based Congestion-aware Adaptive Routing (GCAR) for Proactive Thermal-aware 3D Network-on-Chip Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NoCArc@MICRO ![In: Proceedings of the 10th International Workshop on Network on Chip Architectures, NoCArc@MICRO 2017, Cambridge, MA, USA, October 14-18, 2017, pp. 9:1-9:6, 2017, ACM, 978-1-4503-5542-1. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
15 | Nishit Ashok Kapadia, Sudeep Pasricha |
PRATHAM: A power delivery-aware and thermal-aware mapping framework for parallel embedded applications on 3D MPSoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 32nd IEEE International Conference on Computer Design, ICCD 2014, Seoul, South Korea, October 19-22, 2014, pp. 525-528, 2014, IEEE Computer Society, 978-1-4799-6492-5. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
15 | Ayan Banerjee 0001, Tridib Mukherjee, Georgios Varsamopoulos, Sandeep K. S. Gupta |
Cooling-aware and thermal-aware workload placement for green HPC data centers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Green Computing Conference ![In: International Green Computing Conference 2010, Chicago, IL, USA, 15-18 August 2010, pp. 245-256, 2010, IEEE Computer Society, 978-1-4244-7612-1. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
|
11 | Ali Aghasi, Kamal Jamshidi, Ali Bohlooli, Bahman Javadi |
A decentralized adaptation of model-free Q-learning for thermal-aware energy-efficient virtual machine placement in cloud data centers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Comput. Networks ![In: Comput. Networks 224, pp. 109624, April 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
11 | Majid Nezarat, Hadi Shahriar Shahhoseini, Masoomeh Momeni |
Thermal-aware routing algorithm in partially connected 3D NoC with dynamic availability for elevators. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Ambient Intell. Humaniz. Comput. ![In: J. Ambient Intell. Humaniz. Comput. 14(8), pp. 10731-10744, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
11 | Wenbo Guan, Xiaoyan Tang, Hongliang Lu, Yuming Zhang, Yimen Zhang |
Thermal-Aware Fixed-Outline 3-D IC Floorplanning: An End-to-End Learning-Based Approach. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 31(12), pp. 1882-1895, December 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
11 | Wenbo Guan, Xiaoyan Tang, Hongliang Lu, Yuming Zhang, Yimen Zhang |
A Novel Thermal-Aware Floorplanning and TSV Assignment With Game Theory for Fixed-Outline 3-D ICs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 31(11), pp. 1639-1652, November 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
11 | Bo Liu 0045, Rui Chen, Weiwei Lin 0001, Wentai Wu, Jianpeng Lin, Keqin Li 0001 |
Publisher Correction to: Thermal‑aware virtual machine placement based on multi‑objective optimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Supercomput. ![In: J. Supercomput. 79(15), pp. 17756-17757, October 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
11 | Bo Liu 0045, Rui Chen, Weiwei Lin 0001, Wentai Wu, Jianpeng Lin, Keqin Li 0001 |
Thermal-aware virtual machine placement based on multi-objective optimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Supercomput. ![In: J. Supercomput. 79(11), pp. 12563-12590, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
11 | Pouya Aryai, Ahmad Khademzadeh, Somayyeh Jafarali Jassbi, Mehdi Hosseinzadeh 0001 |
SIMOF: swarm intelligence multi-objective fuzzy thermal-aware routing protocol for WBANs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Supercomput. ![In: J. Supercomput. 79(10), pp. 10941-10976, July 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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