Search results for "ultra-low-power"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
86	Maria Gorlatova, Peter R. Kinget, Ioannis Kymissis, Dan Rubenstein, Xiaodong Wang 0001, Gil Zussman	Challenge: ultra-low-power energy-harvesting active networked tags (EnHANTs).	MobiCom	2009	DBLP DOI BibTeX RDF	energy efficient networking, energy scavenging, ultra-low power communications, UWB, ultra-wideband, energy harvesting
78	Christoph Heer, Ulf Schlichtmann	Ultra-Low-Power Design: Device and Logic Design Approaches.	Ultra Low-Power Electronics and Design	2004	DBLP DOI BibTeX RDF
69	Mandeep Singh, Christophe Giacomotto, Bart R. Zeydel, Vojin G. Oklobdzija	Logic Style Comparison for Ultra Low Power Operation in 65nm Technology.	PATMOS	2007	DBLP DOI BibTeX RDF
64	Carlo Brandolese, William Fornaciari, Fabio Salice	Source-Level Models for Software Power Optimization.	Ultra Low-Power Electronics and Design	2004	DBLP DOI BibTeX RDF
64	Ann Gordon-Ross, Chuanjun Zhang, Frank Vahid, Nikil D. Dutt	Tuning Caches to Applications for Low-Energy Embedded Systems.	Ultra Low-Power Electronics and Design	2004	DBLP DOI BibTeX RDF
64	Ingrid Verbauwhede, Patrick Schaumont, Christian Piguet, Bart Kienhuis	Architectures and Design Techniques for Energy Efficient Embedded DSP and Multimedia Processing.	Ultra Low-Power Electronics and Design	2004	DBLP DOI BibTeX RDF
64	Shivajit Mohapatra, Nalini Venkatasubramanian, Nikil D. Dutt, Cristiano Pereira, Rajesh K. Gupta 0001	Energy-Aware Adaptations for End-to-End Videostreaming to Mobile Handheld Devices.	Ultra Low-Power Electronics and Design	2004	DBLP DOI BibTeX RDF
64	Jacques Gautier	Nanotechnologies for Low Power.	Ultra Low-Power Electronics and Design	2004	DBLP DOI BibTeX RDF
64	Ian O'Connor, Frédéric Gaffiot	On-Chip Optical Interconnect for Low-Power.	Ultra Low-Power Electronics and Design	2004	DBLP DOI BibTeX RDF
64	Wei-Chung Cheng, Massoud Pedram	Transmittance Scaling for Reducing Power Dissipation of a Backlit TFT-LCD.	Ultra Low-Power Electronics and Design	2004	DBLP DOI BibTeX RDF
64	Davide Bertozzi, Luca Benini, Giovanni De Micheli	Energy-Efficient Network-On-Chip Design.	Ultra Low-Power Electronics and Design	2004	DBLP DOI BibTeX RDF
64	Andrea Bona, Vittorio Zaccaria, Roberto Zafalon	System Level Power Modeling and Simulation of High-End Industrial Network-On-Chip.	Ultra Low-Power Electronics and Design	2004	DBLP DOI BibTeX RDF
64	Ismail Kadayif, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Ibrahim Kolcu	Reducing Energy Consumption in Chip Multiprocessors Using Workload Variations.	Ultra Low-Power Electronics and Design	2004	DBLP DOI BibTeX RDF
64	Andrea Acquaviva, Emanuele Lattanzi, Alessandro Bogliolo	Power-Aware Network Swapping for Wireless Palmtop PCS.	Ultra Low-Power Electronics and Design	2004	DBLP DOI BibTeX RDF
64	Dongwoo Lee, Bo Zhai, David T. Blaauw, Dennis Sylvester	Static Leakage Reduction through Simulteneous VTT/TOX and State Assignment.	Ultra Low-Power Electronics and Design	2004	DBLP DOI BibTeX RDF
64	Kimish Patel, Alberto Macii, Massimo Poncino	Energy-Efficient Shared Memory Architectures for Multi-Processor Systems-On-Chip.	Ultra Low-Power Electronics and Design	2004	DBLP DOI BibTeX RDF
61	Bipul Chandra Paul, Arijit Raychowdhury, Kaushik Roy 0001	Device optimization for ultra-low power digital sub-threshold operation.	ISLPED	2004	DBLP DOI BibTeX RDF	device optimization, sub-threshold operation, ultra-low power applications
60	Amin Shameli, Payam Heydari	A novel power optimization technique for ultra-low power RFICs.	ISLPED	2006	DBLP DOI BibTeX RDF	radio-frequency integrated circuit, CMOS, ultra-low power, low-noise amplifier
59	Chao Lu 0005, Sang Phill Park, Vijay Raghunathan, Kaushik Roy 0001	Analysis and design of ultra low power thermoelectric energy harvesting systems.	ISLPED	2010	DBLP DOI BibTeX RDF	thermoelectric energy harvesting, ultra low power
57	Sudhanshu Khanna, Benton H. Calhoun	Serial sub-threshold circuits for ultra-low-power systems.	ISLPED	2009	DBLP DOI BibTeX RDF	bit width, serial systems, leakage, ultra low power, sub-threshold
56	Edgar Mauricio Camacho-Galeano, Carlos Galup-Montoro, Márcio C. Schneider	An ultra-low-power self-biased current reference.	SBCCI	2004	DBLP DOI BibTeX RDF	inversion level, self-cascode MOSFET, design methodology, low-voltage, ultra-low-power, current reference
54	Aiyappan Natarajan, David Jasinski, Wayne P. Burleson, Russell Tessier	A hybrid adiabatic content addressable memory for ultra low-power applications.	ACM Great Lakes Symposium on VLSI	2003	DBLP DOI BibTeX RDF	adiabatic switching, ultra-low power, energy recovery
51	Shinobu Fujita, Shinichi Yasuda, Daesung Lee 0002, Xiangyu Chen, Deji Akinwande, H.-S. Philip Wong	Detachable nano-carbon chip with ultra low power.	DAC	2010	DBLP DOI BibTeX RDF	NEMS, ultra-low power, 3D-IC
44	Luis Henrique de Carvalho Ferreira, Tales Cleber Pimenta, Robson L. Moreno, Wilhelmus A. M. Van Noije	Ultra low-voltage ultra low-power CMOS threshold voltage reference.	SBCCI	2006	DBLP DOI BibTeX RDF	low power, CMOS, low voltage, threshold voltage, voltage reference
44	Atul Maheshwari, Wayne P. Burleson, Russell Tessier	Trading off Reliability and Power-Consumption in Ultra-low Power Systems.	ISQED	2002	DBLP DOI BibTeX RDF
43	Amre El-Hoiydi, Claude Arm, Ricardo Caseiro, Stefan Cserveny, Jean-Dominique Decotignie, Christian C. Enz, Frédéric Giroud, Steve Gyger, E. Leroux, Thierry Melly, Vincent Peiris, Franz-Xaver Pengg, Pierre-David Pfister, Nicolas Raemy, A. Ribordy, David Ruffieux, Patrick Volet	The ultra low-power wiseNET system.	DATE	2006	DBLP DOI BibTeX RDF
42	Milena Vratonjic, Bart R. Zeydel, Vojin G. Oklobdzija	Low- and Ultra Low-Power Arithmetic Units: Design and Comparison.	ICCD	2005	DBLP DOI BibTeX RDF
42	Mu-Tien Chang, Po-Tsang Huang, Wei Hwang	A robust ultra-low power asynchronous FIFO memory with self-adaptive power control.	SoCC	2008	DBLP DOI BibTeX RDF
42	Mingoo Seok, David T. Blaauw, Dennis Sylvester	Clock network design for ultra-low power applications.	ISLPED	2010	DBLP DOI BibTeX RDF	ultra-low power, robust design, clock network
42	Khawla Alzoubi, Daniel G. Saab, Massood Tabib-Azar	Complementary nano-electromechanical switches for ultra-low power embedded processors.	ACM Great Lakes Symposium on VLSI	2009	DBLP DOI BibTeX RDF	nems, cmos, switch, device, ultra-low power
42	Biswajit Mishra, Bashir M. Al-Hashimi	Subthreshold FIR Filter Architecture for Ultra Low Power Applications.	PATMOS	2008	DBLP DOI BibTeX RDF	Subthreshold design, Minimum Energy Point, Ultra Low Power Design, Leakage, FIR
42	Hendrawan Soeleman, Kaushik Roy 0001	Ultra-low power digital subthreshold logic circuits.	ISLPED	1999	DBLP DOI BibTeX RDF	ultra-low power, digital logic, subthreshold circuits
42	Anantha P. Chandrakasan	Ultra low power digital signal processing.	VLSI Design	1996	DBLP DOI BibTeX RDF	ultra low power digital signal processing, portable wireless device, capacitance minimization, spatial signal correlations, temporal signal correlations, re-synchronization, operation reduction, 1 V, logic design, DSP, power consumption, switching, integrated circuit design, voltage scaling, digital signal processing chips, circuit optimisation, circuit design, data representation, circuit optimization, glitching, architecture optimization
42	Kyu-won Choi, Abhijit Chatterjee	UDSM (ultra-deep sub-micron)-aware post-layout power optimization for ultra low-power CMOS VLSI.	ISLPED	2003	DBLP DOI BibTeX RDF	device and interconnect co-optimization, nanometer design, time slack distribution, low-power design
41	Alexander Fish, Shy Hamami, Orly Yadid-Pecht	Self-powered active pixel sensors for ultra low-power applications.	ISCAS (5)	2005	DBLP DOI BibTeX RDF
40	Chun Yi Lee, Christofer Toumazou	Ultra-low power UWB for real time biomedical wireless sensing.	ISCAS (1)	2005	DBLP DOI BibTeX RDF
40	Mark Hempstead, Gu-Yeon Wei, David M. Brooks	An accelerator-based wireless sensor network processor in 130nm CMOS.	CASES	2009	DBLP DOI BibTeX RDF	accelerator-based, wireless sensor networks, ultra-low power
40	Rohini Krishnan, José Pineda de Gyvez, Harry J. M. Veendrick	Encoded-Low Swing Technique for Ultra Low Power Interconnect.	FPL	2003	DBLP DOI BibTeX RDF
40	Changyun Zhu, Zhenyu (Peter) Gu, Li Shang, Robert P. Dick, Robert G. Knobel	Towards An Ultra-Low-Power Architecture Using Single-Electron Tunneling Transistors.	DAC	2007	DBLP DOI BibTeX RDF
39	Nagaraj Ns, John Byler, Koorosh Nazifi, Venugopal Puvvada, Toshiyuki Saito, Alan Gibbons, S. Balajee	What's cool for the future of ultra low power designs?	DAC	2010	DBLP DOI BibTeX RDF	system level power, low power, system design
38	Ajith Amerasekera	Ultra low power electronics in the next decade.	ISLPED	2010	DBLP DOI BibTeX RDF	low-power electronics, power management
37	Chee How Lim, W. Robert Daasch, George Cai	A Thermal-Aware Superscalar Microprocessor (invited).	ISQED	2002	DBLP DOI BibTeX RDF
37	John Keane 0001, Hanyong Eom, Tony Tae-Hyoung Kim, Sachin S. Sapatnekar, Chris H. Kim	Subthreshold logical effort: a systematic framework for optimal subthreshold device sizing.	DAC	2006	DBLP DOI BibTeX RDF	subthreshold logic, ultra-low power design, logical effort
37	Andreas G. Andreou, Kwabena A. Boahen	A 590, 000 transistor 48, 000 pixel, contrast sensitive, edge enhancing, CMOS imager-silicon retina.	ARVLSI	1995	DBLP DOI BibTeX RDF	silicon retina, analog VLSI focal plane processor, phototransduction, local gain control, single chip system, vertebrate distal retina, ultra low power dissipation, n-well double metal double poly digital oriented CMOS technology, current-mode subthreshold CMOS, 48000 pixel, computer vision, VLSI, edge detection, CMOS integrated circuits, image sensors, contrast, edge enhancement, CMOS imager, focal planes, area efficiency, 1.2 micron
37	Kyu-won Choi, Abhijit Chatterjee	PA-ZSA (Power-Aware Zero-Slack Algorithm): A Graph-Based Timing Analysis for Ultra-Low Power CMOS VLSI.	PATMOS	2002	DBLP DOI BibTeX RDF
36	Chao Lu, Chi-Ying Tsui, Wing-Hung Ki	Vibration energy scavenging and management for ultra low power applications.	ISLPED	2007	DBLP DOI BibTeX RDF	batteryless, energy scavenging and management, MPPT
36	Hendrawan Soeleman, Kaushik Roy 0001	Digital CMOS logic operation in the sub-threshold region.	ACM Great Lakes Symposium on VLSI	2000	DBLP DOI BibTeX RDF
35	Tony Tae-Hyoung Kim, Jason Liu 0004, John Keane 0001, Chris H. Kim	Circuit techniques for ultra-low power subthreshold SRAMs.	ISCAS	2008	DBLP DOI BibTeX RDF
35	Rahul Sarpeshkar	Invited Talk: Ultra Low Power Electronics for Medicine.	BSN	2006	DBLP DOI BibTeX RDF
35	Kavita Nair, Ramesh Harjani	Compact, Ultra Low Power, Programmable Continuous-Time Filter Banks for Feedback Cancellation in Hearing Aid.	VLSI Design	1999	DBLP DOI BibTeX RDF
34	Kuan-Yu Lin, T. K. K. Tsang, Mohamad Sawan, Mourad N. El-Gamal	Radio-triggered solar and RF power scavenging and management for ultra low power wireless medical applications.	ISCAS	2006	DBLP DOI BibTeX RDF
33	Robert G. Lupu, Andrei Stan, Florina Ungureanu	Patient Monitoring: Wearable Device for Patient Monitoring.	World Congress on Engineering (Selected Papers)	2008	DBLP DOI BibTeX RDF	wearable medical Device, monitoring device, Wearable Device, Patient Monitoring
33	Sheng Cheng Lee, Yu-Teng Liang, Hsing-Yen Tsai, Jia-Rui Huang, Peng-Chu Chen, Chao-Heng Liu, Yu-Tse Shih, Ke-Horng Chen, Kuo-Lin Zheng, Ying-Hsi Lin, Shian-Ru Lin, Tsung-Yen Tsai	A 26nA Ultra-Low Input Current, 81nW Ultra-Low Power and 1μs Recovery Time Ultra-Fast Transient DC-DC Buck Converter for Internet-of-Things.	ESSCIRC	2023	DBLP DOI BibTeX RDF
33	Muhammad Adeel Pasha, Steven Derrien, Olivier Sentieys	A complete design-flow for the generation of ultra low-power WSN node architectures based on micro-tasking.	DAC	2010	DBLP DOI BibTeX RDF	WSN node, hardware specialization, microcoded architecture, low-power design
32	David Levacq, Vincent Dessard, Denis Flandre	Ultra-low power flip-flops for MTCMOS circuits.	ISCAS (5)	2005	DBLP DOI BibTeX RDF
31	Jan M. Rabaey	Traveling the Wild Frontier of Ultra Low-Power Design.	PATMOS	2005	DBLP DOI BibTeX RDF
30	Yen-Jen Chang	An ultra low-power TLB design.	DATE	2006	DBLP DOI BibTeX RDF
30	Kyu-won Choi, Abhijit Chatterjee	HA2TSD: hierarchical time slack distribution for ultra-low power CMOS VLSI.	ISLPED	2002	DBLP DOI BibTeX RDF	gate-level power optimization, time slack distribution, low-power design
30	Andrea Ricci, Ilaria De Munari	Enabling Pervasive Sensing with RFID: An Ultra Low-Power Digital Core for UHF Transponders.	ISCAS	2007	DBLP DOI BibTeX RDF
29	Rémi Le Révérend, Izzet Kale, Guy Delight, Dik Morling, Steve Morris	An ultra-low power double-sampled A/D MASH ΣΔ modulator.	ISCAS (1)	2003	DBLP DOI BibTeX RDF
28	Sung-Jin Kim, Min-Chang Cho, Joonhyun Park, Kisuk Song, Yul Kim, SeongHwan Cho	An ultra low power UHF RFID tag front-end for EPCglobal Gen2 with novel clock-free decoder.	ISCAS	2008	DBLP DOI BibTeX RDF
28	Adnan Gundel, William N. Carr	Ultra Low Power CMOS PLL Clock Synthesizer for Wireless Sensor Nodes.	ISCAS	2007	DBLP DOI BibTeX RDF
28	SangSoon Lim, Youngmin Ji, JaeJoon Cho, Sunshin An	An Ultra Low Power Medium Access Control Protocol with the Divided Preamble Sampling.	UCS	2006	DBLP DOI BibTeX RDF
28	Zhengming Fu, Eugenio Culurciello	An ultra-low power silicon-on-sapphire ADC for energy-scavenging sensors.	ISCAS	2006	DBLP DOI BibTeX RDF
28	Wolfgang Nebel, Bärbel Mertsching, Birger Kollmeier	Digital Hearing Aids: Challenges and Solutions for Ultra Low Power.	PATMOS	2005	DBLP DOI BibTeX RDF
28	Leila Shepherd, Chris Toumazou	Towards an implantable ultra-low power biochemical signal processor for blood and tissue monitoring.	ISCAS (5)	2005	DBLP DOI BibTeX RDF
28	Konstantinos Sarrigeorgidis, Jan M. Rabaey	Ultra Low Power CORDIC Processor for Wireless Communication Algorithms.	J. VLSI Signal Process.	2004	DBLP DOI BibTeX RDF	cordic arithmetic, wireless communications, low power design, least squares, QR decomposition, redundant arithmetic
28	Amre El-Hoiydi, Jean-Dominique Decotignie	WiseMAC: An Ultra Low Power MAC Protocol for Multi-hop Wireless Sensor Networks.	ALGOSENSORS	2004	DBLP DOI BibTeX RDF
28	Edgar Mauricio Camacho-Galeano, Juliano Q. Moreira, Maicon Deivid Pereira, Adilson J. Cardoso, Carlos Galup-Montoro, Márcio C. Schneider	Temperature performance of sub-1V ultra-low power current sources.	ISCAS	2008	DBLP DOI BibTeX RDF
28	Jochem Govers, Jos Huisken, Mladen Berekovic, Olivier Rousseaux, Frank Bouwens, Michael De Nil, Jef L. van Meerbergen	Implementation of an UWB Impulse-Radio Acquisition and Despreading Algorithm on a Low Power ASIP.	HiPEAC	2008	DBLP DOI BibTeX RDF
28	Mohammad Reza Kakoee, Ashoka Visweswara Sathanur, Antonio Pullini, Jos Huisken, Luca Benini	Automatic synthesis of near-threshold circuits with fine-grained performance tunability.	ISLPED	2010	DBLP DOI BibTeX RDF	near threshold, sub-threshold performance, variability compensation, low power, ultra low power, dual VDD, sub-threshold
28	Julien Penders, Bernard Grundlehner, Ruud J. M. Vullers, Bert Gyselinckx	Potential and Challenges of Body Area Networks for Affective Human Computer Interaction.	HCI (16)	2009	DBLP DOI BibTeX RDF	Ambulatory, Emotion monitoring, Wireless, Body area networks, Ultra-low-power
28	David Bol, Denis Flandre, Jean-Didier Legat	Technology flavor selection and adaptive techniques for timing-constrained 45nm subthreshold circuits.	ISLPED	2009	DBLP DOI BibTeX RDF	adaptive circuits, subthreshold logic, variability, CMOS digital integrated circuits, ultra-low power
28	David Bol, Dina Kamel, Denis Flandre, Jean-Didier Legat	Nanometer MOSFET effects on the minimum-energy point of 45nm subthreshold logic.	ISLPED	2009	DBLP DOI BibTeX RDF	short-channel effects, subthreshold logic, variability, cmos digital integrated circuits, ultra-low power, gate leakage
28	Christos Strydis, Georgi Gaydadjiev	Profiling of lossless-compression algorithms for a novel biomedical-implant architecture.	CODES+ISSS	2008	DBLP DOI BibTeX RDF	implantable devices, microarchitectural profiling, lossless compression, ultra-low power
28	Christos Strydis, Di Zhu, Georgi Gaydadjiev	Profiling of symmetric-encryption algorithms for a novel biomedical-implant architecture.	Conf. Computing Frontiers	2008	DBLP DOI BibTeX RDF	implantable devices, microarchitectural profiling, symmetric encryption, ultra-low power
28	Jabulani Nyathi, Brent Bero	Logic circuits operating in subthreshold voltages.	ISLPED	2006	DBLP DOI BibTeX RDF	logic styles, medium-to-high speed, off current, ultra-low power, noise margins, subthreshold, body biasing
28	Pierluigi Nuzzo 0001, Geert Van der Plas, Fernando De Bernardinis, Liesbet Van der Perre, Bert Gyselinckx, Pierangelo Terreni	A 10.6mW/0.8pJ power-scalable 1GS/s 4b ADC in 0.18mum CMOS with 5.8GHz ERBW.	DAC	2006	DBLP DOI BibTeX RDF	flash converters, ultra-low power high-speed converter design, ultra-wide band
27	Sung-Bae Park	DLV (Deep Low Voltage): Circuits and Devices.	PATMOS	2005	DBLP DOI BibTeX RDF
27	Florian Troesch, Thomas Zasowski, Armin Wittneben	Non-Linear UWB Receivers with MLSE Post-Detection.	VTC Spring	2008	DBLP DOI BibTeX RDF
27	Haolu Xie, Xin Wang 0031, Albert Z. Wang, Bo Qin, Hongyi Chen, Yumei Zhou, Bin Zhao 0002	A Varying Pulse Width Second Order Derivative Gaussian Pulse Generator for UWB Transceivers in CMOS.	ISCAS	2007	DBLP DOI BibTeX RDF
27	Nima Sadeghi, Sheryl L. Howard, Soraya Kasnavi, Kris Iniewski, Vincent C. Gaudet, Christian Schlegel	Analysis of error control code use in ultra-low-power wireless sensor networks.	ISCAS	2006	DBLP DOI BibTeX RDF
27	Joseph Polastre, Robert Szewczyk, David E. Culler	Telos: enabling ultra-low power wireless research.	IPSN	2005	DBLP DOI BibTeX RDF
27	Chris Hyung-Il Kim, Hendrawan Soeleman, Kaushik Roy 0001	Ultra-low-power DLMS adaptive filter for hearing aid applications.	IEEE Trans. Very Large Scale Integr. Syst.	2003	DBLP DOI BibTeX RDF
26	R. Morales-Ramos, Alexander Vaz, Daniel Pardo 0001, Roc Berenguer	Ultra-Low Power Passive UHF RFID for Wireless Sensor Networks.	DSD	2008	DBLP DOI BibTeX RDF
26	Benoit Gosselin, Mohamad Sawan	An ultra low-power CMOS action potential detector.	ISCAS	2008	DBLP DOI BibTeX RDF
26	Z. Wang, Hüseyin Serif Savci, Numan Sadi Dogan	1-V ultra-low-power CMOS LC VCO for UHF quadrature signal generation.	ISCAS	2006	DBLP DOI BibTeX RDF
26	Karim Abdelhalim, Leonard MacEachern, Samy A. Mahmoud	A nanowatt ADC for ultra low power applications.	ISCAS	2006	DBLP DOI BibTeX RDF
26	Frank Ellinger, Corrado Carta, Lucio Rodoni, George von Büren, David Barras, Martin L. Schmatz, Heinz Jäckel	BiCMOS Variable Gain LNA at C-Band with Ultra Low Power Consumption for WLAN.	ICT	2004	DBLP DOI BibTeX RDF
26	Richard C. S. Morling, Izzet Kale, S. J. Morris, F. Custode	DSP engine for ultra-low-power audio applications.	ISCAS (5)	2003	DBLP DOI BibTeX RDF
26	Alice Wang, Anantha P. Chandrakasan, Stephen V. Kosonocky	Optimal Supply and Threshold Scaling for Subthreshold CMOS Circuits.	ISVLSI	2002	DBLP DOI BibTeX RDF
25	Peterson R. Agostinho, Sandro A. P. Haddad, Jader A. De Lima, Wouter A. Serdijn, Osamu Saotome	A ultra low power CMOS pA/V transconductor and its application to wavelet filters.	SBCCI	2007	DBLP DOI BibTeX RDF	pa/V, transconductor, low-power
25	Sandro A. P. Haddad, Wouter A. Serdijn	An ultra low-power class-AB sinh integrator.	SBCCI	2006	DBLP DOI BibTeX RDF	Sinh integrator, analog electronics, class-AB integrator, log-domain filters, low-power circuit design
25	Valeriu Beiu, Asbjørn Djupdal, Snorre Aunet	Ultra Low-Power Neural Inspired Addition: When Serial Might Outperform Parallel Architectures.	IWANN	2005	DBLP DOI BibTeX RDF
25	Gunnar Gaubatz, Jens-Peter Kaps, Erdinç Öztürk, Berk Sunar	State of the Art in Ultra-Low Power Public Key Cryptography for Wireless Sensor Networks.	PerCom Workshops	2005	DBLP DOI BibTeX RDF
25	Hendrawan Soeleman, Kaushik Roy 0001, Bipul Chandra Paul	Robust subthreshold logic for ultra-low power operation.	IEEE Trans. Very Large Scale Integr. Syst.	2001	DBLP DOI BibTeX RDF
25	Hendrawan Soeleman, Kaushik Roy 0001, Bipul Chandra Paul	Sub-Domino Logic: Ultra-Low Power Dynamic Sub-Threshold Digital Logic.	VLSI Design	2001	DBLP DOI BibTeX RDF
25	Carmine Paolino, Fabio Pareschi, Mauro Mangia, Riccardo Rovatti, Gianluca Setti	An architecture for ultra-low-voltage ultra-low-power compressed sensing-based acquisition systems.	NorCAS	2021	DBLP DOI BibTeX RDF
25	Yi Zhan, Ao Hu, Guoyi Yu, Zhenghao Lu, Chao Wang 0096	An Ultra-low Power Relaxation Oscillator with Novel Ultra-low Leakage Switch and Temperature-compensated Resistor.	ICTA	2020	DBLP DOI BibTeX RDF
25	Seyed Javad Azhari, Ghader Nickhah	A Novel Ultra-Low-Power, Low-Voltage, Ultra-High Output Resistance and Uniquely High Bandwidth Femto-Ampere Current Mirror.	Circuits Syst. Signal Process.	2017	DBLP DOI BibTeX RDF