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2002-2009 (16) 2010-2012 (15) 2013-2017 (18) 2018-2020 (18) 2021-2024 (14)
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Found 81 publication records. Showing 81 according to the selection in the facets
Hits ? Authors Title Venue Year Link Author keywords
117Matt T. Yourst PTLsim: A Cycle Accurate Full System x86-64 Microarchitectural Simulator. Search on Bibsonomy ISPASS The full citation details ... 2007 DBLP  DOI  BibTeX  RDF client-server networked benchmark, PTLsim, cycle accurate full system, x86-64 microarchitectural simulator, superscalar x86-64 processor core, full-speed native execution, microarchitectural simulators, x86 ISA, microoperation level, multiprocessor capable simulation, Xen hypervisor, AMD Athlon 64 machine, virtual machine
63Dong Ye 0004, Joydeep Ray, Christophe Harle, David R. Kaeli Performance Characterization of SPEC CPU2006 Integer Benchmarks on x86-64 Architecture. Search on Bibsonomy IISWC The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
34Yoshiyuki Yamashita, Masato Tsuru Implementing Fast Packet Filters by Software Pipelining on x86 Processors. Search on Bibsonomy APPT The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
29Daniel Hackenberg, Daniel Molka, Wolfgang E. Nagel Comparing cache architectures and coherency protocols on x86-64 multicore SMP systems. Search on Bibsonomy MICRO The full citation details ... 2009 DBLP  DOI  BibTeX  RDF Nehalem, Shanghai, benchmark, multi-core, coherency
23Pat Conway, Nathan Kalyanasundharam, Gregg Donley, Kevin Lepak, Bill Hughes Cache Hierarchy and Memory Subsystem of the AMD Opteron Processor. Search on Bibsonomy IEEE Micro The full citation details ... 2010 DBLP  DOI  BibTeX  RDF x86-64, cache directory, probe filter, system interconnect, HyperTransport3 technology, power envelopes, cache, multiprocessor, memory hierarchy, processor, blade server
22Hui Zeng, Matt T. Yourst, Kanad Ghose, Dmitry V. Ponomarev MPTLsim: a simulator for X86 multicore processors. Search on Bibsonomy DAC The full citation details ... 2009 DBLP  DOI  BibTeX  RDF simulator, microprocessor, coherent cache
22Pat Conway, Bill Hughes The AMD Opteron Northbridge Architecture. Search on Bibsonomy IEEE Micro The full citation details ... 2007 DBLP  DOI  BibTeX  RDF system topology, northbridge, scalability, microarchitecture, point-to-point networking
22Marek Olszewski, Keir Mierle, Adam Czajkowski, Angela Demke Brown JIT instrumentation: a novel approach to dynamically instrument operating systems. Search on Bibsonomy EuroSys The full citation details ... 2007 DBLP  DOI  BibTeX  RDF kernel analysis tools, dynamic instrumentation, JIT compiler, binary rewriting
18Yuki Naganawa, Hirokazu Kamei, Yamato Kanetaka, Haruki Nogami, Yoshihiro Maeda, Norishige Fukushima SIMD-Constrained Lookup Table for Accelerating Variable-Weighted Convolution on x86/64 CPUs. Search on Bibsonomy IEEE Access The full citation details ... 2024 DBLP  DOI  BibTeX  RDF
18Daniel Engel, Freek Verbeek, Binoy Ravindran BIRD: A Binary Intermediate Representation for Formally Verified Decompilation of X86-64 Binaries. Search on Bibsonomy TAP The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
18Benjamin Munger, Kathy Wilcox, Jeshuah Sniderman, Chuck Tung, Brett Johnson, Russell Schreiber, Carson Henrion, Kevin Gillespie, Tom Burd, Harry R. Fair III, Dave Johnson 0002, Jonathan White, Scott McLelland, Steven Bakke, Javin Olson, Ryan McCracken, Matthew Pickett, Aaron Horiuchi, Hien Nguyen, Tim Jackson "Zen 4": The AMD 5nm 5.7GHz x86-64 Microprocessor Core. Search on Bibsonomy ISSCC The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
18Changwei Zou, Yaoqing Gao, Jingling Xue Practical Software-Based Shadow Stacks on x86-64. Search on Bibsonomy ACM Trans. Archit. Code Optim. The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
18Lukas Bernhard, Michael Rodler, Thorsten Holz, Lucas Davi xTag: Mitigating Use-After-Free Vulnerabilities via Software-Based Pointer Tagging on Intel x86-64. Search on Bibsonomy CoRR The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
18Jyun-Kai Lai, Wuu Yang Hyperchaining for LLVM-Based Binary Translators on the x86-64 Platform. Search on Bibsonomy J. Signal Process. Syst. The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
18Eric Schulte, Michael D. Brown, Vlad Folts A Broad Comparative Evaluation of x86-64 Binary Rewriters. Search on Bibsonomy CSET @ USENIX Security Symposium The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
18Lukas Bernhard, Michael Rodler, Thorsten Holz, Lucas Davi xTag: Mitigating Use-After-Free Vulnerabilities via Software-Based Pointer Tagging on Intel x86-64. Search on Bibsonomy EuroS&P The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
18Freek Verbeek, Joshua A. Bockenek, Zhoulai Fu, Binoy Ravindran Formally verified lifting of C-compiled x86-64 binaries. Search on Bibsonomy PLDI The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
18John J. Wuu, Rahul Agarwal, Michael Ciraula, Carl Dietz, Brett Johnson, Dave Johnson 0002, Russell Schreiber, Raja Swaminathan, Will Walker, Samuel Naffziger 3D V-Cache: the Implementation of a Hybrid-Bonded 64MB Stacked Cache for a 7nm x86-64 CPU. Search on Bibsonomy ISSCC The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
18Thomas Burd, Wilson Li, James Pistole, Srividhya Venkataraman, Michael McCabe, Timothy Johnson, James Vinh, Thomas Yiu, Mark Wasio, Hon-Hin Wong, Daryl Lieu, Jonathan White, Benjamin Munger, Joshua Lindner, Javin Olson, Steven Bakke, Jeshuah Sniderman, Carson Henrion, Russell Schreiber, Eric Busta, Brett Johnson, Tim Jackson, Aron Miller, Ryan Miller, Matthew Pickett, Aaron Horiuchi, Josef Dvorak, Sabeesh Balagangadharan, Sajeesh Ammikkallingal, Pankaj Kumar Zen3: The AMD 2nd-Generation 7nm x86-64 Microprocessor Core. Search on Bibsonomy ISSCC The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
18Chaorun Liu, Huayou Su, Yong Dou, Qinglin Wang Optimize DGL Operations on x86-64 Multi-Core Processors. Search on Bibsonomy HP3C The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
18Jyun-Kai Lai, Wuu Yang Hyperchaining Optimizations for an LLVM-Based Binary Translator on x86-64 and RISC-V Platforms. Search on Bibsonomy ICPP Workshops The full citation details ... 2021 DBLP  DOI  BibTeX  RDF
18William Woodruff, Niki Carroll, Sebastiaan Peters Differential analysis of x86-64 instruction decoders. Search on Bibsonomy SP (Workshops) The full citation details ... 2021 DBLP  DOI  BibTeX  RDF
18Conor Pirry, Hector Marco-Gisbert, Carolyn Begg A Review of Memory Errors Exploitation in x86-64. Search on Bibsonomy Comput. The full citation details ... 2020 DBLP  DOI  BibTeX  RDF
18Georgios Georgis, Alexios Thanos, Marcin Filo, Konstantinos Nikitopoulos A DSP Acceleration Framework For Software-Defined Radios On X86 64. Search on Bibsonomy ICASSP The full citation details ... 2020 DBLP  DOI  BibTeX  RDF
18Teja Singh, Sundar Rangarajan, Deepesh John, Russell Schreiber, Spence Oliver, Rajit Seahra, Alex Schaefer 2.1 Zen 2: The AMD 7nm Energy-Efficient High-Performance x86-64 Microprocessor Core. Search on Bibsonomy ISSCC The full citation details ... 2020 DBLP  DOI  BibTeX  RDF
18Xuewei Feng, Dongxia Wang 0001, Zhechao Lin, Xiaohui Kuang, Gang Zhao Enhancing Randomization Entropy of x86-64 Code while Preserving Semantic Consistency. Search on Bibsonomy TrustCom The full citation details ... 2020 DBLP  DOI  BibTeX  RDF
18Freek Verbeek, Pierre Olivier, Binoy Ravindran Sound C Code Decompilation for a Subset of x86-64 Binaries. Search on Bibsonomy SEFM The full citation details ... 2020 DBLP  DOI  BibTeX  RDF
18Brandon Neth, Michelle Mills Strout Automatic Parallelization of Irregular x86-64 Loops. Search on Bibsonomy CGO The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
18Joshua A. Bockenek, Freek Verbeek, Peter Lammich, Binoy Ravindran Formal Verification of Memory Preservation of x86-64 Binaries. Search on Bibsonomy SAFECOMP The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
18Caitlin Fanning, Saturnino Garcia Below C Level: A Student-Centered x86-64 Simulator. Search on Bibsonomy ITiCSE The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
18Amogh Akshintala, Bhushan Jain, Chia-che Tsai, Michael Ferdman, Donald E. Porter x86-64 instruction usage among C/C++ applications. Search on Bibsonomy SYSTOR The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
18Sandeep Dasgupta, Daejun Park 0001, Theodoros Kasampalis, Vikram S. Adve, Grigore Rosu A complete formal semantics of x86-64 user-level instruction set architecture. Search on Bibsonomy PLDI The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
18Yi-Ping You, Tsung-Chun Lin, Wuu Yang Translating AArch64 Floating-Point Instruction Set to the x86-64 Platform. Search on Bibsonomy ICPP Workshops The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
18Andrés Rainiero Hernández Coronado, Wonjun Lee 0003 Are We Referring to the Same x86 64?: Detection of Cache Events in AMD's Zen Micro-architecture. Search on Bibsonomy ICDCS The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
18Yishen Chen, Ajay Brahmakshatriya, Charith Mendis, Alex Renda, Eric Atkinson, Ondrej Sýkora, Saman P. Amarasinghe, Michael Carbin BHive: A Benchmark Suite and Measurement Framework for Validating x86-64 Basic Block Performance Models. Search on Bibsonomy IISWC The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
18Ian Roessle, Freek Verbeek, Binoy Ravindran Formally verified big step semantics out of x86-64 binaries. Search on Bibsonomy CPP The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
18Gregory Michael Price Virtual Breakpoints for x86/64. Search on Bibsonomy CoRR The full citation details ... 2018 DBLP  BibTeX  RDF
18Caitlin Fanning Below C Level: A Simulator for Visualizing x86-64 (Abstract Only). Search on Bibsonomy SIGCSE The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
18Paul Muntean, Matthias Fischer, Gang Tan, Zhiqiang Lin, Jens Grossklags, Claudia Eckert 0001 τCFI: Type-Assisted Control Flow Integrity for x86-64 Binaries. Search on Bibsonomy RAID The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
18Manuel Rigger, Stefan Marr, Stephen Kell, David Leopoldseder, Hanspeter Mössenböck An Analysis of x86-64 Inline Assembly in C Programs. Search on Bibsonomy VEE The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
18Christian Knauth, Boran Adas, Daniel Whitfield, Xuesong Wang, Lydia Ickler, Tim Conrad 0001, Oliver Serang Practically efficient methods for performing bit-reversed permutation in C++11 on the x86-64 architecture. Search on Bibsonomy CoRR The full citation details ... 2017 DBLP  BibTeX  RDF
18Junho Jeong, Yunsik Son 0001, Seman Oh The x86/64 Binary Code to Smart Intermediate Language Translation for Software Weakness. Search on Bibsonomy ICAIP The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
18Buddhika Chamith, Bo Joel Svensson, Luke Dalessandro, Ryan R. Newton Instruction punning: lightweight instrumentation for x86-64. Search on Bibsonomy PLDI The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
18George Papadimitriou 0001, Manolis Kaliorakis, Athanasios Chatzidimitriou, Charalampos Magdalinos, Dimitris Gizopoulos Voltage margins identification on commercial x86-64 multicore microprocessors. Search on Bibsonomy IOLTS The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
18Shigeki Akiyama, Kenjiro Taura Scalable Work Stealing of Native Threads on an x86-64 Infiniband Cluster. Search on Bibsonomy J. Inf. Process. The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
18Stefan Heule, Eric Schkufza, Rahul Sharma 0001, Alex Aiken Stratified synthesis: automatically learning the x86-64 instruction set. Search on Bibsonomy PLDI The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
18Aaron Grenat, Sriram Sundaram, Stephen Kosonocky, Ravinder Rachala, Sriram Sambamurthy, Steven Liepe, Miguel Rodriguez, Tom Burd, Adam Clark, Michael Austin, Samuel Naffziger 4.2 Increasing the performance of a 28nm x86-64 microprocessor through system power management. Search on Bibsonomy ISSCC The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
18Markus Wittmann, Thomas Zeiser, Georg Hager, Gerhard Wellein Short Note on Costs of Floating Point Operations on current x86-64 Architectures: Denormals, Overflow, Underflow, and Division by Zero. Search on Bibsonomy CoRR The full citation details ... 2015 DBLP  BibTeX  RDF
18Marco Elver, Vijay Nagarajan RC3: Consistency Directed Cache Coherence for x86-64 with RC Extensions. Search on Bibsonomy PACT The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
18Kevin Hammond, Christopher Brown 0002, Susmit Sarkar Timing Properties and Correctness for Structured Parallel Programs on x86-64 Multicores. Search on Bibsonomy FOPARA The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
18Jayneel Gandhi, Arkaprava Basu, Mark D. Hill, Michael M. Swift BadgerTrap: a tool to instrument x86-64 TLB misses. Search on Bibsonomy SIGARCH Comput. Archit. News The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
18John Gatewood Ham An ECMA-55 Minimal BASIC Compiler for x86-64 Linux. Search on Bibsonomy Comput. The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
18Jason Power, Mark D. Hill, David A. Wood 0001 Supporting x86-64 address translation for 100s of GPU lanes. Search on Bibsonomy HPCA The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
18Kevin Gillespie, Harry R. Fair III, Carson Henrion, Ravi Jotwani, Stephen V. Kosonocky, Robert S. Orefice, Donald A. Priore, Jonathan White, Kathryn Wilcox 5.5 Steamroller: An x86-64 core implemented in 28nm bulk CMOS. Search on Bibsonomy ISSCC The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
18Aaron Grenat, Sanjay Pant, Ravinder Rachala, Samuel Naffziger 5.6 Adaptive clocking system for improved power efficiency in a 28nm x86-64 microprocessor. Search on Bibsonomy ISSCC The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
18Visvesh S. Sathe 0001, Srikanth Arekapudi, Alexander T. Ishii, Charles Ouyang, Marios C. Papaefthymiou, Samuel Naffziger Resonant-Clock Design for a Power-Efficient, High-Volume x86-64 Microprocessor. Search on Bibsonomy IEEE J. Solid State Circuits The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
18Teja Singh, Joshua Bell, Shane Southard Jaguar: A next-generation low-power x86-64 core. Search on Bibsonomy ISSCC The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
18Magnus O. Myreen, Gregorio Curello Proof Pearl: A Verified Bignum Implementation in x86-64 Machine Code. Search on Bibsonomy CPP The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
18Hugh McIntyre, Srikanth Arekapudi, Eric Busta, Timothy C. Fischer, Michael Golden, Aaron Horiuchi, Tom Meneghini, Samuel Naffziger, James Vinh Design of the Two-Core x86-64 AMD "Bulldozer" Module in 32 nm SOI CMOS. Search on Bibsonomy IEEE J. Solid State Circuits The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
18Denis Foley, Pankaj Bansal, Don Cherepacha, Robert Wasmuth, Aswin Gunasekar, Srinivasa Rao Gutta, Ajay Naini A Low-Power Integrated x86-64 and Graphics Processor for Mobile Computing Devices. Search on Bibsonomy IEEE J. Solid State Circuits The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
18Antoni Portero, Alberto Scionti, Zhibin Yu, Paolo Faraboschi, Caroline Concatto, Luigi Carro, Arne Garbade, Sebastian Weis, Theo Ungerer, Roberto Giorgi Simulating the future kilo-x86-64 core processors and their infrastructure. Search on Bibsonomy SpringSim (ANSS) The full citation details ... 2012 DBLP  BibTeX  RDF
18Steve J. Dillen, Donald A. Priore, Aaron Horiuchi, Samuel Naffziger Design and implementation of soft-edge flip-flops for x86-64 AMD microprocessor modules. Search on Bibsonomy CICC The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
18Visvesh S. Sathe 0001, Srikanth Arekapudi, Charles Ouyang, Marios C. Papaefthymiou, Alexander T. Ishii, Samuel Naffziger Resonant clock design for a power-efficient high-volume x86-64 microprocessor. Search on Bibsonomy ISSCC The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
18Ravi Jotwani, Sriram Sundaram, Stephen Kosonocky, Alex Schaefer, Victor Andrade, Amy Novak, Sam Naffziger An x86-64 Core in 32 nm SOI CMOS. Search on Bibsonomy IEEE J. Solid State Circuits The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
18Sean White High-performance power-efficient x86-64 server and desktop processors using the core codenamed "Bulldozer". Search on Bibsonomy Hot Chips Symposium The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
18Michael Golden, Srikanth Arekapudi, James Vinh 40-Entry unified out-of-order scheduler and integer execution unit for the AMD Bulldozer x86-64 core. Search on Bibsonomy ISSCC The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
18Srinivasa Rao Gutta, Denis Foley, Ajay Naini, Robert Wasmuth, Don Cherepacha A low-power integrated x86-64 and graphics processor for mobile computing devices. Search on Bibsonomy ISSCC The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
18Patrick Longa, Catherine H. Gebotys Analysis of Efficient Techniques for Fast Elliptic Curve Cryptography on x86-64 based Processors. Search on Bibsonomy IACR Cryptol. ePrint Arch. The full citation details ... 2010 DBLP  BibTeX  RDF
18Daniel Molka, Daniel Hackenberg, Robert Schöne, Matthias S. Müller Characterizing the energy consumption of data transfers and arithmetic operations on x86-64 processors. Search on Bibsonomy Green Computing Conference The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
18Gao Xia, Bin Liu 0001 Accelerating network applications on X86-64 platforms. Search on Bibsonomy ISCC The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
18Ravi Jotwani, Sriram Sundaram, Stephen Kosonocky, Alex Schaefer, Victor Andrade, Greg Constant, Amy Novak, Sam Naffziger An x86-64 core implemented in 32nm SOI CMOS. Search on Bibsonomy ISSCC The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
18Hui Zeng, Matt T. Yourst, Kanad Ghose, Dmitry Ponomarev 0001 MPTLsim: a cycle-accurate, full-system simulator for x86-64 multicore architectures with coherent caches. Search on Bibsonomy SIGARCH Comput. Archit. News The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
18William Keshlear, Spence Oliver, Robert Colyer, Jeremy Schreiber, Ted Antoniadis, Tom Mickelson, Tim Puzey, Michael Bates Design optimizations for reduced power and higher operating frequency in a custom x86-64 processor core. Search on Bibsonomy CICC The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
18Frank van der Linden 0001 Porting NetBSD to the AMD x86-64: A Case Study in OS Portability. Search on Bibsonomy BSDCon The full citation details ... 2002 DBLP  BibTeX  RDF
11Thomas W. Barr, Alan L. Cox, Scott Rixner Translation caching: skip, don't walk (the page table). Search on Bibsonomy ISCA The full citation details ... 2010 DBLP  DOI  BibTeX  RDF page walk caching, memory management, tlb
11Michael Kistler, John A. Gunnels, Daniel A. Brokenshire, Brad Benton Petascale computing with accelerators. Search on Bibsonomy PPoPP The full citation details ... 2009 DBLP  DOI  BibTeX  RDF hybrid programming models, accelerators
11Leslie Barnes Performance Modeling and Analysis for AMD's High Performance Microprocessors. Search on Bibsonomy ISPASS The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
11Timothy Furtak, José Nelson Amaral, Robert Niewiadomski Using SIMD registers and instructions to enable instruction-level parallelism in sorting algorithms. Search on Bibsonomy SPAA The full citation details ... 2007 DBLP  DOI  BibTeX  RDF sorting, instruction-level parallelism, SIMD, vectorization, sorting networks, quicksort
11Björn Andersson Roadmaps and visions II - Getting ahead, staying ahead: modular sun x64 servers for HPC. Search on Bibsonomy SC The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
11Matt T. Yourst, Kanad Ghose Incremental Commit Groups for Non-Atomic Trace Processing. Search on Bibsonomy MICRO The full citation details ... 2005 DBLP  DOI  BibTeX  RDF trace prediction, VLIW, commitment, binary translation
11Chetana N. Keltcher, Kevin J. McGrath, Ardsher Ahmed, Pat Conway The AMD Opteron Processor for Multiprocessor Servers. Search on Bibsonomy IEEE Micro The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
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