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GrowBag graphs for keyword ? (Num. hits/coverage)
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Results
Found 1930 publication records. Showing 1930 according to the selection in the facets
| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Raphael Cardoso, Clément Zrounba, Mohab Abdalla, Paul Jiménez, Mauricio Gomes de Queiroz, Benoît Charbonnier, Fabio Pavanello, Ian O'Connor, Sébastien Le Beux |
Photonic Convolution Engine Based on Phase-Change Materials and Stochastic Computing.  |
ISVLSI  |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | S. N. Raghava, Prashanth H. C., Bindu G. Gowda, Pratyush Nandi, Madhav Rao |
Design-Space Exploration of Multiplier Approximation in CNNs. |
ISVLSI |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Guilherme Korol, Michael Guilherme Jordan, Mateus Beck Rutzig, Jerónimo Castrillón, Antonio Carlos Schneider Beck |
Design Space Exploration for CNN Offloading to FPGAs at the Edge. |
ISVLSI |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Sanampudi Gopala Krishna Reddy, Gogireddy Ravi Kiran Reddy, D. R. Vasanthi, Madhav Rao |
Design and Evaluation of M-Term Non-Homogeneous Hybrid Karatsuba Polynomial Multiplier. |
ISVLSI |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Anand Menon, Amisha Srivastava, Shamik Kundu, Kanad Basu |
Application Profiling Using Register-Instruction Hardware Performance Counters. |
ISVLSI |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Arthur Francisco Lorenzon, Guilherme Korol, Marcelo Brandalero, Antonio Carlos Schneider Beck |
Harnessing the Effects of Process Variability to Mitigate Aging in Cloud Servers. |
ISVLSI |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Deepak Puthal, Saraju P. Mohanty, Amit Kumar Mishra, Chan Yeob Yeun, Ernesto Damiani |
Revolutionizing Cyber Security: Exploring the Synergy of Machine Learning and Logical Reasoning for Cyber Threats and Mitigation. |
ISVLSI |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Nidhi Anantharajaiah, Yunhe Xu, Fabian Lesniak, Tanja Harbaum, Jürgen Becker 0001 |
DREAM: Distributed Reinforcement Learning Enabled Adaptive Mixed-Critical NoC. |
ISVLSI |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Damiano Zuccalà, Jean-Marc Daveau, Philippe Roche, Katell Morin-Allory |
Formal Temporal Characterization of Register Vulnerability in Digital Circuits. |
ISVLSI |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Joy Dutta, Deepak Puthal |
IoMT Synthetic Cardiac Arrest Dataset for eHealth with AI-based Validation. |
ISVLSI |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Yerzhan Mustafa, Selçuk Köse |
Modeling and Analysis of Switched-Capacitor Converters as a Multi-port Network for Covert Communication. |
ISVLSI |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Venkata K. V. V. Bathalapalli, Saraju P. Mohanty, Elias Kougianos, Vasanth Iyer, Bibhudutta Rout |
iTPM: Exploring PUF-based Keyless TPM for Security-by-Design of Smart Electronics. |
ISVLSI |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Rodrigo N. Wuerdig, Vitor Hugo F. Maciel, Ricardo Reis 0001, Sergio Bampi |
LEX - A Cell Switching Arcs Extractor: A Simple SPICE-Input Interface for Electrical Characterization. |
ISVLSI |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Gabriel Ammes, Paulo F. Butzen, André Inácio Reis, Renato P. Ribas |
Evaluation of Digital Circuit Design by Combining Two - and Multi-Level Approximate Logic Synthesis. |
ISVLSI |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Yi Xiao, Yixin Xu, Shan Deng, Zijian Zhao, Sumitha George, Kai Ni 0004, Vijaykrishnan Narayanan |
A Compact Ferroelectric 2T-(n+1)C Cell to Implement AND-OR Logic in Memory. |
ISVLSI |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Alessandro Nadalini, Georg Rutishauser, Alessio Burrello, Nazareno Bruschi, Angelo Garofalo, Luca Benini, Francesco Conti 0001, Davide Rossi |
A 3 TOPS/W RISC-V Parallel Cluster for Inference of Fine-Grain Mixed-Precision Quantized Neural Networks. |
ISVLSI |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Marcel Walter, Benjamin Hien, Robert Wille |
Versatile Signal Distribution Networks for Scalable Placement and Routing of Field-coupled Nanocomputing Technologies. |
ISVLSI |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Changfu He, Keyue Deng, Suwen Song, Zhongfeng Wang 0001 |
Column-Weighted Probabilistic GDBF Decoder for Irregular LDPC Codes. |
ISVLSI |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Trishna Rajkumar |
Exploiting Routing Asymmetry for APUF Implementation in FPGA: A Proof-of-Concept. |
ISVLSI |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Indranee Kashyap, Dipika Deb, Nityananda Sarma |
Grep: Performance Enhancement in MultiCore Processors using an Adaptive Graph Prefetcher. |
ISVLSI |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Prabhu Vellaisamy, Harideep Nair, Joseph Finn, Manav Trivedi, Albert Chen, Anna Li, Tsung-Han Lin, Perry H. Wang, Ronald Shawn Blanton, John Paul Shen |
tubGEMM: Energy-Efficient and Sparsity-Effective Temporal-Unary-Binary Based Matrix Multiply Unit. |
ISVLSI |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Omkar G. Ratnaparkhi, Madhav Rao |
CWAHA: Cluster-Wise Approximation for Hardware implementation of Arithmetic functions. |
ISVLSI |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Sadia Anjum Tumpa, Sonali Singh, Md Fahim Faysal Khan, Mahmut Taylan Kandemir, Vijaykrishnan Narayanan, Chita R. Das |
Federated Learning with Spiking Neural Networks in Heterogeneous Systems. |
ISVLSI |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Leonardo Heitich Brendler, Hervé Lapuyade, Yann Deval, Ricardo Reis 0001, François Rivet |
A MCU-robust Interleaved Data/Detection SRAM for Space Environments. |
ISVLSI |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Sobhan Niknam, Yixian Shen, Anuj Pathania, Andy D. Pimentel |
3D-TTP: Efficient Transient Temperature-Aware Power Budgeting for 3D-Stacked Processor-Memory Systems. |
ISVLSI |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Shams Tarek, Hasan Al Shaikh, Sree Ranjani Rajendran, Farimah Farahmandi |
Benchmarking of SoC-Level Hardware Vulnerabilities: A Complete Walkthrough. |
ISVLSI |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Seema G. Aarella, Saraju P. Mohanty, Elias Kougianos, Deepak Puthal |
Fortified-Edge 2.0: Machine Learning based Monitoring and Authentication of PUF-Integrated Secure Edge Data Center. |
ISVLSI |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Harshita Gupta, Mayank Kabra, Asmita Zjigyasu, Madhav Rao |
FastNTT: Design and Evaluation of Modular-Reduction Based Fast NTT Design on FPGA. |
ISVLSI |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | |
IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2023, Foz do Iguacu, Brazil, June 20-23, 2023 |
ISVLSI |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Tiago da Silva Almeida, Lucas Wanner 0001 |
Efficient Accelerator Design in High-Level Synthesis Using Approximate Logic Components. |
ISVLSI |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Baiqing Zhong, Mingyu Wang, Chuanghao Zhang, Yangzhan Mai, Xiaojie Li, Zhiyi Yu |
A Digital SRAM Computing-in-Memory Design Utilizing Activation Unstructured Sparsity for High-Efficient DNN Inference. |
ISVLSI |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Vedika Saravanan, Mohammad Walid Charrwi, Samah Mohamed Saeed |
Revisiting Trojan Insertion Techniques for Post-Silicon Trojan Detection Evaluation. |
ISVLSI |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Michael Guilherme Jordan, Guilherme Korol, Tiago Knorst, Mateus Beck Rutzig, Antonio Carlos Schneider Beck |
Resource Provisioning for CPU-FPGA Environments with Adaptive HLS-Versioning and DVFS. |
ISVLSI |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Giani Augusto Braga, Marcio M. Gonçalves, José Rodrigo Azambuja |
Evaluating an XOR-based Hybrid Fault Tolerance Technique to Detect Faults in GPU Pipelines. |
ISVLSI |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Arjun Suresh, Siva Nishok Dhanuskodi, Daniel E. Holcomb |
A Secure Design Methodology to Prevent Targeted Trojan Insertion during Fabrication. |
ISVLSI |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Hongtao Zhong, Yu Zhu, Longfei Luo, Taixin Li, Chen Wang, Yixin Xu, Tianyi Wang, Yao Yu, Vijaykrishnan Narayanan, Yongpan Liu, Liang Shi, Huazhong Yang, Xueqing Li |
Fe-GCN: A 3D FeFET Memory Based PIM Accelerator for Graph Convolutional Networks. |
ISVLSI |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Vishu Saxena, Yash Jain, Sparsh Mittal |
Machine Learning and Polynomial Chaos models for Accurate Prediction of SET Pulse Current. |
ISVLSI |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Elias de Almeida Ramos, Ricardo Reis 0001 |
Using Lyapunov Exponents and Entropy to Estimate Sensitivity to Process Variability. |
ISVLSI |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Prashanth H. C., Prashanth Jonna, Madhav Rao |
CellFlow: Automated Standard Cell Design Flow. |
ISVLSI |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Sachin Bhat, Sourabh Kulkarni, Csaba Andras Moritz |
Compact Model Parameter Extraction using Bayesian Machine Learning. |
ISVLSI |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Taixin Li, Hongtao Zhong, Sumitha George, Vijaykrishnan Narayanan, Liang Shi, Huazhong Yang, Xueqing Li |
Design Exploration of Dynamic Multi-Level Ternary Content-Addressable Memory Using Nanoelectromechanical Relays. |
ISVLSI |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Marcello M. Muñoz, Denis Maass, Murilo R. Perleberg, Luciano Agostini, Marcelo Schiavon Porto |
Efficient Hardware Design for the VVC Affine Motion Compensation Exploiting Multiple Constant Multiplication. |
ISVLSI |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Kamal Danouchi, Guillaume Prenat, Philippe Talatchian, Louis Hutin, Lorena Anghel |
Robustness and Power Efficiency in Spin-Orbit Torque-Based Probabilistic Logic Circuits. |
ISVLSI |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Grant Brown, Ganesh Gore, Pierre-Emmanuel Gaillardon |
Performance Optimized Clock Tree Embedding for Auto-Generated FPGAs. |
ISVLSI |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Sajjad Parvin, Mehran Goli, Thilo Krachenfels, Shahin Tajik, Jean-Pierre Seifert, Frank Sill Torres, Rolf Drechsler |
LAT-UP: Exposing Layout-Level Analog Hardware Trojans Using Contactless Optical Probing. |
ISVLSI |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Julio Costella Vicenzi, Guilherme Korol, Michael Guilherme Jordan, Wagner Ourique de Morais, Hazem Ali, Edison Pignaton de Freitas, Mateus Beck Rutzig, Antonio Carlos Schneider Beck |
Dynamic Offloading for Improved Performance and Energy Efficiency in Heterogeneous IoT-Edge-Cloud Continuum. |
ISVLSI |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Hui Wang, Jinming Lu, Jun Lin 0001, Zhongfeng Wang 0001 |
An FPGA-Based Reconfigurable CNN Training Accelerator Using Decomposable Winograd. |
ISVLSI |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Chunkai Fu, Ben Trombley, Hua Xiang 0001, Gi-Joon Nam, Jiang Hu |
Machine Learning Techniques for Pre-CTS Identification of Timing Critical Flip-Flops. |
ISVLSI |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Sundarakumar Muthukumaran, Aparajithan Nathamuni Venkatesan, Kishore Pula, Ram Venkat Narayanan, Ranga Vemuri, John Marty Emmert |
Reverse Engineering of RTL Controllers from Look-Up Table Netlists. |
ISVLSI |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Priyanka Panigrahi, Chandan Karfa |
An Investigation into the Security of Register Allocation with Spilling and Splitting. |
ISVLSI |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Geancarlo Abich, Anderson Ignacio da Silva, José Eduardo Thums, Rafael da Silva, Altamiro Amadeu Susin, Ricardo Reis 0001, Luciano Ost |
Power, Performance and Reliability Evaluation of Multi-thread Machine Learning Inference Models Executing in Multicore Edge Devices. |
ISVLSI |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Ruan Evangelista Formigoni, Ricardo S. Ferreira 0001, Omar P. Vilela Neto, José Augusto Miranda Nacif |
L-BANCS: A Multi-Phase Tile Design for Nanomagnetic Logic. |
ISVLSI |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Ivan Saraiva Silva, Francisco Carlos Silva Junior |
X4-RARE: Revisiting the X4CP32 Coarse-Grained Reconfigurable Architecture Model. |
ISVLSI |
2023 |
DBLP DOI BibTeX RDF |
|
| 1 | Priyanka Singla 0001, Smruti R. Sarangi |
CmpctArch: A Generic Low Power Architecture for Compact Data Structures in Energy Harvesting Devices. |
ISVLSI |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Anjum Riaz, Gaurav Kumar, Jaynarayan T. Tudu, Satyadev Ahlawat |
On Protecting IJTAG from Data Sniffing and Alteration Attacks. |
ISVLSI |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Lucas Klemmer, Daniel Große |
An Exploration Platform for Microcoded RISC-V Cores leveraging the One Instruction Set Computer Principle. |
ISVLSI |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Junhuan Yang, Venkat Kalyan Reddy Yasa, Yi Sheng, Dayane Reis, Xun Jiao, Weiwen Jiang, Lei Yang 0018 |
Hardware-aware Automated Architecture Search for Brain-inspired Hyperdimensional Computing. |
ISVLSI |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Andrey Laputenko, Nina Yevtushenko 0001, Valentina Andreeva, Anzhela Yu. Matrosova |
Deriving FSM-based tests using $a, b-\text{faults}$ for Logic Circuits. |
ISVLSI |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Renan C. A. Alves, Bruno C. Albertini, Marcos A. Simplício Jr. |
Securing hard drives with the Security Protocol and Data Model (SPDM). |
ISVLSI |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Harideep Nair, Prabhu Vellaisamy, Santha Bhasuthkar, John Paul Shen |
TNN7: A Custom Macro Suite for Implementing Highly Optimized Designs of Neuromorphic TNNs. |
ISVLSI |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Gianna Paulin, Matheus A. Cavalcante, Paul Scheffler, Luca Bertaccini, Yichao Zhang, Frank K. Gürkaynak, Luca Benini |
Soft Tiles: Capturing Physical Implementation Flexibility for Tightly-Coupled Parallel Processing Clusters. |
ISVLSI |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Khoa Ho, Hui Zhao 0013, Adwait Jog, Saraju P. Mohanty |
Improving GPU Throughput through Parallel Execution Using Tensor Cores and CUDA Cores. |
ISVLSI |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Pintu Kumar Sadhu, Venkata P. Yanambaka |
MC- PUF: A Robust Lightweight Controlled Physical Unclonable Function for Resource Constrained Environments. |
ISVLSI |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | James Read, Wantong Li, Shimeng Yu |
A Method for Reverse Engineering Neural Network Parameters from Compute-in-Memory Accelerators. |
ISVLSI |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Mattis Hasler, Sebastian Haas, Robert Wittig, Stefan Scholze, Andreas Dixius, Sebastian Höppner, Gerhard P. Fettweis, Christian Mayr 0001 |
A Random Linear Network Coding Platform MPSoC Designed in 22nm FDSOI. |
ISVLSI |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Geraldo F. Oliveira, Juan Gómez-Luna, Saugata Ghose, Onur Mutlu |
Methodologies, Workloads, and Tools for Processing-in-Memory: Enabling the Adoption of Data-Centric Architectures. |
ISVLSI |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Binjing Li, Siyuan Lu, Keli Xie, Zhongfeng Wang 0001 |
Accelerating NLP Tasks on FPGA with Compressed BERT and a Hardware-Oriented Early Exit Method. |
ISVLSI |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Minhui Zou, Junlong Zhou, Xiaotong Cui, Wei Wang 0209, Shahar Kvatinsky |
Enhancing Security of Memristor Computing System Through Secure Weight Mapping. |
ISVLSI |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Siyu Zhang, Wendong Mao, Zhongfeng Wang 0001 |
An Efficient Accelerator of Deformable 3D Convolutional Network for Video Super-Resolution. |
ISVLSI |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Nima TaheriNejad, Salar Shakibhamedan |
Energy-aware Adaptive Approximate Computing for Deep Learning Applications. |
ISVLSI |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Mohammad Nazmus Sakib, Rahul Sreekumar, Xinyuan Zhu, Tommy Tracy II, Mircea R. Stan |
Processing-in-Memory with Temporal Encoding. |
ISVLSI |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Li Lu, Junchao Chen 0001, Markus Ulbricht 0002, Milos Krstic |
A Methodology for Identifying Critical Sequential Circuits with Graph Convolutional Networks. |
ISVLSI |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Manju Rajan, Abhijit Das 0002, John Jose |
LOKI: A Hardware Trojan Affecting Multiple Components of an SoC. |
ISVLSI |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Yu Zhuang, Gaoxiang Li, Khalid T. Mursi |
A Permutation Challenge Input Interface for Arbiter PUF Variants Against Machine Learning Attacks. |
ISVLSI |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Tobias Dörr, Florian Schade, Leonard Masing, Jürgen Becker 0001, Georgios Keramidas, Christos P. Antonopoulos, Michail Mavropoulos, Vasilios I. Kelefouras, Nikolaos S. Voros |
Safety by Construction: Pattern-Based Application of Safety Mechanisms in XANDAR. |
ISVLSI |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Yawen Wu, Jingtong Hu |
Towards Independent On-device Artificial Intelligence. |
ISVLSI |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Mohammad Walid Charrwi, Huy Phan, Bo Yuan 0001, Samah Mohamed Saeed |
Towards Yield Improvement for AI Accelerators: Analysis and Exploration. |
ISVLSI |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Zhuren Liu, Trevor Exley, Austin Meek, Rachel Yang, Hui Zhao, Mark V. Albert |
Predicting GPU Performance and System Parameter Configuration Using Machine Learning. |
ISVLSI |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Michael Rogenmoser, Nils Wistoff, Pirmin Vogel, Frank K. Gürkaynak, Luca Benini |
On-Demand Redundancy Grouping: Selectable Soft-Error Tolerance for a Multicore Cluster. |
ISVLSI |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Amit Mazumder Shuvo, Nitin Pundir, Jungmin Park, Farimah Farahmandi, Mark M. Tehranipoor |
LDTFI: Layout-aware Timing Fault-Injection Attack Assessment Against Differential Fault Analysis. |
ISVLSI |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Xi Li, Min Pan, Tong Liu, Peter A. Beerel |
Multi-Phase Clocking for Multi-Threaded Gate-Level-Pipelined Superconductive Logic. |
ISVLSI |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Xiao Li, Lin Chen, Shixi Chen, Fan Jiang, Chengeng Li, Jiang Xu 0001 |
Power Management for Chiplet-Based Multicore Systems Using Deep Reinforcement Learning. |
ISVLSI |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Joydeep Dey, Sudeep Pasricha |
Robust Perception Architecture Design for Automotive Cyber-Physical Systems. |
ISVLSI |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Muhammed Ceylan Morgül, Xinfei Guo, Mircea Stan |
Towards Everlasting Flash: Preventing Permanent Flash Cell Damage using Circadian Rhythms. |
ISVLSI |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Ivan Fernandez, Ricardo Quislant, Christina Giannoula, Mohammed Alser, Juan Gómez-Luna, Eladio Gutiérrez, Oscar G. Plata, Onur Mutlu |
Exploiting Near-Data Processing to Accelerate Time Series Analysis. |
ISVLSI |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Jiangwei Zhang, Chong Wang, Yi Cai 0003, Zhenhua Zhu, Donald Kline, Huazhong Yang, Yu Wang 0002 |
WESCO: Weight-encoded Reliability and Security Co-design for In-memory Computing Systems. |
ISVLSI |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Raghunandana K. K, B. K. S. V. L. Varaprasad, Matteo Sonza Reorda, Virendra Singh |
REFU: Redundant Execution with Idle Functional Units, Fault Tolerant GPGPU architecture. |
ISVLSI |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Nika Mansouri-Ghiasi, Jisung Park 0001, Harun Mustafa, Jeremie S. Kim, Ataberk Olgun, Arvid Gollwitzer, Damla Senol Cali, Can Firtina, Haiyu Mao, Nour Almadhoun Alserr, Rachata Ausavarungnirun, Nandita Vijaykumar, Mohammed Alser, Onur Mutlu |
GenStore: In-Storage Filtering of Genomic Data for High-Performance and Energy-Efficient Genome Analysis. |
ISVLSI |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Lei Yang, Jing Tian 0004, Bo Wu, Zhongfeng Wang 0001, Hao Ren |
An RS-BCH Concatenated FEC Code for Beyond 400 Gb/s Networking. |
ISVLSI |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Amirmohammad Biuki, Naser Mohammadzadeh, Robert Wille, Sahar Sargaran |
Exact Mapping of Quantum Circuit Partitions to Building Blocks of the SAQIP Architecture. |
ISVLSI |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Kyle Kuan, Tosiron Adegbija |
A Study of STTRAM-based Page Walker Caches for Energy-Efficient Address Translation. |
ISVLSI |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Sanmitra Banerjee, Mahdi Nikdast, Sudeep Pasricha, Krishnendu Chakrabarty |
Pruning Coherent Integrated Photonic Neural Networks Using the Lottery Ticket Hypothesis. |
ISVLSI |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Sanjay Das, Arun Govindankutty, Shan Deng, Kai Ni 0004, Sumitha George |
Adaptable Multi-level Voltage to Binary Converter Using Ferroelectric FETs. |
ISVLSI |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Fanruo Meng, Chengmo Yang |
Exploring Image Selection for Self-Testing in Neural Network Accelerators. |
ISVLSI |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Sina Boroumand, Christos-Savvas Bouganis, George A. Constantinides |
MIDAS: Mutual Information Driven Approximate Synthesis. |
ISVLSI |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Tim Hotfilter, Fabian Kreß, Fabian Kempf, Jürgen Becker 0001, Imen Baili |
Data Movement Reduction for DNN Accelerators: Enabling Dynamic Quantization Through an eFPGA. |
ISVLSI |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Md. Najrul Islam, Rahul Shrestha, Shubhajit Roy Chowdhury |
A New Hardware-Efficient VLSI-Architecture of GoogLeNet CNN-Model Based Hardware Accelerator for Edge Computing Applications. |
ISVLSI |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Wu Yang, Amit Degada, Himanshu Thapliyal |
Adiabatic Logic-based STT-MRAM Design for IoT. |
ISVLSI |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Lei Zhao, Youtao Zhang, Jun Yang 0002 |
A DNN Protection Solution for PIM accelerators with Model Compression. |
ISVLSI |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Dimitris Mouris, Charles Gouert, Nektarios Georgios Tsoutsos |
zk -Sherlock: Exposing Hardware Trojans in Zero-Knowledge. |
ISVLSI |
2022 |
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