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Publications at "ReCoSoC"( http://dblp.L3S.de/Venues/ReCoSoC )

URL (DBLP): http://dblp.uni-trier.de/db/conf/recosoc

Publication years (Num. hits)
2005 (26) 2006 (37) 2007 (32) 2010 (30) 2011 (56) 2012 (42) 2013 (36) 2014 (39) 2015 (33) 2016 (22) 2017 (22) 2018 (19) 2019 (17)
Publication types (Num. hits)
inproceedings(398) proceedings(13)
Venues (Conferences, Journals, ...)
ReCoSoC(411)
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Found 411 publication records. Showing 411 according to the selection in the facets
Hits ? Authors Title Venue Year Link Author keywords
1Julien Mazuet, Ill-Ham Atchadam, Dominique Heller, Catherine Dezan, Michel Narozny, Jean-Philippe Diguet QoS Driven Dynamic Partial Reconfiguration: Tracking Case Study. Search on Bibsonomy ReCoSoC The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Alejandro G. Gener, Juan Valverde, J. Andrés Otero, Philip J. Harris A Fast Prototyping Workflow for Reconfigurable SDR Applications. Search on Bibsonomy ReCoSoC The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1 14th International Symposium on Reconfigurable Communication-centric Systems-on-Chip, ReCoSoC 2019, York, United Kingdom, July 1-3, 2019 Search on Bibsonomy ReCoSoC The full citation details ... 2019 DBLP  BibTeX  RDF
1Davide Zoni Analysis and countermeasures to side-channel attacks: a hardware design perspective. Search on Bibsonomy ReCoSoC The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Cesar G. Chaves, Siavoosh Payandeh Azad, Johanna Sepúlveda, Thomas Hollstein Detecting and Mitigating Low-and-Slow DoS Attacks in NoC-based MPSoCs. Search on Bibsonomy ReCoSoC The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Alberto García Ortiz, Alfonso Rodríguez 0002, Andrés Otero, Eduardo de la Torre Data Transfer Modeling and Optimization in Reconfigurable Multi-Accelerator Systems. Search on Bibsonomy ReCoSoC The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Wagner Penny, Daniel Palomino 0001, Marcelo Schiavon Porto, Bruno Zatt, Leandro Soares Indrusiak Design Space Exploration of HEVC RCL Mapped onto NoC-Based Embedded Platforms. Search on Bibsonomy ReCoSoC The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Dimitrios Danopoulos, Christoforos Kachris, Dimitrios Soudris FPGA Acceleration of Approximate KNN Indexing on High- Dimensional Vectors. Search on Bibsonomy ReCoSoC The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Pascal Benoit, Loic Dalmasso, Guillaume Patrigeon, Thierry Gil, Florent Bruguier, Lionel Torres Edge-Computing Perspectives with Reconfigurable Hardware. Search on Bibsonomy ReCoSoC The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Marcel Eckert, Dominik Meyer, Bernd Klauer Context Save and Restore of Partial Reconfiguration Regions for Xilinx FPGAs. Search on Bibsonomy ReCoSoC The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Habiba Lahdhiri, Jordane Lorandel, Emmanuelle Bourdel Threshold-based routing algorithm for RF-NoC OFDMA architecture. Search on Bibsonomy ReCoSoC The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Amir Najafi 0001, Lennart Bamberg, Guillermo Payá Vayá, Alberto García Ortiz A Coding Approach to Improve the Energy Efficiency of Approximate NoCs. Search on Bibsonomy ReCoSoC The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Thomas Romera, Alexandre Brière, Julien Denoulet Dynamically Reconfigurable RF-NoC with Distance-Aware Routing Algorithm. Search on Bibsonomy ReCoSoC The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Marcus Botacin, Lucas Galante, Fabricio Ceschin, Paulo C. Santos 0001, Luigi Carro, Paulo Lício de Geus, André Grégio, Marco A. Z. Alves The AV says: Your Hardware Definitions Were Updated! Search on Bibsonomy ReCoSoC The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Maxime Mirka, Guillaume Devic, Florent Bruguier, Gilles Sassatelli, Abdoulaye Gamatié Automatic Energy-Efficiency Monitoring of OpenMP Workloads. Search on Bibsonomy ReCoSoC The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Ziwei Wang, Martin A. Trefzer, Simon J. Bale, Andy M. Tyrrell Approximate Multiply-Accumulate Array for Convolutional Neural Networks on FPGA. Search on Bibsonomy ReCoSoC The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Takuya Kojima, Hideharu Amano Refinements in Data Manipulation Method for Coarse Grained Reconfigurable Architectures. Search on Bibsonomy ReCoSoC The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Ashish Chaudhari, Martin Braun A Scalable FPGA Architecture for Flexible, Large-Scale, Real-Time RF Channel Emulation. Search on Bibsonomy ReCoSoC The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Georgios Bousdras, François Quitin, Dragomir Milojevic Template architectures for highly scalable, many-core Heterogeneous SoC: Could-of-Chips. Search on Bibsonomy ReCoSoC The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Charles Leech, Graeme M. Bragg, Domenico Balsamo, Eduardo Wächter Application Control and Monitoring in Heterogeneous Multiprocessor Systems. Search on Bibsonomy ReCoSoC The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1David Novo, Alejandro Nocua, Florent Bruguier, Abdoulaye Gamatié, Gilles Sassatelli Evaluation of Heterogeneous Multicore Cluster Architectures Designed for Mobile Computing. Search on Bibsonomy ReCoSoC The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Leonardo Suriano, Daniel Madroñal, Alfonso Rodríguez 0002, Eduardo Juárez 0001, César Sanz, Eduardo de la Torre A Unified Hardware/Software Monitoring Method for Reconfigurable Computing Architectures Using PAPI. Search on Bibsonomy ReCoSoC The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Mohamad-Al-Fadl Rihani, Mohamad Mroué, Jean-Christophe Prévotet, Fabienne Nouvel, Yasser Mohanna A Neural Network Based Handover for Multi-RAT Heterogeneous Networks with Learning Agent. Search on Bibsonomy ReCoSoC The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Tripti Jain, Klaus Schneider 0001 Routing Partial Permutations in Interconnection Networks based on Radix Sorting. Search on Bibsonomy ReCoSoC The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Dennis Leander Wolf, Lukas Johannes Jung, Tajas Ruschke, Changgong Li, Christian Hochberger AMIDAR Project: Lessons Learned in 15 Years of Researching Adaptive Processors. Search on Bibsonomy ReCoSoC The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Karl Janson, Rene Pihlak, Siavoosh Payandeh Azad, Behrad Niazmand, Gert Jervan, Jaan Raik AWAIT: An Ultra-Lightweight Soft-Error Mitigation Mechanism for Network-on-Chip Links. Search on Bibsonomy ReCoSoC The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Oliver Körber, Jörg Keller 0001, Simon Holmbacka Energy-efficient Execution of Cryptographic Hash Functions on big.LITTLE Architecture. Search on Bibsonomy ReCoSoC The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Smaïl Niar, Mazen A. R. Saghir (eds.) 13th International Symposium on Reconfigurable Communication-centric Systems-on-Chip, ReCoSoC 2018, Lille, France, July 9-11, 2018 Search on Bibsonomy ReCoSoC The full citation details ... 2018 DBLP  BibTeX  RDF
1Brvan Donvanavard, Amir Mahdi Hosseini Monazzah, Nikil D. Dutt, Tiago Mück Exploring Hybrid Memory Caches in Chip Multiprocessors. Search on Bibsonomy ReCoSoC The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Bruno da Silva 0001, Laurent Segers, Yannick Rasschaert, Quentin Quevy, An Braeken, Abdellah Touhafi A Multimode SoC FPGA-Based Acoustic Camera for Wireless Sensor Networks. Search on Bibsonomy ReCoSoC The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Daniela Genius, Ludovic Apvrille System-Level Design and Virtual Prototyping of a Telecommunication Application on a NUMA Platform. Search on Bibsonomy ReCoSoC The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Georgios Christodoulis, François Broquedis, Olivier Muller, Manuel Selva, Frederic Desprez An FPGA target for the StarPU heterogeneous runtime system. Search on Bibsonomy ReCoSoC The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Junio Cezar Ribeiro da Silva, Fernando Magno Quintão Pereira, Michael Frank 0008, Abdoulaye Gamatié A Compiler-Centric Infra-Structure for Whole-Board Energy Measurement on Heterogeneous Android Systems. Search on Bibsonomy ReCoSoC The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Jan Moritz Joseph, Lennart Bamberg, Gerald Krell, Imad Hajjar, Alberto García Ortiz, Thilo Pionteck Specification of Simulation Models for NoCs in Heterogeneous 3D SoCs. Search on Bibsonomy ReCoSoC The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Jean-Christophe Le Lann, Théotime Bollengier, Mohamad Najem, Loïc Lagadec An Integrated Toolchain for Overlay-centric System-on-chip. Search on Bibsonomy ReCoSoC The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Javier Hoffmann, Dirk Kuschnerus, Trevor Jones, Michael Hübner 0001 Towards a Safety and Energy Aware protocol for Wireless Communication. Search on Bibsonomy ReCoSoC The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Tsotne Putkaradze, Siavoosh Payandeh Azad, Behrad Niazmand, Jaan Raik, Gert Jervan Fault-resilient NoC router with transparent resource allocation. Search on Bibsonomy ReCoSoC The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Marcel Essig, Kurt Franz Ackermann On-demand instantiation of co-processors on dynamically reconfigurable FPGAs. Search on Bibsonomy ReCoSoC The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Hamidreza Ahmadian, Farzad Nekouei, Roman Obermaisser Fault recovery and adaptation in time-triggered Networks-on-Chips for mixed-criticality systems. Search on Bibsonomy ReCoSoC The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Stephen Adeboye Oyeniran, Raimund Ubar, Siavoosh Payandeh Azad, Jaan Raik High-level test generation for processing elements in many-core systems. Search on Bibsonomy ReCoSoC The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Piotr Dziurzanski, Tomasz Maka Current mode detection in hard real-time automotive applications dedicated to many-core platforms. Search on Bibsonomy ReCoSoC The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Yidi Liu, Monica Villaverde, Félix Moreno, Benjamin Carrión Schäfer Characterization and optimization of behavioral hardware accelerators in heterogeneous MPSoCs. Search on Bibsonomy ReCoSoC The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Marta Beltrán, Miguel Calvo, Sergio Gonzalez Federated system-to-service authentication and authorization combining PUFs and tokens. Search on Bibsonomy ReCoSoC The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Daniela Genius, Ludovic Apvrille System-level design for communication-centric task farm applications. Search on Bibsonomy ReCoSoC The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Leandro Soares Indrusiak, James Harbin, Martha Johanna Sepúlveda Side-channel attack resilience through route randomisation in secure real-time Networks-on-Chip. Search on Bibsonomy ReCoSoC The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Peter Rouget, Benoît Badrignans, Pascal Benoit, Lionel Torres SecBoot - lightweight secure boot mechanism for Linux-based embedded systems on FPGAs. Search on Bibsonomy ReCoSoC The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1El Mehdi Abdali, Maxime Pelcat, François Berry, Jean-Philippe Diguet, Francesca Palumbo Exploring the performance of partially reconfigurable point-to-point interconnects. Search on Bibsonomy ReCoSoC The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1 12th International Symposium on Reconfigurable Communication-centric Systems-on-Chip, ReCoSoC 2017, Madrid, Spain, July 12-14, 2017 Search on Bibsonomy ReCoSoC The full citation details ... 2017 DBLP  BibTeX  RDF
1Adrián Domínguez, Pedro P. Carballo, Antonio Núñez Programmable SoC platform for deep packet inspection using enhanced Boyer-Moore algorithm. Search on Bibsonomy ReCoSoC The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Fatemeh Arezoomand, Arghavan Asad, Mahdi Fazeli, Mahmood Fathy, Farah Mohammadi 0001 Energy aware and reliable STT-RAM based cache design for 3D embedded chip-multiprocessors. Search on Bibsonomy ReCoSoC The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Zakarya Guettatfi, Philipp Hübner, Marco Platzner, Bernhard Rinner Computational self-awareness as design approach for visual sensor nodes. Search on Bibsonomy ReCoSoC The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Antoniette Mondigo, Tomohiro Ueno, Daichi Tanaka, Kentaro Sano, Satoru Yamamoto Design and scalability analysis of bandwidth-compressed stream computing with multiple FPGAs. Search on Bibsonomy ReCoSoC The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Leonardo Suriano, Alfonso Rodríguez 0002, Karol Desnos, Maxime Pelcat, Eduardo de la Torre Analysis of a heterogeneous multi-core, multi-hw-accelerator-based system designed using PREESM and SDSoC. Search on Bibsonomy ReCoSoC The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Johanna Sepúlveda, Mathieu Gross, Andreas Zankl, Georg Sigl Towards trace-driven cache attacks on Systems-on-Chips - exploiting bus communication. Search on Bibsonomy ReCoSoC The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Jan Moritz Joseph, Lennart Bamberg, Sven Wrieden, Dominik Ermel, Alberto García Ortiz, Thilo Pionteck Design method for asymmetric 3D interconnect architectures with high level models. Search on Bibsonomy ReCoSoC The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1R. Domingo, Rubén Salvador, Himar Fabelo, Daniel Madroñal, Samuel Ortega, Raquel Lazcano, Eduardo Juárez 0001, Gustavo Marrero Callicó, César Sanz High-level design using Intel FPGA OpenCL: A hyperspectral imaging spatial-spectral classifier. Search on Bibsonomy ReCoSoC The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Poona Bahrebar, Dirk Stroobandt Adaptive and reconfigurable bubble routing technique for 2D Torus interconnection networks. Search on Bibsonomy ReCoSoC The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Alejandro Nocua, Florent Bruguier, Gilles Sassatelli, Abdoulaye Gamatié ElasticSimMATE: A fast and accurate gem5 trace-driven simulator for multicore systems. Search on Bibsonomy ReCoSoC The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Jan Moritz Joseph, Sven Wrieden, Christopher Blochwitz, Alberto García Ortiz, Thilo Pionteck A simulation environment for design space exploration for asymmetric 3D-Network-on-Chip. Search on Bibsonomy ReCoSoC The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Johanna Sepúlveda, Daniel Florez, Ramon Fernandes, César A. M. Marcon, Guy Gogniat, Georg Sigl Towards risk aware NoCs for data protection in MPSoCs. Search on Bibsonomy ReCoSoC The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Dirk Stroobandt, Ana Lucia Varbanescu, Catalin Bogdan Ciobanu, Muhammed Al Kadi, Andreas Brokalakis, George Charitopoulos, Tim Todman, Xinyu Niu, Dionisios N. Pnevmatikatos, Amit Kulkarni 0002, Elias Vansteenkiste, Wayne Luk, Marco D. Santambrogio, Donatella Sciuto, Michael Hübner 0001, Tobias Becker, Georgi Gaydadjiev, Antonis Nikitakis, Alex J. W. Thom EXTRA: Towards the exploitation of eXascale technology for reconfigurable architectures. Search on Bibsonomy ReCoSoC The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Luca Pezzarossa, Martin Schoeberl, Jens Sparsø Reconfiguration in FPGA-based multi-core platforms for hard real-time applications. Search on Bibsonomy ReCoSoC The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Tripti Jain, Klaus Schneider 0001, Anoop Bhagyanath The selector-tree network: A new self-routing and non-blocking interconnection network. Search on Bibsonomy ReCoSoC The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1William L. Harrison, Ian Graves, Adam M. Procter, Michela Becchi, Gerard Allwein A programming model for reconfigurable computing based in functional concurrency. Search on Bibsonomy ReCoSoC The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1David Andrews 0001, Marco Platzner Programming models for reconfigurable manycore systems. Search on Bibsonomy ReCoSoC The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Manuel Selva, Abdoulaye Gamatié, David Novo, Gilles Sassatelli Speed and accuracy dilemma in NoC simulation: What about memory impact? Search on Bibsonomy ReCoSoC The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Elham Kashefi, Hamid R. Zarandi, Ann Gordon-Ross Postponing wearout failures in chip multiprocessors using thermal management and thread migration. Search on Bibsonomy ReCoSoC The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Wolfgang Büter, Dominic Oehlert, Alberto García Ortiz ERRCA: A buffer-efficient reconfigurable optical Network-on-Chip with permanent-error recognition. Search on Bibsonomy ReCoSoC The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Teng Xu 0001, Hongxiang Gu, Miodrag Potkonjak An ultra-low energy PUF matching security platform using programmable delay lines. Search on Bibsonomy ReCoSoC The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Miltos D. Grammatikakis, Kyprianos Papadimitriou, Polydoros Petrakis, Marcello Coppola, Michael Soulie Address interleaving for low-cost NoCs. Search on Bibsonomy ReCoSoC The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1George Tsamis, Stamatios Kavvadias, Antonis Papagrigoriou, Miltos D. Grammatikakis, Kyprianos Papadimitriou Efficient bandwidth regulation at memory controller for mixed criticality applications. Search on Bibsonomy ReCoSoC The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Othon Tomoutzoglou, Dimitrios Bakoyiannis, George Komaros, Marcello Coppola Efficient communication in heterogeneous SoCs with unified address space. Search on Bibsonomy ReCoSoC The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Maria Mendez Real, Philipp Wehner, Vincent Migliore, Vianney Lapotre, Diana Göhringer, Guy Gogniat Dynamic spatially isolated secure zones for NoC-based many-core accelerators. Search on Bibsonomy ReCoSoC The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Ayad Dalloo, Alberto García Ortiz A programmable and reconfigurable core for binary image processing. Search on Bibsonomy ReCoSoC The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Siavoosh Payandeh Azad, Behrad Niazmand, Peeter Ellervee, Jaan Raik, Gert Jervan, Thomas Hollstein SoCDep2: A framework for dependable task deployment on many-core systems under mixed-criticality constraints. Search on Bibsonomy ReCoSoC The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Poona Bahrebar, Dirk Stroobandt Online reconfigurable routing method for handling link failures in NoC-based MPSoCs. Search on Bibsonomy ReCoSoC The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Tobias Wiersema, Marco Platzner Verifying worst-case completion times for reconfigurable hardware modules using proof-carrying hardware. Search on Bibsonomy ReCoSoC The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Muhammad Rashid, Malik Imran, Atif Raza Jafri Comparative analysis of flexible cryptographic implementations. Search on Bibsonomy ReCoSoC The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Luca Sterpone, Luca Boragno, David Merodio Codinachs Analysis of radiation-induced SEUs on dynamic reconfigurable systems. Search on Bibsonomy ReCoSoC The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1 11th International Symposium on Reconfigurable Communication-centric Systems-on-Chip, ReCoSoC 2016, Tallinn, Estonia, June 27-29, 2016 Search on Bibsonomy ReCoSoC The full citation details ... 2016 DBLP  BibTeX  RDF
1Sergio Montenegro 0001 Design to survive. Search on Bibsonomy ReCoSoC The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1Boyang Du, Luca Sterpone, Lorenzo Venditti, David Merodio Codinachs On the design of highly reliable system-on-chip using dynamically reconfigurable FPGAs. Search on Bibsonomy ReCoSoC The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1Alberto García Ortiz, Daniel Gregorek, Eduardo de la Torre, Juha Plosila Message from the chairs. Search on Bibsonomy ReCoSoC The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1Zahra Shirmohammadi, Seyed Ghassem Miremadi S2AP: An efficient numerical-based crosstalk avoidance code for reliable data transfer of NoCs. Search on Bibsonomy ReCoSoC The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1Rolf Drechsler, Martin Fränzle, Robert Wille Envisioning self-verification of electronic systems. Search on Bibsonomy ReCoSoC The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1Pietro Saltarelli, Behrad Niazmand, Ranganathan Hariharan, Jaan Raik, Gert Jervan, Thomas Hollstein Automated minimization of concurrent online checkers for Network-on-Chips. Search on Bibsonomy ReCoSoC The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1Yunfeng Ma, Leandro Soares Indrusiak Hardware-accelerated Response Time Analysis for priority-preemptive Networks-on-Chip. Search on Bibsonomy ReCoSoC The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1A. Amalin Prince, Vineeth Kartha A framework for remote and adaptive partial reconfiguration of SoC based data acquisition systems under Linux. Search on Bibsonomy ReCoSoC The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1Wolfgang Büter, Christof Osewold, Awais Ahmed, Daniel Gregorek, Alberto García Ortiz Predictable photonic interconnects using an autonomous channel management and a TDMA-NoC. Search on Bibsonomy ReCoSoC The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1Stefan Gehrer, Georg Sigl Using the reconfigurability of modern FPGAs for highly efficient PUF-based key generation. Search on Bibsonomy ReCoSoC The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1Thomas Hollstein, Siavoosh Payandeh Azad, Thilo Kogge, Behrad Niazmand Mixed-criticality NoC partitioning based on the NoCDepend dependability technique. Search on Bibsonomy ReCoSoC The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1Alfonso Rodríguez 0002, Juan Valverde, Cesar Castanares, Jorge Portilla, Eduardo de la Torre, Teresa Riesgo Execution modeling in self-aware FPGA-based architectures for efficient resource management. Search on Bibsonomy ReCoSoC The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1Elisabeth Glocker, Qingqing Chen 0004, Asheque M. Zaidi, Ulf Schlichtmann, Doris Schmitt-Landsiedel Emulation of an ASIC power and temperature monitor system for FPGA prototyping. Search on Bibsonomy ReCoSoC The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1Sobhan Niknam, Arghavan Asad, Mahmood Fathy, Amir-Mohammad Rahmani Energy efficient 3D Hybrid processor-memory architecture for the dark silicon age. Search on Bibsonomy ReCoSoC The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1Dennis Heinrich, Stefan Werner 0002, Marc Stelzner, Christopher Blochwitz, Thilo Pionteck, Sven Groppe Hybrid FPGA approach for a B+ tree in a Semantic Web database system. Search on Bibsonomy ReCoSoC The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1Parham Haririan, Alberto García Ortiz A framework for hardware-based DVFS management in multicore mixed-criticality systems. Search on Bibsonomy ReCoSoC The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1Karim M. A. Ali, Rabie Ben Atitallah, Nizar Fakhfakh, Jean-Luc Dekeyser Using hardware parallelism for reducing power consumption in video streaming applications. Search on Bibsonomy ReCoSoC The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1Johanna Sepúlveda, Daniel Florez, Guy Gogniat Reconfigurable security architecture for disrupted protection zones in NoC-based MPSoCs. Search on Bibsonomy ReCoSoC The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1Timm Friedrich, Kurt Franz Ackermann A flexible co-processing approach for SoC-FPGAs based on dynamic partial reconfiguration and bitstream relocation methods. Search on Bibsonomy ReCoSoC The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1Arash Firuzan, Mehdi Modarressi, Masoud Daneshtalab Reconfigurable communication fabric for efficient implementation of neural networks. Search on Bibsonomy ReCoSoC The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
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