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Publications at "VLSI-SoC"( http://dblp.L3S.de/Venues/VLSI-SoC )

URL (DBLP): http://dblp.uni-trier.de/db/conf/ifip10-5

Publication years (Num. hits)
2001 (39) 2002-2003 (80) 2005 (21) 2006 (76) 2007 (62) 2009-2010 (85) 2011 (84) 2012 (61) 2013 (83) 2014 (45) 2015 (65) 2016 (50) 2017 (48) 2018 (50) 2019 (65) 2020 (42) 2021 (45) 2022 (91) 2023 (52)
Publication types (Num. hits)
inproceedings(1124) proceedings(20)
Venues (Conferences, Journals, ...)
VLSI-SoC(1144)
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Found 1144 publication records. Showing 1144 according to the selection in the facets
Hits ? Authors Title Venue Year Link Author keywords
1Kais Belwafi, Hamdan Alshamsi, Ashfaq Ahmed, Abdulhadi Shoufan Zero-Trust Communication between Chips. Search on Bibsonomy VLSI-SoC The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
1Shahid Jamil, Muhammad Usman, Muhammad Jawad Shakil, Jafar Hussain, Rashad Ramzan Bi-Directional Time Domain Duplexing (TDD) Amplifier for 5G Applications. Search on Bibsonomy VLSI-SoC The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
1Hanning Chen, Yeseong Kim, Elaheh Sadredini, Saransh Gupta, Hugo Latapie, Mohsen Imani Sparsity Controllable Hyperdimensional Computing for Genome Sequence Matching Acceleration. Search on Bibsonomy VLSI-SoC The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
1Imlijungla Longchar, Hemangee K. Kapoor ADaMaT: Towards an Adaptive Dataflow for Maximising Throughput in Neural Network Inference. Search on Bibsonomy VLSI-SoC The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
1Omar Numan, Martin Andraud, Kari Halonen A Self-Calibrated Activation Neuron Topology for Efficient Resistive-Based In-Memory Computing. Search on Bibsonomy VLSI-SoC The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
1Jean-Philippe Noël, E. Valea, Laurent Grenouillet, B. Chapuis, C. Fisher, A. Recoquillay, Bastien Giraud Compute-In-Place Serial FeRAM: Enhancing Performance, Efficiency and Adaptability in Critical Embedded Systems. Search on Bibsonomy VLSI-SoC The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
1Rebecca Pelke, Nils Bosbach, José Cubero-Cascante, Felix Staudigl, Rainer Leupers, Jan Moritz Joseph Mapping of CNNs on multi-core RRAM-based CIM architectures. Search on Bibsonomy VLSI-SoC The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
1Can Ayduman, Emre Koçer, Selim Kirbiyik, Ahmet Can Mert, Erkay Savas Efficient Design-Time Flexible Hardware Architecture for Accelerating Homomorphic Encryption. Search on Bibsonomy VLSI-SoC The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
1Shan-Hui Chou, Ting-Yun Hsiao, Jing-Yang Jou, Juinn-Dar Huang An Evaluation and Architecture Exploration Engine for CNN Accelerators through Extensive Dataflow Analysis. Search on Bibsonomy VLSI-SoC The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
1Siyi Wang, Anupam Chattopadhyay Reducing Depth of Quantum Adder using Ling Structure. Search on Bibsonomy VLSI-SoC The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
1Deepraj Soni, Mohammed Nabeel 0001, Ramesh Karri, Michail Maniatakos Optimizing Constrained-Modulus Barrett Multiplier for Power and Flexibility. Search on Bibsonomy VLSI-SoC The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
1Ankit Sirohi, Jawar Singh A Steep Slope Sub-10nm Armchair Phosphorene Nanoribbon FET with Intrinsic Cold Contact. Search on Bibsonomy VLSI-SoC The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
1Aishwarya Gupta, N. S. Aswathy, Hemangee K. Kapoor Look before you leap: An Access-based Prudent Page Migration for Hybrid Memories. Search on Bibsonomy VLSI-SoC The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
1Anjum Riaz, Gaurav Kumar, Pardeep Kumar, Yamuna Prasad, Satyadev Ahlawat On Protecting IJTAG using an Inherently Secure SIB. Search on Bibsonomy VLSI-SoC The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
1Dheemanth Joshi, Aniket Arun Gangotri, Sai Pranay Chennamsetti, Gautham Bolar, Ganesan Thiagarajan, Sanjeev Gurugopinath A Two-Layer Connected Component Algorithm for Target Extraction Using K-means and Morphology. Search on Bibsonomy VLSI-SoC The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
1Gabriel Rutsch, Konrad Maier, Wolfgang Ecker FPGA-implementation techniques to efficiently test application readiness of mixed-signal products. Search on Bibsonomy VLSI-SoC The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
1Lennart M. Reimann, Jonathan Wiesner, Dominik Sisejkovic, Farhad Merchant, Rainer Leupers SoftFlow: Automated HW-SW Confidentiality Verification for Embedded Processors. Search on Bibsonomy VLSI-SoC The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
1Paolo Bernardi, Giorgio Insinga, Nima Kolahimahmoudi A Novel Approach to Extract Embedded Memory Design Parameter Through Irradiation Test. Search on Bibsonomy VLSI-SoC The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
1Walaa Amer, Mariam Rakka, Rachid Karami, Minjun Seo, Mazen A. R. Saghir, Rouwaida Kanj, Fadi J. Kurdahi Hardware Implementation and Evaluation of an Information Processing Factory. Search on Bibsonomy VLSI-SoC The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
1Sejin Lim, Hyunjun Kim, Kyungbae Jang, Siyi Wang, Anubhab Baksi, Anupam Chattopadhyay, Hwajeong Seo Optimized Quantum Circuit Implementation of Payoff Function. Search on Bibsonomy VLSI-SoC The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
1Sagheer Ahmed, Jayesh Ambulkar, Debabrata Mondal, Ambika Prasad Shah Soft Error Immune with Enhanced Critical Charge SIC14T SRAM Cell for Avionics Applications. Search on Bibsonomy VLSI-SoC The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
1Rafael Medina, Darong Huang, Giovanni Ansaloni, Marina Zapater, David Atienza REMOTE: Re-thinking Task Mapping on Wireless 2.5D Systems-on-Package for Hotspot Removal. Search on Bibsonomy VLSI-SoC The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
1Shayesteh Masoumian, Roel Maes, Rui Wang, Karthik Keni Yerriswamy, Geert Jan Schrijen, Said Hamdioui, Mottaqiallah Taouil Modeling and Analysis of SRAM PUF Bias Patterns in 14nm and 7nm FinFET Technology Nodes. Search on Bibsonomy VLSI-SoC The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
1Klajd Zyla, Marco Liess, Thomas Wild, Andreas Herkersdorf FlexPipe: Fast, Flexible and Scalable Packet Processing for High-Performance SmartNICs. Search on Bibsonomy VLSI-SoC The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
1Hala Ibrahim, Haytham Azmi, M. Watheq El-Kharashi, Mona Safar Hardware Security Analysis of Arbiters: Trojan Modeling and Formal Verification. Search on Bibsonomy VLSI-SoC The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
1Yi Chen, Jie Lou, Christian Lanius, Florian Freye, Johnson Loh, Tobias Gemmeke An Energy-Efficient and Area-Efficient Depthwise Separable Convolution Accelerator with Minimal On-Chip Memory Access. Search on Bibsonomy VLSI-SoC The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
1Umair F. Siddiqi, Gary William Grewal, Shawki Areibi A Deterministic Parallel Routing Approach for Accelerating Pathfinder-based Algorithms. Search on Bibsonomy VLSI-SoC The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
1Hassen Aziza, Cristian Zambelli, Said Hamdioui, Sumit Diware, Rajendra Bishnoi, Anteneh Gebregiorgis On the Reliability of RRAM-Based Neural Networks. Search on Bibsonomy VLSI-SoC The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
1Giovani Britton, Salvador Mir, Estelle Lauga-Larroze, Benjamin Dormieu, Quentin Berlingard, Mikaël Cassé, Philippe Galy Noise modeling using look-up tables and DC measurements for cryogenic applications. Search on Bibsonomy VLSI-SoC The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
1Yiyang Yu, Atif Shamim Gain Enhancement of Antenna-on-Chip at 94 GHz with an Integrated Artificial Magnetic Conductor for 6G System-on-Chip. Search on Bibsonomy VLSI-SoC The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
1Suman Deb, Anupam Chattopadhyay, Avi Mendelson A RISC-V SoC with Hardware Trojans: Case Study on Trojan-ing the On-Chip Protocol Conversion. Search on Bibsonomy VLSI-SoC The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
1Robert Limas Sierra, Juan-David Guerrero-Balaguera, Josie E. Rodriguez Condia, Matteo Sonza Reorda Analyzing the Impact of Different Real Number Formats on the Structural Reliability of TCUs in GPUs. Search on Bibsonomy VLSI-SoC The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
1Esha Sarkar, Constantine Doumanidis, Michail Maniatakos TRAPDOOR: Repurposing neural network backdoors to detect dataset bias in machine learning-based genomic analysis. Search on Bibsonomy VLSI-SoC The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
1Cristiano Merio, Xavier Lesage, Ali Naimi, Sylvain Engels, Katell Morin-Allory, Laurent Fesquet Method for Data-Driven Pruning in Micropipeline Circuits. Search on Bibsonomy VLSI-SoC The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
1Cédric Marchand 0002, Alban Nicolas, Paul-Antoine Matrangolo, David Navarro, Alberto Bosio, Ian O'Connor FeFET based Logic-in-Memory design methodologies, tools and open challenges. Search on Bibsonomy VLSI-SoC The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
1Chun-Jen Tsai, Chun Wei Chao, Sheng-Di Hong Integrated Dynamic Memory Manager for a RISC-V Processor. Search on Bibsonomy VLSI-SoC The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
1 31st IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2023, Dubai, United Arab Emirates, October 16-18, 2023 Search on Bibsonomy VLSI-SoC The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
1Junjie Li, Youming Zhang, Yunqi Cao, Xusheng Tang, Fengyi Huang A Unity Feedback Length-Extend Delta-Sigma Modulator for Fractional-N Frequency Synthesizer. Search on Bibsonomy VLSI-SoC The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
1Safiullah Khan, Ayesha Khalid, Ciara Rafferty, Yasir Ali Shah, Máire O'Neill, Wai-Kong Lee, Seong Oun Hwang Efficient, Error-Resistant NTT Architectures for CRYSTALS-Kyber FPGA Accelerators. Search on Bibsonomy VLSI-SoC The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
1Mouli Venkata Prakash Pittala, Aditya Kalyani, Nagaveni S Reconfigurable Rectifier for RF Energy Harvesting System at WiFi-6 Frequency Band for 2.5 V. Search on Bibsonomy VLSI-SoC The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
1Shubham Kumar, Paul R. Genssler, Somaya Mansour, Yogesh Singh Chauhan, Hussam Amrouch Frontiers in AI Acceleration: From Approximate Computing to FeFET Monolithic 3D Integration. Search on Bibsonomy VLSI-SoC The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
1Jingbo Jiang, Xizi Chen, Chi-Ying Tsui Accelerating Large Kernel Convolutions with Nested Winograd Transformation. Search on Bibsonomy VLSI-SoC The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
1Rassul Bairamkulov, Alessandro Tempia Calvino, Giovanni De Micheli Synthesis of SFQ Circuits with Compound Gates. Search on Bibsonomy VLSI-SoC The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
1Gokulnath Rajendran, Furqan Zahoor, Simranjeet Singh, Farhad Merchant, Vikas Rana, Anupam Chattopadhyay PR-PUF: A Reconfigurable Strong RRAM PUF. Search on Bibsonomy VLSI-SoC The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
1Rupesh Raj Karn, Kashif Nawaz, Ibrahim Abe M. Elfadel Post-Quantum, Order-Preserving Encryption for the Confidential Inference in Decision Trees: FPGA Design and Implementation. Search on Bibsonomy VLSI-SoC The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
1Grégoire Eggermann, Marco Rios, Giovanni Ansaloni, Sani R. Nassif, David Atienza A 16-bit Floating-Point Near-SRAM Architecture for Low-power Sparse Matrix-Vector Multiplication. Search on Bibsonomy VLSI-SoC The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
1Muhammad Jawad Shakil, Uzair Ahmed, Jafar Hussain, Hassan Saif, Rashad Ramzan A Bondwire Inductor Based Flash ADC Assisted DC-DC Buck Converter. Search on Bibsonomy VLSI-SoC The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
1Foroozan Karimzadeh, Mohsen Imani, Bahar Asgari, Ningyuan Cao, Yingyan Lin, Yan Fang Memory-Based Computing for Energy-Efficient AI: Grand Challenges. Search on Bibsonomy VLSI-SoC The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
1Solomon Michael Serunjogi, Mihai Sanduleanu 3.125GS/s, 4.9 ENOB, 109 fJ/Conversion Time-Domain ADC for Backplane Interconnect. Search on Bibsonomy VLSI-SoC The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
1Hossein Taji, Jose Miranda, Miguel Peón Quirós, Szabolcs Balási, David Atienza Dynamic Scheduling for Event-Driven Embedded Industrial Applications. Search on Bibsonomy VLSI-SoC The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
1Ziyang Ye, Makoto Ikeda Dynamic Digital Circuit Locking (DDCL): A Shield against Static Analysis Attacks. Search on Bibsonomy VLSI-SoC The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
1A. Datsuk, P. Ostrovskyy, F. Vater, C. Wieden Towards Robust Process Design Kits with a Scalable DevOps Quality Assurance Platform. Search on Bibsonomy VLSI-SoC The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
1C. del Río Bueno, U. Esteban Eraso, Carlos Sánchez-Azqueta, Santiago Celma A 18-27 GHz Programmable Gain Amplifier in 65-nm CMOS technology. Search on Bibsonomy VLSI-SoC The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
1Halil Kükner, Gökhan Kaplayan, Ahmet Efe, Mehmet Ali Gülden RISC-V Processor Trace Encoder with Multiple Instructions Retirement Support. Search on Bibsonomy VLSI-SoC The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
1Foroozan Karimzadeh, Arijit Raychowdhury Towards Energy Efficient DNN accelerator via Sparsified Gradual Knowledge Distillation. Search on Bibsonomy VLSI-SoC The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
1Lucas Réveil, Chhandak Mukherjee, Cristell Maneux, Marina Deng, François Marc, Abhishek Kumar, Aurélie Lecestre, Guilhem Larrieu, Arnaud Poittevin, Ian O'Connor, Oskar Baumgartner, David Pirker Analysis of an Inverter Logic Cell based on 3D Vertical NanoWire Junction-Less Transistors. Search on Bibsonomy VLSI-SoC The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
1Vasileios Leon, Kiamal Z. Pekmestzi, Dimitrios Soudris Systematic Embedded Development and Implementation Techniques on Intel Myriad VPUs. Search on Bibsonomy VLSI-SoC The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
1Cecil Accetti, Peilin Liu Architectural Support for Functional Programming. Search on Bibsonomy VLSI-SoC The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
1Milad Eslaminia, Sébastien Le Beux Toward Large Scale All-Optical Spiking Neural Networks. Search on Bibsonomy VLSI-SoC The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
1Nils Bosbach, Jan Moritz Joseph, Rainer Leupers, Lukas Jünger 0001 NISTT: A Non-Intrusive SystemC-TLM 2.0 Tracing Tool. Search on Bibsonomy VLSI-SoC The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
1Mohammad Humam Khan, Ruchika Gupta, Vedika J. Kulkarni, John Jose, Sukumar Nandi Hardware Trojan Mitigation for Securing On-chip Networks from Dead Flit Attacks. Search on Bibsonomy VLSI-SoC The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
1Endri Kaja, Nicolas Gerlin, Monideep Bora, Gabriel Rutsch, Keerthikumara Devarajegowda, Dominik Stoffel, Wolfgang Kunz, Wolfgang Ecker Fast and Accurate Model-Driven FPGA-based System-Level Fault Emulation. Search on Bibsonomy VLSI-SoC The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
1Foroozan Karimzadeh, Arijit Raychowdhury Towards CIM-friendly and Energy-Efficient DNN Accelerator via Bit-level Sparsity. Search on Bibsonomy VLSI-SoC The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
1Anteneh Gebregiorgis, Abhairaj Singh, Sumit Diware, Rajendra Bishnoi, Said Hamdioui Dealing with Non-Idealities in Memristor Based Computation-In-Memory Designs. Search on Bibsonomy VLSI-SoC The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
1Yogesh Kumar, S. Sivakumar, John Jose ENDURA : Enhancing Durability of Multi Level Cell STT-RAM based Non Volatile Memory Last Level Caches. Search on Bibsonomy VLSI-SoC The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
1Nicolas Gerlin, Endri Kaja, Monideep Bora, Keerthikumara Devarajegowda, Dominik Stoffel, Wolfgang Kunz, Wolfgang Ecker Design of a Tightly-Coupled RISC-V Physical Memory Protection Unit for Online Error Detection. Search on Bibsonomy VLSI-SoC The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
1Dimitrios Samaras, Andreas Tsimpos, Alkis A. Hatzopoulos A novel wide frequency range 65nm CMOS VCO. Search on Bibsonomy VLSI-SoC The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
1Alexander Fusco, Md Sahil Hassan, Joshua Mack, Ali Akoglu A Hardware-based HEFT Scheduler Implementation for Dynamic Workloads on Heterogeneous SoCs. Search on Bibsonomy VLSI-SoC The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
1U. Esteban Eraso, Carlos Sánchez-Azqueta, Concepción Aldea, Santiago Celma A CMOS 4-bit Digitally Programmable Phase Shifter for the K-band. Search on Bibsonomy VLSI-SoC The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
1Konstantinos Falis, Andreas Tsiougkos, Vasilis F. Pavlidis Practical Day-Ahead Power Prediction of Solar Energy-Harvesting for IoT Systems. Search on Bibsonomy VLSI-SoC The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
1Evangelos Vlachos, Kostas Blekos Quantum Computing-Assisted Channel Estimation for Massive MIMO mmWave Systems. Search on Bibsonomy VLSI-SoC The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
1Ashwin Bhat, Adou Sangbone Assoa, Arijit Raychowdhury Gradient Backpropagation based Feature Attribution to Enable Explainable-AI on the Edge. Search on Bibsonomy VLSI-SoC The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
1Simranjeet Singh, Srinivasu Bodapati, Sachin B. Patkar, Rainer Leupers, Anupam Chattopadhyay, Farhad Merchant PA-PUF: A Novel Priority Arbiter PUF. Search on Bibsonomy VLSI-SoC The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
1Rolf Drechsler, Alireza Mahzoon Preserving Design Hierarchy Information for Polynomial Formal Verification. Search on Bibsonomy VLSI-SoC The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
1Mahdi Zahedi, Taha Shahroodi, Geert Custers, Abhairaj Singh, Stephan Wong, Said Hamdioui System Design for Computation-in-Memory: From Primitive to Complex Functions. Search on Bibsonomy VLSI-SoC The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
1George S. Vergos, Vasiliki Gogolou, C. Panagiotopoulou, A. Avgoustidis, Thomas Noulis, Kostas Siozios, Stilianos Siskos Machine Learning based Power Converter Large Signal Simulation for Energy Harvesting Applications. Search on Bibsonomy VLSI-SoC The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
1P. Esmaeili, Timothy Martin, Shawki Areibi, Gary Gréwal Guiding FPGA Detailed Placement via Reinforcement Learning. Search on Bibsonomy VLSI-SoC The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
1Alexander El-Kady, Apostolos P. Fournaris, Evangelos Haleplidis, Vassilis Paliouras High-Level Synthesis design approach for Number-Theoretic Multiplier. Search on Bibsonomy VLSI-SoC The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
1Chirag Sudarshan, Taha Soliman, Thomas Kämpfe, Christian Weis, Norbert Wehn FeFET versus DRAM based PIM Architectures: A Comparative Study. Search on Bibsonomy VLSI-SoC The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
1Stian Gerlach Sørensen, Christian Bartsch 0001, Dominik Stoffel, Wolfgang Kunz Generation of Formal CPU Profiles for Embedded Systems. Search on Bibsonomy VLSI-SoC The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
1Konstantinos D. Katsanos, George C. Alexandropoulos Secrecy Spectral Efficiency Optimization in RIS-Enabled MIMO Communication Systems. Search on Bibsonomy VLSI-SoC The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
1Carlos Fernandez, Ioannis Vourkas On the Design and Development of a ReRAM-based Computational Memory Prototype. Search on Bibsonomy VLSI-SoC The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
1Shubham Kumar, Swetaki Chatterjee, Simon Thomann, Paul R. Genssler, Yogesh Singh Chauhan, Hussam Amrouch Cross-layer FeFET Reliability Modeling for Robust Hyperdimensional Computing. Search on Bibsonomy VLSI-SoC The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
1Gourav Datta, Souvik Kundu 0002, Zihan Yin, Joe Mathai, Zeyu Liu 0003, Zixu Wang, Mulin Tian, Shunlin Lu, Ravi Teja Lakkireddy, Andrew G. Schmidt, Wael Abd-Almageed, Ajey P. Jacob, Akhilesh R. Jaiswal, Peter A. Beerel P2M-DeTrack: Processing-in-Pixel-in-Memory for Energy-efficient and Real-Time Multi-Object Detection and Tracking. Search on Bibsonomy VLSI-SoC The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
1Akshay Sarman, Alwin Shaju, Rose George Kunthara, K. Neethu, Rekha K. James, John Jose RIBiT: Reduced Intra-flit Bit Transitions for Bufferless NoC. Search on Bibsonomy VLSI-SoC The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
1Asmae El Arrassi, Anteneh Gebregiorgis, Anass El Haddadi, Said Hamdioui Energy-Efficient SNN Implementation Using RRAM-Based Computation In-Memory (CIM). Search on Bibsonomy VLSI-SoC The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
1Georgios Kottaras, Theodoros Sarris, Athanasios M. Psomoulis, Ilias Ioakeimidis, Angelos Papathanasiou, David Pitchford, Ingmar Sandberg A low-power, radiation-hardened Single Event Effect rate detection System on a Chip for Real Time Monitoring of Single Event Effects on Low Earth Orbit satellites. Search on Bibsonomy VLSI-SoC The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
1Vasileios Leon, George Lentaris, Dimitrios Soudris, Simon Vellas, Mathieu Bernou Towards Employing FPGA and ASIP Acceleration to Enable Onboard AI/ML in Space Applications. Search on Bibsonomy VLSI-SoC The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
1Artem Glukhov, Nicola Lepri, Valerio Milo, Andrea Baroni, Cristian Zambelli, Piero Olivo, Eduardo Pérez, Christian Wenger, Daniele Ielmini End-to-end modeling of variability-aware neural networks based on resistive-switching memory arrays. Search on Bibsonomy VLSI-SoC The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
1Andreas Emeretlis, George Theodoridis, Panayiotis Alefragis, Nikos S. Voros A Multi-stage Hybrid Approach for Mapping Applications on Heterogeneous Multi-core Platforms. Search on Bibsonomy VLSI-SoC The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
1Imlijungla Longchar, Palash Das, Hemangee K. Kapoor ZaLoBI: Zero avoiding Load Balanced Inference accelerator. Search on Bibsonomy VLSI-SoC The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
1J. Fernández-Aragón, Guillermo Díez-Señorans, Miguel Garcia-Bosque, Santiago Celma Design and characterisation of a Physically Unclonable Function on FPGA using second-order compensated measurement. Search on Bibsonomy VLSI-SoC The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
1Michael Keyser, Roman Gauchi, Pierre-Emmanuel Gaillardon An Energy-Efficient Three-Independent-Gate FET Cell Library for Low-Power Edge Computing. Search on Bibsonomy VLSI-SoC The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
1Lieqiu Jiang, Zepeng Li, Chenpeng Bao, Genggeng Liu, Xing Huang, Wen-Hao Liu, Ting-Chi Wang LA-SVR: A High-Performance Layer Assignment Algorithm with Slew Violations Reduction. Search on Bibsonomy VLSI-SoC The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
1Shahzad Muzaffar, Ibrahim Abe M. Elfadel Logic Locking of Finite-State Machines Using Transition Obfuscation. Search on Bibsonomy VLSI-SoC The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
1Pedro Aquino Silva, Mateus Grellert, Cristina Meinhardt Exploring Approximate Comparator Circuits on Power Efficient Design of Decision Trees. Search on Bibsonomy VLSI-SoC The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
1Georgios Flamis, Stavros Kalapothas, Paris Kitsos FPGA-SoC Deployment of Complex Deep Neural Network for Magnitude and Phase Computations in Denoising of Speech Signal. Search on Bibsonomy VLSI-SoC The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
1Lukasz Lopacinski, Alireza Hasani, Goran Panic, Nebojsa Maletic, Jesús Gutiérrez 0004, Milos Krstic, Eckhard Grass High-Speed SC Decoder for Polar Codes achieving 1.7 Tb/s in 28 nm CMOS. Search on Bibsonomy VLSI-SoC The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
1Vasileios Manouras, Ioannis Papananos A Wideband High-Gain Power Amplifier Operating in the D Band. Search on Bibsonomy VLSI-SoC The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
1Kritanta Saha, Pritha Banerjee 0001, Susmita Sur-Kolay Stitch-avoiding Detailed Routing for Multiple E-Beam Lithography. Search on Bibsonomy VLSI-SoC The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
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