Search results for "microprocessor"

Hits ?▲	Authors	Title	Venue	Year	Link
12	Lawrence T. Clark, Dan W. Patterson, Chandarasekaran Ramamurthy, Keith E. Holbert	An Embedded Microprocessor Radiation Hardened by Microarchitecture and Circuits.	IEEE Trans. Computers	2016	DBLP DOI BibTeX RDF
12	Mohamed Amine Boussadi, Thierry Tixier, Alexis Landrault, Jean-Pierre Dérutin	HNCP: A many-core microprocessor ASIC approach dedicated to embedded image processing applications.	Microprocess. Microsystems	2016	DBLP DOI BibTeX RDF
12	Roberto Urban, Heinrich Theodor Vierhaus, Mario Schölzel, Enrico Altmann, Horst Seelig	Non-Cyclic Design Space Exploration for ASIPs - Compiler-Centered Microprocessor Design (CoMet).	J. Circuits Syst. Comput.	2016	DBLP DOI BibTeX RDF
12	A. S. Molyakov	A prototype computer with non-von Neumann architecture based on strategic domestic J7 microprocessor.	Autom. Control. Comput. Sci.	2016	DBLP DOI BibTeX RDF
12	Tosiron Adegbija, Anita Rogacs, Chandrakant Patel, Ann Gordon-Ross	Microprocessor Optimizations for the Internet of Things.	CoRR	2016	DBLP BibTeX RDF
12	Lukás Charvát, Ales Smrcka, Tomás Vojnar	HADES: Microprocessor Hazard Analysis via Formal Verification of Parameterized Systems.	MEMICS	2016	DBLP DOI BibTeX RDF
12	Brian Campbell 0001, Ian Stark	Randomised testing of a microprocessor model using SMT-solver state generation.	Sci. Comput. Program.	2016	DBLP DOI BibTeX RDF
12	Zhenqiang Yong, Xiaoyan Xiang, Jianyi Meng, Chen Chen 0058	TBCT: Time-Borrowing and Clock Token based error correction and its application in microprocessor.	IEICE Electron. Express	2016	DBLP DOI BibTeX RDF
12	Tony Nowatzki, Karthikeyan Sankaralingam	Modularizing the microprocessor core to outperform traditional out-of-order.	Hot Chips Symposium	2016	DBLP DOI BibTeX RDF
12		17th International Workshop on Microprocessor and SOC Test and Verification, MTV 2016, Austin, TX, USA, December 12-13, 2016	MTV	2016	DBLP BibTeX RDF
12	Aymen Touati, Alberto Bosio, Patrick Girard 0001, Arnaud Virazel, Paolo Bernardi, Matteo Sonza Reorda	Improving the Functional Test Delay Fault Coverage: A Microprocessor Case Study.	ISVLSI	2016	DBLP DOI BibTeX RDF
12	Irina Stotland, Danil Shpagilev, Nadezhda Starikovskaya	UVM based approaches to functional verification of communication controllers of microprocessor systems.	EWDTS	2016	DBLP DOI BibTeX RDF
12	Andrei Tatarnikov	An approach to instruction stream generation for functional verification of microprocessor designs.	EWDTS	2016	DBLP DOI BibTeX RDF
12	Peter T. Breuer, Jonathan P. Bowen, Esther Palomar, Zhiming Liu 0001	A Practical Encrypted Microprocessor.	SECRYPT	2016	DBLP DOI BibTeX RDF
12	Hippolyte Djonon Tsague, Bheki Twala	A Robust Machine Learning Approach to Microprocessor Instructions Identification.	MICAI (2)	2016	DBLP DOI BibTeX RDF
12	Awais Yousaf, Shahid Masud	Stochastic model based dynamic power estimation of microprocessor using Imperas simulator.	SysCon	2016	DBLP DOI BibTeX RDF
12	Stefanos Valadimas, Angela Arapoyanni, Yiorgos Tsiatouhas	Timing error mitigation in microprocessor cores.	ICECS	2016	DBLP DOI BibTeX RDF
12	Jeremy Constantin, Andrea Bonetti, Adam Teman, Thomas Christoph Müller, Lorenz Schmid, Andreas Burg	DynOR: A 32-bit microprocessor in 28 nm FD-SOI with cycle-by-cycle dynamic clock adjustment.	ESSCIRC	2016	DBLP DOI BibTeX RDF
12	Aaron Grenat, Sriram Sundaram, Stephen Kosonocky, Ravinder Rachala, Sriram Sambamurthy, Steven Liepe, Miguel Rodriguez, Tom Burd, Adam Clark, Michael Austin, Samuel Naffziger	4.2 Increasing the performance of a 28nm x86-64 microprocessor through system power management.	ISSCC	2016	DBLP DOI BibTeX RDF
12	Matthew Tomei, Henry Duwe, Nam Sung Kim, Rakesh Kumar 0002	Bit Serializing a Microprocessor for Ultra-low-power.	ISLPED	2016	DBLP DOI BibTeX RDF
12	Anteneh Gebregiorgis, Mohammad Saber Golanbari, Saman Kiamehr, Fabian Oboril, Mehdi Baradaran Tahoori	Maximizing Energy Efficiency in NTC by Variation-Aware Microprocessor Pipeline Optimization.	ISLPED	2016	DBLP DOI BibTeX RDF
12	Masanori Natsui, Akira Tamakoshi, Akira Mochizuki, Hiroki Koike, Hideo Ohno, Tetsuo Endoh, Takahiro Hanyu	Stochastic behavior-considered VLSI CAD environment for MTJ/MOS-hybrid microprocessor design.	ISCAS	2016	DBLP DOI BibTeX RDF
12	Snehasish Kumar, William N. Sumner, Arrvindh Shriraman	SPEC-AX and PARSEC-AX: extracting accelerator benchmarks from microprocessor benchmarks.	IISWC	2016	DBLP DOI BibTeX RDF
12	Ehsan Aerabi, A. Elhadi Amirouche, Houda Ferradi, Rémi Géraud, David Naccache, Jean Vuillemin	The Conjoined Microprocessor.	HOST	2016	DBLP DOI BibTeX RDF
12	Peter T. Breuer, Jonathan P. Bowen	A Fully Encrypted Microprocessor The Secret Computer is Nearly Here.	ANT/SEIT	2016	DBLP DOI BibTeX RDF
12	Sotiris Tselonis, Manolis Kaliorakis, Nikos Foutris, George Papadimitriou 0001, Dimitris Gizopoulos	Microprocessor reliability-performance tradeoffs assessment at the microarchitecture level.	VTS	2016	DBLP DOI BibTeX RDF
12	César O. Campos-Aguillón, Rene Celis-Cordova, Ismo K. Hänninen, Craig S. Lent, Alexei O. Orlov, Gregory L. Snider	A Mini-MIPS microprocessor for adiabatic computing.	ICRC	2016	DBLP DOI BibTeX RDF
12	Bilgiday Yuce, Nahid Farhady Ghalaty, Chinmay Deshpande, Conor Patrick, Leyla Nazhandali, Patrick Schaumont	FAME: Fault-attack Aware Microprocessor Extensions for Hardware Fault Detection and Software Fault Response.	HASP@ISCA	2016	DBLP DOI BibTeX RDF
12	Timothy Hayes 0001, Oscar Palomar, Osman S. Unsal, Adrián Cristal, Mateo Valero	Future Vector Microprocessor Extensions for Data Aggregations.	ISCA	2016	DBLP DOI BibTeX RDF
12	Doowon Lee, Tom Kolan, Arkadiy Morgenshtein, Vitali Sokhin, Ronny Morad, Avi Ziv, Valeria Bertacco	Probabilistic bug-masking analysis for post-silicon tests in microprocessor verification.	DAC	2016	DBLP DOI BibTeX RDF
12	Ravi Suppiah, Ng Siew Qee Shaun	Introducing microprocessor-based systems design on an ARM softcore using a FPGA and a teaching auxiliary board.	EDUCON	2016	DBLP DOI BibTeX RDF
12	Buse Ustaoglu, Berna Örs Yalçin	Reliability analysis of MIPS-32 microprocessor register files designed with different fault tolerant techniques.	SIU	2016	DBLP DOI BibTeX RDF
12	Omar Amin, Youssef Ramzy, Omar Ibrahem, Ahmed Fouad 0001, Khaled Mohamed, Mohamed Abdelsalam	System Verilog Assertions Synthesis Based Compiler.	MTV	2016	DBLP DOI BibTeX RDF
12	Senwen Kan, Matthew Lam, Tyler Porter, Jennifer Dworak	A Case Study: Pre-Silicon SoC RAS Validation for NoC Server Processor.	MTV	2016	DBLP DOI BibTeX RDF
12	Xiaolong Guo, Raj Gautam Dutta, Prabhat Mishra 0001, Yier Jin	Automatic RTL-to-Formal Code Converter for IP Security Formal Verification.	MTV	2016	DBLP DOI BibTeX RDF
12	Ahmed El-Yamany, Sameh El-Ashry, Khaled Salah 0001	Coverage Closure Efficient UVM Based Generic Verification Architecture for Flash Memory Controllers.	MTV	2016	DBLP DOI BibTeX RDF
12	Sainath Karlapalem, Shashank Venugopal	Scalable, Constrained Random Software Driven Verification.	MTV	2016	DBLP DOI BibTeX RDF
12	Yang Xie, Chongxi Bao, Yuntao Liu 0001, Ankur Srivastava 0001	2.5D/3D Integration Technologies for Circuit Obfuscation.	MTV	2016	DBLP DOI BibTeX RDF
12	Vibarajan Viswanathan, Juliet Runhaar, Doug Reed, Jun Zhao	Tough Bugs vs. Smart Tools - L2/L3 Cache Verification Using System Verilog, UVM and Verdi Transaction Debugging.	MTV	2016	DBLP DOI BibTeX RDF
12	Khaled Fathy, Khaled Salah 0001	An Efficient Scenario Based Testing Methodology Using UVM.	MTV	2016	DBLP DOI BibTeX RDF
12	Haytham Saafan, M. Watheq El-Kharashi, Ashraf Salem	Formal Based Methodology for Inferring Memory Mapped Registers.	MTV	2016	DBLP DOI BibTeX RDF
12	Amr B. Darwish, Magdy A. El-Moursy, Mohamed Dessouky	Transaction Level Power Modeling (TLPM) Methodology.	MTV	2016	DBLP DOI BibTeX RDF
12	Liwei Zhou, Yiorgos Makris	Hardware-Based Workload Forensics and Malware Detection in Microprocessors.	MTV	2016	DBLP DOI BibTeX RDF
12	Wei Hu 0008, Alric Althoff, Armita Ardeshiricham, Ryan Kastner	Towards Property Driven Hardware Security.	MTV	2016	DBLP DOI BibTeX RDF
12	Saddam Jamil Quirem, Prasad Krishna Saravu	Fake CPU: A Flexible and Simulation Cost-Effective UVC for Testing Shared Caches.	MTV	2016	DBLP DOI BibTeX RDF
12	Prasad Krishna Saravu	Multi-processor Memory Scoreboard: A Multi-processor Memory Ordering and Data Consistency Checker.	MTV	2016	DBLP DOI BibTeX RDF
12	Ahmed El-Yamany	Echoing the "Generality Concept" through the Bus Functional Model Architecture in Universal Verification Environments.	MTV	2016	DBLP DOI BibTeX RDF
12	Seongjong Kim, Mingoo Seok	Variation-Tolerant, Ultra-Low-Voltage Microprocessor With a Low-Overhead, Within-a-Cycle In-Situ Timing-Error Detection and Correction Technique.	IEEE J. Solid State Circuits	2015	DBLP DOI BibTeX RDF
12	Lieven Eeckhout	Hot Chips in an Increasingly Diverse Microprocessor Landscape.	IEEE Micro	2015	DBLP DOI BibTeX RDF
12	Chang-Chih Chen, Linda S. Milor	Microprocessor Aging Analysis and Reliability Modeling Due to Back-End Wearout Mechanisms.	IEEE Trans. Very Large Scale Integr. Syst.	2015	DBLP DOI BibTeX RDF
12	Mohammad Abdur Rouf, Soontae Kim	Low-Cost Control Flow Protection via Available Redundancies in the Microprocessor Pipeline.	IEEE Trans. Very Large Scale Integr. Syst.	2015	DBLP DOI BibTeX RDF
12	Michail Maniatakos, Maria K. Michael, Yiorgos Makris	Multiple-Bit Upset Protection in Microprocessor Memory Arrays Using Vulnerability-Based Parity Optimization and Interleaving.	IEEE Trans. Very Large Scale Integr. Syst.	2015	DBLP DOI BibTeX RDF
12	Brian W. Curran, Christian Jacobi 0002, J. J. Bonanno, D. A. Schroter, K. J. Alexander, A. Puranik, Markus M. Helms	The IBM z13 multithreaded microprocessor.	IBM J. Res. Dev.	2015	DBLP DOI BibTeX RDF
12	Sai Manoj P. D., Hao Yu 0001, Kanwen Wang	3D Many-Core Microprocessor Power Management by Space-Time Multiplexing Based Demand-Supply Matching.	IEEE Trans. Computers	2015	DBLP DOI BibTeX RDF
12	Steve Kerrison, Kerstin Eder	Energy Modeling of Software for a Hardware Multithreaded Embedded Microprocessor.	ACM Trans. Embed. Comput. Syst.	2015	DBLP DOI BibTeX RDF
12	Fabian Oboril, Mehdi Baradaran Tahoori	Exploiting Instruction Set Encoding for Aging-Aware Microprocessor Design.	ACM Trans. Design Autom. Electr. Syst.	2015	DBLP DOI BibTeX RDF
12	Taizhi Liu, Chang-Chih Chen, Woongrae Kim, Linda Milor	Comprehensive reliability and aging analysis on SRAMs within microprocessor systems.	Microelectron. Reliab.	2015	DBLP DOI BibTeX RDF
12	Ehsan Aerabi, A. Elhadi Amirouche, Houda Ferradi, Rémi Géraud, David Naccache, Jean Vuillemin	The Conjoined Microprocessor.	IACR Cryptol. ePrint Arch.	2015	DBLP BibTeX RDF
12	Jim Esch	Spin-Based Computing: Device Concepts, Current Status, and a Case Study on a High-Performance Microprocessor.	Proc. IEEE	2015	DBLP DOI BibTeX RDF
12	Jongyeon Kim, Ayan Paul, Paul A. Crowell, Steven J. Koester, Sachin S. Sapatnekar, Jianping Wang 0006, Chris H. Kim	Spin-Based Computing: Device Concepts, Current Status, and a Case Study on a High-Performance Microprocessor.	Proc. IEEE	2015	DBLP DOI BibTeX RDF
12	Xianhe Huang, Dong Liu, Yan Wang, Pingping Chen, Wei Fu	100-MHz Low-Phase-Noise Microprocessor Temperature-Compensated Crystal Oscillator.	IEEE Trans. Circuits Syst. II Express Briefs	2015	DBLP DOI BibTeX RDF
12	Chen Sun 0003, Mark T. Wade, Yunsup Lee, Jason S. Orcutt, Luca Alloatti, Michael Georgas, Andrew Waterman, Jeffrey M. Shainline, Rimas Avizienis, Sen Lin, Benjamin Moss, Rajesh Kumar, Fabio Pavanello, Amir H. Atabaki, Henry Cook, Albert J. Ou, Jonathan C. Leu, Yu-Hsin Chen, Krste Asanovic, Rajeev J. Ram, Milos A. Popovic, Vladimir Marko Stojanovic	Single-chip microprocessor that communicates directly using light.	Nat.	2015	DBLP DOI BibTeX RDF
12	Ismo K. Hänninen, César O. Campos-Aguillón, Rene Celis-Cordova, Gregory L. Snider	Design and Fabrication of a Microprocessor Using Adiabatic CMOS and Bennett Clocking.	RC	2015	DBLP DOI BibTeX RDF
12	Roberto Urban, Mario Schölzel, Heinrich Theodor Vierhaus, Enrico Altmann, Horst Seelig	Compiler-Centred Microprocessor Design (CoMet) - From C-Code to a VHDL Model of an ASIP.	DDECS	2015	DBLP DOI BibTeX RDF
12		16th International Workshop on Microprocessor and SOC Test and Verification, MTV 2015, Austin, TX, USA, December 3-4, 2015	MTV	2015	DBLP BibTeX RDF
12	Michal Mackowski, Michal Niezabitowski	Power Consumption Analysis of Microprocessor Unit Based on Software Realization.	CSCS	2015	DBLP DOI BibTeX RDF
12	Irina Stotland, Aleksey Meshkov, Vitaly Kutsevol	Standalone functional verification of multicore microprocessor memory subsystem units based on application of memory subsystem models.	EWDTS	2015	DBLP DOI BibTeX RDF
12	Cyril Bottoni, Benjamin Coeffic, Jean-Marc Daveau, Gilles Gasiot, Fady Abouzeid, Sylvain Clerc, Lirida A. B. Naviner, Philippe Roche	Frequency and voltage effects on SER on a 65nm Sparc-V8 microprocessor under radiation test.	IRPS	2015	DBLP DOI BibTeX RDF
12	Pong-Fei Lu, Keith A. Jenkins, K. Paul Muller, Ralf Schaufler	Long-term data for BTI degradation in 32nm IBM microprocessor using HKMG technology.	IRPS	2015	DBLP DOI BibTeX RDF
12	Lei Wang 0011, Yuxing Tang, Yu Deng 0001, Fangyan Qin, Qiang Dou, Guangda Zhang, Feipeng Zhang	A Scalable and Fast Microprocessor Design Space Exploration Methodology.	MCSoC	2015	DBLP DOI BibTeX RDF
12	Andrea Höller, Tobias Rauter, Johannes Iber, Christian Kreiner	Diverse Compiling for Microprocessor Fault Detection in Temporal Redundant Systems.	CIT/IUCC/DASC/PICom	2015	DBLP DOI BibTeX RDF
12	Tiago Reimann, Cliff C. N. Sze, Ricardo Reis 0001	Gate sizing and threshold voltage assignment for high performance microprocessor designs.	ASP-DAC	2015	DBLP DOI BibTeX RDF
12	Sukrat Gupta, Neel Gala, G. S. Madhusudan, V. Kamakoti 0001	SHAKTI-F: A Fault Tolerant Microprocessor Architecture.	ATS	2015	DBLP DOI BibTeX RDF
12	Cyril Bottoni, Benjamin Coeffic, Jean-Marc Daveau, Lirida A. B. Naviner, Philippe Roche	Partial triplication of a SPARC-V8 microprocessor using fault injection.	LASCAS	2015	DBLP DOI BibTeX RDF
12	Buse Ustaoglu, Berna Örs Yalçin	Fault tolerant register file design for MIPS AES-crypto microprocessor.	ICECS	2015	DBLP DOI BibTeX RDF
12	Riccardo Cantoro, Marco Gaudesi, Ernesto Sánchez 0001, Giovanni Squillero	Exploiting Evolutionary Computation in an Industrial Flow for the Development of Code-Optimized Microprocessor Test Programs.	GECCO (Companion)	2015	DBLP DOI BibTeX RDF
12	Naoya Onizawa, Akira Mochizuki, Akira Tamakoshi, Takahiro Hanyu	A sudden power-outage resilient nonvolatile microprocessor for immediate system recovery.	NANOARCH	2015	DBLP DOI BibTeX RDF
12	Praveen Mosalikanti, Nasser A. Kurd, Christopher Mozak, Takao Oshita	Low power analog circuit techniques in the 5th generation intel coreTM microprocessor (broadwell).	CICC	2015	DBLP DOI BibTeX RDF
12	Vinay Vashishtha, Lawrence T. Clark, Srivatsan Chellappa, Anudeep R. Gogulamudi, Aditya Gujja, Chad Farnsworth	A soft-error hardened process portable embedded microprocessor.	CICC	2015	DBLP DOI BibTeX RDF
12	Vladimir Ruchkin, Vitaly Romanchuk, Vladimir Fulin, Boris Kostrov, Ekaterina Ruchkina	Parallelism in embedded microprocessor systems based on clustering.	MECO	2015	DBLP DOI BibTeX RDF
12	Kosta Luria, Joseph Shor, Michael Zelikson, Alex Lyakhov	8.7 Dual-use low-drop-out regulator/power gate with linear and on-off conduction modes for microprocessor on-die supply voltages in 14nm.	ISSCC	2015	DBLP DOI BibTeX RDF
12	James D. Warnock, Brian W. Curran, John Badar, Gregory Fredeman, Donald W. Plass, Yuen H. Chan, Sean M. Carey, Gerard Salem, Friedrich Schroeder, Frank Malgioglio, Guenter Mayer, Christopher J. Berry, Michael H. Wood, Yiu-Hing Chan, Mark D. Mayo, John Isakson, Charudhattan Nagarajan, Tobias Werner 0001, Leon J. Sigal, Ricardo Nigaglioni, Mark Cichanowski, Jeffrey A. Zitz, Matthew M. Ziegler, Tim Bronson, Gerald Strevig, Daniel Dreps, Ruchir Puri, Douglas Malone, Dieter F. Wendel, Pak-kin Mak, Michael A. Blake	4.1 22nm Next-generation IBM System z microprocessor.	ISSCC	2015	DBLP DOI BibTeX RDF
12	Sheng Wang 0005, Xiaoyan Xiang, Chen Chen 0058, Jianyi Meng	An energy-efficient microprocessor using multilevel error correction for timing error tolerance.	ASICON	2015	DBLP DOI BibTeX RDF
12	Lukás Charvát, Ales Smrcka, Tomás Vojnar	Microprocessor Hazard Analysis Via Formal Verification of Parameterized Systems.	EUROCAST	2015	DBLP DOI BibTeX RDF
12	Mohammad Hashem Haghbayan, Sami Teravainen, Amir-Mohammad Rahmani, Pasi Liljeberg, Hannu Tenhunen	Adaptive fault simulation on many-core microprocessor systems.	DFTS	2015	DBLP DOI BibTeX RDF
12	Quintin Verzosa, Wah A. Lee Alex	Testing microprocessor-based numerical transformer differential protection.	IAS	2015	DBLP DOI BibTeX RDF
12	Jean-Luc Dekeyser, A. Shadi Aljendi	Adopting new learning strategies for computer architecture in higher education: case study: building the S3 microprocessor in 24 hours.	WCAE	2015	DBLP DOI BibTeX RDF
12	Pradeepkumar Krishnamoorthy, Cheng Siong Chin, Zuchang Gao, Weipeng Lin	A multi-hop microprocessor based prototype system for remote vibration and image monitoring of underwater offshore platform.	RAM/CIS	2015	DBLP DOI BibTeX RDF
12	Matthew R. Johnson 0003	Fast, accurate power measurement and optimization for microprocessor platforms		2015	RDF
12	Yang Lin	Cost-effective radiation hardened techniques for microprocessor pipelines.		2015	RDF
12	Amandeep Sharan, Ashish Gupta	Hybrid Post Silicon Validation Methodology for Layerscape SoCs involving Secure Boot: Boot (Secure & Non-secure) and Kernel Integration with Randomized Test.	MTV	2015	DBLP DOI BibTeX RDF
12	Mikhail M. Chupilko, Alexander S. Kamkin, Artem Kotsynyak, Alexander Protsenko, Sergey A. Smolov, Andrei Tatarnikov	Specification-Based Test Program Generation for ARM VMSAv8-64 Memory Management Units.	MTV	2015	DBLP DOI BibTeX RDF
12	Xiaolong Guo, Raj Gautam Dutta, Yier Jin	Hierarchy-Preserving Formal Verification Methods for Pre-silicon Security Assurance.	MTV	2015	DBLP DOI BibTeX RDF
12	Mark Nelson 0004, Peter-Michael Seidel	Modeling and Analysis of Trusted Boot Processes Based on Actor Network Procedures.	MTV	2015	DBLP DOI BibTeX RDF
12	Harshit Goyal, Vishwani D. Agrawal	Characterizing Processors for Energy and Performance Management.	MTV	2015	DBLP DOI BibTeX RDF
12	Sourav Roy, Nikhil Jain, Sandeep Jain, Robert Page	Leveraging Virtual Prototype Models for Hardware Verification of an Accelerated Network Packet Processing Engine.	MTV	2015	DBLP DOI BibTeX RDF
12	Bicky Shakya, Fahim Rahman, Mark M. Tehranipoor, Domenic Forte	Harnessing Nanoscale Device Properties for Hardware Security.	MTV	2015	DBLP DOI BibTeX RDF
12	Jeremy Ridgeway	Performance of a SystemVerilog Sudoku Solver with VCS.	MTV	2015	DBLP DOI BibTeX RDF
12	Taylor Holmes, Andrew Passerelli, John Connor	SoC Development and Prototype with VDK.	MTV	2015	DBLP DOI BibTeX RDF
12	John Hudson, Gunaranjan Kurucheti	Enhancing the Stress and Efficiency of RIS Tools Using Coverage Metrics.	MTV	2015	DBLP DOI BibTeX RDF