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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
Group by:
The graphs summarize 2784 occurrences of 1319 keywords
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Results
Found 4097 publication records. Showing 4097 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
12 | Alan Hunter 0002, Andrew Piziali, Avi Ziv, Kelly Larson, Shankar Hemmady |
Ensuring Functional Closure of a Multi-core SoC through Verification Planning, Implementation and Execution. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: Ninth International Workshop on Microprocessor Test and Verification, MTV 2008, Austin, Texas, USA, 8-10 December 2008, pp. 7-13, 2008, IEEE Computer Society, 978-0-7695-3581-4. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
12 | Chia-Ling Lynn Chang, Charles H.-P. Wen |
Mining Unreachable Cross-Timeframe State-Pairs for Bounded Sequential Equivalence Checking. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: Ninth International Workshop on Microprocessor Test and Verification, MTV 2008, Austin, Texas, USA, 8-10 December 2008, pp. 33-38, 2008, IEEE Computer Society, 978-0-7695-3581-4. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
12 | Weiwu Hu, Ji-Ye Zhao, Shi-Qiang Zhong, Xu Yang, Elio Guidetti, Chris Wu |
Implementing a 1GHz Four-Issue Out-of-Order Execution Microprocessor in a Standard Cell ASIC Methodology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Comput. Sci. Technol. ![In: J. Comput. Sci. Technol. 22(1), pp. 1-14, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
superscalar pipeline, non-blocking cache, synthesis flow, bit-sliced placement, crafted cell, performance evaluation, physical design, out-of-order execution, general-purpose processor |
12 | Arghya Sarkar, Samarjit Sengupta |
A Low-Cost Fault-Tolerant Real, Reactive, and Apparent Power Measurement Technique Using Microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Instrum. Meas. ![In: IEEE Trans. Instrum. Meas. 56(6), pp. 2672-2680, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
12 | Susana Ortega-Cisneros, Juan José Raygoza-Panduro, Alberto de la Mora Gálvez |
Design and Implementation of the AMCC Self-Timed Microprocessor in FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Univers. Comput. Sci. ![In: J. Univers. Comput. Sci. 13(3), pp. 377-387, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
12 | Brian W. Curran, Eric Fluhr, Jose Paredes, Leon J. Sigal, Joshua Friedrich, Yiu-Hing Chan, Charlie Hwang |
Power-constrained high-frequency circuits for the IBM POWER6 microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IBM J. Res. Dev. ![In: IBM J. Res. Dev. 51(6), pp. 715-732, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
12 | Hye-Young McCreary, Martha A. Broyles, Michael S. Floyd, Andrew J. Geissler, Steven P. Hartman, Freeman L. Rawson III, Todd J. Rosedahl, Juan C. Rubio, Malcolm S. Ware |
EnergyScale for IBM POWER6 microprocessor-based systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IBM J. Res. Dev. ![In: IBM J. Res. Dev. 51(6), pp. 775-786, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
12 | Rex Berridge, Robert M. Averill III, Arnold E. Barish, Michael A. Bowen, Peter J. Camporese, Jack DiLullo, Peter E. Dudley, Joachim Keinert, David W. Lewis, Robert D. Morel, Thomas E. Rosser, Nicole S. Schwartz, Philip Shephard, Howard H. Smith, Dave Thomas, Phillip J. Restle, John R. Ripley, Stephen L. Runyon, Patrick M. Williams |
IBM POWER6 microprocessor physical design and design methodology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IBM J. Res. Dev. ![In: IBM J. Res. Dev. 51(6), pp. 685-714, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
12 | Michael S. Floyd, Soraya Ghiasi, Tom W. Keller, Karthick Rajamani, Freeman L. Rawson III, Juan C. Rubio, Malcolm S. Ware |
System power management support in the IBM POWER6 microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IBM J. Res. Dev. ![In: IBM J. Res. Dev. 51(6), pp. 733-746, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
12 | Nitin Navale, Erica Lundgren, Nicholas P. Carter |
A magnetoelectronic register file cell for a self-checkpointing microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Int. J. Circuit Theory Appl. ![In: Int. J. Circuit Theory Appl. 35(3), pp. 371-390, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
12 | Greg Stitt, Frank Vahid |
A Decompilation Approach to Partitioning Software for Microprocessor/FPGA Platforms ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/0710.4700, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP BibTeX RDF |
|
12 | Giuseppe Notarangelo, Francesco Pappalardo 0002, Elena Salurso, Elio Guidetti |
A Low Power, Scalable and Runtime Customizable Microprocessor Architecture for Image Processing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Low Power Electron. ![In: J. Low Power Electron. 3(1), pp. 36-42, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
12 | Ken Ferens, Marcia R. Friesen, Sandra Ingram |
Impact Assessment of a Microprocessor Animation on Student Learning and Motivation in Computer Engineering. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Educ. ![In: IEEE Trans. Educ. 50(2), pp. 118-128, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
12 | Thomas Hauser, Aravind Dasu, Arvind Sudarsanam, Seth Young |
Performance of a LU decomposition on a multi-FPGA system compared to a low power commodity microprocessor system. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Scalable Comput. Pract. Exp. ![In: Scalable Comput. Pract. Exp. 8(4), 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP BibTeX RDF |
|
12 | Raymond J. Sung, Duncan G. Elliott |
Clock-Logic Domino Circuits for High-Speed and Energy-Efficient Microprocessor Pipelines. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. II Express Briefs ![In: IEEE Trans. Circuits Syst. II Express Briefs 54-II(5), pp. 460-464, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
12 | Magdy S. Abadir, Li-C. Wang, Jayanta Bhadra (eds.) |
Eighth International Workshop on Microprocessor Test and Verification (MTV 2007), Common Challenges and Solutions, 5-6 December 2007, Austin, Texas, USA ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![IEEE Computer Society, 978-0-7695-3241-7 The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP BibTeX RDF |
|
12 | Thuyen Le, Tilman Glökler, Jason Baumgartner |
Formal verification of a pervasive interconnect bus system in a high-performance microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2007 Design, Automation and Test in Europe Conference and Exposition, DATE 2007, Nice, France, April 16-20, 2007, pp. 219-224, 2007, EDA Consortium, San Jose, CA, USA, 978-3-9810801-2-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
12 | Paolo Bernardi, Michelangelo Grosso, Ernesto Sánchez 0001, Matteo Sonza Reorda |
On the Automatic Generation of Test Programs for Path-Delay Faults in Microprocessor Cores. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ETS ![In: 12th European Test Symposium, ETS 2007, Freiburg, Germany, May 20, 2007, pp. 179-184, 2007, IEEE Computer Society, 978-0-7695-2827-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
12 | Haihua Shen, Heng Zhang |
An Accurate Analysis of Microprocessor Design Verification. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ATS ![In: 16th Asian Test Symposium, ATS 2007, Beijing, China, October 8-11, 2007, pp. 165-171, 2007, IEEE, 0-7695-2890-2. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
12 | Kai Schleupen, Scott Lekuch, Ryan Mannion, Zhi Guo, Walid A. Najjar, Frank Vahid |
Dynamic Partial FPGA Reconfiguration in a Prototype Microprocessor System. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: FPL 2007, International Conference on Field Programmable Logic and Applications, Amsterdam, The Netherlands, 27-29 August 2007, pp. 533-536, 2007, IEEE, 1-4244-1060-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
12 | Pavel Zaykov |
MIMD implementation with PicoBlaze microprocessor using MPI functions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CompSysTech ![In: Proceedings of the 2007 International Conference on Computer Systems and Technologies, CompSysTech 2007, Rousse, Bulgaria, June 14-15, 2007, pp. 4, 2007, ACM, 978-954-9641-50-9. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
MPI functions, PicoBlaze, FPGA, system-on-chip, VHDL, MIMD, parallel computer architecture, message passing system |
12 | Hiroaki Kokubo, Nobuo Hataoka, Akinobu Lee, Tatsuya Kawahara, Kiyohiro Shikano |
Real-Time Continuous Speech Recognition System on SH-4A Microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MMSP ![In: IEEE 9th Workshop on Multimedia Signal Processing, MMSP 2007, Chania, Crete, Greece, October 1-3, 2007, pp. 35-38, 2007, IEEE, 978-1-4244-1274-7. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
12 | Thomas Baumann, Jörg Berthold, T. Niedermeier, Tim Schoenauer, J. Dienstuhl, Doris Schmitt-Landsiedel, Christian Pacha |
Performance improvement of embedded low-power microprocessor cores by selective flip flop replacement. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ESSCIRC ![In: 33rd European Solid-State Circuits Conference, ESSCIRC 2007, Munich, Germany, 11-13 September 2007, pp. 308-311, 2007, IEEE, 978-1-4244-1125-2. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
12 | Dirk Jansen, Nidal Fawaz, Daniel Bau, Marc Durrenberger |
A Small High Performance Microprocessor Core Sirius for Embedded Low Power Designs, Demonstrated in a Medical Mass Application of an Electronic Pill(EPill®). ![Search on Bibsonomy](Pics/bibsonomy.png) |
IESS ![In: Embedded System Design: Topics, Techniques and Trends, IFIP TC10 Working Conference: International Embedded Systems Symposium (IESS), May 30 - June 1, 2007, Irvine, CA, USA, pp. 363-372, 2007, Springer, 978-0-387-72257-3. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
12 | Daniel Murray, James Burnette, Brian Campbell 0004, Mark Chung, Bruce Fernandes, Subhendra Ghosh, Rajat Goel, Greg Hess, Hang Huang, Zhibin Huang, Naveen Javarappa, Pradeep Kanapathipillai, Fabian Klass, Fang Liu, Anup Mehta, Yamini Modukuru, Nishant Nerurkar, Abhijit Radhakrishnan, Sribalan Santhanam, Junji Sugisawa, Shyam Sundar 0003, Honkai John Tam, Ricky Wen, Eric Wu, Jung-Cheng Yeh, John Yong, Sanjay Zambare |
A 2GHz, 7W (max) 64b PowerTM Microprocessor Core. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CICC ![In: Proceedings of the IEEE 2007 Custom Integrated Circuits Conference, CICC 2007, DoubleTree Hotel, San Jose, California, USA, September 16-19, 2007, pp. 725-728, 2007, IEEE, 978-1-4244-1623-3. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
12 | Bryan Casper, Ganesh Balamurugan, James E. Jaussi, Joseph T. Kennedy, Mozhgan Mansuri |
Future Microprocessor Interfaces: Analysis, Design and Optimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CICC ![In: Proceedings of the IEEE 2007 Custom Integrated Circuits Conference, CICC 2007, DoubleTree Hotel, San Jose, California, USA, September 16-19, 2007, pp. 479-486, 2007, IEEE, 978-1-4244-1623-3. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
12 | Peter van Stralen, Andy D. Pimentel |
Signature-based Microprocessor Power Modeling for Rapid System-level Design Space Exploration. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ESTIMedia ![In: Proceedings of the 2007 5th Workshop on Embedded Systems for Real-Time Multimedia, ESTIMedia 2007, October 4-5, Salzburg, Austria, conjunction with CODES+ISSS 2007, pp. 33-38, 2007, IEEE Computer Society, 978-1-4244-1654-7. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
12 | Marc Tremblay |
Transactional memory for a modern microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PODC ![In: Proceedings of the Twenty-Sixth Annual ACM Symposium on Principles of Distributed Computing, PODC 2007, Portland, Oregon, USA, August 12-15, 2007, pp. 1, 2007, ACM, 978-1-59593-616-5. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
12 | Norman K. James, Phillip J. Restle, Joshua Friedrich, Bill Huott, Bradley D. McCredie |
Comparison of Split-Versus Connected-Core Supplies in the POWER6 Microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSCC ![In: 2007 IEEE International Solid-State Circuits Conference, ISSCC 2007, Digest of Technical Papers, San Francisco, CA, USA, February 11-15, 2007, pp. 298-604, 2007, IEEE, 1-4244-0853-9. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
12 | Joshua Friedrich, Bradley D. McCredie, Norman K. James, Bill Huott, Brian W. Curran, Eric Fluhr, Gaurav Mittal, Eddie Chan, Yuen H. Chan, Donald W. Plass, Sam G. Chu, Hung Q. Le, Leo Clark, John R. Ripley, Scott A. Taylor, Jack DiLullo, Mary Yvonne Lanzerotti |
Design of the Power6 Microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSCC ![In: 2007 IEEE International Solid-State Circuits Conference, ISSCC 2007, Digest of Technical Papers, San Francisco, CA, USA, February 11-15, 2007, pp. 96-97, 2007, IEEE, 1-4244-0853-9. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
12 | Alan J. Drake, Robert M. Senger, Harmander Deogun, Gary D. Carpenter, Soraya Ghiasi, Tuyet Nguyen, Norman K. James, Michael S. Floyd, Vikas Pokala |
A Distributed Critical-Path Timing Monitor for a 65nm High-Performance Microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSCC ![In: 2007 IEEE International Solid-State Circuits Conference, ISSCC 2007, Digest of Technical Papers, San Francisco, CA, USA, February 11-15, 2007, pp. 398-399, 2007, IEEE, 1-4244-0853-9. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
12 | Sule Ozev, Daniel J. Sorin, Mahmut Yilmaz |
Low-cost run-time diagnosis of hard delay faults in the functional units of a microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 25th International Conference on Computer Design, ICCD 2007, 7-10 October 2007, Lake Tahoe, CA, USA, Proceedings, pp. 317-324, 2007, IEEE, 1-4244-1258-7. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
12 | Mahmut Yilmaz, Albert Meixner, Sule Ozev, Daniel J. Sorin |
Lazy Error Detection for Microprocessor Functional Units. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 22nd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2007), 26-28 September 2007, Rome, Italy., pp. 361-369, 2007, IEEE Computer Society, 0-7695-2885-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
12 | Da Wang, Xiaoxin Fan, Xiang Fu 0007, Hui Liu, Ke Wen, Rui Li, Huawei Li 0001, Yu Hu 0001, Xiaowei Li 0001 |
The design-for-testability features of a general purpose microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: 2007 IEEE International Test Conference, ITC 2007, Santa Clara, California, USA, October 21-26, 2007, pp. 1-9, 2007, IEEE Computer Society, 1-4244-1128-9. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
12 | Shobha Vasudevan, Vinod Viswanath, Jacob A. Abraham |
Efficient Microprocessor Verification using Antecedent Conditioned Slicing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 20th International Conference on VLSI Design (VLSI Design 2007), Sixth International Conference on Embedded Systems (ICES 2007), 6-10 January 2007, Bangalore, India, pp. 43-49, 2007, IEEE Computer Society, 0-7695-2762-0. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
12 | Chung-Fu Kao, Ing-Jer Huang, Chi-Hung Lin |
An Embedded Multi-resolution AMBA Trace Analyzer for Microprocessor-based SoC Integration. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 44th Design Automation Conference, DAC 2007, San Diego, CA, USA, June 4-8, 2007, pp. 477-482, 2007, IEEE. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
12 | Deepak Mathaikutty |
Metamodeling Driven IP Reuse for System-on-chip Integration and Microprocessor Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
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2007 |
RDF |
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12 | Subir K. Roy |
Top Level SOC Interconnectivity Verification Using Formal Techniques. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: Eighth International Workshop on Microprocessor Test and Verification (MTV 2007), Common Challenges and Solutions, 5-6 December 2007, Austin, Texas, USA, pp. 63-70, 2007, IEEE Computer Society, 978-0-7695-3241-7. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
12 | Marc Herbstritt, Vanessa Struve, Bernd Becker 0001 |
Application of Lifting in Partial Design Analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: Eighth International Workshop on Microprocessor Test and Verification (MTV 2007), Common Challenges and Solutions, 5-6 December 2007, Austin, Texas, USA, pp. 33-38, 2007, IEEE Computer Society, 978-0-7695-3241-7. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
12 | Selma Ikiz, Alper Sen 0001 |
Runtime Verification of k-Mutual Exclusion for SoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: Eighth International Workshop on Microprocessor Test and Verification (MTV 2007), Common Challenges and Solutions, 5-6 December 2007, Austin, Texas, USA, pp. 44-50, 2007, IEEE Computer Society, 978-0-7695-3241-7. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
12 | Dam Sunwoo, Hassan Al-Sukhni, Jim Holt, Derek Chiou |
Early Models for System-Level Power Estimation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: Eighth International Workshop on Microprocessor Test and Verification (MTV 2007), Common Challenges and Solutions, 5-6 December 2007, Austin, Texas, USA, pp. 8-14, 2007, IEEE Computer Society, 978-0-7695-3241-7. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
12 | Tommy Bojan, Igor Frumkin, Robert Mauri |
Intel First Ever Converged Core Functional Validation Experience: Methodologies, Challenges, Results and Learning. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: Eighth International Workshop on Microprocessor Test and Verification (MTV 2007), Common Challenges and Solutions, 5-6 December 2007, Austin, Texas, USA, pp. 85-90, 2007, IEEE Computer Society, 978-0-7695-3241-7. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
12 | Wang-Dauh Tseng, Lung-Jen Lee |
Reduction of Power Dissipation during Scan Testing by Test Vector Ordering. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: Eighth International Workshop on Microprocessor Test and Verification (MTV 2007), Common Challenges and Solutions, 5-6 December 2007, Austin, Texas, USA, pp. 15-21, 2007, IEEE Computer Society, 978-0-7695-3241-7. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
12 | Mark H. Nodine |
Automatic Testbench Generation for Rearchitected Designs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: Eighth International Workshop on Microprocessor Test and Verification (MTV 2007), Common Challenges and Solutions, 5-6 December 2007, Austin, Texas, USA, pp. 128-136, 2007, IEEE Computer Society, 978-0-7695-3241-7. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
12 | Scott Little, Alper Sen 0001, Chris J. Myers |
Application of Automated Model Generation Techniques to Analog/Mixed-Signal Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: Eighth International Workshop on Microprocessor Test and Verification (MTV 2007), Common Challenges and Solutions, 5-6 December 2007, Austin, Texas, USA, pp. 109-115, 2007, IEEE Computer Society, 978-0-7695-3241-7. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
12 | Franco Fummi, Cristina Marconcini, Graziano Pravadelli, Ian G. Harris |
A CLP-Based Functional ATPG for Extended FSMs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: Eighth International Workshop on Microprocessor Test and Verification (MTV 2007), Common Challenges and Solutions, 5-6 December 2007, Austin, Texas, USA, pp. 98-105, 2007, IEEE Computer Society, 978-0-7695-3241-7. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
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12 | Sasidhar Sunkari, Supratik Chakraborty, Vivekananda M. Vedula, Kailasnath Maneparambil |
A Scalable Symbolic Simulator for Verilog RTL. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: Eighth International Workshop on Microprocessor Test and Verification (MTV 2007), Common Challenges and Solutions, 5-6 December 2007, Austin, Texas, USA, pp. 51-59, 2007, IEEE Computer Society, 978-0-7695-3241-7. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
12 | Wei Qin, Asa Ben-Tzur, Boris Gutkovich |
An ADL for Functional Specification of IA32. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: Eighth International Workshop on Microprocessor Test and Verification (MTV 2007), Common Challenges and Solutions, 5-6 December 2007, Austin, Texas, USA, pp. 119-127, 2007, IEEE Computer Society, 978-0-7695-3241-7. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
12 | Gaurav Singh 0006, Sandeep K. Shukla |
Model Checking Bluespec Specified Hardware Designs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: Eighth International Workshop on Microprocessor Test and Verification (MTV 2007), Common Challenges and Solutions, 5-6 December 2007, Austin, Texas, USA, pp. 39-43, 2007, IEEE Computer Society, 978-0-7695-3241-7. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
12 | Sandip Ray, Warren A. Hunt Jr. |
Mechanized Certification of Secure Hardware Designs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: Eighth International Workshop on Microprocessor Test and Verification (MTV 2007), Common Challenges and Solutions, 5-6 December 2007, Austin, Texas, USA, pp. 25-32, 2007, IEEE Computer Society, 978-0-7695-3241-7. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
12 | W. Di Palma, Danilo Ravotto, Edgar E. Sánchez, Massimiliano Schillaci, Matteo Sonza Reorda, Giovanni Squillero |
Automotive Microcontroller End-of-Line Test via Software-Based Methodologies. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: Eighth International Workshop on Microprocessor Test and Verification (MTV 2007), Common Challenges and Solutions, 5-6 December 2007, Austin, Texas, USA, pp. 77-82, 2007, IEEE Computer Society, 978-0-7695-3241-7. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
12 | Danilo Ravotto, Edgar E. Sánchez, Massimiliano Schillaci, Matteo Sonza Reorda, Giovanni Squillero |
On Automatic Test Block Generation for Peripheral Testing in SoCs via Dynamic FSMs Extraction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: Eighth International Workshop on Microprocessor Test and Verification (MTV 2007), Common Challenges and Solutions, 5-6 December 2007, Austin, Texas, USA, pp. 71-76, 2007, IEEE Computer Society, 978-0-7695-3241-7. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
12 | Sumit Ahuja, Deepak Mathaikutty, Sandeep K. Shukla, Ajit Dingankar |
Assertion-Based Modal Power Estimation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: Eighth International Workshop on Microprocessor Test and Verification (MTV 2007), Common Challenges and Solutions, 5-6 December 2007, Austin, Texas, USA, pp. 3-7, 2007, IEEE Computer Society, 978-0-7695-3241-7. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
12 | Eric S. Fetzer, David M. Dahle, Casey Little, Kevin Safford |
The Parity protected, multithreaded register files on the 90-nm itanium microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 41(1), pp. 246-255, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
12 | Keng L. Wong, Tawfik Rahal-Arabi, Matthew Ma, Greg Taylor |
Enhancing microprocessor immunity to power supply noise with clock-data compensation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 41(4), pp. 749-758, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
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12 | Aurangzeb Khan, Philip Watson, George Kuo, Due Le, Trung-Kien Nguyen, Steven Yang, Peter Bennett 0002, Pokai Huang, Jaspal Gill, Chris Hawkins, John Goodenough 0001, Demin Wang, Irfan Ahmed, Peter Tran, Helder Mak, Oanh Kim, Frank Martin, Yimu Fan, David Ge, Joseph Kung, Vincent Shek |
A 90-nm Power Optimization Methodology With Application to the ARM 1136JF-S Microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 41(8), pp. 1707-1717, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
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12 | Jason M. Hart, Kyung T. Lee, Dennis Chen, Lik Cheng, Chipai Chou, Anand Dixit, Dale Greenley, Gregory Gruber, Kenneth Ho, Jesse Hsu, Naveen G. Malur, John Wu |
Implementation of a fourth-generation 1.8-GHz dual-core SPARC V9 microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 41(1), pp. 210-217, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
12 | Veselko Gustin, Patricio Bulic |
Learning computer architecture concepts with the FPGA-based "Move" microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Comput. Appl. Eng. Educ. ![In: Comput. Appl. Eng. Educ. 14(2), pp. 135-141, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
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12 | Adriana Dumitras, George S. Moschytz |
The First Microprocessor: An Interview with Marcian (Ted) Hoff, Jr. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Signal Process. Mag. ![In: IEEE Signal Process. Mag. 23(1), pp. 77-96, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
12 | Ravi Mahajan, Chia-Pin Chiu, Greg Chrysler |
Cooling a Microprocessor Chip. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Proc. IEEE ![In: Proc. IEEE 94(8), pp. 1476-1486, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
12 | Phillip T. Meade, Luis Rabelo, Albert T. Jones |
Applications of chaos and complexity theories to the technology adoption life cycle: case studies in the hard-drive, microprocessor, and server high-tech industries. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Int. J. Technol. Manag. ![In: Int. J. Technol. Manag. 36(4), pp. 318-335, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
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12 | V. Lalith Kumar, S. T. I. C. Garividi |
Microprocessor relay for protection of electrical systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Ubiquity ![In: Ubiquity 2006(May), pp. 5:2-5:8, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
12 | Aki Penttinen, Rafal P. Jastrzebski, Riku Pöllänen, Olli Pyrhönen |
Run-Time Debugging and Monitoring of FPGA Circuits Using Embedded Microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: Proceedings of the 9th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2006), Prague, Czech Republic, April 18-21, 2006, pp. 149-150, 2006, IEEE Computer Society, 1-4244-0185-2. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
12 | Chris Rowen |
The Reinvention of the Microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ERSA ![In: Proceedings of the 2006 International Conference on Engineering of Reconfigurable Systems & Algorithms, ERSA 2006, Las Vegas, Nevada, USA, June 26-29, 2006, pp. 3-6, 2006, CSREA Press, 1-60132-011-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP BibTeX RDF |
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12 | Magdy S. Abadir, Li-C. Wang, Jayanta Bhadra (eds.) |
Seventh International Workshop on Microprocessor Test and Verification (MTV 2006), Common Challenges and Solutions, 4-5 December 2006, Austin, Texas, USA ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![IEEE Computer Society, 978-0-7695-2839-7 The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP BibTeX RDF |
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12 | Michael Cowell, Adam Postula |
Rachael SPARC: An Open Source 32-bit Microprocessor Core for SoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DSD ![In: Ninth Euromicro Conference on Digital System Design: Architectures, Methods and Tools (DSD 2006), 30 August - 1 September 2006, Dubrovnik, Croatia, pp. 415-422, 2006, IEEE Computer Society, 0-7695-2609-8. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
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12 | Ahmed Youssef, Mohab Anis, Mohamed I. Elmasry |
Dynamic Standby Prediction for Leakage Tolerant Microprocessor Functional Units. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: 39th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-39 2006), 9-13 December 2006, Orlando, Florida, USA, pp. 371-384, 2006, IEEE Computer Society, 0-7695-2732-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
12 | René de Jesús Romero-Troncoso, Alejandro Ordaz-Moreno, Jose Alberto Vite-Frias, Arturo Garcia-Perez |
8-bit CISC Microprocessor Core for Teaching Applications in the Digital Systems Laboratory. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ReConFig ![In: 2006 IEEE International Conference on Reconfigurable Computing and FPGA's, ReConFig 2006, San Luis Potosi, Mexico, September 20-22, 2006, pp. 300-303, 2006, IEEE Computer Society, 1-4244-0690-0. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
12 | David Allen, David M. Halliday, Andy M. Tyrrell |
A Hybrid Bio-inspired System: Hardware Spiking Neural Network Incorporating Hebbian Learning with Microprocessor Based Evolutionary Control Algorithm. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Congress on Evolutionary Computation ![In: IEEE International Conference on Evolutionary Computation, CEC 2006, part of WCCI 2006, Vancouver, BC, Canada, 16-21 July 2006, pp. 2958-2965, 2006, IEEE, 0-7803-9487-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
12 | Ajit Dingankar, Deepak Mathaikutty, Sreekumar V. Kodakara, Sandeep K. Shukla, David J. Lilja |
MMV: Metamodeling Based Microprocessor Valiation Environment. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HLDVT ![In: Eleventh Annual IEEE International High-Level Design Validation and Test Workshop 2006, Monterey, CA, USA, Nov 9-10, 2006, pp. 143-148, 2006, IEEE Computer Society, 1-4244-0679-X. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
12 | Øyvind Strøm |
Verification and validation of Atmel's new 32 bit AVR microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MBMV ![In: Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), Dresden, Germany, February 20-22, 2006, pp. 305-308, 2006, Fraunhofer Institut für Integrierte Schaltungen. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP BibTeX RDF |
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12 | Fred A. Bower, Derek Hower, Mahmut Yilmaz, Daniel J. Sorin, Sule Ozev |
Applying architectural vulnerability Analysis to hard faults in the microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SIGMETRICS/Performance ![In: Proceedings of the Joint International Conference on Measurement and Modeling of Computer Systems, SIGMETRICS/Performance 2006, Saint Malo, France, June 26-30, 2006, pp. 375-376, 2006, ACM, 1-59593-319-0. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
hard-fault tolerance, reliability, computer architecture |
12 | Hiroaki Kokubo, Hiroaki Hataoka, Akinobu Lee, Tatsuya Kawahara, Kiyohiro Shikano |
Embedded Julius: Continuous Speech Recognition Software for Microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MMSP ![In: IEEE 8th Workshop on Multimedia Signal Processing, MMSP 2006, Victoria, BC, Canada, October 3-6, 2006, pp. 378-381, 2006, IEEE, 0-7803-9751-7. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
12 | Nagm Mohamed, Nazeih Botros, Wei Zhang 0002 |
The Impact of Cache Organization in Optimizing Microprocessor Power Consumption. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CDES ![In: Proceedings of the 2006 International Conference on Computer Design & Conference on Computing in Nanotechnology, CDES 2006, Las Vegas, Nevada, USA, June 26-29, 2006, pp. 84-90, 2006, CSREA Press, 1-60132-009-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP BibTeX RDF |
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12 | Xiafii Lu, Yingqiong Luo, Hailin Yang, Wu Wang |
Design of Bio-fermentation Control System Based on the Embedded Microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASE ![In: 2006 IEEE International Conference on Automation Science and Engineering, Shanghai, China, 7-10 October 2006, pp. 540-545, 2006, IEEE, 1-4244-0310-3. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
12 | T. S. Ganesh, Viswanathan Subramanian, Arun K. Somani |
SEU Mitigation Techniques for Microprocessor Control Logic. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EDCC ![In: Sixth European Dependable Computing Conference, EDCC 2006, Coimbra, Portugal, 18-20 October 2006, pp. 77-86, 2006, IEEE Computer Society, 0-7695-2648-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
12 | Chih-Lyang Hwang, Li-Jui Chang |
Internet-Based Fuzzy Decentralized Microprocessor Control for a Two-Dimensional Piezo-Driven System. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SMC ![In: Proceedings of the IEEE International Conference on Systems, Man and Cybernetics, Taipei, Taiwan, October 8-11, 2006, pp. 3080-3085, 2006, IEEE, 1-4244-0099-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
12 | Vishnu Yalala, Derek Brasili, David Carlson, Adam Hughes, Anil Jain, Tim Kiszely, Kolar Kodandapani, Anand Varadharajan, Thucydides Xanthopoulos |
A 16-Core RISC Microprocessor with Network Extensions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSCC ![In: 2006 IEEE International Solid State Circuits Conference, ISSCC 2006, Digest of Technical Papers, an Francisco, CA, USA, February 6-9, 2006, pp. 305-314, 2006, IEEE, 1-4244-0079-1. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
12 | Hendrik F. Hamann, Alan J. Weger, James A. Lacey, Erwin B. Cohen, Craig Atherton |
Power Distribution Measurements of the Dual Core PowerPCTM 970MP Microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSCC ![In: 2006 IEEE International Solid State Circuits Conference, ISSCC 2006, Digest of Technical Papers, an Francisco, CA, USA, February 6-9, 2006, pp. 2172-2179, 2006, IEEE, 1-4244-0079-1. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
12 | Michael G. R. Thomson, Phillip J. Restle, Norman K. James |
A 5GHz Duty-Cycle Correcting Clock Distribution Network for the POWER6 Microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSCC ![In: 2006 IEEE International Solid State Circuits Conference, ISSCC 2006, Digest of Technical Papers, an Francisco, CA, USA, February 6-9, 2006, pp. 1522-1529, 2006, IEEE, 1-4244-0079-1. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
12 | Michael Golden, Srikanth Arekapudi, Greg Dabney, Mike Haertel, Stephen Hale, Lowell Herlinger, Yongg Kim, Kevin McGrath, Vasant Palisetti, Monica Singh |
A 2.6GHz Dual-Core 64bx86 Microprocessor with DDR2 Memory Support. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSCC ![In: 2006 IEEE International Solid State Circuits Conference, ISSCC 2006, Digest of Technical Papers, an Francisco, CA, USA, February 6-9, 2006, pp. 325-332, 2006, IEEE, 1-4244-0079-1. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
12 | Héctor Sánchez, Bill Johnstone, Doug Roberts, Om Mandhana, Brad Melnick, Muhsin Celik, Mike Baker, Jim Hayden, Byoung Min, John Edgerton, Bruce White |
Increasing Microprocessor Speed by Massive Application of On-Die High-K MIM Decoupling Capacitors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSCC ![In: 2006 IEEE International Solid State Circuits Conference, ISSCC 2006, Digest of Technical Papers, an Francisco, CA, USA, February 6-9, 2006, pp. 2190-2199, 2006, IEEE, 1-4244-0079-1. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
12 | Nathan Sadler, Daniel J. Sorin |
Choosing an Error Protection Scheme for a Microprocessor's L1 Data Cache. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 24th International Conference on Computer Design (ICCD 2006), 1-4 October 2006, San Jose, CA, USA, pp. 499-505, 2006, IEEE, 978-0-7803-9707-1. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
12 | Kiran Puttaswamy, Gabriel H. Loh |
Thermal analysis of a 3D die-stacked high-performance microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 16th ACM Great Lakes Symposium on VLSI 2006, Philadelphia, PA, USA, April 30 - May 1, 2006, pp. 19-24, 2006, ACM, 1-59593-347-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
3D technology, thermals, power density |
12 | Alvaro Luiz Fazenda 0001, Eduardo Hidenori Enari, Luiz Flavio Rodrigues, Jairo Panetta |
Towards Production Code Effective Portability among Vector Machines and Microprocessor-Based Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SBAC-PAD ![In: 18th Symposium on Computer Architecture and High Performance Computing (SBAC-PAD 2006), 17-20 October 2006, Ouro Preto, Minas Gerais, Brazil, pp. 11-20, 2006, IEEE Computer Society, 0-7695-2704-3. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
12 | Abraham Jacobus Johannes Mouton, C. Smith, George E. Smith |
Wireless Control and Communication to Motor Protection Relays by using an Embedded Microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CCECE ![In: Proceedings of the Canadian Conference on Electrical and Computer Engineering, CCECE 2006, May 7-10, 2006, Ottawa Congress Centre, Ottawa, Canada, pp. 1104-1107, 2006, IEEE, 1-4244-0038-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
12 | Teresa L. McLaurin |
The Challenge of Testing the ARM CORTEX-A8TM Microprocessor Core. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: 2006 IEEE International Test Conference, ITC 2006, Santa Clara, CA, USA, October 22-27, 2006, pp. 1-10, 2006, IEEE Computer Society, 1-4244-0292-1. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
12 | Mahmut Yilmaz, Derek Hower, Sule Ozev, Daniel J. Sorin |
Self-Checking and Self-Diagnosing 32-bit Microprocessor Multiplier. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: 2006 IEEE International Test Conference, ITC 2006, Santa Clara, CA, USA, October 22-27, 2006, pp. 1-10, 2006, IEEE Computer Society, 1-4244-0292-1. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
12 | Ismet Bayraktaroglu, Jim Hunt, Daniel Watkins |
Cache Resident Functional Microprocessor Testing: Avoiding High Speed IO Issues. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: 2006 IEEE International Test Conference, ITC 2006, Santa Clara, CA, USA, October 22-27, 2006, pp. 1-7, 2006, IEEE Computer Society, 1-4244-0292-1. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
12 | P. J. Tan, Tung Le, Keng-Hian Ng, Prasad Mantri, James Westfall |
Testing of UltraSPARC T1 Microprocessor and its Challenges. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: 2006 IEEE International Test Conference, ITC 2006, Santa Clara, CA, USA, October 22-27, 2006, pp. 1-10, 2006, IEEE Computer Society, 1-4244-0292-1. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
12 | Nehir Sönmez, Arda Yurdakul |
SIxD: A Configurable Application-Specific SISD/SIMD Microprocessor Soft-Core. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SoC ![In: International Symposium on System-on-Chip, SoC 2006, Tampere, Finland, November 13-16, 2006, pp. 1-4, 2006, IEEE, 1-4244-0621-8. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
12 | Claudio Brunelli, Jari Nurmi |
Design And Verification of a VHDL Model of a Floating-Point Unit for a RISC Microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SoC ![In: International Symposium on System-on-Chip, SoC 2006, Tampere, Finland, November 13-16, 2006, pp. 1-4, 2006, IEEE, 1-4244-0621-8. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
12 | Eric Karl, David T. Blaauw, Dennis Sylvester, Trevor N. Mudge |
Reliability modeling and management in dynamic microprocessor-based systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 43rd Design Automation Conference, DAC 2006, San Francisco, CA, USA, July 24-28, 2006, pp. 1057-1060, 2006, ACM, 1-59593-381-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
dynamic reliability management, oxide breakdown, thermal cycling, modeling, electromigration |
12 | Hyun Sung Kim, D. M. H. Walker |
Statistical Static Timing Analysis Considering the Impact of Power Supply Noise in {VLSI} Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: Seventh International Workshop on Microprocessor Test and Verification (MTV 2006), Common Challenges and Solutions, 4-5 December 2006, Austin, Texas, USA, pp. 76-82, 2006, IEEE Computer Society, 978-0-7695-2839-7. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
12 | |
Acknowledgement. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: Seventh International Workshop on Microprocessor Test and Verification (MTV 2006), Common Challenges and Solutions, 4-5 December 2006, Austin, Texas, USA, 2006, IEEE Computer Society, 978-0-7695-2839-7. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
12 | Hiren D. Patel, Sandeep K. Shukla |
Deep vs. Shallow, Kernel vs. Language--What is Better for Heterogeneous Modeling in {SystemC}?. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: Seventh International Workshop on Microprocessor Test and Verification (MTV 2006), Common Challenges and Solutions, 4-5 December 2006, Austin, Texas, USA, pp. 68-75, 2006, IEEE Computer Society, 978-0-7695-2839-7. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
12 | Noah Bamford, Rekha Bangalore, Eric Chapman, Hector Chavez, Rajeev Dasari, Yinfang Lin, Edgar Jimenez |
Challenges in System on Chip Verification. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: Seventh International Workshop on Microprocessor Test and Verification (MTV 2006), Common Challenges and Solutions, 4-5 December 2006, Austin, Texas, USA, pp. 52-60, 2006, IEEE Computer Society, 978-0-7695-2839-7. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
12 | |
Preface. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: Seventh International Workshop on Microprocessor Test and Verification (MTV 2006), Common Challenges and Solutions, 4-5 December 2006, Austin, Texas, USA, 2006, IEEE Computer Society, 978-0-7695-2839-7. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
12 | |
Workshop Organizing Committee. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: Seventh International Workshop on Microprocessor Test and Verification (MTV 2006), Common Challenges and Solutions, 4-5 December 2006, Austin, Texas, USA, 2006, IEEE Computer Society, 978-0-7695-2839-7. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
12 | József Sziray |
Test Calculation for Logic and Delay Faults in Digital Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: Seventh International Workshop on Microprocessor Test and Verification (MTV 2006), Common Challenges and Solutions, 4-5 December 2006, Austin, Texas, USA, pp. 20-32, 2006, IEEE Computer Society, 978-0-7695-2839-7. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
Test-pattern calculation, logic faults, CMOS transistor structures, functional testing, delay faults, multi-valued logic |
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