|
|
Venues (Conferences, Journals, ...)
|
|
GrowBag graphs for keyword ? (Num. hits/coverage)
Group by:
The graphs summarize 857 occurrences of 424 keywords
|
|
|
Results
Found 792 publication records. Showing 792 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
9 | Martin Karlsson, Erik Hagersten |
Conserving Memory Bandwidth in Chip Multiprocessors with Runahead Execution. |
IPDPS |
2007 |
DBLP DOI BibTeX RDF |
|
9 | Ryan E. Grant, Ahmad Afsahi |
A Comprehensive Analysis of OpenMP Applications on Dual-Core Intel Xeon SMPs. |
IPDPS |
2007 |
DBLP DOI BibTeX RDF |
|
9 | Mahmut T. Kandemir |
Data locality enhancement for CMPs. |
ICCAD |
2007 |
DBLP DOI BibTeX RDF |
|
9 | Feiqi Su, Xudong Shi 0003, Gang Liu, Ye Xia 0001, Jih-Kwon Peir |
Comparative evaluation of multi-core cache occupancy strategies. |
ICPADS |
2007 |
DBLP DOI BibTeX RDF |
|
9 | Ruibin Xu, Rami G. Melhem, Daniel Mossé |
Energy-Aware Scheduling for Streaming Applications on Chip Multiprocessors. |
RTSS |
2007 |
DBLP DOI BibTeX RDF |
|
9 | Sungjune Youn, Hyunhee Kim, Jihong Kim 0001 |
A reusability-aware cache memory sharing technique for high-performance low-power CMPs with private L2 caches. |
ISLPED |
2007 |
DBLP DOI BibTeX RDF |
chip multiprocessors (CMPS), performance, embedded systems, architecture, low-power, L2 cache |
9 | Amit Kumar 0002, Partha Kundu, Arvind P. Singh, Li-Shiuan Peh, Niraj K. Jha |
A 4.6Tbits/s 3.6GHz single-cycle NoC router with a novel switch allocator in 65nm CMOS. |
ICCD |
2007 |
DBLP DOI BibTeX RDF |
|
9 | Sung-Joon Jang, Moo-Kyoung Chung, Jaemoon Kim, Chong-Min Kyung |
Cache Miss-Aware Dynamic Stack Allocation. |
ISCAS |
2007 |
DBLP DOI BibTeX RDF |
|
9 | Qingying Deng, Minxuan Zhang, Jiang Jiang |
A Parallel Infrastructure on Dynamic EPIC SMT. |
ICA3PP |
2007 |
DBLP DOI BibTeX RDF |
|
9 | Yanming Jia, Yici Cai, Xianlong Hong |
Dummy fill aware buffer insertion during routing. |
ACM Great Lakes Symposium on VLSI |
2007 |
DBLP DOI BibTeX RDF |
routing, VLSI, DFM, buffer insertion, dummy fill |
9 | Philippe Magarshack |
Design challenges in 45nm and below: DFM, low-power and design for reliability. |
ACM Great Lakes Symposium on VLSI |
2007 |
DBLP DOI BibTeX RDF |
design for reliability, low-power design, design for manufacturability |
9 | Andrew B. Kahng, Rasit Onur Topaloglu |
A DOE Set for Normalization-Based Extraction of Fill Impact on Capacitances. |
ISQED |
2007 |
DBLP DOI BibTeX RDF |
|
9 | Mikhail Smelyanskiy, Victor W. Lee, Daehyun Kim 0001, Anthony D. Nguyen, Pradeep Dubey |
Scaling performance of interior-point method on large-scale chip multiprocessor system. |
SC |
2007 |
DBLP DOI BibTeX RDF |
|
9 | Li Hui, Junming Wu, Guoliang Chen 0001, Xiufeng Sui |
MPUS: a scalable parallel simulator for RedNeurons parallel computer. |
Infoscale |
2007 |
DBLP DOI BibTeX RDF |
RedNeurons parallel computer, parallel simulator, MPICH2 |
9 | Subramanian Rajagopalan, Shabbir H. Batterywala |
A 3-dimensional FEM Based Resistance Extraction. |
VLSI Design |
2007 |
DBLP DOI BibTeX RDF |
|
9 | Kyle J. Nesbit, James Laudon, James E. Smith 0001 |
Virtual private caches. |
ISCA |
2007 |
DBLP DOI BibTeX RDF |
quality of service, chip multiprocessor, soft real-time, shared caches, performance isolation |
9 | Martha Mercaldi Kim, Mojtaba Mehrara, Mark Oskin, Todd M. Austin |
Architectural implications of brick and mortar silicon manufacturing. |
ISCA |
2007 |
DBLP DOI BibTeX RDF |
chip assembly, design re-use, interconnect design |
9 | Jacob Leverich, Hideho Arakida, Alex Solomatnikov, Amin Firoozshahian, Mark Horowitz, Christos Kozyrakis |
Comparing memory systems for chip multiprocessors. |
ISCA |
2007 |
DBLP DOI BibTeX RDF |
streaming memory, parallel programming, chip multiprocessors, locality optimizations, coherent caches |
9 | Engin Ipek, Meyrem Kirman, Nevin Kirman, José F. Martínez |
Core fusion: accommodating software diversity in chip multiprocessors. |
ISCA |
2007 |
DBLP DOI BibTeX RDF |
chip multiprocessors, reconfigurable architectures, software diversity |
9 | Shimin Chen, Phillip B. Gibbons, Michael Kozuch, Vasileios Liaskovitis, Anastassia Ailamaki, Guy E. Blelloch, Babak Falsafi, Limor Fix, Nikos Hardavellas, Todd C. Mowry, Chris Wilkerson |
Scheduling threads for constructive cache sharing on CMPs. |
SPAA |
2007 |
DBLP DOI BibTeX RDF |
constructive cache sharing, parallel depth first, thread granularity, working set profiling, chip multiprocessors, scheduling algorithms, work stealing |
9 | Assaf Shacham, Keren Bergman, Luca P. Carloni |
The Case for Low-Power Photonic Networks on Chip. |
DAC |
2007 |
DBLP DOI BibTeX RDF |
|
9 | Weiwu Hu, Rui Hou, Jun-Hua Xiao, Long-Bin Zhang |
High Performance General-Purpose Microprocessors: Past and Future. |
J. Comput. Sci. Technol. |
2006 |
DBLP DOI BibTeX RDF |
high performance general-purpose microprocessor, Godson processor, chip multiprocessors, instruction level parallelism, thread level parallelism, data level parallelism |
9 | Tilman Wolf, Mark A. Franklin |
Performance Models for Network Processor Design. |
IEEE Trans. Parallel Distributed Syst. |
2006 |
DBLP DOI BibTeX RDF |
Network processor design, network processor benchmark, performance model, power optimization, design optimization |
9 | Wenjian Yu, Mengsheng Zhang, Zeyi Wang |
Efficient 3-D extraction of interconnect capacitance considering floating metal fills with boundary element method. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
2006 |
DBLP DOI BibTeX RDF |
|
9 | Ilya Ganusov, Martin Burtscher |
Future execution: A prefetching mechanism that uses multiple cores to speed up single threads. |
ACM Trans. Archit. Code Optim. |
2006 |
DBLP DOI BibTeX RDF |
Future execution, chip multiprocessors, prefetching, memory wall |
9 | Philip M. Wells, Koushik Chakraborty, Gurindar S. Sohi |
Hardware support for spin management in overcommitted virtual machines. |
PACT |
2006 |
DBLP DOI BibTeX RDF |
virtual machines, chip multiprocessors, synchronization overhead |
9 | Ilya Ganusov, Martin Burtscher |
Efficient emulation of hardware prefetchers via event-driven helper threading. |
PACT |
2006 |
DBLP DOI BibTeX RDF |
prefetching, multi-core architectures, helper threading |
9 | Kyriakos Stavrou, Pedro Trancoso |
Thermal-Aware Scheduling: A Solution for Future Chip Multiprocessors Thermal Problems. |
DSD |
2006 |
DBLP DOI BibTeX RDF |
|
9 | Kyle J. Nesbit, Nidhi Aggarwal, James Laudon, James E. Smith 0001 |
Fair Queuing Memory Systems. |
MICRO |
2006 |
DBLP DOI BibTeX RDF |
|
9 | Jack Sampson, Rubén González, Jean-Francois Collard, Norman P. Jouppi, Michael S. Schlansker, Brad Calder |
Exploiting Fine-Grained Data Parallelism with Chip Multiprocessors and Fast Barriers. |
MICRO |
2006 |
DBLP DOI BibTeX RDF |
|
9 | Haakon Dybdahl, Per Stenström, Lasse Natvig |
A Cache-Partitioning Aware Replacement Policy for Chip Multiprocessors. |
HiPC |
2006 |
DBLP DOI BibTeX RDF |
|
9 | Nabil Hasasneh, Ian M. Bell, Chris R. Jesshope |
Scalable and Partitionable Asynchronous Arbiter for Micro-threaded Chip Multiprocessors. |
ARCS |
2006 |
DBLP DOI BibTeX RDF |
|
9 | Stanley L. C. Fung, J. Gregory Steffan |
Improving cache locality for thread-level speculation. |
IPDPS |
2006 |
DBLP DOI BibTeX RDF |
|
9 | Matthew Curtis-Maury, James Dzierwa, Christos D. Antonopoulos, Dimitrios S. Nikolopoulos |
Online strategies for high-performance power-aware thread execution on emerging multiprocessors. |
IPDPS |
2006 |
DBLP DOI BibTeX RDF |
|
9 | Jeffrey Namkung, Dohyung Kim, Rajesh K. Gupta 0001, Igor Kozintsev, Jean-Yves Bouguet, Carole Dulong |
Phase guided sampling for efficient parallel application simulation. |
CODES+ISSS |
2006 |
DBLP DOI BibTeX RDF |
phase analysis, simulation, sampling, chip multiprocessors, multithreading |
9 | Blair Fort, Davor Capalija, Zvonko G. Vranesic, Stephen Dean Brown |
A Multithreaded Soft Processor for SoPC Area Reduction. |
FCCM |
2006 |
DBLP DOI BibTeX RDF |
|
9 | David J. Frank, Ruchir Puri, Dorel Toma |
Design and CAD challenges in 45nm CMOS and beyond. |
ICCAD |
2006 |
DBLP DOI BibTeX RDF |
|
9 | Guy Amit, Yaron Caspi, Ran Vitale, Adi Pinhas |
Scalability of Multimedia Applications on Next-Generation Processors. |
ICME |
2006 |
DBLP DOI BibTeX RDF |
|
9 | Jie Tao 0001, Siegfried Schloissnig, Wolfgang Karl |
Analysis of the Spatial and Temporal Locality in Data Accesses. |
International Conference on Computational Science (2) |
2006 |
DBLP DOI BibTeX RDF |
|
9 | Ozcan Ozturk 0001, Guangyu Chen, Mahmut T. Kandemir |
Multi-compilation: capturing interactions among concurrently-executing applications. |
Conf. Computing Frontiers |
2006 |
DBLP DOI BibTeX RDF |
multi-compilation, compiler, chip multiprocessor |
9 | In-Pyo Hong, Yong-Joo Lee, Yong-Surk Lee |
Next Generation Embedded Processor Architecture for Personal Information Devices. |
EUC |
2006 |
DBLP DOI BibTeX RDF |
|
9 | Xiaoning Qi, Alex Gyure, Yansheng Luo, Sam C. Lo, Mahmoud Shahram, Kishore Singhal |
Measurement and characterization of pattern dependent process variations of interconnect resistance, capacitance and inductance in nanometer technologies. |
ACM Great Lakes Symposium on VLSI |
2006 |
DBLP DOI BibTeX RDF |
measurement, process variations, extraction, VLSI interconnects |
9 | Peter E. Strazdins, Richard Alexander, David Barr |
Performance Enhancement of SMP Clusters with Multiple Network Interfaces Using Virtualization. |
ISPA Workshops |
2006 |
DBLP DOI BibTeX RDF |
|
9 | Mario Donato Marino |
L2-Cache Hierarchical Organizations for Multi-core Architectures. |
ISPA Workshops |
2006 |
DBLP DOI BibTeX RDF |
|
9 | Ajay Khoche, Peter Muhmenthaler |
Session Abstract. |
VTS |
2006 |
DBLP DOI BibTeX RDF |
|
9 | Arun Rodrigues, Richard C. Murphy, Peter M. Kogge, Keith D. Underwood |
Poster reception - The structural simulation toolkit: exploring novel architectures. |
SC |
2006 |
DBLP DOI BibTeX RDF |
|
9 | Shabbir H. Batterywala, Rohit Ananthakrishna, Yansheng Luo, Alex Gyure |
A Statistical Method for Fast and Accurate Capacitance Extraction in the Presence of Floating Dummy Fills. |
VLSI Design |
2006 |
DBLP DOI BibTeX RDF |
|
9 | Steven Swanson, Andrew Putnam, Martha Mercaldi, Ken Michelson, Andrew Petersen 0001, Andrew Schwerin, Mark Oskin, Susan J. Eggers |
Area-Performance Trade-offs in Tiled Dataflow Architectures. |
ISCA |
2006 |
DBLP DOI BibTeX RDF |
WaveScalar, ASIC, RTL, Dataflow computing |
9 | Weidong Shi, Hsien-Hsin S. Lee, Laura Falk, Mrinmoy Ghosh |
An Integrated Framework for Dependable and Revivable Architectures Using Multicore Processors. |
ISCA |
2006 |
DBLP DOI BibTeX RDF |
|
9 | Lei Chai, Albert Hartono, Dhabaleswar K. Panda 0001 |
Designing High Performance and Scalable MPI Intra-node Communication Support for Clusters. |
CLUSTER |
2006 |
DBLP DOI BibTeX RDF |
|
9 | Xianlong Hong, Yici Cai, Hailong Yao, Duo Li |
DFM-aware Routing for Yield Enhancement. |
APCCAS |
2006 |
DBLP DOI BibTeX RDF |
|
9 | James Laudon |
Performance/Watt: the new server focus. |
SIGARCH Comput. Archit. News |
2005 |
DBLP DOI BibTeX RDF |
|
9 | Lisa R. Hsu, Ravishankar R. Iyer 0001, Srihari Makineni, Steven K. Reinhardt, Donald Newell |
Exploring the cache design space for large scale CMPs. |
SIGARCH Comput. Archit. News |
2005 |
DBLP DOI BibTeX RDF |
|
9 | Peter G. Sassone, D. Scott Wills |
Scaling Up the Atlas Chip-Multiprocessor. |
IEEE Trans. Computers |
2005 |
DBLP DOI BibTeX RDF |
Dynamic multithreading, chip-multiprocessor, scaling |
9 | Yu Chen 0005, Andrew B. Kahng, Gabriel Robins, Alexander Zelikovsky, Yuhong Zheng |
Compressible area fill synthesis. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
2005 |
DBLP DOI BibTeX RDF |
|
9 | Austen McDonald, JaeWoong Chung, Hassan Chafi, Chi Cao Minh, Brian D. Carlstrom, Lance Hammond, Christos Kozyrakis, Kunle Olukotun |
Characterization of TCC on Chip-Multiprocessors. |
IEEE PACT |
2005 |
DBLP DOI BibTeX RDF |
|
9 | Ilya Ganusov, Martin Burtscher |
Future Execution: A Hardware Prefetching Technique for Chip Multiprocessors. |
IEEE PACT |
2005 |
DBLP DOI BibTeX RDF |
|
9 | Bruce E. Martin |
Uncovering Database Access Optimizations in the Middle Tier with TORPEDO. |
ICDE |
2005 |
DBLP DOI BibTeX RDF |
|
9 | Scott Schneider 0001, Christos D. Antonopoulos, Dimitrios S. Nikolopoulos |
Factory: An Object-Oriented Parallel Programming Substrate for Deep Multiprocessors. |
HPCC |
2005 |
DBLP DOI BibTeX RDF |
Multithreading substrate, Object-oriented parallel programming, Deep parallel architectures, Multiparadigm parallelism, Portability, Programmability |
9 | Yan Solihin, Fei Guo, Seongbeom Kim |
Predicting Cache Space Contention in Utility Computing Servers. |
IPDPS |
2005 |
DBLP DOI BibTeX RDF |
|
9 | Chun Liu 0001, Anand Sivasubramaniam, Mahmut T. Kandemir, Mary Jane Irwin |
Exploiting Barriers to Optimize Power Consumption of CMPs. |
IPDPS |
2005 |
DBLP DOI BibTeX RDF |
|
9 | Jaydeep Marathe, Frank Mueller 0001, Bronis R. de Supinski |
A hybrid hardware/software approach to efficiently determine cache coherence Bottlenecks. |
ICS |
2005 |
DBLP DOI BibTeX RDF |
SMPs, program instrumentation, coherence protocols, hardware performance monitoring, cache analysis, dynamic binary rewriting |
9 | N. S. Nagaraj |
Dealing with interconnect process variations. |
SLIP |
2005 |
DBLP DOI BibTeX RDF |
|
9 | Katherine Shu-Min Li, Chung-Len Lee 0001, Yao-Wen Chang, Chauchin Su, Jwu E. Chen |
Multilevel full-chip routing with testability and yield enhancement. |
SLIP |
2005 |
DBLP DOI BibTeX RDF |
multilevel routing, yield, testability |
9 | Anahita Shayesteh, Eren Kursun, Timothy Sherwood, Suleyman Sair, Glenn Reinman |
Reducing the Latency and Area Cost of Core Swapping through Shared Helper Engines. |
ICCD |
2005 |
DBLP DOI BibTeX RDF |
|
9 | Srinivas Raghvendra, Philippe Hurat |
DFM: Linking Design and Manufacturing. |
VLSI Design |
2005 |
DBLP DOI BibTeX RDF |
|
9 | Murali Annavaram, Ed Grochowski, John Paul Shen |
Mitigating Amdahl's Law through EPI Throttling. |
ISCA |
2005 |
DBLP DOI BibTeX RDF |
|
9 | Evan Speight, Hazim Shafi, Lixin Zhang 0002, Ramakrishnan Rajamony |
Adaptive Mechanisms and Policies for Managing Cache Hierarchies in Chip Multiprocessors. |
ISCA |
2005 |
DBLP DOI BibTeX RDF |
|
9 | Ram Rangan, Neil Vachharajani, Manish Vachharajani, David I. August |
Decoupled Software Pipelining with the Synchronization Array. |
IEEE PACT |
2004 |
DBLP DOI BibTeX RDF |
|
9 | Yu-Sung Wu, Saurabh Bagchi, Sachin Garg, Navjot Singh 0001, Timothy K. Tsai |
SCIDIVE: A Stateful and Cross Protocol Intrusion Detection Architecture for Voice-over-IP Environments. |
DSN |
2004 |
DBLP DOI BibTeX RDF |
Voice over IP system, Cross-protocol detection, Stateful detection, Intrusion detection, SIP, RTP |
9 | Ibrahim Hur, Calvin Lin |
Adaptive History-Based Memory Schedulers. |
MICRO |
2004 |
DBLP DOI BibTeX RDF |
|
9 | Rakesh Kumar 0002, Norman P. Jouppi, Dean M. Tullsen |
Conjoined-Core Chip Multiprocessing. |
MICRO |
2004 |
DBLP DOI BibTeX RDF |
|
9 | Mladen Nikitovic, Mats Brorsson |
A Multiprogrammed Workload Model for Energy and Performance Estimation of Adaptive Chip-Multiprocessors. |
IPDPS |
2004 |
DBLP DOI BibTeX RDF |
|
9 | Yu Chen 0005, Andrew B. Kahng, Gabriel Robins, Alexander Zelikovsky, Yuhong Zheng |
Area Fill Generation With Inherent Data Volume Reduction. |
DATE |
2003 |
DBLP DOI BibTeX RDF |
|
9 | Khaled Z. Ibrahim, Gregory T. Byrd |
Extending OpenMP to Support Slipstream Execution Mode. |
IPDPS |
2003 |
DBLP DOI BibTeX RDF |
slipstream, redundant execution, multiprocessor, shared memory, OpenMP, dynamic scheduling |
9 | Magnus Ekman, Per Stenström |
Performance and Power Impact of Issue-width in Chip-Multiprocessor Cores. |
ICPP |
2003 |
DBLP DOI BibTeX RDF |
|
9 | Michael K. Chen, Kunle Olukotun |
The Jrpm System for Dynamically Parallelizing Java Programs. |
ISCA |
2003 |
DBLP DOI BibTeX RDF |
|
9 | Mohamed A. Gomaa, Chad Scarbrough, Irith Pomeranz, T. N. Vijaykumar |
Transient-Fault Recovery for Chip Multiprocessors. |
ISCA |
2003 |
DBLP DOI BibTeX RDF |
|
9 | Chi-Foon Chan, Deirdre Hanford, Jian Yue Pan, Narendra V. Shenoy, Mahesh Mehendale, A. Vasudevan, Shaojun Wei |
Emerging markets: design goes global. |
DAC |
2003 |
DBLP DOI BibTeX RDF |
|
9 | Yu Chen 0005, Puneet Gupta 0001, Andrew B. Kahng |
Performance-impact limited area fill synthesis. |
DAC |
2003 |
DBLP DOI BibTeX RDF |
VLSI manufacturability, coupling capacitance extraction, dummy fill problem, signal delay, linear programming, greedy method |
9 | Rebecka Jörnsten, Bin Yu 0001 |
Compression of cDNA microarray images. |
ISBI |
2002 |
DBLP DOI BibTeX RDF |
|
9 | Yu Chen 0005, Andrew B. Kahng, Gabriel Robins, Alexander Zelikovsky |
Closing the smoothness and uniformity gap in area fill synthesis. |
ISPD |
2002 |
DBLP DOI BibTeX RDF |
VLSI manufacturability, density analysis, dummy fill problem, monte-carlo, chemical-mechanical polishing |
9 | Chitaka Iwama, Niko Demus Barli, Shuichi Sakai, Hidehiko Tanaka |
Improving Conditional Branch Prediction on Speculative Multithreading Architectures. |
Euro-Par |
2001 |
DBLP DOI BibTeX RDF |
|
9 | Ana Hunter, C. K. Lau, John Martin |
Combining Advanced Process Technology and Design for Systems Level Integration. |
ISQED |
2000 |
DBLP DOI BibTeX RDF |
|
9 | Ignacio Silva-Lepe, Christopher F. Codella, P. Niblett, Donald F. Ferguson |
Container-Managed Messaging: An Architecture for Integrating Java Components and Message-Oriented Applications. |
TOOLS (37) |
2000 |
DBLP DOI BibTeX RDF |
container-managed messaging, Java components, message-oriented applications, messaging infrastructure, container-managed persistence, persistent data, messaging parameters, message destinations, time-outs, declarative definition, deployment descriptor, anonymous declarative programming model, Java, software architecture, software architecture, object-oriented programming, subroutines, distributed object management, Enterprise JavaBeans, persistent objects, electronic messaging, interaction mode |
9 | Marcelo H. Cintra, José F. Martínez, Josep Torrellas |
Architectural support for scalable speculative parallelization in shared-memory multiprocessors. |
ISCA |
2000 |
DBLP DOI BibTeX RDF |
|
9 | Luiz André Barroso, Kourosh Gharachorloo, Robert McNamara, Andreas Nowatzyk, Shaz Qadeer, Barton Sano, Scott Smith, Robert Stets, Ben Verghese |
Piranha: a scalable architecture based on single-chip multiprocessing. |
ISCA |
2000 |
DBLP DOI BibTeX RDF |
|
9 | Venkata Krishnan, Josep Torrellas |
The Need for Fast Communication in Hardware-Based Speculative Chip Multiprocessors. |
IEEE PACT |
1999 |
DBLP DOI BibTeX RDF |
register communication, Chip-multiprocessor, speculative multithreading, data-dependence speculation |
9 | Andrew B. Kahng, Gabriel Robins, Anish Singh, Huijuan Wang, Alexander Zelikovsky |
Filling and slotting: analysis and algorithms. |
ISPD |
1998 |
DBLP DOI BibTeX RDF |
|
9 | A. Castillejo, D. Veychard, Salvador Mir, Jean-Michel Karam, Bernard Courtois |
Failure mechanisms and fault classes for CMOS-compatible microelectromechanical systems. |
ITC |
1998 |
DBLP DOI BibTeX RDF |
|
9 | Jean-Michel Karam, Bernard Courtois, Hicham Boutamine |
CAD Tools for Bridging Microsystems and Foundries. |
IEEE Des. Test Comput. |
1997 |
DBLP DOI BibTeX RDF |
|
9 | Jean-Michel Karam, Bernard Courtois, Hicham Boutamine, P. Drake, András Poppe, Vladimír Székely, Márta Rencz, Klaus Hofmann, Manfred Glesner |
CAD and Foundries for Microsystems. |
DAC |
1997 |
DBLP DOI BibTeX RDF |
|
Displaying result #701 - #792 of 792 (100 per page; Change: ) Pages: [ <<][ 1][ 2][ 3][ 4][ 5][ 6][ 7][ 8] |
|