Search results for "placement"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
21	Ichiang Lin, David Hung-Chang Du	Performance-Driven Constructive Placement.	DAC	1990	DBLP DOI BibTeX RDF
21	Ralph-Michael Kling, Prithviraj Banerjee	ESp: Placement by simulated evolution.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1989	DBLP DOI BibTeX RDF
21	Michael A. B. Jackson, Ernest S. Kuh	Performance-driven Placement of Cell Based IC's.	DAC	1989	DBLP DOI BibTeX RDF
21	Lawrence T. Pillage, Ronald A. Rohrer	A Quadratic Metric with a Simple Solution Scheme for Initial Placement.	DAC	1988	DBLP BibTeX RDF
21	Ralph-Michael Kling, Prithviraj Banerjee	ESP: A New Standard Cell Placement Package Using Simulated Evolution.	DAC	1987	DBLP DOI BibTeX RDF
21	Antoni A. Szepieniec	Integrated placement/routing in sliced layouts.	DAC	1986	DBLP DOI BibTeX RDF
21	Gotaro Odawara, Kazuhiko Iijima, Kazutoshi Wakabayashi	Knowledge-based placement technique for printed wiring boards.	DAC	1985	DBLP DOI BibTeX RDF
20	Nageswara S. V. Rao	Computational Complexity Issues in Operative Diagnosis of Graph-Based Systems.	IEEE Trans. Computers	1993	DBLP DOI BibTeX RDF	graph-based systems, alarm placement, fault propagation time, alarm placement problem, computational complexity, computational complexity, fault diagnosis, fault tolerant computing, NP-complete, fault propagation
19	Zhuo Li 0001, David A. Papa, Charles J. Alpert, Shiyan Hu, Weiping Shi, Cliff C. N. Sze, Nancy Ying Zhou	Ultra-fast interconnect driven cell cloning for minimizing critical path delay.	ISPD	2010	DBLP DOI BibTeX RDF	gate duplication, physical synthesis, timing-driven placement
19	Ameya R. Agnihotri, Satoshi Ono, Patrick H. Madden	An effective approach for large scale floorplanning.	ACM Great Lakes Symposium on VLSI	2010	DBLP DOI BibTeX RDF	placement, floorplanning, legalization
19	Stephen Friedman, Allan Carroll, Brian Van Essen, Benjamin Ylvisaker, Carl Ebeling, Scott Hauck	SPR: an architecture-adaptive CGRA mapping tool.	FPGA	2009	DBLP DOI BibTeX RDF	modulo graph, spr, static sharing, clustering, scheduling, routing, placement, pathfinder
19	Stephen P. Kornachuk, Michael C. Smayling	New strategies for gridded physical design for 32nm technologies and beyond.	ISPD	2009	DBLP DOI BibTeX RDF	28nm, 32nm, 45nm, litho, rdr, placement, layout, physical design, manufacturability, lithography, standard cell, vlsi, drc, dfm
19	Hojjat Jafarpour, Bijit Hore, Sharad Mehrotra, Nalini Venkatasubramanian	CCD: Efficient Customized Content Dissemination in Distributed Publish/Subscribe.	Middleware	2009	DBLP DOI BibTeX RDF	Operator placement, Content dissemination, Publish/Subscribe
19	Loren Fiore, Duc Fehr, Robert Bodor, Andrew Drenner, Guruprasad Somasundaram, Nikolaos Papanikolopoulos	Multi-Camera Human Activity Monitoring.	J. Intell. Robotic Syst.	2008	DBLP DOI BibTeX RDF	Pedestrian tracking, Surveillance, Human activity recognition, Camera placement
19	Ashraf Hossain, T. Radhika, S. Chakrabarti, P. K. Biswas	An Approach to Increase the Lifetime of a Linear Array of Wireless Sensor Nodes.	Int. J. Wirel. Inf. Networks	2008	DBLP DOI BibTeX RDF	Data gathering sensor network, Inter-node distance, Random node placement, Network lifetime, Multi-hop
19	Jieyi Long, Seda Ogrenci Memik, Gokhan Memik, Rajarshi Mukherjee	Thermal monitoring mechanisms for chip multiprocessors.	ACM Trans. Archit. Code Optim.	2008	DBLP DOI BibTeX RDF	Thermal sensor allocation, nonuniform and uniform sensor placement
19	Rajarshi Mukherjee, Song Liu, Seda Ogrenci Memik, Somsubhra Mondal	A high-level clustering algorithm targeting dual Vdd FPGAs.	ACM Trans. Design Autom. Electr. Syst.	2008	DBLP DOI BibTeX RDF	clustering, field programmable gate arrays, partitioning, placement, voltage scaling, Dynamic power
19	Feihui Li, Mahmut T. Kandemir, Mary Jane Irwin	Implementation and evaluation of a migration-based NUCA design for chip multiprocessors.	SIGMETRICS	2008	DBLP DOI BibTeX RDF	NUCA, post office placement problem, CMP, data migration
19	Ken Been, Eli Daiches, Chee-Keng Yap	Dynamic Map Labeling.	IEEE Trans. Vis. Comput. Graph.	2006	DBLP DOI BibTeX RDF	label selection, label filtering, label consistency, computational cartography, HCI, GIS, human-computer interface, preprocessing, realtime, dynamic maps, Map labeling, label placement
19	Ali Jahanian 0001, Morteza Saheb Zamani	Multi-Level Buffer Block Planning and Buffer Insertion for Large Design Circuits.	ISVLSI	2006	DBLP DOI BibTeX RDF	Buffer planning, incremental placement, buffer insertion
19	Chengliang Zhang, Chen Ding 0001, Mitsunori Ogihara, Yutao Zhong 0001, Youfeng Wu	A hierarchical model of data locality.	POPL	2006	DBLP DOI BibTeX RDF	hierarchical data placement, reference affinity, volume distance, NP-complete, program locality, N-body simulation
19	Taraneh Taghavi, Xiaojian Yang, Bo-Kyung Choi, Maogang Wang, Majid Sarrafzadeh	Dragon2006: blockage-aware congestion-controlling mixed-size placer.	ISPD	2006	DBLP DOI BibTeX RDF	placement, physical design
19	Joseph Camp, Joshua Robinson 0002, Christopher Steger, Edward W. Knightly	Measurement driven deployment of a two-tier urban mesh access network.	MobiSys	2006	DBLP DOI BibTeX RDF	measurement-driven, pathloss, two-tier architecture, wireless, fairness, mesh, placement, deployment, access network, urban
19	Ji Yeon Lee, Yong Hun Lim, Yon Dohn Chung, Myoung-Ho Kim	Data Storage in Sensor Networks for Multi-dimensional Range Queries.	ICESS	2005	DBLP DOI BibTeX RDF	multi-dimensional range queries, data placement and distribution, Sensor network, data-centric storage
19	Jarrod A. Roy, David A. Papa, Saurabh N. Adya, Hayward H. Chan, Aaron N. Ng, James F. Lu, Igor L. Markov	Capo: robust and scalable open-source min-cut floorplacer.	ISPD	2005	DBLP DOI BibTeX RDF	placement, physical design, floorplanning
19	Robert L. Scot Drysdale, Judith Hromcik, David Reed, Reg Hahne	The year in review: changes and lessons learned in the design and implementation of the AP CS exam in Java.	SIGCSE	2005	DBLP DOI BibTeX RDF	AP CS, AP CS development committee, Java exam, advanced placement computer science, collection classes, high school teachers, marine biology simulation case study, Java, interfaces, object-oriented design, inheritance, AP
19	Sooyong Kang, Heon Young Yeom	A New Block Fetching Scheme Considering Traffic Smoothing in Multimedia Servers.	Multim. Tools Appl.	2004	DBLP DOI BibTeX RDF	block fetching, block placement, multimedia system, traffic smoothing
19	Sheung-Hung Poon, Chan-Su Shin, Tycho Strijk, Takeaki Uno, Alexander Wolff 0001	Labeling Points with Weights.	Algorithmica	2004	DBLP DOI BibTeX RDF	Sliding labels, GIS, Computational geometry, Combinatorial optimization, Job scheduling, Maximum weight independent set, Label placement, Throughput maximization
19	Dengfeng Gao, Jose Alvin G. Gendrano, Bongki Moon, Richard T. Snodgrass, Minseok Park, Bruce C. Huang, Jim M. Rodrigue	Main Memory-Based Algorithms for Efficient Parallel Aggregation for Temporal Databases.	Distributed Parallel Databases	2004	DBLP DOI BibTeX RDF	aggregation tree algorithm, parallel temporal aggregation, result placement, temporal declustering, cost model, data reduction
19	Ali Ahmadinia, Christophe Bobda, Dirk Koch, Mateusz Majer, Jürgen Teich	Task scheduling for heterogeneous reconfigurable computers.	SBCCI	2004	DBLP DOI BibTeX RDF	hardware preemption, scheduling, FPGA, placement, reconfigurable computing, partial reconfiguration
19	Filip Sadlo, Ronald Peikert, Etienne Parkinson	Vorticity Based Flow Analysis and Visualization for Pelton Turbine Design Optimization.	IEEE Visualization	2004	DBLP DOI BibTeX RDF	line placement, feature extraction, flow visualization
19	Navaratnasothie Selvakkumaran, Abhishek Ranjan, Salil Raje, George Karypis	Multi-resource aware partitioning algorithms for FPGAs with heterogeneous resources.	DAC	2004	DBLP DOI BibTeX RDF	multi-constraint, multi-resource, FPGA, partitioning, placement, hierarchical
19	Zhuoqing Morley Mao, David Johnson 0004, Oliver Spatscheck, Jacobus E. van der Merwe, Jia Wang	Efficient and robust streaming provisioning in VPNs.	WWW	2003	DBLP DOI BibTeX RDF	streaming server placement, VPNs
19	Yongseok Cheon, Seokjin Lee, Martin D. F. Wong	Stable Multiway Circuit Partitioning for ECO.	ICCAD	2003	DBLP DOI BibTeX RDF	Stable circuit partitioning, incremental partitioning, engineering change order, similarity cost, placement
19	Shankar Balachandran, Dinesh Bhatia	A-priori wirelength and interconnect estimation based on circuit characteristics.	SLIP	2003	DBLP DOI BibTeX RDF	routing demand, placement, wirelength, interconnect estimation
19	Sooyong Kang, Heon Young Yeom	Smoothed fetching: bridging the data layout and transmission schemes in multimedia servers.	SAC	2002	DBLP DOI BibTeX RDF	multimedia system, data placement, traffic smoothing
19	Yih-Chih Chou, Youn-Long Lin	A performance-driven standard-cell placer based on a modified force-directed algorithm.	ISPD	2001	DBLP DOI BibTeX RDF	placement, timing closure, force-directed
19	Chiung-Shien Wu, Gin-Kou Ma, Mei-Chian Liu	A Scalable Storage Supporting Multistream Real-Time Data Retrieval.	Multim. Syst.	1999	DBLP DOI BibTeX RDF	Multimedia system, Storage system, Data placement
19	Jianzhong Shi, Akash Randhar, Dinesh Bhatia	Macro Block Based FPGA Floorplanning.	VLSI Design	1997	DBLP DOI BibTeX RDF	macro block based FPGA floorplanning, FPGA based designs, very large designs, performance driven designs, constraint-based FPGA floorplanning, flexible macro blocks, fixed macro blocks, input constraint set, topological placement, FPGA architectural constraints, large benchmark examples, VLSI floorplanning, heuristic algorithm, integrated circuit layout, ASIC design
19	István Vassányi, István Erényi	Implementation of Processor Cells for Array Algorithms on FPGAs.	EUROMICRO	1996	DBLP DOI BibTeX RDF	array algorithms, processor cells, fine-grain array architectures, cellular image processing algorithms, placement-routing tool, field programmable gate arrays, FPGA, processor arrays
19	Jin-Tai Yan	A simple yet effective genetic approach for the orientation assignment on cell-based layout.	VLSI Design	1996	DBLP DOI BibTeX RDF	genetic approach, orientation assignment, cell-based layout, total wire length minimisation, placement phase, routing area reduction, orientation states, vertical orientation bit, horizontal orientation bit, genetic algorithms, VLSI, VLSI design, network routing, circuit layout CAD, integrated circuit layout
19	Sudip K. Nag, Rob A. Rutenbar	Performance-driven simultaneous place and route for island-style FPGAs.	ICCAD	1995	DBLP DOI BibTeX RDF	Xilinx 4000-series FPGAs, island-style FPGAs, performance-driven simultaneous placement/routing, place and route tools, FPGAs, field programmable gate arrays, logic CAD, network routing, circuit layout CAD, industrial designs, circuit layout
18	Vassilios Gerousis	Physical design implementation for 3D IC: methodology and tools.	ISPD	2010	DBLP DOI BibTeX RDF	3D IC stack, micro-bump, physical design tools, silicon interposer, methodology, tsv
18	Markus Brede	Enhancing Synchronization in Systems of Non-identical Kuramoto Oscillators.	Complex (2)	2009	DBLP DOI BibTeX RDF	non-identical oscillators, Kuramoto, networks, Synchronization
18	Chaitanya Yalamanchili, Kiron Vijayasankar, Erez Zadok, Gopalan Sivathanu	DHIS: discriminating hierarchical storage.	SYSTOR	2009	DBLP DOI BibTeX RDF	intelligent disks, storage stack, file systems, storage systems
18	Aditya P. Karmarkar, Xiaopeng Xu, Victor Moroz, Greg Rollins, Xiao Lin	Analysis of performance and reliability trade-off in dummy pattern design for 32-nm technology.	ISQED	2009	DBLP DOI BibTeX RDF
18	Jozsef Patvarczki, Murali Mani, Neil T. Heffernan	Performance Driven Database Design for Scalable Web Applications.	ADBIS	2009	DBLP DOI BibTeX RDF	Scalability, Web application, database design
18	Sergio González-Valenzuela, Son T. Vuong, Victor C. M. Leung	A Mobile-Directory Approach to Service Discovery in Wireless Ad Hoc Networks.	IEEE Trans. Mob. Comput.	2008	DBLP DOI BibTeX RDF
18	You-Chiun Wang, Yu-Chee Tseng	Distributed Deployment Schemes for Mobile Wireless Sensor Networks to Ensure Multilevel Coverage.	IEEE Trans. Parallel Distributed Syst.	2008	DBLP DOI BibTeX RDF
18	Daniel Gmach, Jerry Rolia, Ludmila Cherkasova, Guillaume Belrose, Tom Turicchi, Alfons Kemper	An integrated approach to resource pool management: Policies, efficiency and quality metrics.	DSN	2008	DBLP DOI BibTeX RDF
18	Bernd Stube, Bernd Schröder, Eckart Hoene, Andre Lissner	A Novel Approach for EMI Design of Power Electronics.	DATE	2008	DBLP DOI BibTeX RDF
18	Pankaj K. Agarwal, Danny Z. Chen, Shashidhara K. Ganjugunte, Ewa Misiolek, Micha Sharir, Kai Tang 0001	Stabbing Convex Polygons with a Segment or a Polygon.	ESA	2008	DBLP DOI BibTeX RDF
18	Renshen Wang, Evangeline F. Y. Young, Yi Zhu 0002, Fan Chung Graham, Ronald L. Graham, Chung-Kuan Cheng	3-D floorplanning using labeled tree and dual sequences.	ISPD	2008	DBLP DOI BibTeX RDF	3-D packing, sequence, labeled tree
18	Flavio Chierichetti, Silvio Lattanzi, Federico Mari, Alessandro Panconesi	On placing skips optimally in expectation.	WSDM	2008	DBLP DOI BibTeX RDF	probabilistic analysis, inverted index, skips
18	Kevin Marquet, Gilles Grimaud	A DSL approach for object memory management of small devices.	PPPJ	2007	DBLP DOI BibTeX RDF
18	Pritha Banerjee 0001, Susmita Sur-Kolay	Faster Placer for Island-Style FPGAs.	ICCTA	2007	DBLP DOI BibTeX RDF
18	Dimitris Pongas, Michael N. Mistry, Stefan Schaal	A Robust Quadruped Walking Gait for Traversing Rough Terrain.	ICRA	2007	DBLP DOI BibTeX RDF
18	Yan Lin 0001, Lei He 0001	Stochastic physical synthesis for FPGAs with pre-routing interconnect uncertainty and process variation.	FPGA	2007	DBLP DOI BibTeX RDF	FPGA, uncertainty, process variation, stochastic, physical synthesis
18	Doris T. Chen, Kristofer Vorwerk, Andrew A. Kennings	Improving Timing-Driven FPGA Packing With Physical Information.	FPL	2007	DBLP DOI BibTeX RDF
18	Hung-Ming Chen, I-Min Liu, Martin D. F. Wong	I/O Clustering in Design Cost and Performance Optimization for Flip-Chip Design.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2006	DBLP DOI BibTeX RDF
18	Saikat Ray, Wei Lai, Ioannis Ch. Paschalidis	Statistical location detection with sensor networks.	IEEE Trans. Inf. Theory	2006	DBLP DOI BibTeX RDF	sensor networks, information theory, stochastic processes, hypothesis testing, mathematical programming/optimization
18	Junhyung Um, Taewhan Kim	Resource Sharing Combined with Layout Effects in High-Level Synthesis.	J. VLSI Signal Process.	2006	DBLP DOI BibTeX RDF	resource allocation, high-level synthesis, layout
18	Kaushik Rajan, Ramaswamy Govindarajan	Two-level mapping based cache index selection for packet forwarding engines.	PACT	2006	DBLP DOI BibTeX RDF	network processors, cache architectures
18	Natarajan Viswanathan, Min Pan, Chris C. N. Chu	FastPlace 2.0: an efficient analytical placer for mixed-mode designs.	ASP-DAC	2006	DBLP DOI BibTeX RDF
18	Cristian Budianu, Lang Tong	Channel estimation under asynchronous packet interference.	IEEE Trans. Signal Process.	2005	DBLP DOI BibTeX RDF
18	Chao-Yang Yeh, Malgorzata Marek-Sadowska	Sequential delay budgeting with interconnect prediction.	IEEE Trans. Very Large Scale Integr. Syst.	2004	DBLP DOI BibTeX RDF
18	Stelian Alupoaei, Srinivas Katkoori	Ant colony system application to macrocell overlap removal.	IEEE Trans. Very Large Scale Integr. Syst.	2004	DBLP DOI BibTeX RDF
18	Hung-Ming Chen, I-Min Liu, Martin D. F. Wong, Muzhou Shao, Li-Da Huang	I/O Clustering in Design Cost and Performance Optimization for Flip-Chip Design.	ICCD	2004	DBLP DOI BibTeX RDF
18	Stelian Alupoaei, Srinivas Katkoori	Ant Colony Optimization Technique for Macrocell Overlap Removal.	VLSI Design	2004	DBLP DOI BibTeX RDF
18	Prabhakar Kudva, Andrew Sullivan, William E. Dougherty	Measurements for structural logic synthesis optimizations.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2003	DBLP DOI BibTeX RDF
18	Thomas Erlebach, Stamatis Stefanakos	Wavelength Conversion in Shortest-Path All-Optical Networks.	ISAAC	2003	DBLP DOI BibTeX RDF
18	Xueyan Tang, Samuel T. Chanson	Coordinated Management of Cascaded Caches for Efficient Content Distribution.	ICDE	2003	DBLP DOI BibTeX RDF
18	Yingjie Li 0003, Ming T. Liu	Optimization of Performance Gain in Content Distribution Networks with Serve Replicas.	SAINT	2003	DBLP DOI BibTeX RDF
18	Chao-Yang Yeh, Malgorzata Marek-Sadowska	Minimum-Area Sequential Budgeting for FPGA.	ICCAD	2003	DBLP DOI BibTeX RDF
18	Junhyung Um, Jae-Hoon Kim 0001, Taewhan Kim	Layout-driven resource sharing in high-level synthesis.	ICCAD	2002	DBLP DOI BibTeX RDF
18	Prabhakar Kudva, Andrew Sullivan, William E. Dougherty	Metrics for structural logic synthesis.	ICCAD	2002	DBLP DOI BibTeX RDF
18	David L. Marcum	Efficient Generation of High-Quality Unstructured Surface and Volume Grids.	Eng. Comput.	2001	DBLP DOI BibTeX RDF	Anisotropic meshing, Local-reconnection, Surface mapping, Surface meshing, Advancing-front, Grid generation
18	Pei-Ning Guo, Toshihiko Takahashi, Chung-Kuan Cheng, Takeshi Yoshimura	Floorplanning using a tree representation.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2001	DBLP DOI BibTeX RDF
18	Florin Balasa, Koen Lampaert	Symmetry within the sequence-pair representation in the context ofplacement for analog design.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2000	DBLP DOI BibTeX RDF
18	Andrew B. Kahng, Paul Tucker, Alexander Zelikovsky	Optimization of Linear Placements for Wirelength Minimization with Free Sites.	ASP-DAC	1999	DBLP DOI BibTeX RDF
18	Vugranam C. Sreedhar, Roy Dz-Ching Ju, David M. Gillies, Vatsa Santhanam	Translating Out of Static Single Assignment Form.	SAS	1999	DBLP DOI BibTeX RDF
18	Masako Murofushi, Takashi Ishioka, Masami Murakata, Takashi Mitsuhashi	Layout Driven Re-synthesis for Low Power Consumption LSIs.	DAC	1997	DBLP DOI BibTeX RDF
18	Mark L. McAuliffe, Michael J. Carey 0001, Marvin H. Solomon	Towards Effective and Efficient Free Space Management.	SIGMOD Conference	1996	DBLP DOI BibTeX RDF
18	Anmol Mathur, Kuang-Chien Chen, C. L. Liu 0001	Applications of Slack Neighborhood Graphs to Timing Driven Optimization Problems in FPGAs.	FPGA	1995	DBLP DOI BibTeX RDF
18	Anmol Mathur, Kuang-Chien Chen, C. L. Liu 0001	Re-engineering of timing constrained placements for regular architectures.	ICCAD	1995	DBLP DOI BibTeX RDF	Xilinx 3000 FPGA architecture, engineering requirements, regular architectures, timing constrained placements reengineering, FPGAs, field programmable gate arrays, logic CAD, program debugging, systems re-engineering, logic arrays, design flow, gate arrays, design specification, timing performance, design cycle, design debugging
18	Jonathan Rose, Wolfgang Klebsch, Jürgen Wolf	Temperature measurement and equilibrium dynamics of simulated annealing placements.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1990	DBLP DOI BibTeX RDF
18	Chong-Min Kyung, Josef Widder, Dieter A. Mlynski	Adaptive Cluster Growth (ACG): a new algorithm for circuit packing in rectilinear region.	EURO-DAC	1990	DBLP DOI BibTeX RDF
17	Xiangmao Chang, Rui Tan 0001, Guoliang Xing, Zhaohui Yuan, Chenyang Lu 0001, Yixin Chen 0001, Yixian Yang	Sensor Placement Algorithms for Fusion-Based Surveillance Networks.	IEEE Trans. Parallel Distributed Syst.	2011	DBLP DOI BibTeX RDF	wireless sensor networks, Data fusion, target detection, sensor placement
17	Vinodh Venkatesan, Ilias Iliadis, Christina Fragouli, Rüdiger L. Urbanke	Reliability of Clustered vs. Declustered Replica Placement in Data Storage Systems.	MASCOTS	2011	DBLP DOI BibTeX RDF	clustered, reliability, storage system, declustered, replica placement
17	Xiao-Yu Hu, Robert Haas 0001, Evangelos Eleftheriou	Container Marking: Combining Data Placement, Garbage Collection and Wear Levelling for Flash.	MASCOTS	2011	DBLP DOI BibTeX RDF	Flash SSD, Write amplification, Garbage collection, Data placement, Wear levelling
17	Hristijan Gjoreski, Mitja Lustrek, Matjaz Gams	Accelerometer Placement for Posture Recognition and Fall Detection.	Intelligent Environments	2011	DBLP DOI BibTeX RDF	accelerometer placement, classification, Ambient intelligence, accelerometers, activity recognition, fall detection, posture recognition
17	Deepal Jayasinghe, Calton Pu, Tamar Eilam, Malgorzata Steinder, Ian Whalley, Ed C. Snible	Improving Performance and Availability of Services Hosted on IaaS Clouds with Structural Constraint-Aware Virtual Machine Placement.	IEEE SCC	2011	DBLP DOI BibTeX RDF	Structural Constraints, VM Placement, Optimization, Performance, Availability, Clouds, IaaS, Datacenter
17	Xiaofeng Han, Xiang Cao, Errol L. Lloyd, Chien-Chung Shen	Fault-Tolerant Relay Node Placement in Heterogeneous Wireless Sensor Networks.	IEEE Trans. Mob. Comput.	2010	DBLP DOI BibTeX RDF	approximation algorithms, Heterogeneous wireless sensor networks, relay node placement
17	Bin Lin 0001, Pin-Han Ho, Liang-Liang Xie, Xuemin (Sherman) Shen, János Tapolcai	Optimal Relay Station Placement in Broadband Wireless Access Networks.	IEEE Trans. Mob. Comput.	2010	DBLP DOI BibTeX RDF	Cooperative relaying, decode-and-forward, placement problem
17	Nikos Hardavellas, Michael Ferdman, Babak Falsafi, Anastasia Ailamaki	Near-Optimal Cache Block Placement with Reactive Nonuniform Cache Architectures.	IEEE Micro	2010	DBLP DOI BibTeX RDF	nonuniform cache architectures, parallel architectures, multicore, cache memories, data placement
17	Weixiong Rao, Lei Chen 0002, Ada Wai-Chee Fu, Guoren Wang	Optimal Resource Placement in Structured Peer-to-Peer Networks.	IEEE Trans. Parallel Distributed Syst.	2010	DBLP DOI BibTeX RDF	cache, topology, placement, distributed hash table (DHT), popularity, Peer-to-peer (P2P) network
17	Keqin Wu, Zhanping Liu, Song Zhang 0004, Robert J. Moorhead II	Topology-Aware Evenly Spaced Streamline Placement.	IEEE Trans. Vis. Comput. Graph.	2010	DBLP DOI BibTeX RDF	Evenly spaced streamlines, flow topology, seeding strategy, streamline placement, flow visualization
17	Jie Cui, Xue Chen, Yongmei Lei, Weimin Xu	Improving the Efficiency of Scheduling and Placement in FPGA by Small-world Model Based Genetic Algorithm.	CIT	2010	DBLP DOI BibTeX RDF	Scheduling, FPGA, Placement, Small-world, GA
17	Xiaoqun Yuan, Hao Yin, Xuening Liu, Changlai Du, Geyong Min	Server Placement for Peer-to-Peer Live Streaming Systems.	CIT	2010	DBLP DOI BibTeX RDF	Cross-Network Traffic, Peer-to-Peer, Live Streaming, Server Placement
17	W. Hu, C. Wang, J. L. Ma, T. Z. Chen, D. Chen	A Novel Approach for Finding Candidate Locations for Online FPGA Placement.	CIT	2010	DBLP DOI BibTeX RDF	partially runtime reconfigurable, dynamic placement, FPGA, reconfigurable computing