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GrowBag graphs for keyword ? (Num. hits/coverage)
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Results
Found 220 publication records. Showing 220 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
22 | David E. Duarte, Paola Zepeda, Suching Hsu, Atul Maheshwari, Greg Taylor |
HVM performance validation and DFM techniques used in a 32nm CMOS thermal sensor system. |
CICC |
2010 |
DBLP DOI BibTeX RDF |
|
22 | Dongok Kim, Irith Pomeranz, M. Enamul Amyeen, Srikanth Venkataraman |
Defect diagnosis based on DFM guidelines. |
VTS |
2010 |
DBLP DOI BibTeX RDF |
|
22 | Osíris Canciglieri Júnior, João Pedro Buiarskey Kovalchuk, Marcelo Rudek, Teófilo Miguel de Souza |
Development of White Goods Parts in a Concurrent Engineering Environment Based on DFM/DFA Concepts. |
CE |
2010 |
DBLP DOI BibTeX RDF |
|
22 | Sarveswara Tammali, Vishal Khatri, Gowrysankar Shanmugam, Mark Terry |
DFM aware bridge pair extraction for manufacturing test development. |
ITC |
2010 |
DBLP DOI BibTeX RDF |
|
22 | Matteo Golfarelli |
DFM as a Conceptual Model for Data Warehouse. |
Encyclopedia of Data Warehousing and Mining |
2009 |
DBLP BibTeX RDF |
|
22 | Laurent Remy, Philippe Coll, Fabrice Picot, Philippe Mico, Jean-Michel Portal |
Definition of an innovative filling structure for digital blocks : the DFM filler cell. |
ICECS |
2009 |
DBLP DOI BibTeX RDF |
|
22 | Ritesh P. Turakhia, Mark Ward, Sandeep Kumar Goel, Brady Benware |
Bridging DFM Analysis and Volume Diagnostics for Yield Learning - A Case Study. |
VTS |
2009 |
DBLP DOI BibTeX RDF |
|
22 | Mustafa Cemal Çakir, O. O. Cilsal |
Implementation of a contradiction-based approach to DFM. |
Int. J. Comput. Integr. Manuf. |
2008 |
DBLP DOI BibTeX RDF |
|
22 | Carsten Elgert, Volker Herbig, Anton Ossner, Thomas Harms, Emmanuel Blanc |
DfM in the Analogue and Digital World. |
DATE |
2008 |
DBLP DOI BibTeX RDF |
|
22 | Anis Uzzaman |
How To Increase the Effectiveness of Yield Diagnostics-Is DFM the Answer to This? |
ATS |
2008 |
DBLP DOI BibTeX RDF |
|
22 | Dongok Kim, Irith Pomeranz, M. Enamul Amyeen, Srikanth Venkataraman |
Prioritizing the Application of DFM Guidelines Based on the Detectability of Systematic Defects. |
ATS |
2008 |
DBLP DOI BibTeX RDF |
|
22 | Praveen Elakkumanan |
Tutorial 6: Enhancing Yield through Design for Manufacturability (DFM). |
ISQED |
2008 |
DBLP DOI BibTeX RDF |
|
22 | Taro Niiyama, Piao Zhe, Koichi Ishida, Masami Murakata, Makoto Takamiya, Takayasu Sakurai |
Dependence of Minimum Operating Voltage (VDDmin) on Block Size of 90-nm CMOS Ring Oscillators and its Implications in Low Power DFM. |
ISQED |
2008 |
DBLP DOI BibTeX RDF |
|
22 | Maharaj Mukherjee, Kanad Chakraborty |
A Randomized Greedy Algorithm for the Pattern Fill Problem for DFM Applications. |
ISQED |
2008 |
DBLP DOI BibTeX RDF |
|
22 | Srikanth Venkataraman, Nagesh Tamarapalli |
DFM / DFT / SiliconDebug / Diagnosis. |
VLSI Design |
2008 |
DBLP DOI BibTeX RDF |
|
22 | Jui-Hsiang Liu, Ming-Feng Tsai, Lumdo Chen, Charlie Chung-Ping Chen |
Accurate and analytical statistical spatial correlation modeling for VLSI DFM applications. |
DAC |
2008 |
DBLP DOI BibTeX RDF |
process variation, spatial correlation, SSTA |
22 | Hiroki Shimano, Fukashi Morishita, Katsumi Dosaka, Kazutami Arimoto |
A Voltage Scalable Advanced DFM RAM with Accelerated Screening for Low Power SoC Platform. |
IEICE Trans. Electron. |
2007 |
DBLP DOI BibTeX RDF |
|
22 | Josko Valentincic, Daniel Brissaud, M. Junkar |
A novel approach to DFM in toolmaking: a case study. |
Int. J. Comput. Integr. Manuf. |
2007 |
DBLP DOI BibTeX RDF |
|
22 | Masaya Yoshikawa, Hidekazu Terai |
The new DFM approach based on a genetic algorithm. |
Artif. Life Robotics |
2007 |
DBLP DOI BibTeX RDF |
|
22 | Philippe Magarshack |
Design challenges in 45nm and below: DFM, low-power and design for reliability. |
ACM Great Lakes Symposium on VLSI |
2007 |
DBLP DOI BibTeX RDF |
design for reliability, low-power design, design for manufacturability |
22 | Toshinori Sato, Yuji Kunitake |
A Simple Flip-Flop Circuit for Typical-Case Designs for DFM. |
ISQED |
2007 |
DBLP DOI BibTeX RDF |
|
22 | Srikanth Venkataraman |
DFM, DFY, Debug and Diagnosis: The Loop to Ensure Yield. |
ISQED |
2007 |
DBLP DOI BibTeX RDF |
|
22 | Jeong-Taek Kong |
Tipping Point for New Design Technologies: DFM, Low Power and ESL. |
ISQED |
2007 |
DBLP DOI BibTeX RDF |
|
22 | Dongok Kim, M. Enamul Amyeen, Srikanth Venkataraman, Irith Pomeranz, Swagato Basumallick, Berni Landau |
Testing for systematic defects based on DFM guidelines. |
ITC |
2007 |
DBLP DOI BibTeX RDF |
|
22 | Dan Page, Jamil Kawa, Charles C. Chiang |
DFM: swimming upstream. |
ACM Great Lakes Symposium on VLSI |
2006 |
DBLP DOI BibTeX RDF |
|
22 | Peter Wright, Minghui Fan |
A DFM Methodology to Evaluate the Impact of Lithography Conditions on the Speed of Critical Paths in a VLSI Circuit. |
ISQED |
2006 |
DBLP DOI BibTeX RDF |
|
22 | Rajesh Raina |
What is DFM & DFY and Why Should I Care ? |
ITC |
2006 |
DBLP DOI BibTeX RDF |
|
22 | Robert C. Aitken |
The Design and Validation of IP for DFM/DFY Assurance. |
ITC |
2006 |
DBLP DOI BibTeX RDF |
|
22 | David Abercrombie, Bernd Koenemann, Nagesh Tamarapalli, Srikanth Venkataraman |
DFM, DFT, Silicon Debug and Diagnosis - The Loop to Ensure Product Yield. |
VLSI Design |
2006 |
DBLP DOI BibTeX RDF |
|
22 | Zuozhi Zhao, Jami J. Shah |
Domain independent shell for DfM and its application to sheet metal forming and injection molding. |
Comput. Aided Des. |
2005 |
DBLP DOI BibTeX RDF |
|
22 | Grant Martin |
Wireless, ESL, DFM, and Power on Stage at 42nd DAC. |
IEEE Des. Test Comput. |
2005 |
DBLP DOI BibTeX RDF |
DAC 2005, electronic system level (ESL) design, DAC 2006, wireless, EDA, SoC design |
22 | Andrzej J. Strojwas |
Tutorial on DFM for physical design. |
ISPD |
2005 |
DBLP DOI BibTeX RDF |
|
22 | Joseph Sawicki |
Shifting Perspective on DFM. |
ISQED |
2005 |
DBLP DOI BibTeX RDF |
|
22 | Srinivas Raghvendra, Philippe Hurat |
DFM: Linking Design and Manufacturing. |
VLSI Design |
2005 |
DBLP DOI BibTeX RDF |
|
22 | Hans Willem van Vliet, Kees van Luttervelt |
Development and application of a mixed product/process-based DFM methodology. |
Int. J. Comput. Integr. Manuf. |
2004 |
DBLP DOI BibTeX RDF |
|
22 | Carlo Guardiani, Nicola Dragone, Patrick McNamara |
Proactive design for manufacturing (DFM) for nanometer SoC designs. |
CICC |
2004 |
DBLP DOI BibTeX RDF |
|
22 | Robert C. Aitken |
DFM: The Real 90nm Hurdle. |
ITC |
2003 |
DBLP DOI BibTeX RDF |
|
22 | Robert C. Aitken |
Silicon IP And Successful DFM. |
ITC |
2003 |
DBLP DOI BibTeX RDF |
|
22 | Cliff Ma |
DFM - An Industry Paradigm Shift. |
ITC |
2003 |
DBLP DOI BibTeX RDF |
|
22 | Jitendra Khare |
DFM - A Fabless Perspective. |
ITC |
2003 |
DBLP DOI BibTeX RDF |
|
22 | Henda Azaza, Ahmed Masmoudi 0001 |
On the dynamic and steady state performances of a vector controlled DFM drive. |
SMC |
2002 |
DBLP DOI BibTeX RDF |
|
22 | Alex Sander Chaves da Silva |
Um sistema de auxílio ao projetista de peças fundidas através da integração entre a técnica DFM e projeto auxiliado por computador. |
|
2002 |
RDF |
|
22 | Andreas Lechner, Martin John Burbidge, Andrew Richardson 0001, B. Hermes |
3DB Challange for DfT, DfM, DOT & BIST Integration into Analogue and Mixed Signal ICs. |
LATW |
2001 |
DBLP BibTeX RDF |
|
22 | Neil Harrison |
Orphan Metal Removal as an Element of DFM. |
DFT |
1998 |
DBLP DOI BibTeX RDF |
Layout modification, Yield, Design for manufacturability |
22 | Thomas G. Waring, Gerard A. Allan, Anthony J. Walton |
Integration of DFM Techniques and Design Automation. |
DFT |
1996 |
DBLP DOI BibTeX RDF |
|
22 | Wojciech Maly |
What is Design for Manufacturability (DFM)? (Panel Abstract). |
DAC |
1991 |
DBLP BibTeX RDF |
|
22 | Masaru Takesue |
A distributed load-balancing system and its application to list-processing oriented data-flow machine dfm. |
Syst. Comput. Jpn. |
1988 |
DBLP DOI BibTeX RDF |
|
22 | Makoto Amamiya, Masaru Takesue, Ryuzo Hasegawa, Hirohide Mikami |
DFM: the data flow machine highly parallel symbol manipulation. |
FJCC |
1987 |
DBLP BibTeX RDF |
|
20 | Yi-Wei Lin, Malgorzata Marek-Sadowska, Wojciech Maly |
Performance study of VeSFET-based, high-density regular circuits. |
ISPD |
2010 |
DBLP DOI BibTeX RDF |
advanced technology., transistor layout, DFM, regular fabric |
20 | Yongchan Ban, David Z. Pan |
Compact modeling and robust layout optimization for contacts in deep sub-wavelength lithography. |
DAC |
2010 |
DBLP DOI BibTeX RDF |
optimization, VLSI, DFM, variation, lithography, contact |
20 | Wojciech Maly |
Vertical slit transistor based integrated circuits (VeSTICs) paradigm. |
ISPD |
2009 |
DBLP DOI BibTeX RDF |
dual gate transistor, ic deign-manufacturing paradigm, vertical channel, vesfet, 3d integration, regular fabric, dfm |
20 | Yi-Wei Lin, Malgorzata Marek-Sadowska, Wojciech Maly |
Transistor-level layout of high-density regular circuits. |
ISPD |
2009 |
DBLP DOI BibTeX RDF |
transistor layout, placement and routing, regular fabric, dfm |
20 | David Abercrombie, Fedor Pikus, Cosmin Cazan |
Use of lithography simulation for the calibration of equation-based design rule checks. |
DAC |
2009 |
DBLP DOI BibTeX RDF |
LFD, Leff, equation based DRC, verification, manufacturability, DFM, lithography, DRC |
20 | Min-Chun Tsai |
A formula of STI cmp design rule. |
ACM Great Lakes Symposium on VLSI |
2008 |
DBLP DOI BibTeX RDF |
sti, topography, cmp, design rules, dfm |
20 | Tai-Chen Chen, Guang-Wan Liao, Yao-Wen Chang |
Predictive formulae for OPC with applications to lithography-friendly routing. |
DAC |
2008 |
DBLP DOI BibTeX RDF |
routing, DFM, OPC, lithography, RET |
20 | Joe Damore |
DATC Newsletter. |
IEEE Des. Test Comput. |
2007 |
DBLP DOI BibTeX RDF |
Electronic Design Process Subcommittee, DSD, SBCCI, DFM, EDA, DATC |
20 | Joe Damore |
DATC Newsletter. |
IEEE Des. Test Comput. |
2007 |
DBLP DOI BibTeX RDF |
Juan-Antonio Carballo, DFM, EDA, design automation, DATC, ESL design |
20 | Sylvain Guilley, Florent Flament, Philippe Hoogvorst, Renaud Pacalet, Yves Mathieu |
Secured CAD Back-End Flow for Power-Analysis-Resistant Cryptoprocessors. |
IEEE Des. Test Comput. |
2007 |
DBLP DOI BibTeX RDF |
robust hardware, back-end design automation, power-constant architectures, DFY, side-channel attacks, DFM, mitigation |
20 | Hua Xiang 0001, Kai-Yuan Chao, Ruchir Puri, Martin D. F. Wong |
Is your layout density verification exact?: a fast exact algorithm for density calculation. |
ISPD |
2007 |
DBLP DOI BibTeX RDF |
fix-dissection, DFM, density |
20 | Yanming Jia, Yici Cai, Xianlong Hong |
Dummy fill aware buffer insertion during routing. |
ACM Great Lakes Symposium on VLSI |
2007 |
DBLP DOI BibTeX RDF |
routing, VLSI, DFM, buffer insertion, dummy fill |
20 | Yufu Zhang, Zheng Shi |
A New Method of Implementing Hierarchical OPC. |
ISQED |
2007 |
DBLP DOI BibTeX RDF |
Sub-wavelength Lithography, Cell-wise, EPE, Hierarchy, DFM, OPC, RET |
20 | Thomas Hartung, Jim Kupec, Ana Hunter, Brad Paulsen, Felicia James, Nick Yu |
How will the fabless model survive? |
DAC |
2006 |
DBLP DOI BibTeX RDF |
fabless, foundry, DFM, business |
20 | Jie Yang 0010, Ethan Cohen, Cyrus Tabery, Norma Rodriguez, Mark Craig |
An up-stream design auto-fix flow for manufacturability enhancement. |
DAC |
2006 |
DBLP DOI BibTeX RDF |
layout, DFM, OPC, design flow |
20 | Amith Singhee, Claire Fang Fang, James D. Ma, Rob A. Rutenbar |
Probabilistic interval-valued computation: toward a practical surrogate for statistics inside CAD tools. |
DAC |
2006 |
DBLP DOI BibTeX RDF |
algorithms, DFM, intervals |
20 | Hailong Yao, Yici Cai, Xianlong Hong, Qiang Zhou 0001 |
Improved multilevel routing with redundant via placement for yield and reliability. |
ACM Great Lakes Symposium on VLSI |
2005 |
DBLP DOI BibTeX RDF |
redundant via, routing, VLSI, DFM, yield enhancement |
20 | Joydeep Mitra, Peng Yu, David Zhigang Pan |
RADAR: RET-aware detailed routing using fast lithography simulations. |
DAC |
2005 |
DBLP DOI BibTeX RDF |
DFM, OPC, lithography, detailed routing, RET |
20 | Ricardo Reis 0001, Fernanda Lima Kastensmidt, José Luís Almada Güntzel |
Physical design methodologies for performance predictability and manufacturability. |
Conf. Computing Frontiers |
2004 |
DBLP DOI BibTeX RDF |
design methodologies, regularity, layout, physical design, DFM |
20 | Franklin M. Schellenberg, Luigi Capodieci |
Impact of RET on physical layouts. |
ISPD |
2001 |
DBLP DOI BibTeX RDF |
off-axis illumination, physical verification, simulation, DFM, OPC, lithography, RET, phase-shifting, PSM |
20 | Yervant Zorian |
Yield Improvement and Repair Trade-Off for Large Embedded Memories. |
DATE |
2000 |
DBLP DOI BibTeX RDF |
silicon repair, BIST, DFM, Yield improvement |
20 | Mick Tegethoff, Tom Chen 0001 |
Simulation Techniques for the Manufacturing Test of MCMs. |
J. Electron. Test. |
1997 |
DBLP DOI BibTeX RDF |
simulation, test, DFT, yield, DFM, SMT, MCM, board |
19 | Qing Su, Charles C. Chiang, Jamil Kawa |
Hotspot Based Yield Prediction with Consideration of Correlations. |
ISQED |
2008 |
DBLP DOI BibTeX RDF |
Systematic Yield, DFM (design for manufacturing), correlation, Yield, Hotspot, Yield Prediction |
19 | Di Wu 0017, Jiang Hu, Rabi N. Mahapatra |
Coupling aware timing optimization and antenna avoidance in layer assignment. |
ISPD |
2005 |
DBLP DOI BibTeX RDF |
VLSI, interconnect, probabilistic modeling, physical design, crosstalk, design for manufacturability (DFM), antenna effect |
19 | Tsung-Yi Ho, Yao-Wen Chang, Sao-Jie Chen |
Multilevel routing with antenna avoidance. |
ISPD |
2004 |
DBLP DOI BibTeX RDF |
nanometer, process antenna effect, routing, physical design, design for manufacturability (DFM), multilevel optimization |
19 | Vipul Singhal, C. B. Keshav, K. G. Surnanth, P. R. Suresh |
Transistor Flaring in Deep Submicron-Design Considerations. |
ASP-DAC/VLSI Design |
2002 |
DBLP DOI BibTeX RDF |
Deep Submicron (DSM), pullback, photolithography, Subwavelength-lithography, Optical Proximity Correction (OPC), SPICE-models, standard-ce1l library, Design for Manufacturability (DFM) |
14 | Goutam Debnath, Paul J. Thadikaran |
Design for Manufacturability and Reliability in Nano Era. |
VLSI Design |
2009 |
DBLP DOI BibTeX RDF |
|
14 | Jason Cong, Yi Zou |
Lithographic aerial image simulation with FPGA-based hardwareacceleration. |
FPGA |
2008 |
DBLP DOI BibTeX RDF |
co-processor acceleration, lithography simulation, FPGA |
14 | Swaroop Ghosh, Patrick Ndai, Kaushik Roy 0001 |
A Novel Low Overhead Fault Tolerant Kogge-Stone Adder Using Adaptive Clocking. |
DATE |
2008 |
DBLP DOI BibTeX RDF |
|
14 | Ahmadreza Momeni, Amir G. Aghdam |
A necessary and sufficient condition for stabilization of decentralized time-delay systems with commensurate delays. |
CDC |
2008 |
DBLP DOI BibTeX RDF |
|
14 | Dudy Lim, Yew-Soon Ong, Yaochu Jin, Bernhard Sendhoff |
Evolutionary Optimization with Dynamic Fidelity Computational Models. |
ICIC (2) |
2008 |
DBLP DOI BibTeX RDF |
|
14 | Kuen-Yu Tsai, Meng-Fu You, Yi-Chang Lu, Philip C. W. Ng |
A new method to improve accuracy of leakage current estimation for transistors with non-rectangular gates due to sub-wavelength lithography effects. |
ICCAD |
2008 |
DBLP DOI BibTeX RDF |
|
14 | Ping-Ying Wang, Hsiu-Ming Chang 0001 |
A charge pump-based direct frequency modulator. |
ISCAS |
2008 |
DBLP DOI BibTeX RDF |
|
14 | Fan QingMing, Liu Geng, Liu HongJun |
Research on Evaluation of Parts Manufacturability Based on Feature. |
CSSE (3) |
2008 |
DBLP DOI BibTeX RDF |
|
14 | Dhruva Ghai, Saraju P. Mohanty, Elias Kougianos |
A process and supply variation tolerant nano-CMOS low voltage, high speed, a/d converter for system-on-chip. |
ACM Great Lakes Symposium on VLSI |
2008 |
DBLP DOI BibTeX RDF |
flash adc, nano-cmos, ti comparator, process variation, analog-to-digital converter, low voltage, high speed |
14 | Matt Nowak, Jose Corleto, Christopher Chun, Riko Radojcic |
Holistic pathfinding: virtual wireless chip design for advanced technology and design exploration. |
DAC |
2008 |
DBLP DOI BibTeX RDF |
design technology integration, design exploration, pathfinding |
14 | Tarek A. El-Moselhy, Ibrahim M. Elfadel, David Widiger |
Efficient algorithm for the computation of on-chip capacitance sensitivities with respect to a large set of parameters. |
DAC |
2008 |
DBLP DOI BibTeX RDF |
sensitivity analysis, capacitance extraction, adjoint method |
14 | Mark Derbey |
Soft-Errors Phenomenon Impacts on Design for Reliability Technologies. |
IOLTS |
2007 |
DBLP DOI BibTeX RDF |
|
14 | Sanjiv Taneja |
Accelerating Yield Ramp through Real-Time Testing. |
IOLTS |
2007 |
DBLP DOI BibTeX RDF |
|
14 | Marc Derbey |
Soft-Errors Phenomenon Impacts on Design for Reliability Technologies. |
ISQED |
2007 |
DBLP DOI BibTeX RDF |
|
14 | Duane S. Boning, Karthik Balakrishnan, Hong Cai, Nigel Drego, Ali Farahanchi, Karen Gettings, Daihyun Lim, Ajay Somani, Hayden Taylor, Daniel Truque, Xiaolin Xie |
Variation. |
ISQED |
2007 |
DBLP DOI BibTeX RDF |
|
14 | Srikanth Venkataraman, Ruchir Puri, Steve Griffith, Ankush Oberai, Robert Madge, Greg Yeric, Walter Ng, Yervant Zorian |
Making Manufacturing Work For You. |
DAC |
2007 |
DBLP BibTeX RDF |
|
14 | Robert Goldblatt |
Maps and Monads for Modal Frames. |
Stud Logica |
2006 |
DBLP DOI BibTeX RDF |
modal map, bounded morphism, descriptive frame, equivalence of categories, reflective subcategory, Kleisli category, duality, monad |
14 | Claudio Menezes, Cristina Meinhardt, Ricardo Reis 0001, Reginaldo Tavares |
A Regular Layout Approach for ASICs. |
ISVLSI |
2006 |
DBLP DOI BibTeX RDF |
|
14 | René Penning de Vries |
EDA challenges in the converging application world. |
DATE |
2006 |
DBLP BibTeX RDF |
|
14 | Tohru Furuyama |
Deep Sub-100 nm Design Challenges. |
DSD |
2006 |
DBLP DOI BibTeX RDF |
|
14 | Mohamed Azimane |
High-Quality Memory Test. |
MTDT |
2006 |
DBLP DOI BibTeX RDF |
|
14 | Xiaoping Tang, Xin Yuan |
Technology migration techniques for simplified layouts with restrictive design rules. |
ICCAD |
2006 |
DBLP DOI BibTeX RDF |
|
14 | Sridhar Tirumala, Yuri Mahotin, Xiao Lin, Victor Moroz, Lee Smith, S. Krishnamurthy, L. Bomholt, Dipu Pramanik |
Bringing Manufacturing into Design via Process-Dependent SPICE Models. |
ISQED |
2006 |
DBLP DOI BibTeX RDF |
|
14 | Ajay Khoche, Peter Muhmenthaler |
Session Abstract. |
VTS |
2006 |
DBLP DOI BibTeX RDF |
|
14 | Meng-Fan Chang, Kuei-Ann Wen |
Power and Substrate Noise Tolerance of Configurable Embedded Memories in SoC. |
J. VLSI Signal Process. |
2005 |
DBLP DOI BibTeX RDF |
supply noise, SRAM, substrate noise, ROM |
14 | Rajesh K. Gupta 0001 |
The other face of design for manufacturability. |
IEEE Des. Test Comput. |
2005 |
DBLP DOI BibTeX RDF |
design-manufacturing interface, DMI |
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