Search results for "FPGA"

Hits ?▲	Authors	Title	Venue	Year	Link
1	Linghao Song, Yuze Chi, Atefeh Sohrabizadeh, Young-kyu Choi, Jason Lau, Jason Cong	Sextans: A Streaming Accelerator for General-Purpose Sparse-Matrix Dense-Matrix Multiplication.	FPGA	2022	DBLP DOI BibTeX RDF
1	Yuanlong Xiao, André DeHon	HiPR: Fast, Incremental Custom Partial Reconfiguration for HLS Developers.	FPGA	2022	DBLP DOI BibTeX RDF
1	Martha Barker, Stephen A. Edwards, Martha A. Kim	Synthesized Garbage Collection for FPGA Accelerators.	FPGA	2022	DBLP DOI BibTeX RDF
1	Erwei Wang, James J. Davis 0001, Georgios-Ilias Stavrou, Peter Y. K. Cheung, George A. Constantinides, Mohamed S. Abdelfattah	Logic Shrinkage: Learned FPGA Netlist Sparsity for Efficient Neural Network Inference.	FPGA	2022	DBLP DOI BibTeX RDF
1	Maria Rafaela Gkeka, Alexandros Patras, Nikolaos Tavoularis, Stylianos Piperakis, Emmanouil Hourdakis, Panos E. Trahanias, Christos D. Antonopoulos, Spyros Lalis, Nikolaos Bellas	FPGA Accelerators for Robust Visual SLAM on Humanoid Robots.	FPGA	2022	DBLP DOI BibTeX RDF
1	Jiafeng Xie, Pengzhou He, Tianyou Bao	Ultra Low-Complexity Implementation of Binary Ring-LWE based Post-Quantum Cryptography on FPGA Platform.	FPGA	2022	DBLP DOI BibTeX RDF
1	Yuze Chi, Licheng Guo, Jason Cong	Accelerating SSSP for Power-Law Graphs.	FPGA	2022	DBLP DOI BibTeX RDF
1	Seyed Alireza Damghani, Kenneth B. Kent	Yosys+Odin-II: The Odin-II Partial Mapper with Yosys Coarse-grained Netlists in VTR.	FPGA	2022	DBLP DOI BibTeX RDF
1	Mohammad Bagherbeik, Wentao Xu, Seyed Farzad Mousavi, Kouichi Kanda, Hirotaka Tamura, Ali Sheikholeslami	MAQO: A Scalable Many-Core Annealer for Quadratic Optimization on a Stratix 10 FPGA.	FPGA	2022	DBLP DOI BibTeX RDF
1	Ce Guo, Wayne Luk	Accelerating Constraint-Based Causal Discovery by Shifting Speed Bottleneck.	FPGA	2022	DBLP DOI BibTeX RDF
1	Yukui Luo, Yuheng Zhang, Shijin Duan, Xiaolin Xu	An Integrity Checking Framework for AXI Protocol in Multi-tenant FPGA.	FPGA	2022	DBLP DOI BibTeX RDF
1	Rakin Muhammad Shadab, Yu Zou, Sanjay Gandham, Amro Awad, Mingjie Lin	HMT: A Hardware-Centric Hybrid Bonsai Merkle Tree Algorithm for High-Performance Authentication.	FPGA	2022	DBLP DOI BibTeX RDF
1	Qingcheng Xiao, Yun Liang 0001	Towards Agile DNN Accelerator Design Using Incremental Synthesis on FPGAs.	FPGA	2022	DBLP DOI BibTeX RDF
1	Shinhaeng Kang, Sukhan Lee 0002, Byeongho Kim, Hweesoo Kim, Kyomin Sohn, Nam Sung Kim, Eojin Lee	An FPGA-based RNN-T Inference Accelerator with PIM-HBM.	FPGA	2022	DBLP DOI BibTeX RDF
1	Atefeh Sohrabizadeh, Yunsheng Bai, Yizhou Sun, Jason Cong	Automated Accelerator Optimization Aided by Graph Neural Networks.	FPGA	2022	DBLP DOI BibTeX RDF
1	Jonas Ney, Sebastian Dörner, Matthias Herrmann, Mohammad Hassani Sadi, Jannis Clausius, Stephan ten Brink, Norbert Wehn	FPGA-based Trainable Autoencoder for Communication Systems.	FPGA	2022	DBLP DOI BibTeX RDF
1	Atefeh Sohrabizadeh, Yuze Chi, Jason Cong	SPA-GCN: Efficient and Flexible GCN Accelerator with Application for Graph Similarity Computation.	FPGA	2022	DBLP DOI BibTeX RDF
1	Shaojie Xiang, Yi-Hsiang Lai, Yuan Zhou, Hongzheng Chen, Niansong Zhang, Debjit Pal, Zhiru Zhang	HeteroFlow: An Accelerator Programming Model with Decoupled Data Placement for Software-Defined FPGAs.	FPGA	2022	DBLP DOI BibTeX RDF
1	Zsolt Tokei	Logic Scaling Options for the Next 10 Years: From FinFet to CFET, from Dual Damascene to Semi Damascene.	FPGA	2022	DBLP DOI BibTeX RDF
1	Michael Adler, Paolo Ienne (eds.)	FPGA '22: The 2022 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, Virtual Event, USA, 27 February 2022 - 1 March 2022	FPGA	2022	DBLP DOI BibTeX RDF
1	Yizhao Gao, Song Wang, Hayden Kwok-Hay So	REMOT: A Hardware-Software Architecture for Attention-Guided Multi-Object Tracking with Dynamic Vision Sensors on FPGAs.	FPGA	2022	DBLP DOI BibTeX RDF
1	Licheng Guo, Pongstorn Maidee, Yun Zhou, Chris Lavin, Jie Wang 0022, Yuze Chi, Weikang Qiao, Alireza Kaviani, Zhiru Zhang, Jason Cong	RapidStream: Parallel Physical Implementation of FPGA HLS Designs.	FPGA	2022	DBLP DOI BibTeX RDF
1	Yu Gong, Zhihan Xu, Zhezhi He, Weifeng Zhang 0003, Xiaobing Tu, Xiaoyao Liang, Li Jiang 0002	N3H-Core: Neuron-designed Neural Network Accelerator via FPGA-based Heterogeneous Computing Cores.	FPGA	2022	DBLP DOI BibTeX RDF
1	Marius Knaust, Enrico Seiler, Knut Reinert, Thomas Steinke 0001	Co-Design for Energy Efficient and Fast Genomic Search: Interleaved Bloom Filter on FPGA.	FPGA	2022	DBLP DOI BibTeX RDF
1	Bingyi Zhang, Hanqing Zeng, Viktor K. Prasanna	DecGNN: A Framework for Mapping Decoupled GNN Models onto CPU-FPGA Heterogeneous Platform.	FPGA	2022	DBLP DOI BibTeX RDF
1	King Lok Chung, Nguyen Dao, Jing Yu 0014, Dirk Koch	How to Shrink My FPGAs - Optimizing Tile Interfaces and the Configuration Logic in FABulous FPGA Fabrics.	FPGA	2022	DBLP DOI BibTeX RDF
1	Rashmi Agrawal 0001, Ji Yang, Haris Javaid	Efficient FPGA-based ECDSA Verification Engine For Permissioned Blockchains.	FPGA	2022	DBLP DOI BibTeX RDF
1	Jianyi Cheng, John Wickerson, George A. Constantinides	Finding and Finessing Static Islands in Dynamically Scheduled Circuits.	FPGA	2022	DBLP DOI BibTeX RDF
1	Yi-Chien Lin, Bingyi Zhang, Viktor K. Prasanna	HP-GNN: Generating High Throughput GNN Training Implementation on CPU-FPGA Heterogeneous Platform.	FPGA	2022	DBLP DOI BibTeX RDF
1	Mingqiang Huang, Yucen Liu, Quan Cheng, Shuxin Yang, Kai Li, Junyi Luo, Zhengke Yang, Qiufeng Li, Hao Yu 0001, Changhai Man	A High Throughput Multi-bit-width 3D Systolic Accelerator for NAS Optimized Deep Neural Networks on FPGA.	FPGA	2022	DBLP DOI BibTeX RDF
1	Yixiao Du, Yuwei Hu, Zhongchun Zhou, Zhiru Zhang	High-Performance Sparse Linear Algebra on HBM-Equipped FPGAs Using HLS: A Case Study on SpMV.	FPGA	2022	DBLP DOI BibTeX RDF
1	Zhenyu Xu, Thomas Mauldin, Qing Yang 0001, Tao Wei	Highly Scalable Runtime Countermeasure Against Microprobing Attacks on Die-to-Die Interconnections in System-in-Package.	FPGA	2022	DBLP DOI BibTeX RDF
1	Tian Ye, Rajgopal Kannan, Viktor K. Prasanna	End-to-End Acceleration of Homomorphic Encrypted CNN Inference on FPGAs.	FPGA	2022	DBLP DOI BibTeX RDF
1	Herman Schmit, Matthew Denton	Multi-input Serial Adders for FPGA-like Computational Fabric.	FPGA	2022	DBLP DOI BibTeX RDF
1	Bingyi Zhang, Rajgopal Kannan, Viktor K. Prasanna	A Framework for Optimizing GCN Inference on FPGA.	FPGA	2021	DBLP DOI BibTeX RDF
1	Lana Josipovic, Axel Marmet, Andrea Guerrieri, Paolo Ienne	Resource Sharing in Dataflow Circuits.	FPGA	2021	DBLP DOI BibTeX RDF
1	Qinggang Wang, Long Zheng 0003, Yu Huang 0013, Pengcheng Yao, Chuangyi Gui, Xiaofei Liao, Hai Jin 0001, Wenbin Jiang, Fubing Mao	GraSU: A Fast Graph Update Library for FPGA-based Dynamic Graph Processing.	FPGA	2021	DBLP DOI BibTeX RDF
1	Qijing Huang 0001, Dequan Wang, Zhen Dong, Yizhao Gao, Yaohui Cai, Tian Li, Bichen Wu, Kurt Keutzer, John Wawrzynek	CoDeNet: Efficient Deployment of Input-Adaptive Object Detection on Embedded FPGAs.	FPGA	2021	DBLP DOI BibTeX RDF
1	Yuze Chi, Licheng Guo, Young-kyu Choi, Jie Wang 0022, Jason Cong	Extending High-Level Synthesis for Task-Parallel Programs.	FPGA	2021	DBLP DOI BibTeX RDF
1	Yufei Ma 0002, Gokul Krishnan, Yu Cao 0001, Le Ye, Ru Huang	SWIFT: Small-World-based Structural Pruning to Accelerate DNN Inference on FPGA.	FPGA	2021	DBLP DOI BibTeX RDF
1	Chenhao Liu, Zhiyuan Shao, Kexin Li, Minkang Wu, Jiajie Chen, Ruoshi Li, Xiaofei Liao, Hai Jin 0001	ScalaBFS: A Scalable BFS Accelerator on FPGA-HBM Platform.	FPGA	2021	DBLP DOI BibTeX RDF
1	Dan Werthimer	Are We Alone? Searching for ET with FPGAs.	FPGA	2021	DBLP DOI BibTeX RDF
1	Shulin Zeng, Guohao Dai, Hanbo Sun, Jun Liu, Hongren Zheng, Yusong Wu, Fan Zhang, Xinhao Yang, Yi Cai 0003, Yu Wang 0002, Huazhong Yang	3M-AI: A Multi-task and Multi-core Virtualization Framework for Multi-FPGA AI Systems in the Cloud.	FPGA	2021	DBLP DOI BibTeX RDF
1	Alec Lu, Zhenman Fang, Weihua Liu, Lesley Shannon	Demystifying the Memory System of Modern Datacenter FPGAs for Software Programmers through Microbenchmarking.	FPGA	2021	DBLP DOI BibTeX RDF
1	Prashanth Mohan, Oguz Atli, Onur O. Kibar, V. Mohammed Zackriya, Larry T. Pileggi, Ken Mai	Top-down Physical Design of Soft Embedded FPGA Fabrics.	FPGA	2021	DBLP DOI BibTeX RDF
1	Yicheng Zhang, Rozhin Yasaei, Hao Chen, Zhou Li 0001, Mohammad Abdullah Al Faruque	Stealing Neural Network Structure through Remote FPGA Side-channel Analysis.	FPGA	2021	DBLP DOI BibTeX RDF
1	Yuan Meng, Sanmukh R. Kuppannagari, Rajgopal Kannan, Viktor K. Prasanna	DYNAMAP: Dynamic Algorithm Mapping Framework for Low Latency CNN Inference.	FPGA	2021	DBLP DOI BibTeX RDF
1	Beilei Jiang, Xianwei Cheng, Sihai Tang, Xu Ma 0005, Zhaochen Gu, Hui Zhao 0013, Song Fu	APCNN: Explore Multi-Layer Cooperation for CNN Optimization and Acceleration on FPGA.	FPGA	2021	DBLP DOI BibTeX RDF
1	Dirk Koch, Nguyen Dao, Bea Healy, Jing Yu 0014, Andrew Attwood	FABulous: An Embedded FPGA Framework.	FPGA	2021	DBLP DOI BibTeX RDF
1	Martin Langhammer, Bogdan Pasca 0001	Efficient FPGA Modular Multiplication Implementation.	FPGA	2021	DBLP DOI BibTeX RDF
1	Martin Langhammer, Bogdan Pasca 0001	Folded Integer Multiplication for FPGAs.	FPGA	2021	DBLP DOI BibTeX RDF
1	Seyedramin Rasoulinezhad, David Boland, Philip H. W. Leong	MLBlocks: FPGA Blocks for Machine Learning Applications.	FPGA	2021	DBLP DOI BibTeX RDF
1	Atefeh Sohrabizadeh, Cody Hao Yu, Min Gao 0003, Jason Cong	AutoDSE: Enabling Software Programmers Design Efficient FPGA Accelerators.	FPGA	2021	DBLP DOI BibTeX RDF
1	Martin Langhammer, Eriko Nurvitadhi, Bogdan Pasca 0001, Sergey Gribok	Stratix 10 NX Architecture and Applications.	FPGA	2021	DBLP DOI BibTeX RDF
1	Qianfeng Clark Shen, Jun Zheng, Paul Chow	RIFL: A Reliable Link Layer Network Protocol for FPGA-to-FPGA Communication.	FPGA	2021	DBLP DOI BibTeX RDF
1	Ayokunle Fadamiro, Pouyan Rezaie, Spencer K. Millican, Christopher Harris	Simulating and Evaluating a Quaternary Logic FPGA Based on Floating-gate Memories and Voltage Division.	FPGA	2021	DBLP DOI BibTeX RDF
1	Young-kyu Choi, Yuze Chi, Weikang Qiao, Nikola Samardzic, Jason Cong	HBM Connect: High-Performance HLS Interconnect for FPGA HBM.	FPGA	2021	DBLP DOI BibTeX RDF
1	Mahyar Emami, Endri Bezati, Jörn W. Janneck, James R. Larus	Triggered Scheduling: Efficient Detection of Dataflow Network Idleness on Heterogeneous Systems.	FPGA	2021	DBLP DOI BibTeX RDF
1	Lukas Leuenberger, Dorian Amiet, Tao Wei, Paul Zbinden	An FPGA-based 7-ENOB 600 MSample/s ADC without any External Components.	FPGA	2021	DBLP DOI BibTeX RDF
1	Varun Sharma, Paul Chow	Exploring PGAS Communication for Heterogeneous Clusters with FPGAs.	FPGA	2021	DBLP DOI BibTeX RDF
1	Aman Arora, Samidh Mehta, Vaughn Betz, Lizy K. John	Tensor Slices to the Rescue: Supercharging ML Acceleration on FPGAs.	FPGA	2021	DBLP DOI BibTeX RDF
1	Stefan Nikolic 0001, Francky Catthoor, Zsolt Tokei, Paolo Ienne	Global Is the New Local: FPGA Architecture at 5nm and Beyond.	FPGA	2021	DBLP DOI BibTeX RDF
1	Behnam Ghavami, Seyed Milad Ebrahimi, Zhenman Fang, Lesley Shannon	LEAP: A Deep Learning based Aging-Aware Architecture Exploration Framework for FPGAs.	FPGA	2021	DBLP DOI BibTeX RDF
1	Hamza Khan, Asma Khan, Zainab Khan, Lun Bin Huang, Kun Wang 0005, Lei He 0001	NPE: An FPGA-based Overlay Processor for Natural Language Processing.	FPGA	2021	DBLP DOI BibTeX RDF
1	Philip Harris	Scientific Applications of FPGAs at the LHC.	FPGA	2021	DBLP DOI BibTeX RDF
1	Licheng Guo, Yuze Chi, Jie Wang 0022, Jason Lau, Weikang Qiao, Ecenur Ustun, Zhiru Zhang, Jason Cong	AutoBridge: Coupling Coarse-Grained Floorplanning and Pipelining for High-Frequency HLS Design on Multi-Die FPGAs.	FPGA	2021	DBLP DOI BibTeX RDF
1	Ang Li, David Wentzlaff	PRGA: An Open-Source FPGA Research and Prototyping Framework.	FPGA	2021	DBLP DOI BibTeX RDF
1	Morten B. Petersen, Stefan Nikolic 0001, Mirjana Stojilovic	NetCracker: A Peek into the Routing Architecture of Xilinx 7-Series FPGAs.	FPGA	2021	DBLP DOI BibTeX RDF
1	Gagandeep Singh 0002, Dionysios Diamantopoulos, Juan Gómez-Luna, Sander Stuijk, Onur Mutlu, Henk Corporaal	Modeling FPGA-Based Systems via Few-Shot Learning.	FPGA	2021	DBLP DOI BibTeX RDF
1	Lesley Shannon, Michael Adler (eds.)	FPGA '21: The 2021 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, Virtual Event, USA, February 28 - March 2, 2021	FPGA	2021	DBLP DOI BibTeX RDF
1	Thomas Luinaud, Jeferson Santiago da Silva, J. M. Pierre Langlois, Yvon Savaria	Design Principles for Packet Deparsers on FPGAs.	FPGA	2021	DBLP DOI BibTeX RDF
1	Marco Antonio Merlini, Isamu Poy, Paul Chow	Interactive Debugging at IP Block Interfaces in FPGAs.	FPGA	2021	DBLP DOI BibTeX RDF
1	Sitao Huang, Kun Wu, Hyunmin Jeong, Chengyue Wang, Deming Chen, Wen-Mei Hwu	PyLog: An Algorithm-Centric Python-Based FPGA Programming and Synthesis Flow.	FPGA	2021	DBLP DOI BibTeX RDF
1	Davide Conficconi, Eleonora D'Arnese, Emanuele Del Sozzo, Donatella Sciuto, Marco D. Santambrogio	A Framework for Customizable FPGA-based Image Registration Accelerators.	FPGA	2021	DBLP DOI BibTeX RDF
1	Xinyu Chen 0001, Hongshi Tan, Yao Chen 0008, Bingsheng He, Weng-Fai Wong, Deming Chen	ThunderGP: HLS-based Graph Processing Framework on FPGAs.	FPGA	2021	DBLP DOI BibTeX RDF
1	Ho-Cheung Ng, Izaak Coleman, Shuanglong Liu, Wayne Luk	Reconfigurable Acceleration of Short Read Mapping with Biological Consideration.	FPGA	2021	DBLP DOI BibTeX RDF
1	Jianyi Cheng, John Wickerson, George A. Constantinides	Probabilistic Optimization for High-Level Synthesis.	FPGA	2021	DBLP DOI BibTeX RDF
1	Dillon Huff, Steve Dai, Pat Hanrahan	Clockwork: Resource-Efficient Static Scheduling for Multi-Rate Image Processing Applications on FPGAs.	FPGA	2021	DBLP DOI BibTeX RDF
1	Yichi Zhang 0006, Junhao Pan, Xinheng Liu, Hongzheng Chen, Deming Chen, Zhiru Zhang	FracBNN: Accurate and FPGA-Efficient Binary Neural Networks with Fractional Activations.	FPGA	2021	DBLP DOI BibTeX RDF
1	Alireza Khodamoradi, Kristof Denolf, Ryan Kastner	S2N2: A FPGA Accelerator for Streaming Spiking Neural Networks.	FPGA	2021	DBLP DOI BibTeX RDF
1	Zewei Du, Yann Herklotz, Nadesh Ramanathan, John Wickerson	Fuzzing High-Level Synthesis Tools.	FPGA	2021	DBLP DOI BibTeX RDF
1	Jie Wang 0022, Licheng Guo, Jason Cong	AutoSA: A Polyhedral Compiler for High-Performance Systolic Arrays on FPGA.	FPGA	2021	DBLP DOI BibTeX RDF
1	Peipei Zhou 0001, Jiayi Sheng, Cody Hao Yu, Peng Wei 0004, Jie Wang 0022, Di Wu 0010, Jason Cong	MOCHA: Multinode Cost Optimization in Heterogeneous Clouds with Accelerators.	FPGA	2021	DBLP DOI BibTeX RDF
1	Mustafa S. Gobulukoglu, Colin Drewes, Bill Hunter, Dustin Richmond, Ryan Kastner	Classifying Computations on Multi-Tenant FPGAs.	FPGA	2021	DBLP DOI BibTeX RDF
1	Sahand Salamat, Armin Haj Aboutalebi, Behnam Khaleghi, Joo Hwan Lee, Yang-Seok Ki, Tajana Rosing	NASCENT: Near-Storage Acceleration of Database Sort on SmartSSD.	FPGA	2021	DBLP DOI BibTeX RDF
1	Raymond X. Nijssen	FPGAs will Never be the Same Again: How the Newest FPGA Architectures are Totally Disrupting the Entire FPGA Ecosystem as We Know It.	FPGA	2020	DBLP DOI BibTeX RDF
1	Yufan Zhang, Zhengjie Li, Jian Wang 0036, Jinmei Lai	FPTLOPT: An Automatic Transistor-Level Optimization Tool for GRM FPGA.	FPGA	2020	DBLP DOI BibTeX RDF
1	Licheng Guo, Jason Lau, Yuze Chi, Jie Wang 0022, Cody Hao Yu, Zhe Chen, Zhiru Zhang, Jason Cong	Analysis and Optimization of the Implicit Broadcasts in FPGA HLS to Improve Maximum Frequency.	FPGA	2020	DBLP DOI BibTeX RDF
1	Changsu Kim 0004, Yongwoo Lee 0001, Shinnung Jeong, Wen Wang 0007, Jakub Szefer, Hanjun Kim 0001	Pipeline-aware Logic Deduplication in High-Level Synthesis for Post-Quantum Cryptography Algorithms.	FPGA	2020	DBLP DOI BibTeX RDF
1	Zeinab Seifoori, Seyedeh Sharareh Mirzargar, Mirjana Stojilovic	Closing Leaks: Routing Against Crosstalk Side-Channel Attacks.	FPGA	2020	DBLP DOI BibTeX RDF
1	Tanvir Ahmed, Johannes Maximilian Kühn	Accuracy-Aware Memory Allocation to Mitigate BRAM Errors for Voltage Underscaling on FPGA Overlay Accelerators.	FPGA	2020	DBLP DOI BibTeX RDF
1	Philippos Papaphilippou, Jiuxi Meng, Wayne Luk	High-Performance FPGA Network Switch Architecture.	FPGA	2020	DBLP DOI BibTeX RDF
1	Mahesh A. Iyer	Symbiosis in Action: Reconfigurable Architectures and EDA.	FPGA	2020	DBLP DOI BibTeX RDF
1	Jiantong Jiang, Zeke Wang, Xue Liu, Juan Gómez-Luna, Nan Guan, Qingxu Deng, Wei Zhang 0012, Onur Mutlu	Boyi: A Systematic Framework for Automatically Deciding the Right Execution Model of OpenCL Applications on FPGAs.	FPGA	2020	DBLP DOI BibTeX RDF
1	Ke He, Bo Liu, Yu Zhang, Andrew Ling, Dian Gu	FeCaffe: FPGA-enabled Caffe with OpenCL for Deep Learning Training and Inference on Intel Stratix 10.	FPGA	2020	DBLP DOI BibTeX RDF
1	Kaspar Matas, Tuan La, Nikola Grunchevski, Khoa Dang Pham, Dirk Koch	Invited Tutorial: FPGA Hardware Security for Datacenters and Beyond.	FPGA	2020	DBLP DOI BibTeX RDF
1	Rene Miedema, Georgios Smaragdos, Mario Negrello, Zaid Al-Ars, Matthias Möller, Christos Strydis	Synthesis-Free, Flexible and Fast Hardware Library for Biophysically Plausible Neurosimulations.	FPGA	2020	DBLP DOI BibTeX RDF
1	Jeffrey Chromczak, Mark Wheeler, Charles Chiasson, Dana How, Martin Langhammer, Tim Vanderhoek, Grace Zgheib, Ilya Ganusov	Architectural Enhancements in Intel® Agilex™ FPGAs.	FPGA	2020	DBLP DOI BibTeX RDF
1	Adel Ejjeh, Vikram S. Adve, Rob A. Rutenbar	Studying the Potential of Automatic Optimizations in the Intel FPGA SDK for OpenCL.	FPGA	2020	DBLP DOI BibTeX RDF
1	Pengfei Xu 0011, Xiaofan Zhang 0001, Cong Hao, Yang Zhao 0013, Yongan Zhang, Yue Wang 0036, Chaojian Li, Zetong Guan, Deming Chen, Yingyan Lin	AutoDNNchip: An Automated DNN Chip Predictor and Builder for Both FPGAs and ASICs.	FPGA	2020	DBLP DOI BibTeX RDF

Publications at "FPGA"( http://dblp.L3S.de/Venues/FPGA )