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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 543 occurrences of 346 keywords
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Results
Found 836 publication records. Showing 836 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
32 | Andrew Morton, Wayne M. Loucks |
A hardware/software kernel for system on chip designs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SAC ![In: Proceedings of the 2004 ACM Symposium on Applied Computing (SAC), Nicosia, Cyprus, March 14-17, 2004, pp. 869-875, 2004, ACM, 1-58113-812-1. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
operating systems, SoC, hardware/software codesign |
32 | Yuan C. Chou, John Paul Shen |
Instruction path coprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: 27th International Symposium on Computer Architecture (ISCA 2000), June 10-14, 2000, Vancouver, BC, Canada, pp. 270-281, 2000, IEEE Computer Society, 978-1-58113-232-8. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
32 | Marcel-Catalin Rosu, Karsten Schwan, Richard Fujimoto |
Supporting Parallel Applications on Clusters of Workstations: The Intelligent Network Interface Approach. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPDC ![In: Proceedings of the 6th International Symposium on High Performance Distributed Computing, HPDC '97, Portland, OR, USA, August 5-8, 1997., pp. 159-168, 1997, IEEE Computer Society, 0-8186-8117-9. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
intelligent network interface, performance, parallel architectures, networking architecture, high speed network, parallel applications, clusters of workstations, low overhead |
32 | Johan Stärner, Joakim Adomat, John Furunäs, Lennart Lindh |
Real-Time Scheduling Co-Processor in Hardware for Single and Multiprocessor Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EUROMICRO ![In: 22rd EUROMICRO Conference '96, Beyond 2000: Hardware and Software Design Strategies, September 2-5, 1996, Prague, Czech Republic, pp. 509-512, 1996, IEEE Computer Society, 0-8186-7487-3. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
real-time scheduling co-processor, predictable time behaviour, digital chip, Real-Time Unit, global resources, task synchronisation, multiprocessor systems, timing analysis, processor scheduling |
32 | H. Pottinger, W. Eatherton, J. Kelly, T. Schiefelbein, L. R. Mullin, R. Ziegler |
Hardware Assists for High Performance Computing Using a Mathematics of Arrays. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the Third International ACM Symposium on Field-Programmable Gate Arrays,FPGA 1995, Monterey, California, USA, February 12-14, 1995, pp. 39-45, 1995, ACM, 0-89791-743-X. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
|
29 | Nikos Anastasiadis, Isidoros Sideris, Kiamal Z. Pekmestzi |
A fast multiplier-less edge detection accelerator for FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SAC ![In: Proceedings of the 2010 ACM Symposium on Applied Computing (SAC), Sierre, Switzerland, March 22-26, 2010, pp. 510-515, 2010, ACM, 978-1-60558-639-7. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
FPGA, edge detection, coprocessor, FSL |
29 | Jason Cong, Karthik Gururaj, Guoling Han |
Synthesis of reconfigurable high-performance multicore systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the ACM/SIGDA 17th International Symposium on Field Programmable Gate Arrays, FPGA 2009, Monterey, California, USA, February 22-24, 2009, pp. 201-208, 2009, ACM, 978-1-60558-410-2. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
coprocessor synthesis, reconfigurable high-performance computing, design space exploration |
29 | Peiheng Zhang, Guangming Tan, Guang R. Gao |
Implementation of the Smith-Waterman algorithm on a reconfigurable supercomputing platform. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPRCTA ![In: Proceedings of the 1st international workshop on High-performance reconfigurable computing technology and applications, HPRCTA 2007,held in conjunction with SC07, Reno, Nevada, USA, November 11, 2007, pp. 39-48, 2007, ACM Press, 978-1-59593-894-7. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
reconfigurable supercomputing, FPGA, coprocessor, Smith-Waterman algorithm |
29 | Howon Kim 0001, Mun-Kyu Lee, Dong Kyue Kim, Sang-Kyoon Chung, Kyoil Chung |
Design and Implementation of Crypto Co-processor and Its Application to Security Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CIS (2) ![In: Computational Intelligence and Security, International Conference, CIS 2005, Xi'an, China, December 15-19, 2005, Proceedings, Part II, pp. 1104-1109, 2005, Springer, 3-540-30819-9. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
Crypto Algorithm, Power Consumption, Crypto Coprocessor |
29 | Chenghuai Lu, André L. M. dos Santos, Francisco R. Pimentel |
Implementation of fast RSA key generation on smart cards. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SAC ![In: Proceedings of the 2002 ACM Symposium on Applied Computing (SAC), March 10-14, 2002, Madrid, Spain, pp. 214-220, 2002, ACM, 1-58113-445-2. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
RSA key generation, prime finding, smart card, coprocessor |
29 | M. Ernst, Michael Jung 0002, Felix Madlener, Sorin A. Huss, Rainer Blümel |
A Reconfigurable System on Chip Implementation for Elliptic Curve Cryptography over GF(2n). ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2002, 4th International Workshop, Redwood Shores, CA, USA, August 13-15, 2002, Revised Papers, pp. 381-399, 2002, Springer, 3-540-00409-2. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
$ mathbb {GF}(2^n)$ arithmetic, Karatsuba multiplication, VHDL model generator, coprocessor synthesis, FPGA hardware acceleration, Atmel FPSLIC platform, Elliptic Curve cryptography |
29 | Johann Großschädl |
A Bit-Serial Unified Multiplier Architecture for Finite Fields GF(p) and GF(2m). ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2001, Third International Workshop, Paris, France, May 14-16, 2001, Proceedings, pp. 202-219, 2001, Springer, 3-540-42521-7. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
iterative modulo multiplication, polynomial basis representation, bit-serial multiplier architecture, smart card crypto-coprocessor, Elliptic curve cryptography, finite field arithmetic |
29 | Luis Alejandro Cortés, Petru Eles, Zebo Peng |
Definitions of Equivalence for Transformational Synthesis of Embedded Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICECCS ![In: 6th International Conference on Engineering of Complex Computer Systems (ICECCS 2000), 11-15 September 2000, Tokyo, Japan, pp. 134-142, 2000, IEEE Computer Society, 0-7695-0583-X. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
transformational synthesis, PRES+, explicit notion, Ethernet network coprocessor, embedded systems, Petri nets, computational model, equivalence, embedded systems design, data transformation, formal notation, design cycles, complex task |
27 | Srimat T. Chakradhar, Murugan Sankaradass, Venkata Jakkula, Srihari Cadambi |
A dynamically configurable coprocessor for convolutional neural networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: 37th International Symposium on Computer Architecture (ISCA 2010), June 19-23, 2010, Saint-Malo, France, pp. 247-257, 2010, ACM, 978-1-4503-0053-7. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
dynamic reconfiguration, parallel computer architecture, convolutional neural networks |
27 | Shih-Hao Ou, Tay-Jyi Lin, Xiang Sheng Deng, Zhi Hong Zhuo, Chih-Wei Liu |
Multithreaded coprocessor interface for multi-core multimedia SoC. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 13th Asia South Pacific Design Automation Conference, ASP-DAC 2008, Seoul, Korea, January 21-24, 2008, pp. 115-116, 2008, IEEE, 978-1-4244-1921-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
27 | Reza Ebrahimi Atani, Sattar Mirzakuchaki, Shahabaddin Ebrahimi Atani |
Design and Implementation of an Image CoProcessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICISP ![In: Image and Signal Processing - 3rd International Conference, ICISP 2008, Cherbourg-Octeville, France, July 1-3, 2008, Proceedings, pp. 498-507, 2008, Springer, 978-3-540-69904-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
27 | Chen Huang 0005, Frank Vahid |
Dynamic coprocessor management for FPGA-enhanced compute platforms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2008 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2008, Atlanta, GA, USA, October 19-24, 2008, pp. 71-78, 2008, ACM. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
coprocessing, online algorithms., FPGAs, dynamic optimization, acceleration, runtime configuration |
27 | Kehuai Wu, Jan Madsen |
COSMOS: A System-Level Modelling and Simulation Framework for Coprocessor-Coupled Reconfigurable Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICSAMOS ![In: Proceedings of the 2007 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (IC-SAMOS 2007), Samos, Greece, July 16-19, 2007, pp. 128-136, 2007, IEEE, 1-4244-1058-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
27 | Mohammad Amin Amiri, Reza Ebrahimi Atani, Sattar Mirzakuchaki, Mojdeh Mahdavi |
Design and Implementation of a 50MHZ DXT CoProcessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DSD ![In: Tenth Euromicro Conference on Digital System Design: Architectures, Methods and Tools (DSD 2007), 29-31 August 2007, Lübeck, Germany, pp. 43-50, 2007, IEEE Computer Society, 0-7695-2978-X. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
27 | Carsten Albrecht, Jürgen Foag, Roman Koch, Erik Maehle |
DynaCORE - A Dynamically Reconfigurable Coprocessor Architecture for Network Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PDP ![In: 14th Euromicro International Conference on Parallel, Distributed and Network-Based Processing (PDP 2006), 15-17 February 2006, Montbeliard-Sochaux, France, pp. 101-108, 2006, IEEE Computer Society, 0-7695-2513-X. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
27 | Xue-mi Zhao, Zhiying Wang 0003, Hongyi Lu, Kui Dai |
A 6.35Mbps 1024-bit RSA crypto coprocessor in a 0.18um CMOS technology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-SoC ![In: IFIP VLSI-SoC 2006, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Nice, France, 16-18 October 2006, pp. 216-221, 2006, IEEE. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
27 | Gianmarco Angius, Cristian Manca, Danilo Pani, Luigi Raffo |
Cooperative VLSI Tiled Architectures: Stigmergy in a Swarm Coprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ANTS Workshop ![In: Ant Colony Optimization and Swarm Intelligence, 5th International Workshop, ANTS 2006, Brussels, Belgium, September 4-7, 2006, Proceedings, pp. 396-403, 2006, Springer, 3-540-38482-0. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
27 | Guerric Meurice de Dormale, Renaud Ambroise, David Bol, Jean-Jacques Quisquater, Jean-Didier Legat |
Low-Cost Elliptic Curve Digital Signature Coprocessor for Smart Cards. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASAP ![In: 2006 IEEE International Conference on Application-Specific Systems, Architecture and Processors (ASAP 2006), 11-13 September 2006, Steamboat Springs, Colorado, USA, pp. 347-353, 2006, IEEE Computer Society, 0-7695-2682-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
27 | Antonio Di Stefano, G. Costantino Giaconia |
An FPGA-Based Adaptive Fuzzy Coprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IWANN ![In: Computational Intelligence and Bioinspired Systems, 8th International Work-Conference on Artificial Neural Networks, IWANN 2005, Vilanova i la Geltrú, Barcelona, Spain, June 8-10, 2005, Proceedings, pp. 590-597, 2005, Springer, 3-540-26208-3. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
27 | Walter Stechele, L. Alvado Cárcel, Stephan Herrmann 0002, J. Lidón Simón |
A Coprocessor for Accelerating Visual Information Processing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2005 Design, Automation and Test in Europe Conference and Exposition (DATE 2005), 7-11 March 2005, Munich, Germany, pp. 26-31, 2005, IEEE Computer Society, 0-7695-2288-2. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
27 | Kuo-Kun Tseng, Ying-Dar Lin, Tsern-Huei Lee, Yuan-Cheng Lai |
A Parallel Automaton String Matching with Pre-Hashing and Root-Indexing Techniques for Content Filtering Coprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASAP ![In: 16th IEEE International Conference on Application-Specific Systems, Architectures, and Processors (ASAP 2005), 23-25 July 2005, Samos, Greece, pp. 113-118, 2005, IEEE Computer Society, 0-7695-2407-9. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
27 | Elena Trichina, Tymur Korkishko, Kyung-Hee Lee |
Small Size, Low Power, Side Channel-Immune AES Coprocessor: Design and Synthesis Results. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AES Conference ![In: Advanced Encryption Standard - AES, 4th International Conference, AES 2004, Bonn, Germany, May 10-12, 2004, Revised Selected and Invited Papers, pp. 113-127, 2004, Springer, 3-540-26557-0. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
27 | Harald Aigner, Holger Bock, Markus Hütter, Johannes Wolkerstorfer |
A Low-Cost ECC Coprocessor for Smartcards. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2004: 6th International Workshop Cambridge, MA, USA, August 11-13, 2004. Proceedings, pp. 107-118, 2004, Springer, 3-540-22666-4. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
multiplicative inverse, digital signature, Elliptic Curve Cryptography (ECC), hardware implementation |
27 | María Dolores Valdés, María José Moure, Camilo Quintáns, Enrique Mandado |
A Data Acquisition Reconfigurable Coprocessor for Virtual Instrumentation Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: Field Programmable Logic and Application, 13th International Conference, FPL 2003, Lisbon, Portugal, September 1-3, 2003, Proceedings, pp. 1107-1110, 2003, Springer, 3-540-40822-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
27 | Giovanni Danese, Ivo De Lotto, Francesco Leporati, Alvaro Spelgatti |
FPGA Based Coprocessor to Calculate the Energy of Dipolar System. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PDP ![In: 10th Euromicro Workshop on Parallel, Distributed and Network-Based Processing (PDP 2002), 9-11 January 2002, Canary Islands, Spain, pp. 227-234, 2002, IEEE Computer Society, 0-7695-1444-8. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
27 | Abbes Amira, Ahmed Bouridane, Peter Milligan, Faycal Bensaali |
Custom Coprocessor Based Matrix Algorithms for Image and Signal Processing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: Field-Programmable Logic and Applications, Reconfigurable Computing Is Going Mainstream, 12th International Conference, FPL 2002, Montpellier, France, September 2-4, 2002, Proceedings, pp. 730-739, 2002, Springer, 3-540-44108-5. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
27 | Martijn J. Rutten, Jos T. J. van Eijndhoven, Evert-Jan D. Pol |
Design of multi-tasking coprocessor control for Eclipse. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CODES ![In: Proceedings of the Tenth International Symposium on Hardware/Software Codesign, CODES 2002, Estes Park, Colorado, USA, May 6-8, 2002, pp. 139-144, 2002, ACM, 1-58113-542-4. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
27 | Mokhtar Nibouche, Omar Nibouche, Ahmed Bouridane, Danny Crookes |
An FPGA-based wavelet transforms coprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICIP (3) ![In: Proceedings of the 2001 International Conference on Image Processing, ICIP 2001, Thessaloniki, Greece, October 7-10, 2001, pp. 194-197, 2001, IEEE, 0-7803-6725-1. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
27 | Cheol-Ho Jeong, Woo-Chan Park, Tack-Don Han, Moon Key Lee, Sang-Woo Kim |
In-Order Issue Out-of-Order Execution Floating-Point Coprocessor for CalmRISC32. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Symposium on Computer Arithmetic ![In: 15th IEEE Symposium on Computer Arithmetic (Arith-15 2001), 11-17 June 2001, Vail, CO, USA, pp. 195-, 2001, IEEE Computer Society, 0-7695-1150-3. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
27 | Nick Howgrave-Graham, Joan G. Dyer, Rosario Gennaro |
Pseudo-random Number Generation on the IBM 4758 Secure Crypto Coprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2001, Third International Workshop, Paris, France, May 14-16, 2001, Proceedings, pp. 93-102, 2001, Springer, 3-540-42521-7. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
27 | Gülbin Ezer |
Xtensa with User Defined DSP Coprocessor Microarchitectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: Proceedings of the IEEE International Conference On Computer Design: VLSI In Computers & Processors, ICCD '00, Austin, Texas, USA, September 17-20, 2000, pp. 335-342, 2000, IEEE Computer Society, 0-7695-0801-4. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
27 | Jae Wook Chung, Sang Gyoo Sim, Pil Joong Lee |
Fast Implementation of Elliptic Curve Defined over GF(pm) on CalmRISC with MAC2424 Coprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2000, Second International Workshop, Worcester, MA, USA, August 17-18, 2000, Proceedings, pp. 57-70, 2000, Springer, 3-540-41455-X. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
27 | Sean W. Smith, Elaine R. Palmer, Steve H. Weingart |
Using a High-Performance, Programmable Secure Coprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Financial Cryptography ![In: Financial Cryptography, Second International Conference, FC'98, Anguilla, British West Indies, February 23-25, 1998, Proceedings, pp. 73-89, 1998, Springer, 3-540-64951-4. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
27 | Alexandre F. Tenca, Milos D. Ercegovac |
A Variable Long-Precision Arithmetic Unit Design for Reconfigurable Coprocessor Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FCCM ![In: 6th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM '98), 15-17 April 1998, Napa Valley, CA, USA, pp. 216-225, 1998, IEEE Computer Society, 0-8186-8900-5. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
long-precision, computer arithmetic, reconfigurable architecture |
27 | Jason Cong, John Peck |
On acceleration of the check tautology logic synthesis algorithm using an FPGA-based reconfigurable coprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FCCM ![In: 5th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM '97), 16-18 April 1997, Napa Valley, CA, USA, pp. 246-248, 1997, IEEE Computer Society, 0-8186-8159-4. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
27 | Danny Crookes, T. John Brown, Y. Dong, Gareth McAleese, Philip J. Morrow, D. K. Roantree, Ivor T. A. Spence |
A Self-Optimising Coprocessor Model for Portable Image Processing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Euro-Par, Vol. II ![In: Euro-Par '96 Parallel Processing, Second International Euro-Par Conference, Lyon, France, August 26-29, 1996, Proceedings, Volume II, pp. 213-216, 1996, Springer, 3-540-61627-6. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
|
27 | Francisco Castillo, Jose A. García 0003, Juan Manuel Moreno, Joan Cabestany |
A Coprocessor Card for Fast Neural Network Emulation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IWANN ![In: From Natural to Artificial Neural Computation, International Workshop on Artificial Neural Networks, IWANN '95, Malaga-Torremolinos, Spain, June 7-9, 1995, Proceedings, pp. 752-760, 1995, Springer, 3-540-59497-3. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
|
27 | Jurij Silc, Borut Robic |
Efficient Run-Time Program Allocation on a Parallel Coprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Euro-Par ![In: Euro-Par '95 Parallel Processing, First International Euro-Par Conference, Stockholm, Sweden, August 29-31, 1995, Proceedings, pp. 715-718, 1995, Springer, 3-540-60247-X. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
|
27 | Javier Moran Carrera, Eduardo Juárez Martínez, S. A. Fernandez, J. M. M. Chaus |
Architecture of a FPGA-based coprocessor: the PAR-1. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FCCM ![In: 3rd IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM '95), 19-21 April 1995, Napa Valley, CA, USA, pp. 20-31, 1995, IEEE Computer Society, 0-8186-7086-X. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
|
27 | David W. Matula |
Design of a highly parallel IEEE standard floating point unit: the Cyrix 83D87 coprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SPDP ![In: Proceedings of the Second IEEE Symposium on Parallel and Distributed Processing, SPDP 1990, Dallas, Texas, USA, December 9-13, 1990., pp. 334, 1990, IEEE Computer Society, 0-8186-2087-0. The full citation details ...](Pics/full.jpeg) |
1990 |
DBLP DOI BibTeX RDF |
|
27 | Jiun-Ming Hsu, Prithviraj Banerjee |
A message passing coprocessor for distributed memory multicomputers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SC ![In: Proceedings Supercomputing '90, New York, NY, USA, November 12-16, 1990, pp. 720-729, 1990, IEEE Computer Society, 0-89791-412-0. The full citation details ...](Pics/full.jpeg) |
1990 |
DBLP DOI BibTeX RDF |
|
27 | Christos J. Georgiou, S. L. Palmer, Philip L. Rosenfeld |
An Experimental Coprocessor for Implementing Persistant Objects on an IBM 4381. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASPLOS ![In: Proceedings of the Second International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS II), Palo Alto, California, USA, October 5-8, 1987., pp. 84-87, 1987, ACM Press, 0-8186-0805-6. The full citation details ...](Pics/full.jpeg) |
1987 |
DBLP DOI BibTeX RDF |
|
21 | Alexander Klimm, Oliver Sander, Jürgen Becker 0001 |
A MicroBlaze specific co-processor for real-time hyperelliptic curve cryptography on Xilinx FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 23rd IEEE International Symposium on Parallel and Distributed Processing, IPDPS 2009, Rome, Italy, May 23-29, 2009, pp. 1-8, 2009, IEEE. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
21 | Hendrik Tews, Bart Jacobs 0001 |
Performance Issues of Selective Disclosure and Blinded Issuing Protocols on Java Card. ![Search on Bibsonomy](Pics/bibsonomy.png) |
WISTP ![In: Information Security Theory and Practice. Smart Devices, Pervasive Systems, and Ubiquitous Networks, Third IFIP WG 11.2 International Workshop, WISTP 2009, Brussels, Belgium, September 1-4, 2009, Proceedings, pp. 95-111, 2009, Springer, 978-3-642-03943-0. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
selective disclosure, blinded issuing, performance, Java Card |
21 | Jean-Luc Beuchat, Jérémie Detrey, Nicolas Estibals, Eiji Okamoto, Francisco Rodríguez-Henríquez |
Hardware Accelerator for the Tate Pairing in Characteristic Three Based on Karatsuba-Ofman Multipliers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2009, 11th International Workshop, Lausanne, Switzerland, September 6-9, 2009, Proceedings, pp. 225-239, 2009, Springer, 978-3-642-04137-2. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
Karatsuba-Ofman multiplier, FPGA, elliptic curve, hardware accelerator, Tate pairing, finite field arithmetic, ? T pairing |
21 | Eric Quinnell, Earl E. Swartzlander Jr., Carl Lemonds |
Bridge Floating-Point Fused Multiply-Add Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 16(12), pp. 1727-1731, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
21 | Hao Che, Zhijun Wang 0001, Kai Zheng 0003, Bin Liu 0001 |
DRES: Dynamic Range Encoding Scheme for TCAM Coprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 57(7), pp. 902-915, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Composite structures, Storage/repositories, Network repositories/data mining/backup, Associative memories |
21 | Volker Hampel, Peter Sobe, Erik Maehle |
Designing coprocessors for hybrid compute systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 22nd IEEE International Symposium on Parallel and Distributed Processing, IPDPS 2008, Miami, Florida USA, April 14-18, 2008, pp. 1-8, 2008, IEEE. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
21 | Hanno Scharwächter, David Kammler, Andreas Wieferink, Manuel Hohenauer, Kingshuk Karuri, Jianjiang Ceng, Rainer Leupers, Gerd Ascheid, Heinrich Meyr |
ASIP architecture exploration for efficient IPSec encryption: A case study. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Embed. Comput. Syst. ![In: ACM Trans. Embed. Comput. Syst. 6(2), pp. 12, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
computer-aided design, ADL, ASIP, IPSec |
21 | Yung-Tai Hsu, Yuan-Jin Wen, Sheng-De Wang |
Embedded Hardware/Software Design and Cosimulation using User Mode Linux and SystemC. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICPP Workshops ![In: 2007 International Conference on Parallel Processing Workshops (ICPP Workshops 2007), 10-14 September 2007, Xi-An, China, pp. 17, 2007, IEEE Computer Society, 978-0-7695-2934-9. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
21 | Lei Gao, Stefan Kraemer, Rainer Leupers, Gerd Ascheid, Heinrich Meyr |
A fast and generic hybrid simulation approach using C virtual machine. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2007 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2007, Salzburg, Austria, September 30 - October 3, 2007, pp. 3-12, 2007, ACM. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
simulation, virtual machine, debugging |
21 | Miljan Vuletic, Laura Pozzi, Paolo Ienne |
Virtual memory window for application-specific reconfigurable coprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 14(8), pp. 910-915, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
21 | Rakesh Agrawal 0001, Dmitri Asonov, Murat Kantarcioglu, Yaping Li |
Sovereign Joins. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICDE ![In: Proceedings of the 22nd International Conference on Data Engineering, ICDE 2006, 3-8 April 2006, Atlanta, GA, USA, pp. 26, 2006, IEEE Computer Society, 0-7695-2570-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
21 | María José Moure, María Dolores Valdés, Pablo Rodiz, Loreto Rodríguez-Pardo, José Fariña Rodríguez |
An FPGA-Based System on Chip for the Measurement of QCM Sensors Resolution. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: Proceedings of the 2006 International Conference on Field Programmable Logic and Applications (FPL), Madrid, Spain, August 28-30, 2006, pp. 1-4, 2006, IEEE, 1-4244-0312-X. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
21 | Guido Bertoni, Luca Breveglieri, Matteo Venturi |
ECC Hardware Coprocessors for 8-bit Systems and Power Consumption Considerations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITNG ![In: Third International Conference on Information Technology: New Generations (ITNG 2006), 10-12 April 2006, Las Vegas, Nevada, USA, pp. 573-574, 2006, IEEE Computer Society, 0-7695-2497-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
21 | Heather Quinn, Debayan Bhaduri, Christof Teuscher, Paul S. Graham, Maya B. Gokhale |
The STAR-C Truth: Analyzing Reconfigurable Supercomputing Reliability. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FCCM ![In: 14th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2006), 24-26 April 2006, Napa, CA, USA, Proceedings, pp. 323-324, 2006, IEEE Computer Society, 0-7695-2661-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
21 | Jianjun Guo, Kui Dai, Zhiying Wang 0003 |
A Heterogeneous Multi-core Processor Architecture for High Performance Computing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asia-Pacific Computer Systems Architecture Conference ![In: Advances in Computer Systems Architecture, 11th Asia-Pacific Conference, ACSAC 2006, Shanghai, China, September 6-8, 2006, Proceedings, pp. 359-365, 2006, Springer, 3-540-40056-7. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
TTA, SoC, heterogeneous, multi-core |
21 | Ramachandran Pradeep, S. Vinay, Sanjay Burman, V. Kamakoti 0001 |
FPGA based Agile Algorithm-On-Demand Co-Processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2005 Design, Automation and Test in Europe Conference and Exposition (DATE 2005), 7-11 March 2005, Munich, Germany, pp. 82-83, 2005, IEEE Computer Society, 0-7695-2288-2. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
21 | Akihito Takahashi, Stanislav Sedukhin |
Parallel Blocked Algorithm for Solving the Algebraic Path Problem on a Matrix Processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCC ![In: High Performance Computing and Communications, First International Conference, HPCC 2005, Sorrento, Italy, September 21-23, 2005, Proceedings, pp. 786-795, 2005, Springer, 3-540-29031-1. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
21 | Wido Kruijtzer, Winfried Gehrke, Víctor Reyes, Ghiath Alkadi, Thomas Hinz, Jörn Jachalsky, Bruno Steux |
The design of a smart imaging core for automotive and consumer applications: a case study. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CODES+ISSS ![In: Proceedings of the 3rd IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2005, Jersey City, NJ, USA, September 19-21, 2005, pp. 124-129, 2005, ACM, 1-59593-161-9. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
image processing, system level design |
21 | Luiza de Macedo Mourelle, Nadia Nedjah |
Hardware for Modular Exponentiation Suitable for Smart Cards. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICESS ![In: Embedded Software and Systems, First International Conference, ICESS 2004, Hangzhou, China, December 9-10, 2004, Revised Selected Papers, pp. 196-202, 2004, Springer, 3-540-28128-2. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
21 | Hanno Scharwächter, David Kammler, Andreas Wieferink, Manuel Hohenauer, Kingshuk Karuri, Jianjiang Ceng, Rainer Leupers, Gerd Ascheid, Heinrich Meyr |
ASIP Architecture Exploration for Efficient Ipsec Encryption: A Case Study. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SCOPES ![In: Software and Compilers for Embedded Systems, 8th International Workshop, SCOPES 2004, Amsterdam, The Netherlands, September 2-3, 2004, Proceedings, pp. 33-46, 2004, Springer, 3-540-23035-1. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
21 | Emanuele Lattanzi, Aman Gayasen, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Luca Benini, Alessandro Bogliolo |
Improving Java Performance Using Dynamic Method Migration on FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 18th International Parallel and Distributed Processing Symposium (IPDPS 2004), CD-ROM / Abstracts Proceedings, 26-30 April 2004, Santa Fe, New Mexico, USA, 2004, IEEE Computer Society, 0-7695-2132-0. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
21 | Xuejun Liang, Jack S. N. Jean |
Mapping of generalized template matching onto reconfigurable computers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 11(3), pp. 485-498, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
21 | Raj Krishnamurthy, Karsten Schwan, Richard West, Marcel-Catalin Rosu |
On Network CoProcessors for Scalable, Predictable Media Services. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 14(7), pp. 655-670, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
Cluster machines, quality of service, real-time systems, embedded systems, operating systems, data streaming, packet scheduling, multimedia services |
21 | Giovanni Danese, Ivo De Lotto, Francesco Leporati, M. Scaricabarozzi, Alvaro Spelgatti |
An Accelerator for Double Precision Floating Point Operations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PDP ![In: 11th Euromicro Workshop on Parallel, Distributed and Network-Based Processing (PDP 2003), 5-7 February 2003, Genova, Italy, pp. 57-, 2003, IEEE Computer Society, 0-7695-1875-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
21 | Rama Sangireddy, Huesung Kim, Arun K. Somani |
Timing Issues of Operating Mode Switch in High Performance Reconfigurable Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HiPC ![In: High Performance Computing - HiPC 2003, 10th International Conference, Hyderabad, India, December 17-20, 2003, Proceedings, pp. 23-33, 2003, Springer, 3-540-20626-4. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
21 | Martijn J. Rutten, Jos T. J. van Eijndhoven, Evert-Jan D. Pol |
Robust Media Processing in a Flexible and Cost-Effective Network of Multi-Tasking Coprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ECRTS ![In: 14th Euromicro Conference on Real-Time Systems (ECRTS 2002), 19-21 June 2002, Vienna, Austria, Proceedings, pp. 223-230, 2002, IEEE Computer Society, 0-7695-1665-3. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
21 | Marcus Bednara, M. Daldrup, Jürgen Teich, Joachim von zur Gathen, Jamshid Shokrollahi |
Tradeoff analysis of FPGA based elliptic curve cryptography. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (5) ![In: Proceedings of the 2002 International Symposium on Circuits and Systems, ISCAS 2002, Scottsdale, Arizona, USA, May 26-29, 2002, pp. 797-800, 2002, IEEE, 0-7803-7448-7. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
21 | Philip Heng Wai Leong, Chiu-Wing Sham, W. C. Wong, H. Y. Wong, Wing Seung Yuen, Monk-Ping Leong |
A bitstream reconfigurable FPGA implementation of the WSAT algorithm. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 9(1), pp. 197-201, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
21 | David W. Kravitz, Kim-Ee Yeoh, Nicol So |
Secure Open Systems for Protecting Privacy and Digital Services. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Digital Rights Management Workshop ![In: Security and Privacy in Digital Rights Management, ACM CCS-8 Workshop DRM 2001, Philadelphia, PA, USA, November 5, 2001, Revised Papers, pp. 106-125, 2001, Springer, 3-540-43677-4. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
21 | K. A. Jung, Y. S. Lee, H. S. Yang, W. S. Yang, J. H. Kim, S. H. Lee, B. H. Kang |
An integrated H.263 video CODEC with protocol processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (5) ![In: Proceedings of the 2001 International Symposium on Circuits and Systems, ISCAS 2001, Sydney, Australia, May 6-9, 2001, pp. 283-286, 2001, IEEE, 0-7803-6685-9. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
21 | Marcel-Catalin Rosu, Karsten Schwan |
Support for Recoverable Memory in the Distributed Virtual Communication Machine. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: Proceedings of the 14th International Parallel & Distributed Processing Symposium (IPDPS'00), Cancun, Mexico, May 1-5, 2000, pp. 191-198, 2000, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
recoverable memory, virtual machine, extensibility, communication architecture |
21 | Jörg Hilgenstock, Klaus Herrmann 0002, Jan Otterstedt, Dirk Niggemeyer, Peter Pirsch |
A Video Signal Processor for MIMD Multiprocessing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 35th Conference on Design Automation, Moscone center, San Francico, California, USA, June 15-19, 1998., pp. 50-55, 1998, ACM Press, 0-89791-964-5. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
21 | Kumar N. Ganapathy, Benjamin W. Wah, Chien-Wei Li |
Designing a Scalable Processor Array for Recurrent Computations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 8(8), pp. 840-856, 1997. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
Access unit, affine dependencies, area index, clock-rate reduction, multimesh graph, uniform dependencies, scheduling, partitioning, memory bandwidth, processor array, dependence graph |
21 | Naren Narasimhan, Vinoo Srinivasan, Madhavi Vootukuru, Jeffrey Walrath, Sriram Govindarajan, Ranga Vemuri |
Rapid Prototyping of Reconfigurable Coprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASAP ![In: 1996 International Conference on Application-Specific Systems, Architectures, and Processors (ASAP '96), August 19-23, 1996, Chicago, IL , USA, pp. 303-312, 1996, IEEE Computer Society, 0-8186-7542-X. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
Prototyping, High-level Synthesis, JPEG, Coprocessors, Hardware-Software Co-design, Software Profiling |
21 | H. A. Xie, Kevin E. Forward, K. M. Adams, D. Leask |
An SBus Monitor Board. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the Third International ACM Symposium on Field-Programmable Gate Arrays,FPGA 1995, Monterey, California, USA, February 12-14, 1995, pp. 160-166, 1995, ACM, 0-89791-743-X. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
|
21 | Gordon B. Agnew, Ronald C. Mullin, Scott A. Vanstone |
On the Development of a Fast Elliptic Curve Cryptosystem. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EUROCRYPT ![In: Advances in Cryptology - EUROCRYPT '92, Workshop on the Theory and Application of of Cryptographic Techniques, Balatonfüred, Hungary, May 24-28, 1992, Proceedings, pp. 482-487, 1992, Springer, 3-540-56413-6. The full citation details ...](Pics/full.jpeg) |
1992 |
DBLP DOI BibTeX RDF |
|
21 | Joan Daemen, René Govaerts, Joos Vandewalle |
A Hardware Design Model for Cryptographic Algorithms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ESORICS ![In: Computer Security - ESORICS 92, Second European Symposium on Research in Computer Security, Toulouse, France, November 23-25, 1992, Proceedings, pp. 419-434, 1992, Springer, 3-540-56246-X. The full citation details ...](Pics/full.jpeg) |
1992 |
DBLP DOI BibTeX RDF |
Hardware Cryptography, Pseudorandom Sequence Generators, Stream Ciphers, Block Ciphers, Cryptographic Hash Functions |
21 | George I. Davida, Frank B. Dancs |
A Crypto-Engine. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CRYPTO ![In: Advances in Cryptology - CRYPTO '87, A Conference on the Theory and Applications of Cryptographic Techniques, Santa Barbara, California, USA, August 16-20, 1987, Proceedings, pp. 257-268, 1987, Springer, 3-540-18796-0. The full citation details ...](Pics/full.jpeg) |
1987 |
DBLP DOI BibTeX RDF |
|
18 | Sumit Ahuja, Wei Zhang, Avinash Lakshminarayana, Sandeep K. Shukla |
A Methodology for Power Aware High-Level Synthesis of Co-processors from Software Algorithms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: VLSI Design 2010: 23rd International Conference on VLSI Design, 9th International Conference on Embedded Systems, Bangalore, India, 3-7 January 2010, pp. 282-287, 2010, IEEE Computer Society, 978-0-7695-3928-7. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
C2R, Hardware Coprocessor, Software Algorithms, High Level Synthesis, Clock-gating, Power Reduction |
18 | Klaus Kursawe, Dries Schellekens |
Flexible muTPMs through disembedding. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AsiaCCS ![In: Proceedings of the 2009 ACM Symposium on Information, Computer and Communications Security, ASIACCS 2009, Sydney, Australia, March 10-12, 2009, pp. 116-124, 2009, ACM, 978-1-60558-394-5. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
mobile trusted module, secure coprocessor, trusted computing, trusted platform module |
18 | Abdulhadi Shoufan, Sorin A. Huss, Oliver Kelm, Sebastian Schipp |
A Novel Rekeying Message Authentication Procedure Based on Winternitz OTS and Reconfigurable Hardware Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ReConFig ![In: ReConFig'08: 2008 International Conference on Reconfigurable Computing and FPGAs, 3-5 December 2008, Cancun, Mexico, Proceedings, pp. 301-306, 2008, IEEE Computer Society, 978-0-7695-3474-9. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Winternitz, Security, FPGA, Key Management, Coprocessor, Rekeying |
18 | Nikolaos Vassiliadis, George Theodoridis, Spiridon Nikolaidis 0001 |
ARISE Machines: Extending Processors with Hybrid Accelerators. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ARC ![In: Reconfigurable Computing: Architectures, Tools and Applications, 4th International Workshop, ARC 2008, London, UK, March 26-28, 2008. Proceedings, pp. 195-206, 2008, Springer, 978-3-540-78609-2. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
reconfigurable instruction set processor, custom unit, FPGA, coprocessor |
18 | Chung-Ping Young, Chung-Chu Chia, Liang-Bi Chen, Ing-Jer Huang |
NCPA: A Scheduling Algorithm for Multi-cipher and Multi-mode Reconfigurable Cryptosystem. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IIH-MSP ![In: 4th International Conference on Intelligent Information Hiding and Multimedia Signal Processing (IIH-MSP 2008), Harbin, China, 15-17 August 2008, Proceedings, pp. 1356-1359, 2008, IEEE Computer Society, 978-0-7695-3278-3. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
multiple cipher, scheduling algorithm, Cryptosystem, operation mode, crypto-coprocessor |
18 | Masayuki Yoshino, Katsuyuki Okeya, Camille Vuillaume |
Double-Size Bipartite Modular Multiplication. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACISP ![In: Information Security and Privacy, 12th Australasian Conference, ACISP 2007, Townsville, Australia, July 2-4, 2007, Proceedings, pp. 230-244, 2007, Springer, 978-3-540-73457-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
bipartite modular multiplication, double-size technique, RSA, smartcard, crypto-coprocessor |
18 | Dong-Ho Lee, Jong-Soo Oh |
Multi-segment GF(2m) multiplication and its application to elliptic curve cryptography. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 17th ACM Great Lakes Symposium on VLSI 2007, Stresa, Lago Maggiore, Italy, March 11-13, 2007, pp. 546-551, 2007, ACM, 978-1-59593-605-9. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
elliptic curve scalar multiplication, FPGA, elliptic curve cryptography (ECC), coprocessor, finite field multiplication |
18 | Nele Mentens, Kazuo Sakiyama, Bart Preneel, Ingrid Verbauwhede |
Efficient pipelining for modular multiplication architectures in prime fields. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 17th ACM Great Lakes Symposium on VLSI 2007, Stresa, Lago Maggiore, Italy, March 11-13, 2007, pp. 534-539, 2007, ACM, 978-1-59593-605-9. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
public key coprocessor, FPGA, cryptography, montgomery multiplication |
18 | Ying-Dar Lin, Kuo-Kun Tseng, Chen-Chou Hung, Yuan-Cheng Lai |
Scalable Automaton Matching for High-Speed Deep Content Inspection. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AINA Workshops (1) ![In: 21st International Conference on Advanced Information Networking and Applications (AINA 2007), Workshops Proceedings, Volume 1, May 21-23, 2007, Niagara Falls, Canada, pp. 858-863, 2007, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
String matching, Hashing, Finite automata, Coprocessor, Content filtering |
18 | Alexander Iliev, Sean W. Smith |
Protecting Client Privacy with Trusted Computing at the Server. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Secur. Priv. ![In: IEEE Secur. Priv. 3(2), pp. 20-28, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
Secure coprocessor, Oblivious RAM, network traffic archival, prototype, PKI, Private Information Retrieval |
18 | Ali Skaf, Alain Guyot |
SAGA: the first general-purpose on-line arithmetic co-processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 8th International Conference on VLSI Design (VLSI Design 1995), 4-7 January 1995, New Delhi, India, pp. 146-149, 1995, IEEE Computer Society, 0-8186-6905-5. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
general-purpose co-processor, online arithmetic coprocessor, VLSI realisation, BKM algorithm, complex logarithm function, complex exponential function, VLSI, arithmetic, coprocessors, CMOS digital integrated circuits, redundant number systems, CMOS IC, SAGA |
18 | Herman Lam, Chiang Lee, Stanley Y. W. Su |
A Special Function Unit for Database Operations (SFU-DB): Design and Performance Evaluation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 40(3), pp. 263-275, 1991. The full citation details ...](Pics/full.jpeg) |
1991 |
DBLP DOI BibTeX RDF |
special function unit, SFU-DB, hardware sorting module, automatic retrieval memory, nonnumeric operations, host CPU, special processing unit, distribution-based sort algorithm, main memory size, fundamental sort algorithm, CMOS gate arrays, performance evaluation, performance evaluation, parallel algorithms, computational complexity, database management systems, sorting, execution time, coprocessor, special purpose computers, fabrication, worst case complexity, Turbo Pascal, parallel processing system, duplicates elimination, database operations, set intersection, set union, set difference, relational join |
18 | David R. Smith, Jing C. Lin |
The Tree-Match Chip. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 40(5), pp. 629-639, 1991. The full citation details ...](Pics/full.jpeg) |
1991 |
DBLP DOI BibTeX RDF |
subject stream scan, multiple chip cascading, tree-match chip, chip organization, one-bit-wide stacks, functional language processing, 40-pin standard frame, satellite computers, parallel algorithms, VLSI, circuit layout CAD, CMOS integrated circuits, CMOS technology, shift registers, coprocessor, content-addressed memory, tree-pattern-matching |
18 | Sudhir Ahuja, Nicholas Carriero, David Gelernter, Venkatesh Krishnaswamy |
Matching Language and Hardware for Parallel Computation in the Linda Machine. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 37(8), pp. 921-929, 1988. The full citation details ...](Pics/full.jpeg) |
1988 |
DBLP DOI BibTeX RDF |
Linda Machine, Linda parallel programming environment, logically shared associative memory, high-level shared-memory abstraction, nonshared-memory architecture, special-purpose communication network, Linda coprocessor, performance evaluation, parallel programming, parallel computer, protocols, protocols, programming environments, parallel machines, tuple space |
16 | Rathindra Nath Biswas, Anurup Saha, Swarup Kumar Mitra, Mrinal Kanti Naskar |
Design and implementation of anchor coprocessor architecture for wireless node localization applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Peer Peer Netw. Appl. ![In: Peer Peer Netw. Appl. 17(2), pp. 961-984, March 2024. The full citation details ...](Pics/full.jpeg) |
2024 |
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