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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 33 occurrences of 32 keywords
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Results
Found 134 publication records. Showing 134 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
23 | Detlef Weber, F. Höhnsdorf, A. Hausmann, A. Klipp, Z. Stavreva, J. Herrmann, L. Bauch, M. Junack, H. Neef, M. Nichterwitz, S. Finsterbusch |
Impact of substituting SiO2 ILD by low k materials into AlCu RIE metallization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. Reliab. ![In: Microelectron. Reliab. 41(7), pp. 1081-1083, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
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23 | David Dalleau, Kirsten Weide-Zaage |
Three-Dimensional Voids Simulation in chip Metallization Structures: a Contribution to Reliability Evaluation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. Reliab. ![In: Microelectron. Reliab. 41(9-10), pp. 1625-1630, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
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23 | Shatil Haque, Guo-Quan Lu |
Effects of device passivation materials on solderable metallization of IGBTs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. Reliab. ![In: Microelectron. Reliab. 41(5), pp. 639-647, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
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23 | Keith K. H. Wong, Suryanarayana Kaja, Patrick W. DeHaven |
Metallization by plating for high-performance multichip modules. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IBM J. Res. Dev. ![In: IBM J. Res. Dev. 42(5), pp. 587-596, 1998. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
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23 | Evan G. Colgan, Mitsuru Uda |
On-chip metallization layers for reflective light valves. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IBM J. Res. Dev. ![In: IBM J. Res. Dev. 42(3), pp. 339-346, 1998. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
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23 | Kang-Wook Lee 0003, Alfred Viehbeck |
Wet-process surface modification of dielectric polymers: Adhesion enhancement and metallization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IBM J. Res. Dev. ![In: IBM J. Res. Dev. 38(4), pp. 457-474, 1994. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
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23 | William L. Guthrie, William J. Patrick, Ernest Levine, Harris C. Jones, Ebrahim A. Mehter, Thomas F. Houghton, George T. Chiu, Michael A. Fury |
A four-level VLSI bipolar metallization design with chemical-mechanical planarization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IBM J. Res. Dev. ![In: IBM J. Res. Dev. 36(5), pp. 845-858, 1992. The full citation details ...](Pics/full.jpeg) |
1992 |
DBLP DOI BibTeX RDF |
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23 | Tom J. Smy, R. Niall Tait, Michael J. Brett |
Ballistic deposition simulation of via metallization using a quasi-three-dimensional model. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 10(1), pp. 130-135, 1991. The full citation details ...](Pics/full.jpeg) |
1991 |
DBLP DOI BibTeX RDF |
|
23 | E. H. A. Crannernan |
Multi-level metallization: Future prospects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Eur. Trans. Telecommun. ![In: Eur. Trans. Telecommun. 1(2), pp. 185-194, 1990. The full citation details ...](Pics/full.jpeg) |
1990 |
DBLP DOI BibTeX RDF |
|
23 | Joseph E. Hall, Dale E. Hocevar, Ping Yang 0001, Michael J. McGraw |
SPIDER -- A CAD System for Modeling VLSI Metallization Patterns. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 6(6), pp. 1023-1031, 1987. The full citation details ...](Pics/full.jpeg) |
1987 |
DBLP DOI BibTeX RDF |
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23 | Neil DalCero |
Automatic batch processing in multilayer ceramic metallization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 20th Design Automation Conference, DAC '83, Miami Beach, Florida, USA, June 27-29, 1983, pp. 682-685, 1983, ACM/IEEE, 0-8186-0026-8. The full citation details ...](Pics/full.jpeg) |
1983 |
DBLP BibTeX RDF |
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18 | Laurent Sauvage, Sylvain Guilley, Yves Mathieu |
Electromagnetic Radiations of FPGAs: High Spatial Resolution Cartography and Attack on a Cryptographic Module. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Reconfigurable Technol. Syst. ![In: ACM Trans. Reconfigurable Technol. Syst. 2(1), pp. 4:1-4:24, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
EMA, security, FPGA, DPA, SCA, cartography |
18 | Khawla Alzoubi, Daniel G. Saab, Massood Tabib-Azar |
Complementary nano-electromechanical switches for ultra-low power embedded processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 19th ACM Great Lakes Symposium on VLSI 2009, Boston Area, MA, USA, May 10-12 2009, pp. 309-314, 2009, ACM, 978-1-60558-522-2. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
nems, cmos, switch, device, ultra-low power |
18 | Andrew B. Kahng, Kambiz Samadi |
CMP Fill Synthesis: A Survey of Recent Studies. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27(1), pp. 3-19, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
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18 | SungJoon Lee, A. Pandey, DongSeop Kim, Ajeet Rohatgi, Gary S. May, Sang Jeen Hong, Seung Soo Han |
Characterization and Optimization of the Contact Formation for High-Performance Silicon Solar Cells. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISNN (3) ![In: Advances in Neural Networks - ISNN 2007, 4th International Symposium on Neural Networks, ISNN 2007, Nanjing, China, June 3-7, 2007, Proceedings, Part III, pp. 246-251, 2007, Springer, 978-3-540-72394-3. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
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18 | Negin Manavizadeh, Rashid Safa Isini, Behzad Esfandyarpour, Ebrahim Asl Soleimani, Hassan Ghafoori Fard |
Low Cost Electroplated Ni/Cu Ohmic Contacts for Multicrystalline Si Solar Cells using an Ultrasonic System. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CCECE ![In: Proceedings of the Canadian Conference on Electrical and Computer Engineering, CCECE 2006, May 7-10, 2006, Ottawa Congress Centre, Ottawa, Canada, pp. 1621-1624, 2006, IEEE, 1-4244-0038-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
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18 | Mohamed Lamine Tounsi, Rachida Touhami, Mustapha Chérif-Eddine Yagoub |
Conception Des Coupleurs Coplanaires Multicouches En Bande Millimétrique Sur Des Substrats Anisotropes à Deux Niveaux De Métallisation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CCECE ![In: Proceedings of the Canadian Conference on Electrical and Computer Engineering, CCECE 2006, May 7-10, 2006, Ottawa Congress Centre, Ottawa, Canada, pp. 594-597, 2006, IEEE, 1-4244-0038-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
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18 | R. Castagnetti, R. Venkatraman, Brandon Bartz, Carl Monzel, T. Briscoe, Andres Teene, S. Ramesh 0004 |
A High-Performance SRAM Technology With Reduced Chip-Level Routing Congestion for SoC. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 6th International Symposium on Quality of Electronic Design (ISQED 2005), 21-23 March 2005, San Jose, CA, USA, pp. 193-196, 2005, IEEE Computer Society, 0-7695-2301-3. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
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18 | Syed M. Alam, Frank L. Wei, Chee Lip Gan, Carl V. Thompson, Donald E. Troxel |
Electromigration Reliability Comparison of Cu and Al Interconnects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 6th International Symposium on Quality of Electronic Design (ISQED 2005), 21-23 March 2005, San Jose, CA, USA, pp. 303-308, 2005, IEEE Computer Society, 0-7695-2301-3. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
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18 | Eric F. Weglarz, Kewal K. Saluja, T. M. Mak |
Testing of Hard Faults in Simultaneous Multithreaded Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IOLTS ![In: 10th IEEE International On-Line Testing Symposium (IOLTS 2004), 12-14 July 2004, Funchal, Madeira Island, Portugal, pp. 95-100, 2004, IEEE Computer Society, 0-7695-2180-0. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
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18 | Chanhee Oh, Haldun Haznedar, Martin Gall, Amir Grinshpon, Vladimir Zolotov, Pon Sung Ku, Rajendran Panda |
A Methodology for Chip-Level Electromigration Risk Assessment and Product Qualification. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 5th International Symposium on Quality of Electronic Design (ISQED 2004), 22-24 March 2004, San Jose, CA, USA, pp. 232-237, 2004, IEEE Computer Society, 0-7695-2093-6. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
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18 | Joachim G. Clabes, Joshua Friedrich, Mark Sweet, Jack DiLullo, Sam G. Chu, Donald W. Plass, James Dawson, Paul Muench, Larry Powell, Michael S. Floyd, Balaram Sinharoy, Mike Lee, Michael Goulet, James Wagoner, Nicole S. Schwartz, Stephen L. Runyon, Gary Gorman, Phillip J. Restle, Ronald N. Kalla, Joseph McGill, J. Steve Dodson |
Design and implementation of the POWER5 microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 41th Design Automation Conference, DAC 2004, San Diego, CA, USA, June 7-11, 2004, pp. 670-672, 2004, ACM, 1-58113-828-8. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
POWER5, simultaneous multi-threading (SMT), clock gating, power reduction, microprocessor design, temperature sensor |
18 | Goeran Jerke, Jens Lienig, Jürgen Scheible |
Reliability-driven layout decompaction for electromigration failure avoidance in complex mixed-signal IC designs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 41th Design Automation Conference, DAC 2004, San Diego, CA, USA, June 7-11, 2004, pp. 181-184, 2004, ACM, 1-58113-828-8. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
decompaction, layout decomposition, physical design, compaction, electromigration, interconnect reliability |
18 | Raymond A. Wildman, Joshua I. Kramer, Daniel S. Weile, Phillip Christie |
Multi-objective optimization of interconnect geometry. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 11(1), pp. 15-23, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
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18 | David J. Walkey, Dritan Celo, Tom J. Smy |
A simplified model for the effect of interfinger metal on maximum temperature rise in a multifinger bipolar transistor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 22(1), pp. 15-25, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
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18 | Mohamed Lamine Tounsi, H. Halheit, Mustapha Chérif-Eddine Yagoub, Abdfelhamid Khodja |
Analysis of shielded planar circuits by a mixed variational-spectral method. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (1) ![In: Proceedings of the 2003 International Symposium on Circuits and Systems, ISCAS 2003, Bangkok, Thailand, May 25-28, 2003, pp. 65-68, 2003, IEEE, 0-7803-7761-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
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18 | Hisashige Ando, Yuuji Yoshida, Aiichiro Inoue, Itsumi Sugiyama, Takeo Asakawa, Kuniki Morita, Toshiyuki Muta, Tsuyoshi Motokurumada, Seishi Okada, Hideo Yamashita, Yoshihiko Satsukawa, Akihiko Konmoto, Ryouichi Yamashita, Hiroyuki Sugiyama |
A 1.3GHz fifth generation SPARC64 microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 40th Design Automation Conference, DAC 2003, Anaheim, CA, USA, June 2-6, 2003, pp. 702-705, 2003, ACM, 1-58113-688-9. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
unix server, reliability, microprocessor, microarchitecture, SPARC, clock distribution |
18 | Dage Liu, John H. Reif, Thomas H. LaBean |
DNA Nanotubes: Construction and Characterization of Filaments Composed of TX-tile Lattice. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DNA ![In: DNA Computing, 8th International Workshop on DNA Based Computers, DNA8, Sapporo, Japan, June 10-13, 2002, Revised Papers, pp. 10-21, 2002, Springer, 3-540-00531-5. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
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18 | Amaury Nève, Denis Flandre, Helmut Schettler, Thomas Ludwig 0004, Gerhard Hellner |
Design of a branch-based 64-bit carry-select adder in 0.18 µm partially depleted SOI CMOS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: Proceedings of the 2002 International Symposium on Low Power Electronics and Design, 2002, Monterey, California, USA, August 12-14, 2002, pp. 108-111, 2002, ACM, 1-58113-475-4. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
SOI technology, logic design styles, circuit Design |
18 | J. W. McPherson |
Scaling-Induced Reductions in CMOS Reliability Margins and the Escalating Need for Increased Design-In Reliability Efforts. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 2nd International Symposium on Quality of Electronic Design (ISQED 2001), 26-28 March 2001, San Jose, CA, USA, pp. 123-130, 2001, IEEE Computer Society, 0-7695-1025-6. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
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18 | Fabrice Caignet, S. D.-B. Dhia, Etienne Sicard |
On the measurement of crosstalk in integrated circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 8(5), pp. 606-609, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
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18 | Nagaraj Ns, Frank Cano, Sudha Thiruvengadam, Deepak Kapoor |
Performance and Reliability Verification of C6201/C6701 Digital Signal Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: Proceedings of the IEEE International Conference On Computer Design, VLSI in Computers and Processors, ICCD '99, Austin, Texas, USA, October 10-13, 1999, pp. 521-, 1999, IEEE Computer Society, 0-7695-0406-X. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
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18 | Armen H. Zemanian, Reginald P. Tewarson, Chi Ping Ju, Juif Frank Jen |
Three-dimensional capacitance computations for VLSI/ULSI interconnections. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 8(12), pp. 1319-1326, 1989. The full citation details ...](Pics/full.jpeg) |
1989 |
DBLP DOI BibTeX RDF |
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18 | Albert Seidl, Helmut Klose, Milos Svoboda, Joachim Oberndorfer, Wolfgang Rösner |
CAPCAL-a 3-D capacitance solver for support of CAD systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 7(5), pp. 549-556, 1988. The full citation details ...](Pics/full.jpeg) |
1988 |
DBLP DOI BibTeX RDF |
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