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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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Results
Found 3097 publication records. Showing 3097 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
39 | Claudio Moraga, Milena Stankovic, Radomir S. Stankovic, Suzana Stojkovic |
On Bent and Hyper-bent Multiple-valued Functions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Multiple Valued Log. Soft Comput. ![In: J. Multiple Valued Log. Soft Comput. 29(3-4), pp. 327-354, 2017. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP BibTeX RDF |
|
39 | Tamás Waldhauser |
Maximal and Minimal Closed Classes in Multiple-valued Logic. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Multiple Valued Log. Soft Comput. ![In: J. Multiple Valued Log. Soft Comput. 26(1-2), pp. 1-17, 2016. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP BibTeX RDF |
|
39 | Bernd Steinbach, Christian Posthoff |
Highly Complex 4-Colored Rectangle-free Grids - Solution Unsolved Multiple-Valued Problems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Multiple Valued Log. Soft Comput. ![In: J. Multiple Valued Log. Soft Comput. 24(1-4), pp. 369-404, 2015. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP BibTeX RDF |
|
39 | David Y. Feinstein, Mitchell A. Thornton |
Quantum Multiple-Valued Decision Diagrams Containing Skipped Variables. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Multiple Valued Log. Soft Comput. ![In: J. Multiple Valued Log. Soft Comput. 24(1-4), pp. 93-108, 2015. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP BibTeX RDF |
|
39 | Theodore W. Manikas, Mitchell A. Thornton, David Y. Feinstein |
Modeling System Threat Probabilities Using Mixed-Radix Multiple-Valued Logic Decision Diagrams. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Multiple Valued Log. Soft Comput. ![In: J. Multiple Valued Log. Soft Comput. 24(1-4), pp. 135-149, 2015. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP BibTeX RDF |
|
39 | Radomir S. Stankovic, Jaakko Astola |
Contributions of Arto Salomaa to Multiple-Valued Logic. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Multiple Valued Log. Soft Comput. ![In: J. Multiple Valued Log. Soft Comput. 24(1-4), pp. 1-19, 2015. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP BibTeX RDF |
|
39 | Bernd Steinbach, Christian Posthoff |
The Last Unsolved Four-Colored Rectangle-Free Grid: The Solution ofExtremely Complex Multiple-Valued Problems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Multiple Valued Log. Soft Comput. ![In: J. Multiple Valued Log. Soft Comput. 25(4-5), pp. 461-490, 2015. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP BibTeX RDF |
|
39 | Kazuya Saito, Naofumi Homma, Takafumi Aoki |
A Formal Approach to Designing Multiple-Valued Arithmetic Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Multiple Valued Log. Soft Comput. ![In: J. Multiple Valued Log. Soft Comput. 24(1-4), pp. 21-34, 2015. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP BibTeX RDF |
|
39 | Helena Astola, Stanislav Stankovic, Jaakko Astola |
Introducing Fault-Tolerance to Multiple-Valued Logic with Error-Correcting Decision Diagrams. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Multiple Valued Log. Soft Comput. ![In: J. Multiple Valued Log. Soft Comput. 23(5-6), pp. 441-461, 2014. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP BibTeX RDF |
|
39 | Stanislav Stankovic, Milena Stankovic, Jaakko Astola |
Representation of Multiple-Valued Functions with Flat Vilenkin-Chrestenson Spectra by Decision Diagrams. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Multiple Valued Log. Soft Comput. ![In: J. Multiple Valued Log. Soft Comput. 23(5-6), pp. 485-501, 2014. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP BibTeX RDF |
|
39 | Anna Bernasconi 0001, Valentina Ciriani |
Autosymmetric and Dimension Reducible Multiple-Valued Functions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Multiple Valued Log. Soft Comput. ![In: J. Multiple Valued Log. Soft Comput. 23(3-4), pp. 265-292, 2014. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP BibTeX RDF |
|
39 | Rohit P. Menon, Mitchell A. Thornton |
Clock Distribution Area Reduction Using a Multiple-Valued Clocking Approach. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Multiple Valued Log. Soft Comput. ![In: J. Multiple Valued Log. Soft Comput. 22(1-2), pp. 21-39, 2014. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP BibTeX RDF |
|
39 | Tsutomu Sasao |
Multiple-Valued Index Generation Functions: Reduction of Variables by Linear Transformation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Multiple Valued Log. Soft Comput. ![In: J. Multiple Valued Log. Soft Comput. 21(5-6), pp. 541-559, 2013. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP BibTeX RDF |
|
39 | Ori Lahav 0001 |
Studying Sequent Systems via Non-deterministic Multiple-Valued Matrices. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Multiple Valued Log. Soft Comput. ![In: J. Multiple Valued Log. Soft Comput. 21(5-6), pp. 575-595, 2013. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP BibTeX RDF |
|
39 | Jaakko Astola, Radomir S. Stankovic |
Determination of Sparse Representations of Multiple-Valued Logic Functions by Using Covering Codes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Multiple Valued Log. Soft Comput. ![In: J. Multiple Valued Log. Soft Comput. 19(4), pp. 285-306, 2012. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP BibTeX RDF |
|
39 | Elena Dubrova, Ming Liu, Maxim Teslenko |
Finding Attractors in Synchronous Multiple-Valued Networks Using SAT-based Bounded Model Checking. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Multiple Valued Log. Soft Comput. ![In: J. Multiple Valued Log. Soft Comput. 19(1-3), pp. 109-131, 2012. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP BibTeX RDF |
|
39 | Masanori Natsui, Takashi Arimitsu, Takahiro Hanyu |
Low-Energy Pipelined Multiple-Valued Current-Mode Circuit Based on Current-Level Control Technique. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Multiple Valued Log. Soft Comput. ![In: J. Multiple Valued Log. Soft Comput. 19(1-3), pp. 219-231, 2012. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP BibTeX RDF |
|
39 | Radomir S. Stankovic, Jaakko Astola, Claudio Moraga |
Design of Multiple-Valued Logic Networks with Regular Structure by Using Spectral Representations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Multiple Valued Log. Soft Comput. ![In: J. Multiple Valued Log. Soft Comput. 19(1-3), pp. 251-269, 2012. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP BibTeX RDF |
|
39 | Francesc Esteva, Joan Gispert, Felip Manyà |
Introduction to the Special Issue of the IEEE 40th International Symposium on Multiple-Valued Logic. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Multiple Valued Log. Soft Comput. ![In: J. Multiple Valued Log. Soft Comput. 19(1-3), pp. 1-2, 2012. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP BibTeX RDF |
|
39 | Anatolij Dvurecenskij, George Georgescu, Afrodita Iorgulescu, Sergiu Rudeanu |
Foreword: Multiple-Valued Logic and Its Algebras. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Multiple Valued Log. Soft Comput. ![In: J. Multiple Valued Log. Soft Comput. 16(3-5), pp. 219-220, 2010. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP BibTeX RDF |
|
39 | Takaaki Mizuki, Hitoshi Tsubata, Takao Nishizeki |
Minimizing AND-EXOR Expressions for Two-Variable Multiple-Valued Input Binary Output Functions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Multiple Valued Log. Soft Comput. ![In: J. Multiple Valued Log. Soft Comput. 16(1-2), pp. 197-208, 2010. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP BibTeX RDF |
|
39 | Silvana Marinkovic, Dragic Bankovic |
General Solutions of Equations in Multiple-Valued Logic? ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Multiple Valued Log. Soft Comput. ![In: J. Multiple Valued Log. Soft Comput. 16(3-5), pp. 421-426, 2010. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP BibTeX RDF |
|
39 | Yasushi Yuminaka, Yasunori Takahashi |
Time-Domain Pre-Emphasis Techniques for Multiple Valued Data Transmission. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Multiple Valued Log. Soft Comput. ![In: J. Multiple Valued Log. Soft Comput. 15(4), pp. 301-313, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP BibTeX RDF |
|
39 | Alexis De Vos, Yvan Van Rentergem |
Multiple-Valued Reversible Logic Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Multiple Valued Log. Soft Comput. ![In: J. Multiple Valued Log. Soft Comput. 15(5-6), pp. 489-505, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP BibTeX RDF |
|
39 | Shangce Gao, Jianchen Zhang, Zheng Tang, Qi Ping Cao |
A Chaotic Dynamic Local Search Method for Learning Multiple-Valued Logic Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Multiple Valued Log. Soft Comput. ![In: J. Multiple Valued Log. Soft Comput. 15(5-6), pp. 433-449, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP BibTeX RDF |
|
39 | Naofumi Homma, Yuki Watanabe, Katsuhiko Degawa, Takafumi Aoki, Tatsuo Higuchi 0001 |
Systematic Approach to Designing Multiple-Valued Arithmetic Circuits Based on Arithmetic Description Language. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Multiple Valued Log. Soft Comput. ![In: J. Multiple Valued Log. Soft Comput. 15(4), pp. 329-340, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP BibTeX RDF |
|
39 | David Y. Feinstein, Mitchell A. Thornton, D. Michael Miller |
Minimization of Quantum Multiple-valued Decision Diagrams Using Data Structure Metrics. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Multiple Valued Log. Soft Comput. ![In: J. Multiple Valued Log. Soft Comput. 15(4), pp. 361-377, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP BibTeX RDF |
|
39 | Radomir S. Stankovic, Jaakko Astola |
Interpretations of the Sampling Theorem in Multiple-Valued Logic. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Multiple Valued Log. Soft Comput. ![In: J. Multiple Valued Log. Soft Comput. 13(4-6), pp. 467-486, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP BibTeX RDF |
|
39 | Nobuaki Okada, Michitaka Kameyama |
Low-Power Multiple-Valued Reconfigurable VLSI Using Series-Gating Differential-Pair Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Multiple Valued Log. Soft Comput. ![In: J. Multiple Valued Log. Soft Comput. 13(4-6), pp. 619-632, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP BibTeX RDF |
|
39 | Krzysztof S. Berezowski, Sarma B. K. Vrudhula |
Multiple-Valued Logic Circuits Design Using Negative Differential Resistance Devices. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Multiple Valued Log. Soft Comput. ![In: J. Multiple Valued Log. Soft Comput. 13(4-6), pp. 447-466, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP BibTeX RDF |
|
39 | Naofumi Homma, Katsuhiko Degawa, Takafumi Aoki, Tatsuo Higuchi 0001 |
Design of Multiple-valued Arithmetic Circuits Using Counter Tree Diagrams. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Multiple Valued Log. Soft Comput. ![In: J. Multiple Valued Log. Soft Comput. 13(4-6), pp. 487-502, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP BibTeX RDF |
|
39 | Tasuku Ito, Michitaka Kameyama |
Universal VLSI Based on a Redundant Multiple-Valued Sequential Logic Operation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Multiple Valued Log. Soft Comput. ![In: J. Multiple Valued Log. Soft Comput. 13(4-6), pp. 553-568, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP BibTeX RDF |
|
39 | Dragan Jankovic, Radomir S. Stankovic, Claudio Moraga |
Implementation Complexity of Algorithms for Optimization of Galois Field Expressions for Multiple-Valued Functions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Multiple Valued Log. Soft Comput. ![In: J. Multiple Valued Log. Soft Comput. 13(4-6), pp. 521-536, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP BibTeX RDF |
|
39 | David Bol, Ilham Hassoune, David Levacq, Denis Flandre, Jean-Didier Legat |
Efficient Multiple-Valued Signed-Digit Full Adder Based on NDR MOS Structures and its Application to an N-bit Current-Mode Constant-Time Adder. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Multiple Valued Log. Soft Comput. ![In: J. Multiple Valued Log. Soft Comput. 13(1-2), pp. 61-78, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP BibTeX RDF |
|
39 | Yasushi Yuminaka, Kazuyoshi Yamamura |
Equalization Techniques for Multiple-Valued Data Transmission and Their Application. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Multiple Valued Log. Soft Comput. ![In: J. Multiple Valued Log. Soft Comput. 13(4-6), pp. 569-582, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP BibTeX RDF |
|
39 | Alioune Ngom, Dan A. Simovici, Ivan Stojmenovic |
Evolutionary Strategy for Learning Multiple-Valued Logic Functions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Multiple Valued Log. Soft Comput. ![In: J. Multiple Valued Log. Soft Comput. 12(5-6), pp. 459-489, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP BibTeX RDF |
|
39 | D. Michael Miller, Dmitri Maslov, Gerhard W. Dueck |
Synthesis of Quantum Multiple-Valued Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Multiple Valued Log. Soft Comput. ![In: J. Multiple Valued Log. Soft Comput. 12(5-6), pp. 431-450, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP BibTeX RDF |
|
39 | Pawel Kerntopf, Marek A. Perkowski, Mozammel H. A. Khan |
On Universality of General Reversible Multiple-Valued Logic Gates. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Multiple Valued Log. Soft Comput. ![In: J. Multiple Valued Log. Soft Comput. 12(5-6), pp. 417-429, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP BibTeX RDF |
|
39 | Tomohiro Takahashi, Takahiro Hanyu |
Control Signal Multiplexing Based Asynchronous Data Transfer Scheme Using Multiple-Valued Bidirectional Current-Mode Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Multiple Valued Log. Soft Comput. ![In: J. Multiple Valued Log. Soft Comput. 11(5-6), pp. 499-517, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP BibTeX RDF |
|
39 | Masanori Natsui, Naofumi Homma, Takafumi Aoki, Tatsuo Higuchi 0001 |
Design of Multiple-Valued Logic Circuits Using Graph-Based Evolutionary Synthesis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Multiple Valued Log. Soft Comput. ![In: J. Multiple Valued Log. Soft Comput. 11(5-6), pp. 519-544, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP BibTeX RDF |
|
39 | Katsuhiko Degawa, Takafumi Aoki, Tatsuo Higuchi 0001 |
Prototype Fabrication of Field-Programmable Digital Filter LSIs Using Multiple-Valued Current-Mode Logic - Device Scaling and Future Prospects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Multiple Valued Log. Soft Comput. ![In: J. Multiple Valued Log. Soft Comput. 11(5-6), pp. 545-565, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP BibTeX RDF |
|
39 | Akira Mochizuki, Takahiro Hanyu, Michitaka Kameyama |
Design of a Low-Power Multiple-Valued Integrated Circuit Based on Dynamic Source-Coupled Logic. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Multiple Valued Log. Soft Comput. ![In: J. Multiple Valued Log. Soft Comput. 11(5-6), pp. 481-497, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP BibTeX RDF |
|
39 | James J. Lu, Neil V. Murray, Erik Rosenthal |
Deduction and Search Strategies for Regular Multiple-Valued Logics. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Multiple Valued Log. Soft Comput. ![In: J. Multiple Valued Log. Soft Comput. 11(3-4), pp. 375-406, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP BibTeX RDF |
|
39 | Radomir S. Stankovic, Milena Stankovic, Claudio Moraga |
Haar Wavelet Transforms and Haar Spectral Transform Decision Diagrams for Switching and Multiple-Valued Functions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Multiple Valued Log. Soft Comput. ![In: J. Multiple Valued Log. Soft Comput. 11(1-2), pp. 67-94, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP BibTeX RDF |
|
39 | Elena Dubrova, Harald Sack |
Probabilistic Equivalence Checking of Multiple-Valued Functions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Multiple Valued Log. Soft Comput. ![In: J. Multiple Valued Log. Soft Comput. 10(4), pp. 395-414, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP BibTeX RDF |
|
39 | Mark G. Karpovsky, Radomir S. Stankovic, Claudio Moraga |
Spectral Techniques in Binary and Multiple-Valued Switching Theory: A Review of Results in the Decade 1991-2000. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Multiple Valued Log. Soft Comput. ![In: J. Multiple Valued Log. Soft Comput. 10(3), pp. 261-286, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP BibTeX RDF |
|
39 | Susanto Rahardja, Bogdan J. Falkowski |
Fast Mixed Linearly Independent Arithmetic Logic Transforms for Multiple-Valued Functions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Multiple Valued Log. Soft Comput. ![In: J. Multiple Valued Log. Soft Comput. 10(1), pp. 73-87, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP BibTeX RDF |
|
39 | Svetlana N. Yanushkevich, Vlad P. Shmerko, V. D. Malyugin, Piotr Dziurzanski, Anna M. Tomaszewska |
Linearity of Word-Level Representations of Multiple-Valued Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Multiple Valued Log. Soft Comput. ![In: J. Multiple Valued Log. Soft Comput. 10(2), pp. 129-158, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP BibTeX RDF |
|
39 | Hiromitsu Kimura, Takahiro Hanyu, Michitaka Kameyama |
Multiple-Valued Logic-in-Memory VLSI Using MFSFETs and its Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Multiple Valued Log. Soft Comput. ![In: J. Multiple Valued Log. Soft Comput. 9(1), pp. 23-42, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP BibTeX RDF |
|
39 | Tsukasa Ike, Takahiro Hanyu, Michitaka Kameyama |
Optimal Design of a Dual-Rail Multiple-Valued Current-Mode Integrated Circuit Based on Voltage Swing Minimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Multiple Valued Log. Soft Comput. ![In: J. Multiple Valued Log. Soft Comput. 9(1), pp. 5-21, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP BibTeX RDF |
|
39 | Andrew Adamatzky, Anthony G. Pipe |
Editorial: Multiple-Valued Logic and Robotics. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Multiple Valued Log. Soft Comput. ![In: J. Multiple Valued Log. Soft Comput. 9(2), pp. 127-130, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP BibTeX RDF |
|
39 | Benet Devereux, Marsha Chechik |
Edge-Shifted Decision Diagrams for Multiple-Valued Logic. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Multiple Valued Log. Soft Comput. ![In: J. Multiple Valued Log. Soft Comput. 9(1), pp. 59-86, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP BibTeX RDF |
|
39 | Pedro Acevedo Contla, Ivo G. Rosenberg, Dan A. Simovici, Ivan Stojmenovic |
Boolean Completeness in Multiple-Valued Set Logic. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Multiple Valued Log. Soft Comput. ![In: J. Multiple Valued Log. Soft Comput. 9(3), pp. 257-272, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP BibTeX RDF |
|
39 | Elena Dubrova, Maxim Teslenko, Ming Liu |
Finding Attractors in Synchronous Multiple-Valued Networks Using SAT-Based Bounded Model Checking. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISMVL ![In: 40th IEEE International Symposium on Multiple-Valued Logic, ISMVL 2010, Barcelona, Spain, 26-28 May 2010, pp. 144-149, 2010, IEEE Computer Society, 978-0-7695-4024-5. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
multiple-valued network, SAT, bounded model checking, gene regulatory network, attractor |
39 | Atsushi Matsumoto, Naoya Onizawa, Takahiro Hanyu |
One-Color Two-Phase Asynchronous Communication Links Based on Multiple-Valued Simultaneous Control. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISMVL ![In: 40th IEEE International Symposium on Multiple-Valued Logic, ISMVL 2010, Barcelona, Spain, 26-28 May 2010, pp. 211-216, 2010, IEEE Computer Society, 978-0-7695-4024-5. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
asynchronous transmission, current-mode, multiple-valued |
39 | Yuichi Baba, Naofumi Homma, Atsushi Miyamoto, Takafumi Aoki |
Design of Tamper-Resistant Registers for Multiple-Valued Cryptographic Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISMVL ![In: 40th IEEE International Symposium on Multiple-Valued Logic, ISMVL 2010, Barcelona, Spain, 26-28 May 2010, pp. 67-72, 2010, IEEE Computer Society, 978-0-7695-4024-5. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
cryptographic processors, side-channel attacks, multiple-valued logic, RSA cryptosystem |
39 | Masanori Natsui, Takafumi Aoki, Tatsuo Higuchi 0001 |
Parallel Evolutionary Graph Synthesis on a PC Cluster and Its Application to Multiple-Valued Circuit Synthesis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISMVL ![In: 32nd IEEE International Symposium on Multiple-Valued Logic (ISMVL 2002), May 15-18, 2002, Boston, Massachusetts, USA, pp. 96-103, 2002, IEEE Computer Society, 0-7695-1462-6. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
genetic algorithms, evolutionary computation, multiple-valued logic, arithmetic circuits |
39 | Alioune Ngom, Ivan Stojmenovic, Ratko Tosic |
The Computing Capacity of Three-Input Multiple-Valued One-Threshold Perceptrons. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISMVL ![In: 30th IEEE International Symposium on Multiple-Valued Logic, ISMVL 2000, Portland, Oregon, USA, May 23-25, 2000, Proceedings, pp. 33-40, 2000, IEEE Computer Society, 0-7695-0692-5. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
general position, partition, capacity, Separability, perceptrons, multiple-valued functions, multisets |
39 | Tsutomu Sasao |
Totally Undecomposable Functions: Applications to Efficient Multiple-Valued Decompositions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISMVL ![In: 29th IEEE International Symposium on Multiple-Valued Logic, ISMVL 1999, Freiburg im Breisgau, Germany, May 20-22, 1999, Proceedings, pp. 59-65, 1999, IEEE Computer Society, 0-7695-0161-3. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
LUT-based FPGA, Multiple-valued logic function, Functional decomposition, Symmetric function |
39 | T. Utsumi, Naotake Kamiura, Yutaka Hata, Kazuharu Yamato |
Multiple-Valued Programmable Logic Arrays with Universal Literals. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISMVL ![In: 27th IEEE International Symposium on Multiple-Valued Logic, ISMVL 1997, Antigonish, Nova Scotia, Canada, May 28-30, 1997, Proceedings, pp. 163-168, 1997, IEEE Computer Society, 0-8186-7910-7. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
universal literals, multiple-valued programmable logic, universal literal generators, operator structures, programmable logic arrays, programmable logic arrays |
39 | Marek A. Perkowski, Malgorzata Marek-Sadowska, Lech Józwiak, Tadeusz Luba, Stan Grygiel, Miroslawa Nowicka, Rahul Malvi, Zhi Wang, Jin S. Zhang |
Decomposition of Multiple-Valued Relations . ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISMVL ![In: 27th IEEE International Symposium on Multiple-Valued Logic, ISMVL 1997, Antigonish, Nova Scotia, Canada, May 28-30, 1997, Proceedings, pp. 13-18, 1997, IEEE Computer Society, 0-8186-7910-7. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
multiple-valued relations decomposition, cofactor pair compatibility, group compatibility, strongly unspecified data, program GUD-MV, machine learning, learning (artificial intelligence) |
39 | Reiner Hähnle |
Commodious Axiomatization of Quantifiers in Multiple-Valued Logic. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISMVL ![In: 26th IEEE International Symposium on Multiple-Valued Logic, ISMVL 1996, Santiago de Compostela, Spain, May 29-31, 1996, Proceedings, pp. 118-123, 1996, IEEE Computer Society, 0-8186-7392-3. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
commodious axiomatization, distribution quantifiers, lattice-based quantifiers, skolemized signed formulas, Boolean set lattices, Boolean functions, filters, multivalued logic, multiple-valued logic, quantifiers |
39 | D. Michael Miller, Noriaki Muranaka |
Multiple-Valued Decision Diagrams with Symmetric Variable Nodes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISMVL ![In: 26th IEEE International Symposium on Multiple-Valued Logic, ISMVL 1996, Santiago de Compostela, Spain, May 29-31, 1996, Proceedings, pp. 242-247, 1996, IEEE Computer Society, 0-8186-7392-3. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
symmetry, Multiple-valued logic, decision diagrams |
39 | Ali Sheikholeslami, P. Glenn Gulak, Takahiro Hanyu |
A Multiple-Valued Ferroelectric Content-Addressable Memory. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISMVL ![In: 26th IEEE International Symposium on Multiple-Valued Logic, ISMVL 1996, Santiago de Compostela, Spain, May 29-31, 1996, Proceedings, pp. 74-79, 1996, IEEE Computer Society, 0-8186-7392-3. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
ferroelectric, nonvolatile, memory, associative, CAM, content-addressable, multiple-valued |
39 | Boris A. Romov |
Completeness Theory for Vector Partial Multiple-Valued Logic Functions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISMVL ![In: 25th IEEE International Symposium on Multiple-Valued Logic, ISMVL 1995, Bloomington, Indiana, USA, May 23-25, 1995, Proceedings, pp. 86-91, 1995, IEEE Computer Society, 0-8186-7118-1. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
completeness theory, vector partial multiple-valued logic functions, completeness criterion, multiple-base invariant relations algebra, restricted quantifier free calculus, multivalued logic, Galois connection |
39 | Yasushi Yuminaka, Osamu Katoh, Yoshisat Sasaki, Takafumi Aoki, Tatsuo Higuchi 0001 |
An Efficient Data Transmission Technique for VLSI Systems Based on Multiple-Valued Code-Division Multiple Access. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISMVL ![In: 30th IEEE International Symposium on Multiple-Valued Logic, ISMVL 2000, Portland, Oregon, USA, May 23-25, 2000, Proceedings, pp. 430-437, 2000, IEEE Computer Society, 0-7695-0692-5. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
38 | Nobuaki Okada, Michitaka Kameyama |
Low-Power Multiple-Valued Reconfigurable VLSI Using Series-Gating Differential-Pair Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISMVL ![In: 37th International Symposium on Multiple-Valued Logic, ISMVL 2007, 13-16 May 2007, Oslo, Norway, pp. 25, 2007, IEEE Computer Society, 978-0-7695-2831-1. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
38 | Tsutomu Sasao, Jon T. Butler |
Implementation of Multiple-Valued CAM Functions by LUT Cascades. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISMVL ![In: 36th IEEE International Symposium on Multiple-Valued Logic (ISMVL 2006), 17-20 May 2006, Singapore, pp. 11, 2006, IEEE Computer Society, 0-7695-2532-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
38 | Hafiz Md. Hasan Babu, Tsutomu Sasao |
Shared Multiple-Valued Decision Diagrams for Multiple-Output Functions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISMVL ![In: 29th IEEE International Symposium on Multiple-Valued Logic, ISMVL 1999, Freiburg im Breisgau, Germany, May 20-22, 1999, Proceedings, pp. 166-172, 1999, IEEE Computer Society, 0-7695-0161-3. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
37 | Tsutomu Sasao, Jon T. Butler |
A Method to Represent Multiple-Output Switching Functions by Using Multi-Valued Decision Diagrams. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISMVL ![In: 26th IEEE International Symposium on Multiple-Valued Logic, ISMVL 1996, Santiago de Compostela, Spain, May 29-31, 1996, Proceedings, pp. 248-254, 1996, IEEE Computer Society, 0-8186-7392-3. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
multiple-output switching functions, multi-terminal, multivalued logic, decision tables, computation time, switching functions, switching functions, multi-valued decision diagrams |
37 | Mitchell A. Thornton |
Spectral Transforms of Mixed-radix MVL Functions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISMVL ![In: 33rd IEEE International Symposium on Multiple-Valued Logic (ISMVL 2003), 16-19 May 2003, Tokyo, Japan, pp. 329-333, 2003, IEEE Computer Society, 0-7695-1918-0. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
36 | Marsha Chechik, Benet Devereux, Steve M. Easterbrook, Albert Y. C. Lai, Victor Petrovykh |
Efficient Multiple-Valued Model-Checking Using Lattice Representations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CONCUR ![In: CONCUR 2001 - Concurrency Theory, 12th International Conference, Aalborg, Denmark, August 20-25, 2001, Proceedings, pp. 441-455, 2001, Springer, 3-540-42497-0. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
35 | Yasushi Yuminaka, Tatsuya Morishita, Takafumi Aoki, Tatsuo Higuchi 0001 |
Multiple-Valued Data Recovery Techniques for Band-Limited Channels in VLSI. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISMVL ![In: 32nd IEEE International Symposium on Multiple-Valued Logic (ISMVL 2002), May 15-18, 2002, Boston, Massachusetts, USA, pp. 54-60, 2002, IEEE Computer Society, 0-7695-1462-6. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
new paradigm computing, high-speed signaling, code-division multiple access, equalization, VLSI systems |
34 | Syuusuke Kuribara, Safia Abbas, Hajime Sawamura |
Applying the Logic of Multiple-Valued Argumentation to Social Web: SNS and Wikipedia. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PRIMA ![In: Intelligent Agents and Multi-Agent Systems, 11th Pacific Rim International Conference on Multi-Agents, PRIMA 2008, Hanoi, Vietnam, December 15-16, 2008. Proceedings, pp. 251-258, 2008, Springer, 978-3-540-89673-9. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Logic of Multiple-Valued Argumentation, Wikipedia, Argumentation, Social Web, SNS |
34 | Toshiko Wakaki, Takanori Mukai, Hiromitsu Miyashita, Hajime Sawamura, Kumiko Matsunaga, Taro Fukumoto, Katsumi Nitta |
Automated argument system based on logic of multiple-valued argumentation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AAMAS ![In: 5th International Joint Conference on Autonomous Agents and Multiagent Systems (AAMAS 2006), Hakodate, Japan, May 8-12, 2006, pp. 1461-1462, 2006, ACM, 1-59593-303-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
multiple-valued argumentation, multi-agent system, learning, knowledge acquisition |
34 | Takahiro Hanyu, Tsukasa Ike, Michitaka Kameyama |
Integration of asynchronous and self-checking multiple-valued current-mode circuits based on dual-rail differential logic. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PRDC ![In: 2000 Pacific Rim International Symposium on Dependable Computing (PRDC 2000), 18-20 December 2000, Los Angeles, CA, USA, pp. 27-36, 2000, IEEE Computer Society, 0-7695-0975-4. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
dual-rail differential logic, multiple-valued current-mode circuits, asynchronous-control circuit, logic testing, asynchronous circuits, self-checking circuit, current-mode logic, current-mode circuits |
34 | Svetlana N. Yanushkevich, Denis V. Popel, Vlad P. Shmerko, V. Cheushev, Radomir S. Stankovic |
Information Theoretic Approach to Minimization of Polynomial Expressions over GF(4). ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISMVL ![In: 30th IEEE International Symposium on Multiple-Valued Logic, ISMVL 2000, Portland, Oregon, USA, May 23-25, 2000, Proceedings, pp. 265-272, 2000, IEEE Computer Society, 0-7695-0692-5. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
multiple-valued logic functions, information theory measures, decision trees, minimization |
34 | Renren Liu |
Research on the Similarity among Precomplete Sets Preserving m-ary Relations in Partial K-Valued Logic. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISMVL ![In: 29th IEEE International Symposium on Multiple-Valued Logic, ISMVL 1999, Freiburg im Breisgau, Germany, May 20-22, 1999, Proceedings, pp. 136-139, 1999, IEEE Computer Society, 0-7695-0161-3. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
Partial multiple-valued logic, Sheffer functions, completeness |
34 | I. Thoidis, Dimitrios Soudris, Ioannis Karafyllidis, Adonios Thanailakis, Thanos Stouraitis |
Multiple-Valued Logic Voltage-Mode Storage Circuits Based On True-Single-Phase Clocked Logic. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Great Lakes Symposium on VLSI ![In: 8th Great Lakes Symposium on VLSI (GLS-VLSI '98), 19-21 February 1998, Lafayette, LA, USA, pp. 83-88, 1998, IEEE Computer Society, 0-8186-8409-7. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
voltage-mode latches, voltage-mode master-slave, true-single phase clocked-logic, Multiple-Valued Logic |
34 | Susanto Rahardja, Bogdan J. Falkowski |
Family of Complex Hadamard Transforms: Relationship with Other Transforms and Complex Composite Spectra. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISMVL ![In: 27th IEEE International Symposium on Multiple-Valued Logic, ISMVL 1997, Antigonish, Nova Scotia, Canada, May 28-30, 1997, Proceedings, pp. 125-130, 1997, IEEE Computer Society, 0-8186-7910-7. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
complex Hadamard transforms, complex composite spectra, binary logic design, complex Hadamard matrices, convolution operation, complex convolution, Boolean functions, codings, Hadamard transforms, multiple-valued logic design |
34 | Sumiyasu Yamamoto, Shinsei Tazawa, Kazuhiko Ushio, Hideto Ikeda |
Design of a Generalized Balanced Multiple-Valued File Organization Scheme of Order Two. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SIGMOD Conference ![In: Proceedings of the 1978 ACM SIGMOD International Conference on Management of Data, Austin, Texas, USA, May 31 - June 2, 1978, pp. 47-51, 1978, ACM, 978-1-4503-7342-5. The full citation details ...](Pics/full.jpeg) |
1978 |
DBLP DOI BibTeX RDF |
directory file, multilist structure, multiple-valued records, redundancy, file organization, information storage and retrieval, bucket |
34 | Krzysztof S. Berezowski, Sarma B. K. Vrudhula |
Multiple-Valued Logic Circuits Design Using Negative Differential Resistance Devices. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISMVL ![In: 37th International Symposium on Multiple-Valued Logic, ISMVL 2007, 13-16 May 2007, Oslo, Norway, pp. 24, 2007, IEEE Computer Society, 978-0-7695-2831-1. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
34 | Naofumi Homma, Katsuhiko Degawa, Takafumi Aoki, Tatsuo Higuchi 0001 |
Algorithm-Level Optimization of Multiple-Valued Arithmetic Circuits Using Counter Tree Diagrams. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISMVL ![In: 37th International Symposium on Multiple-Valued Logic, ISMVL 2007, 13-16 May 2007, Oslo, Norway, pp. 31, 2007, IEEE Computer Society, 978-0-7695-2831-1. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
34 | Naofumi Homma, Takafumi Aoki, Tatsuo Higuchi 0001 |
Algorithm-level interpretation of fast adder structures in binary and multiple-valued logic. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISMVL ![In: 36th IEEE International Symposium on Multiple-Valued Logic (ISMVL 2006), 17-20 May 2006, Singapore, pp. 2, 2006, IEEE Computer Society, 0-7695-2532-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
34 | Haque Mohammad Munirul, Michitaka Kameyama |
Fine-Grain Cell Design for Multiple-Valued Reconfigurable VLSI Using a Single Differential-Pair Circuit. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISMVL ![In: 36th IEEE International Symposium on Multiple-Valued Logic (ISMVL 2006), 17-20 May 2006, Singapore, pp. 13, 2006, IEEE Computer Society, 0-7695-2532-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
34 | Naoya Onizawa, Akira Mochizuki, Takahiro Hanyu |
Multiple-Valued Duplex Asynchronous Data Transfer Scheme for Interleaving in LDPC Decoders. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISMVL ![In: 35th IEEE International Symposium on Multiple-Valued Logic (ISMVL 2005), 18-21 May 2005, Calgary, Canada, pp. 138-143, 2005, IEEE Computer Society, 0-7695-2336-6. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
34 | Haque Mohammad Munirul, Tomoaki Hasegawa, Michitaka Kameyama |
Implementation and Evaluation of a Fine-Grain Multiple-Valued Field Programmable VLSI Based on Source-Coupled Logic. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISMVL ![In: 35th IEEE International Symposium on Multiple-Valued Logic (ISMVL 2005), 18-21 May 2005, Calgary, Canada, pp. 120-125, 2005, IEEE Computer Society, 0-7695-2336-6. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
34 | Marek A. Perkowski, Tsutomu Sasao, Jong-Hwan Kim, Martin Lukac, Jeff Allen, Stefan Gebauer |
Hahoe KAIST Robot Theatre: Learning Rules of Interactive Robot Behavior as a Multiple-Valued Logic Synthesis Problem. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISMVL ![In: 35th IEEE International Symposium on Multiple-Valued Logic (ISMVL 2005), 18-21 May 2005, Calgary, Canada, pp. 236-248, 2005, IEEE Computer Society, 0-7695-2336-6. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
34 | Yngvar Berg, Snorre Aunet, Øivind Næss, Omid Mirmotahari |
Basic Multiple-Valued Functions Using Recharge CMOS Logic. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISMVL ![In: 34th IEEE International Symposium on Multiple-Valued Logic (ISMVL 2004), 19-22 May 2004, Toronto, Canada, pp. 346-351, 2004, IEEE Computer Society, 0-7695-2130-4. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
34 | Svetlana N. Yanushkevich, Vlad P. Shmerko, L. Guy, D. C. Lu |
Three Dimensional Multiple Valued Circuits Design Based on Single-Electron Logic. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISMVL ![In: 34th IEEE International Symposium on Multiple-Valued Logic (ISMVL 2004), 19-22 May 2004, Toronto, Canada, pp. 275-280, 2004, IEEE Computer Society, 0-7695-2130-4. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
34 | Haque Mohammad Munirul, Michitaka Kameyama |
Ultra-Fine-Grain Field-Programmable VLSI Using Multiple-Valued Source-Coupled Logic. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISMVL ![In: 34th IEEE International Symposium on Multiple-Valued Logic (ISMVL 2004), 19-22 May 2004, Toronto, Canada, pp. 26-30, 2004, IEEE Computer Society, 0-7695-2130-4. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
34 | Yngvar Berg, Øivind Næss, Snorre Aunet, Renè Jensen, Mats Høvin |
Novel floating-gate multiple-valued signal to binary signal converters for multiple-valued CMOS logic. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (5) ![In: Proceedings of the 2002 International Symposium on Circuits and Systems, ISCAS 2002, Scottsdale, Arizona, USA, May 26-29, 2002, pp. 385-388, 2002, IEEE, 0-7803-7448-7. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
34 | Naofumi Takagi |
Multiple-Valued-Digit Number Representations in Arithmetic Circuit Algorithms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISMVL ![In: 32nd IEEE International Symposium on Multiple-Valued Logic (ISMVL 2002), May 15-18, 2002, Boston, Massachusetts, USA, pp. 224-237, 2002, IEEE Computer Society, 0-7695-1462-6. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
carry-save form, carry-propagation-free addition, multiplier recoding, computer arithmetic, signed-digit number representation, digit-recurrence algorithm |
34 | Harald Sack, Elena Dubrova, Christoph Meinel |
Mod-p Decision Diagrams: A Data Structure for Multiple-Valued Functions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISMVL ![In: 30th IEEE International Symposium on Multiple-Valued Logic, ISMVL 2000, Portland, Oregon, USA, May 23-25, 2000, Proceedings, pp. 233-238, 2000, IEEE Computer Society, 0-7695-0692-5. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
34 | K. Wayne Current, Vojin G. Oklobdzija, Dragan Maksimovic |
Low-Energy Logic Circuit Techniques for Multiple-Valued Logic. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISMVL ![In: 26th IEEE International Symposium on Multiple-Valued Logic, ISMVL 1996, Santiago de Compostela, Spain, May 29-31, 1996, Proceedings, pp. 86-91, 1996, IEEE Computer Society, 0-8186-7392-3. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
|
34 | Toshio Baba, Tetsuya Uemura |
Multiple-Junction Surface Tunnel Transistors for Multiple-Valued Logic Circuits . ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISMVL ![In: 27th IEEE International Symposium on Multiple-Valued Logic, ISMVL 1997, Antigonish, Nova Scotia, Canada, May 28-30, 1997, Proceedings, pp. 41-46, 1997, IEEE Computer Society, 0-8186-7910-7. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
33 | Aryan Saed, Majid Ahmadi, Graham A. Jullien |
A Number System with Continuous Valued Digits and Modulo Arithmetic. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 51(11), pp. 1294-1305, 2002. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
continuous digits, modulo arithmetic, low-noise circuitry, Computer arithmetic, multiple-valued logic |
33 | Pinaki Mazumder, Shriram Kulkarni, Mayukh Bhattacharya, Alejandro F. González |
Circuit Design using Resonant Tunneling Diodes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 11th International Conference on VLSI Design (VLSI Design 1991), 4-7 January 1998, Chennai, India, pp. 501-506, 1998, IEEE Computer Society, 0-8186-8224-8. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
Quantum device, Pipelining, Multiple-Valued Logic, Nanoelectronics, Resonant Tunneling Diode |
33 | Radomir S. Stankovic, Jaakko Astola |
Reading the Sampling Theorem in Multiple-Valued Logic: A Journey from the (Shannong) Sampling Theorem to the Shannon Decomposition Rule. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISMVL ![In: 37th International Symposium on Multiple-Valued Logic, ISMVL 2007, 13-16 May 2007, Oslo, Norway, pp. 2, 2007, IEEE Computer Society, 978-0-7695-2831-1. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
33 | Daniel H.-Y. Teng, Ronald J. Bolton |
Estimation of Average Multiple-Valued Logic Circuit Size Using Monte Carlo Simulation Technique. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISMVL ![In: 35th IEEE International Symposium on Multiple-Valued Logic (ISMVL 2005), 18-21 May 2005, Calgary, Canada, pp. 276-281, 2005, IEEE Computer Society, 0-7695-2336-6. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
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