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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 2555 occurrences of 1182 keywords
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Results
Found 2526 publication records. Showing 2526 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
31 | Faith Ellen, Panagiota Fatourou, Eric Ruppert |
The space complexity of unbounded timestamps. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Distributed Comput. ![In: Distributed Comput. 21(2), pp. 103-115, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Obstruction-free, Lower bounds, Anonymous, Shared memory, Timestamps, Wait-free |
31 | Stéphane Demri, Ranko Lazic 0001, Arnaud Sangnier |
Model Checking Freeze LTL over One-Counter Automata. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FoSSaCS ![In: Foundations of Software Science and Computational Structures, 11th International Conference, FOSSACS 2008, Held as Part of the Joint European Conferences on Theory and Practice of Software, ETAPS 2008, Budapest, Hungary, March 29 - April 6, 2008. Proceedings, pp. 490-504, 2008, Springer, 978-3-540-78497-5. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
31 | Panagiota Fatourou, Nikolaos D. Kallimanis |
Time-optimal, space-efficient single-scanner snapshots & multi-scanner snapshots using CAS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PODC ![In: Proceedings of the Twenty-Sixth Annual ACM Symposium on Principles of Distributed Computing, PODC 2007, Portland, Oregon, USA, August 12-15, 2007, pp. 33-42, 2007, ACM, 978-1-59593-616-5. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
linearizable objects, single-scanner, wait-free implementations, distributed algorithms, asynchronous, snapshots, compare-and-swap (CAS) |
31 | Burkhard Englert |
Adaptive Algorithms Using Bounded Memory Are Inherently Non-uniform. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPA ![In: Parallel and Distributed Processing and Applications, 4th International Symposium, ISPA 2006, Sorrento, Italy, December 4-6, 2006, Proceedings, pp. 394-405, 2006, Springer, 3-540-68067-5. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
31 | Priyank Kalla, Maciej J. Ciesielski |
A comprehensive approach to the partial scan problem using implicitstate enumeration. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 21(7), pp. 810-826, 2002. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
31 | Alban Douillet, José Nelson Amaral, Guang R. Gao |
Fine-Grain Stacked Register Allocation for the Itanium Architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LCPC ![In: Languages and Compilers for Parallel Computing, 15th Workshop, LCPC 2002, College Park, MD, USA, July 25-27, 2002, Revised Papers, pp. 344-361, 2002, Springer, 3-540-30781-8. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
31 | Jack L. Lo, Sujay S. Parekh, Susan J. Eggers, Henry M. Levy, Dean M. Tullsen |
Software-Directed Register Deallocation for Simultaneous Multithreaded Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 10(9), pp. 922-933, 1999. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
architecture, register file, simultaneous multithreading, Multithreaded architecture |
31 | Hagit Attiya, Alla Gorbach, Shlomo Moran |
Computing in Totally Anonymous Asynchronous Shared Memory Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DISC ![In: Distributed Computing, 12th International Symposium, DISC '98, Andros, Greece, September 24-26, 1998, Proceedings, pp. 49-61, 1998, Springer, 3-540-65066-0. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
31 | Priyank Kalla, Maciej J. Ciesielski |
A comprehensive approach to the partial scan problem using implicit state enumeration. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 1998, Washington, DC, USA, October 18-22, 1998, pp. 651-657, 1998, IEEE Computer Society, 0-7803-5093-6. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
31 | Miodrag Potkonjak, Sujit Dey, Rabindra K. Roy |
Behavioral synthesis of area-efficient testable designs using interaction between hardware sharing and partial scan. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 14(9), pp. 1141-1154, 1995. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
|
31 | Yehuda Afek, Hagit Attiya, Danny Dolev, Eli Gafni, Michael Merritt, Nir Shavit |
Atomic Snapshots of Shared Memory. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. ACM ![In: J. ACM 40(4), pp. 873-890, 1993. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP DOI BibTeX RDF |
consistent state, fault-tolerance, atomic, snapshot |
31 | Bernhard Eschermann, Hans-Joachim Wunderlich |
Optimized synthesis techniques for testable sequential circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 11(3), pp. 301-312, 1992. The full citation details ...](Pics/full.jpeg) |
1992 |
DBLP DOI BibTeX RDF |
|
31 | Henry G. Dietz, Chi-Hung Chi |
CRegs: a new kind of memory for referencing arrays and pointers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SC ![In: Proceedings Supercomputing '88, Orlando, FL, USA, November 12-17, 1988, pp. 360-367, 1988, IEEE Computer Society, 0-8186-0882-X. The full citation details ...](Pics/full.jpeg) |
1988 |
DBLP DOI BibTeX RDF |
|
31 | Thomas Philip |
Using animated color graphics to illustrate software and hardware organizations (abstract only). ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Conference on Computer Science ![In: Proceedings of the 15th ACM Annual Conference on Computer Science, St. Louis, Missouri, USA, February 16-19, 1987, pp. 402, 1987, ACM, 0-89791-218-7. The full citation details ...](Pics/full.jpeg) |
1987 |
DBLP DOI BibTeX RDF |
|
31 | Yesh C. Pendarkar |
The porting of XINU to the system 370 VM/CMS environment (abstract only). ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Conference on Computer Science ![In: Proceedings of the 15th ACM Annual Conference on Computer Science, St. Louis, Missouri, USA, February 16-19, 1987, pp. 463-464, 1987, ACM, 0-89791-218-7. The full citation details ...](Pics/full.jpeg) |
1987 |
DBLP DOI BibTeX RDF |
XINU, IBM System/370 |
31 | Liina Repo, Brett Hashimoto, Veronika Laippala |
In search of founding era registers: automatic modeling of registers from the corpus of Founding Era American English. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Digit. Scholarsh. Humanit. ![In: Digit. Scholarsh. Humanit. 38(4), pp. 1659-1677, November 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
31 | Xing Hu 0009, Sam Toueg |
On implementing SWMR registers from SWSR registers in systems with Byzantine failures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2207.01470, 2022. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
31 | Xing Hu 0009, Sam Toueg |
On Implementing SWMR Registers from SWSR Registers in Systems with Byzantine Failures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DISC ![In: 36th International Symposium on Distributed Computing, DISC 2022, October 25-27, 2022, Augusta, Georgia, USA., pp. 36:1-36:19, 2022, Schloss Dagstuhl - Leibniz-Zentrum für Informatik, 978-3-95977-255-6. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
31 | Jianfei Luo, Jing Xiang |
Three Registers behind two Characters: an Analysis of the Words' Formation and their Registers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CLSW ![In: Chinese Lexical Semantics - 18th Workshop, CLSW 2017, Leshan, China, May 18-20, 2017, Revised Selected Papers, pp. 169-179, 2017, Springer, 978-3-319-73572-6. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
31 | Colette Johnen, Lisa Higham |
Fault-Tolerant Implementations of Regular Registers by Safe Registers with Applications to Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICDCN ![In: Distributed Computing and Networking, 10th International Conference, ICDCN 2009, Hyderabad, India, January 3-6, 2009. Proceedings, pp. 337-348, 2009, Springer, 978-3-540-92294-0. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
31 | Colette Johnen, Lisa Higham |
Fault-tolerant implementations of atomic registers by safe registers in networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PODC ![In: Proceedings of the Twenty-Seventh Annual ACM Symposium on Principles of Distributed Computing, PODC 2008, Toronto, Canada, August 18-21, 2008, pp. 449, 2008, ACM, 978-1-59593-989-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
30 | Cezara Dragoi, Gheorghe Stefanescu |
On Compiling Structured Interactive Programs with Registers and Voices. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SOFSEM ![In: SOFSEM 2008: Theory and Practice of Computer Science, 34th Conference on Current Trends in Theory and Practice of Computer Science, Nový Smokovec, Slovakia, January 19-25, 2008, Proceedings, pp. 259-270, 2008, Springer, 978-3-540-77565-2. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
structured rv-systems, registers and voices, programming languages, interactive systems, operational semantics, compiler correctness |
30 | Bard Bloom |
Constructing Two-Writer Atomic Registers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 37(12), pp. 1506-1514, 1988. The full citation details ...](Pics/full.jpeg) |
1988 |
DBLP DOI BibTeX RDF |
two-writer, memory register, two-writer protocol, protocols, computer architecture, atomic registers, proof of correctness |
30 | C. L. Chen |
Linear Dependencies in Linear Feedback Shift Registers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 35(12), pp. 1086-1092, 1986. The full citation details ...](Pics/full.jpeg) |
1986 |
DBLP DOI BibTeX RDF |
Linear feedback shift registers, test pattern generation, self-test |
30 | Alexis C. Arvillias, Dimitris G. Maritsas |
Toggle-Registers Generating in Parallel k kth Decimations of m-Sequences xp + xk + 1 Design Tables. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 28(2), pp. 89-101, 1979. The full citation details ...](Pics/full.jpeg) |
1979 |
DBLP DOI BibTeX RDF |
Tausworthe generators, linear feedback shift registers (FSR's), primitive trinomials, random number generators, Decimation, m-sequences, key generators |
29 | Nirmal R. Saxena, Edward J. McCluskey |
Parallel Signatur Analysis Design with Bounds on Aliasing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 46(4), pp. 425-438, 1997. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
aliasing probability bounds, parallel signature designs, multiple input signature registers (MISR), linear feedback shift registers, random testing, Signature analysis |
29 | Laung-Terng Wang, Edward J. McCluskey |
Linear Feedback Shift Register Design Using Cyclic Codes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 37(10), pp. 1302-1306, 1988. The full citation details ...](Pics/full.jpeg) |
1988 |
DBLP DOI BibTeX RDF |
feedback, codes, linear-feedback shift registers, shift registers, design technique, test patterns, cyclic codes, pseudoexhaustive testing |
29 | P. Golan, Ondrej Novák, Jan Hlavicka |
Pseudoexhaustive Test Pattern Generator with Enhanced Fault Coverage. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 37(4), pp. 496-500, 1988. The full citation details ...](Pics/full.jpeg) |
1988 |
DBLP DOI BibTeX RDF |
pseudoexhaustive test pattern generation, random access scan, scan addresses, logic testing, integrated circuit testing, feedback, linear feedback shift registers, shift registers |
28 | Minwook Ahn, Yunheung Paek |
Fast Code Generation for Embedded Processors with Aliased Heterogeneous Registers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Trans. High Perform. Embed. Archit. Compil. ![In: Transactions on High-Performance Embedded Architectures and Compilers II, pp. 149-172, 2009, Springer, 978-3-642-00903-7. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
heterogeneous register architecture, register aliasing, compiler, code generation, register allocation, register coalescing |
28 | Hong-Zu Chou, Kai-Hui Chang, Sy-Yen Kuo |
Handling don't-care conditions in high-level synthesis and application for reducing initialized registers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 46th Design Automation Conference, DAC 2009, San Francisco, CA, USA, July 26-31, 2009, pp. 412-415, 2009, ACM, 978-1-60558-497-3. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
RTL symbolic simulation, don't-care (DC), synthesis |
28 | Elena Dubrova, Maxim Teslenko, Hannu Tenhunen |
On Analysis and Synthesis of (n, k)-Non-Linear Feedback Shift Registers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: Design, Automation and Test in Europe, DATE 2008, Munich, Germany, March 10-14, 2008, pp. 1286-1291, 2008, ACM, 978-3-9810801-3-1. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
28 | Andrew Lutomirski, Victor Luchangco |
Efficient Large Almost Wait-Free Single-Writer Multireader Atomic Registers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
OPODIS ![In: Principles of Distributed Systems, 12th International Conference, OPODIS 2008, Luxor, Egypt, December 15-18, 2008. Proceedings, pp. 560-563, 2008, Springer, 978-3-540-92220-9. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
28 | Nainesh Agarwal, Nikitas J. Dimopoulos |
Automated Power Gating of Registers Using CoDeL and FSM Branch Prediction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SAMOS ![In: Embedded Computer Systems: Architectures, Modeling, and Simulation, 7th International Workshop, SAMOS 2007, Samos, Greece, July 16-19, 2007, Proceedings, pp. 294-303, 2007, Springer, 978-3-540-73622-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
28 | Je-Hyung Lee, Jinpyo Park, Soo-Mook Moon |
Securing More Registers with Reduced Instruction Encoding Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
RTCSA ![In: 13th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA 2007), 21-24 August 2007, Daegu, Korea, pp. 417-425, 2007, IEEE Computer Society, 0-7695-2975-5. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
28 | Nainesh Agarwal, Nikitas J. Dimopoulos |
Towards Automated Power Gating of Registers using CoDeL. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2007), 27-20 May 2007, New Orleans, Louisiana, USA, pp. 1629-1632, 2007, IEEE, 1-4244-0920-9. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
28 | Yongqiang Lu 0001, Cliff C. N. Sze, Xianlong Hong, Qiang Zhou 0001, Yici Cai, Liang Huang, Jiang Hu |
Navigating registers in placement for clock network minimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 42nd Design Automation Conference, DAC 2005, San Diego, CA, USA, June 13-17, 2005, pp. 176-181, 2005, ACM, 1-59593-058-2. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
low power, placement, clock network, variation tolerance |
28 | Andrew Klapper |
A Survey of Feedback with Carry Shift Registers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SETA ![In: Sequences and Their Applications - SETA 2004, Third International Conference, Seoul, Korea, October 24-28, 2004, Revised Selected Papers, pp. 56-71, 2004, Springer, 3-540-26084-6. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
28 | César Sánchez 0002, José Joaquín Rieta, Francisco Castells, Raúl Alcaraz 0001, José Millet |
Wavelet Domain Blind Signal Separation to Analyze Supraventricular Arrhythmias from Holter Registers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICA ![In: Independent Component Analysis and Blind Signal Separation, Fifth International Conference, ICA 2004, Granada, Spain, September 22-24, 2004, Proceedings, pp. 1111-1117, 2004, Springer, 3-540-23056-4. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
28 | Pradeep Varma |
Wait-Free Publish/Subscribe Using Atomic Registers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PPAM ![In: Parallel Processing and Applied Mathematics, 5th International Conference, PPAM 2003, Czestochowa, Poland, September 7-10, 2003. Revised Papers, pp. 69-76, 2003, Springer, 3-540-21946-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
28 | Andrew W. Appel, Lal George |
Optimal Spilling for CISC Machines with Few Registers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PLDI ![In: Proceedings of the 2001 ACM SIGPLAN Conference on Programming Language Design and Implementation (PLDI), Snowbird, Utah, USA, June 20-22, 2001, pp. 243-253, 2001, ACM, 1-58113-414-2. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
28 | Markus Feldbach, Klaus D. Tönnies |
Robust Line Detection in Historical Church Registers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAGM-Symposium ![In: Pattern Recognition, 23rd DAGM-Symposium, Munich, Germany, September 12-14, 2001, Proceedings, pp. 140-147, 2001, Springer, 3-540-42596-9. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
text line detection, Handwriting recognition, document image processing |
28 | Markus Feldbach, Klaus D. Tönnies |
Line Detection and Segmentation in Historical Church Registers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICDAR ![In: 6th International Conference on Document Analysis and Recognition (ICDAR 2001), 10-13 September 2001, Seattle, WA, USA, pp. 743-747, 2001, IEEE Computer Society, 0-7695-1263-1. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
28 | Chih-Yung Chang, Tzung-Shi Chen, Jang-Ping Sheu |
Improving Memory Traffic by Assembly-Level Exploitation of Reuses for Vector Registers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Supercomput. ![In: J. Supercomput. 17(2), pp. 187-204, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
vector register, partial reuse, vector compilers, vectorization, data dependence, supercomputer, reuse distance |
28 | Dhiren Xavier, Robert C. Aitken, André Ivanov, Vinod K. Agarwal |
Using an asymmetric error model to study aliasing in signature analysis registers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 11(1), pp. 16-25, 1992. The full citation details ...](Pics/full.jpeg) |
1992 |
DBLP DOI BibTeX RDF |
|
28 | Maurizio Damiani, Piero Olivo, Michele Favalli, Silvia Ercolani, Bruno Riccò |
Aliasing in signature analysis testing with multiple input shift registers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 9(12), pp. 1344-1353, 1990. The full citation details ...](Pics/full.jpeg) |
1990 |
DBLP DOI BibTeX RDF |
|
28 | Tom W. Williams, Wilfried Daehn, Matthias Gruetzner, Corot W. Starke |
Bounds and analysis of aliasing errors in linear feedback shift registers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 7(1), pp. 75-83, 1988. The full citation details ...](Pics/full.jpeg) |
1988 |
DBLP DOI BibTeX RDF |
|
28 | Bernhard Smeets |
A Note On Sequences Generated by Clock Controlled Shift Registers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EUROCRYPT ![In: Advances in Cryptology - EUROCRYPT '85, Workshop on the Theory and Application of of Cryptographic Techniques, Linz, Austria, April 1985, Proceedings, pp. 142-148, 1985, Springer, 3-540-16468-5. The full citation details ...](Pics/full.jpeg) |
1985 |
DBLP DOI BibTeX RDF |
|
28 | Dieter Gollmann |
Pseudo Random Properties of Cascade Connections of Clock Controlled Shift Registers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EUROCRYPT ![In: Advances in Cryptology: Proceedings of EUROCRYPT 84, A Workshop on the Theory and Application of of Cryptographic Techniques, Paris, France, April 9-11, 1984, Proceedings, pp. 93-98, 1984, Springer, 3-540-16076-0. The full citation details ...](Pics/full.jpeg) |
1984 |
DBLP DOI BibTeX RDF |
|
27 | Stefan Vijzelaar, Herbert Bos, Wan J. Fokkink |
Brief announcement: a shared disk on distributed storage. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PODC ![In: Proceedings of the 29th Annual ACM Symposium on Principles of Distributed Computing, PODC 2010, Zurich, Switzerland, July 25-28, 2010, pp. 79-80, 2010, ACM, 978-1-60558-888-9. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
probabilistic consensus, shared disk semantics, strict linearizability, consistency, redundancy, storage, atomic registers |
27 | Rainer Göttfert |
Sequences of Period 2N-2. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SETA ![In: Sequences and Their Applications - SETA 2006, 4th International Conference, Beijing, China, September 24-28, 2006, Proceedings, pp. 223-236, 2006, Springer, 3-540-44523-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
Periodic sequences, nonlinear feedback shift registers, minimal polynomial |
27 | Janusz Rajski, Jerzy Tyszer |
Primitive Polynomials Over GF(2) of Degree up to 660 with Uniformly Distributed Coefficients. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 19(6), pp. 645-657, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
ring generators, linear feedback shift registers, primitive polynomials |
27 | Jovan Dj. Golic, Renato Menicocci |
Correlation Attacks on Up/Down Cascades. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACISP ![In: Information Security and Privacy, Third Australasian Conference, ACISP'98, Brisbane, Queensland, Australia, July 1998, Proceedings, pp. 123-134, 1998, Springer, 3-540-64732-5. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
clock-controlled shift registers, up/down and stop/go cascades, cryptanalysis, Stream ciphers, correlation attacks |
27 | Albrecht P. Stroele |
Test response compaction using arithmetic functions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 14th IEEE VLSI Test Symposium (VTS'96), April 28 - May 1, 1996, Princeton, NJ, USA, pp. 380-386, 1996, IEEE Computer Society, 0-8186-7304-4. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
arithmetic functions, combinational faults, underflow, feed back, logic testing, built-in self test, digital arithmetic, test pattern generation, adders, circuits, registers, aliasing probability, overflow, subtracters, test response compaction, arithmetic logic units |
27 | Hagit Attiya, Amotz Bar-Noy, Danny Dolev |
Sharing Memory Robustly in Message-Passing Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. ACM ![In: J. ACM 42(1), pp. 124-142, 1995. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
processor and link failures, fault-tolerance, message passing, shared memory, emulation, atomic registers, wait-freedom |
25 | Shih-Hsu Huang, Chia-Ming Chang 0002, Yow-Tyng Nieh |
Opposite-phase register switching for peak current minimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Design Autom. Electr. Syst. ![In: ACM Trans. Design Autom. Electr. Syst. 14(1), pp. 14:1-14:29, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
peak current, sequential circuit synthesis, Logic synthesis, IC testing |
25 | Marcos Kawazoe Aguilera, Ram Swaminathan |
Remote storage with byzantine servers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SPAA ![In: SPAA 2009: Proceedings of the 21st Annual ACM Symposium on Parallelism in Algorithms and Architectures, Calgary, Alberta, Canada, August 11-13, 2009, pp. 280-289, 2009, ACM, 978-1-60558-606-9. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
distributed system, algorithms, digital signatures, distributed storage, byzantine failures |
25 | Ozgur Sinanoglu, Tsvetomir Petrov |
Isolation Techniques for Soft Cores. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27(8), pp. 1453-1466, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
25 | Joseph J. Sharkey, Jason Loew, Dmitry V. Ponomarev |
Reducing register pressure in SMT processors through L2-miss-driven early register release. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Archit. Code Optim. ![In: ACM Trans. Archit. Code Optim. 5(3), pp. 13:1-13:28, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
register file, Simultaneous multithreading |
25 | Mounira Bachir, Sid Ahmed Ali Touati, Albert Cohen 0001 |
Post-pass periodic register allocation to minimise loop unrolling degree. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LCTES ![In: Proceedings of the 2008 ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES'08), Tucson, AZ, USA, June 12-13, 2008, pp. 141-150, 2008, ACM, 978-1-60558-104-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
embedded code optimisation, periodic register allocation, software pipelining, loop unrolling |
25 | Mahdi Fazeli, Seyed Nematollah Ahmadian, Seyed Ghassem Miremadi |
A Low Energy Soft Error-Tolerant Register File Architecture for Embedded Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HASE ![In: 11th IEEE High Assurance Systems Engineering Symposium, HASE 2008, Nanjing, China, December 3 - 5, 2008, pp. 109-116, 2008, IEEE Computer Society, 978-0-7695-3482-4. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
25 | Pushkar Tripathi, Rohan Jain, Srikanth Kurra, Preeti Ranjan Panda |
REWIRED - Register Write Inhibition by Resource Dedication. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 13th Asia South Pacific Design Automation Conference, ASP-DAC 2008, Seoul, Korea, January 21-24, 2008, pp. 28-31, 2008, IEEE, 978-1-4244-1921-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
25 | Sid Ahmed Ali Touati |
On the Periodic Register Need in Software Pipelining. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 56(11), pp. 1493-1504, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
Periodic Register Requirement, MAXLIVE, Periodic Register Sufficiency, Stage Scheduling, Instruction Level Parallelism, Software Pipelining |
25 | Pablo Montesinos, Wei Liu 0014, Josep Torrellas |
Using Register Lifetime Predictions to Protect Register Files against Soft Errors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DSN ![In: The 37th Annual IEEE/IFIP International Conference on Dependable Systems and Networks, DSN 2007, 25-28 June 2007, Edinburgh, UK, Proceedings, pp. 286-296, 2007, IEEE Computer Society, 0-7695-2855-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
25 | Jonathan K. Lee, Jens Palsberg, Fernando Magno Quintão Pereira |
Aliased Register Allocation for Straight-Line Programs Is NP-Complete. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICALP ![In: Automata, Languages and Programming, 34th International Colloquium, ICALP 2007, Wroclaw, Poland, July 9-13, 2007, Proceedings, pp. 680-691, 2007, Springer, 978-3-540-73419-2. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
25 | Joseph J. Sharkey, Dmitry V. Ponomarev |
An L2-miss-driven early register deallocation for SMT processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICS ![In: Proceedings of the 21th Annual International Conference on Supercomputing, ICS 2007, Seattle, Washington, USA, June 17-21, 2007, pp. 138-147, 2007, ACM, 978-1-59593-768-1. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
register files, simultaneous multithreading |
25 | Hiroaki Tanaka, Yoshinori Takeuchi, Keishi Sakanushi, Masaharu Imai, Yutaka Ota, Nobu Matsumoto, Masaki Nakagawa |
Pack instruction generation for media pUsing multi-valued decision diagram. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CODES+ISSS ![In: Proceedings of the 4th International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2006, Seoul, Korea, October 22-25, 2006, pp. 154-159, 2006, ACM, 1-59593-370-0. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
multi-valued decision diagram, SIMD instructions |
25 | Rajiv A. Ravindran, Robert M. Senger, Eric D. Marsman, Ganesh S. Dasika, Matthew R. Guthaus, Scott A. Mahlke, Richard B. Brown |
Partitioning Variables across Register Windows to Reduce Spill Code in a Low-Power Processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 54(8), pp. 998-1012, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
optimization, Code generation, low-power design, graph partitioning, embedded processor, retargetable compilers, spill code, instruction encoding, register window |
25 | Timothy M. Jones 0001, Michael F. P. O'Boyle, Jaume Abella 0001, Antonio González 0001, Oguz Ergin |
Compiler Directed Early Register Release. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE PACT ![In: 14th International Conference on Parallel Architectures and Compilation Techniques (PACT 2005), 17-21 September 2005, St. Louis, MO, USA, pp. 110-122, 2005, IEEE Computer Society, 0-7695-2429-X. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
25 | Gokhan Memik, Masud H. Chowdhury, Arindam Mallik, Yehea I. Ismail |
Engineering Over-Clocking: Reliability-Performance Trade-Offs for High-Performance Register Files. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DSN ![In: 2005 International Conference on Dependable Systems and Networks (DSN 2005), 28 June - 1 July 2005, Yokohama, Japan, Proceedings, pp. 770-779, 2005, IEEE Computer Society, 0-7695-2282-3. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
25 | Alban Douillet, Guang R. Gao |
Register Pressure in Software-Pipelined Loop Nests: Fast Computation and Impact on Architecture Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LCPC ![In: Languages and Compilers for Parallel Computing, 18th International Workshop, LCPC 2005, Hawthorne, NY, USA, October 20-22, 2005, Revised Selected Papers, pp. 17-31, 2005, Springer, 978-3-540-69329-1. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
25 | Bogdan S. Chlebus, Dariusz R. Kowalski |
Cooperative asynchronous update of shared memory. ![Search on Bibsonomy](Pics/bibsonomy.png) |
STOC ![In: Proceedings of the 37th Annual ACM Symposium on Theory of Computing, Baltimore, MD, USA, May 22-24, 2005, pp. 733-739, 2005, ACM, 1-58113-960-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
problem Write-All, read and write register, work efficiency, distributed algorithm, expander, asynchrony, disperser |
25 | Gadi Taubenfeld |
The Black-White Bakery Algorithm and Related Bounded-Space, Adaptive, Local-Spinning and FIFO Algorithms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DISC ![In: Distributed Computing, 18th International Conference, DISC 2004, Amsterdam, The Netherlands, October 4-7, 2004, Proceedings, pp. 56-70, 2004, Springer, 3-540-23306-7. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
25 | Ittai Abraham, Gregory V. Chockler, Idit Keidar, Dahlia Malkhi |
Byzantine disk paxos: optimal resilience with byzantine shared memory. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PODC ![In: Proceedings of the Twenty-Third Annual ACM Symposium on Principles of Distributed Computing, PODC 2004, St. John's, Newfoundland, Canada, July 25-28, 2004, pp. 226-235, 2004, ACM, 1-58113-802-4. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
termination conditions, consensus, Byzantine failures, shared-memory emulations |
25 | Bernard Goossens |
The Instruction Register File. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PaCT ![In: Parallel Computing Technologies, 7th International Conference, PaCT 2003, Novosibirsk, Russia, September 15-19, 2003, Proceedings, pp. 467-481, 2003, Springer, 3-540-40673-5. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
25 | Deshanand P. Singh, Stephen Dean Brown |
Integrated retiming and placement for field programmable gate arrays. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the ACM/SIGDA International Symposium on Field Programmable Gate Arrays, FPGA 2002, Monterey, CA, USA, February 24-26, 2002, pp. 67-76, 2002, ACM, 1-58113-452-5. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
25 | Stefan R. Meier, Mario Steinert, Steffen Buch |
Testability of path history memories with register-exchange architecture used in Viterbi-decoders. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (3) ![In: Proceedings of the 2002 International Symposium on Circuits and Systems, ISCAS 2002, Scottsdale, Arizona, USA, May 26-29, 2002, pp. 165-168, 2002, IEEE, 0-7803-7448-7. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
25 | Doaa A. Nassar, Aly E. Salama |
A heuristic DSP BIST insertion algorithm with minimum area overhead. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (1) ![In: Proceedings of the 2002 International Symposium on Circuits and Systems, ISCAS 2002, Scottsdale, Arizona, USA, May 26-29, 2002, pp. 585-588, 2002, IEEE, 0-7803-7448-7. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
25 | Andreas Kuehlmann, Jason Baumgartner |
Transformation-Based Verification Using Generalized Retiming. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CAV ![In: Computer Aided Verification, 13th International Conference, CAV 2001, Paris, France, July 18-22, 2001, Proceedings, pp. 104-117, 2001, Springer, 3-540-42345-1. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
25 | Sid Ahmed Ali Touati |
Register Saturation in Superscalar and VLIW Codes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CC ![In: Compiler Construction, 10th International Conference, CC 2001 Held as Part of the Joint European Conferences on Theory and Practice of Software, ETAPS 2001 Genova, Italy, April 2-6, 2001, Proceedings, pp. 213-228, 2001, Springer, 3-540-41861-X. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
25 | Shlomi Dolev, Ted Herman |
Dijkstra's Self-Stabilizing Algorithm in Unsupportive Environments. ![Search on Bibsonomy](Pics/bibsonomy.png) |
WSS ![In: Self-Stabilizing Systems, 5th International Workshop, WSS 2001, Lisbon, Portugal, October 1-2, 2001, Proceedings, pp. 67-81, 2001, Springer, 3-540-42653-1. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
25 | Ihn-Han Bae |
A Quorum-Based Dynamic Location Management Method for Mobile Computings. ![Search on Bibsonomy](Pics/bibsonomy.png) |
RTCSA ![In: 6th International Workshop on Real-Time Computing and Applications Symposium (RTCSA '99), 13-16 December 1999, Hong Kong, China, pp. 398-, 1999, IEEE Computer Society, 0-7695-0306-3. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
location management, quorum, mobile computing systems |
25 | Ramaswamy Govindarajan, Chihong Zhang, Guang R. Gao |
Minimum Register Instruction Scheduling: A New Approach for Dynamic Instruction Issue Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LCPC ![In: Languages and Compilers for Parallel Computing, 12th International Workshop, LCPC'99, La Jolla/San Diego, CA, USA, August 4-6, 1999, Proceedings, pp. 70-84, 1999, Springer, 3-540-67858-1. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
25 | Faith E. Fich, Maurice Herlihy, Nir Shavit |
On the Space Complexity of Randomized Synchronization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. ACM ![In: J. ACM 45(5), pp. 843-862, 1998. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
lower bounds, consensus, space complexity |
25 | Kazuhito Ito, Keshab K. Parhi |
A Generalized Technique for Register Counting and its Application to Cost-Optimal DSP Architecture Synthesis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. VLSI Signal Process. ![In: J. VLSI Signal Process. 16(1), pp. 57-72, 1997. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
25 | Joseph D. Oldham, V. Wiktor Marek, Miroslaw Truszczynski |
Intelligent Computation of Presentation Documents. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISMIS ![In: Foundations of Intelligent Systems, 10th International Symposium, ISMIS '97, Charlotte, North Carolina, USA, October 15-18, 1997, Proceedings, pp. 560-569, 1997, Springer, 3-540-63614-5. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
25 | Keith I. Farkas, Norman P. Jouppi, Paul Chow |
Register File Design Considerations in Dynamically Scheduled Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCA ![In: Proceedings of the Second International Symposium on High-Performance Computer Architecture, San Jose, CA, USA, February 3-7, 1996, pp. 40-51, 1996, IEEE Computer Society, 0-8186-7237-4. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
dynamic scheduling, register files, register renaming |
25 | Steven L. Scott |
Synchronization and Communication in the T3E Multiprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASPLOS ![In: ASPLOS-VII Proceedings - Seventh International Conference on Architectural Support for Programming Languages and Operating Systems, Cambridge, Massachusetts, USA, October 1-5, 1996., pp. 26-36, 1996, ACM Press, 0-89791-767-7. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
|
25 | Nam Sung Woo |
A Global, Dynamic Register Allocation and Binding for a Data Path Synthesis System. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 27th ACM/IEEE Design Automation Conference. Orlando, Florida, USA, June 24-28, 1990., pp. 505-510, 1990, IEEE Computer Society Press, 0-89791-363-9. The full citation details ...](Pics/full.jpeg) |
1990 |
DBLP DOI BibTeX RDF |
|
25 | Lefteris M. Kirousis, Evangelos Kranakis, Paul M. B. Vitányi |
Atomic Multireader Register. ![Search on Bibsonomy](Pics/bibsonomy.png) |
WDAG ![In: Distributed Algorithms, 2nd International Workshop, Amsterdam, The Netherlands, July 8-10, 1987, Proceedings, pp. 278-296, 1987, Springer, 3-540-19366-9. The full citation details ...](Pics/full.jpeg) |
1987 |
DBLP DOI BibTeX RDF |
regular, atomic, Register, reader, writer, shared register |
22 | Andreas Larsson, Anders Gidenstam, Phuong Hoai Ha, Marina Papatriantafilou, Philippas Tsigas |
Multiword atomic read/write registers on multiprocessor systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM J. Exp. Algorithmics ![In: ACM J. Exp. Algorithmics 13, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
synchronization, wait-free, Atomic register |
22 | François Arnault, Thierry P. Berger |
Correction to "Feedback With Carry Shift Registers Synthesis With the Euclidean Algorithm" [May 04 910-917]. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Inf. Theory ![In: IEEE Trans. Inf. Theory 54(1), pp. 502, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
22 | Sultan Al-Hinai, Lynn Margaret Batten, Bernard D. Colbert |
Mutually Clock-Controlled Feedback Shift Registers Provide Resistance to Algebraic Attacks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Inscrypt ![In: Information Security and Cryptology, Third SKLOIS Conference, Inscrypt 2007, Xining, China, August 31 - September 5, 2007, Revised Selected Papers, pp. 201-215, 2007, Springer, 978-3-540-79498-1. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
stream cipher, algebraic attacks, clock-control |
22 | Qunfeng Dong, Suman Banerjee 0001, Jia Wang, Dheeraj Agrawal |
Wire speed packet classification without tcams: a few more registers (and a bit of logic) are enough. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SIGMETRICS ![In: Proceedings of the 2007 ACM SIGMETRICS International Conference on Measurement and Modeling of Computer Systems, SIGMETRICS 2007, San Diego, California, USA, June 12-16, 2007, pp. 253-264, 2007, ACM, 978-1-59593-639-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
rule cache, rule evolution, packet classification |
22 | Cédric Lauradoux |
From Hardware to Software Synthesis of Linear Feedback Shift Registers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 21th International Parallel and Distributed Processing Symposium (IPDPS 2007), Proceedings, 26-30 March 2007, Long Beach, California, USA, pp. 1-8, 2007, IEEE. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
22 | Jie Li, John C. Lach |
Negative-skewed shadow registers for at-speed delay variation characterization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 25th International Conference on Computer Design, ICCD 2007, 7-10 October 2007, Lake Tahoe, CA, USA, Proceedings, pp. 354-359, 2007, IEEE, 1-4244-1258-7. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
22 | Hai Lin 0004, Yunsi Fei |
Utilizing custom registers in application-specific instruction set processors for register spills elimination. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 17th ACM Great Lakes Symposium on VLSI 2007, Stresa, Lago Maggiore, Italy, March 11-13, 2007, pp. 323-328, 2007, ACM, 978-1-59593-605-9. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
custom register, ASIP, register file |
22 | Mark Goresky, Andrew Klapper |
Pseudonoise sequences based on algebraic feedback shift registers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Inf. Theory ![In: IEEE Trans. Inf. Theory 52(4), pp. 1649-1662, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
22 | William R. Roberts, Dimitrios Velenis |
Power supply variation effects on timing characteristics of clocked registers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2006), 21-24 May 2006, Island of Kos, Greece, 2006, IEEE, 0-7803-9389-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
22 | William R. Roberts, Dimitrios Velenis |
Effects of process and environmental variations on timing characteristics of clocked registers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 16th ACM Great Lakes Symposium on VLSI 2006, Philadelphia, PA, USA, April 30 - May 1, 2006, pp. 165-168, 2006, ACM, 1-59593-347-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
22 | William R. Roberts, Dimitrios Velenis |
Parameter Variation Effects on Timing Characteristics of High Performance Clocked Registers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PATMOS ![In: Integrated Circuit and System Design, Power and Timing Modeling, Optimization and Simulation, 15th International Workshop, PATMOS 2005, Leuven, Belgium, September 21-23, 2005, Proceedings, pp. 508-517, 2005, Springer, 3-540-29013-3. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
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