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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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Results
Found 16149 publication records. Showing 16145 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
38 | Yuhua Chen, Wenkuo Liu, Hongwei Wang, Jilin Xie, Timing Zhang, Limeng Yin, Yongde Huang |
Effect of Ti Content on the Microstructure and Properties of CoCrFeNiMnTix High Entropy Alloy. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Entropy ![In: Entropy 24(2), pp. 241, 2022. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
38 | Yufan Yan, Timing Qu, Francesco Grilli |
Numerical Modeling of AC Loss in HTS Coated Conductors and Roebel Cable Using T-A Formulation and Comparison With H Formulation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Access ![In: IEEE Access 9, pp. 49649-49659, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
38 | Timing Li, Lei Yang, Kewen Li, Jiannan Zhai |
An Intelligent Fusion Algorithm and Its Application Based on Subgroup Migration and Adaptive Boosting. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Symmetry ![In: Symmetry 13(4), pp. 569, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
38 | Timing Li, Yongzhe Zhang, Kewen Li, Yongqi Liang, Xiangbo Ma |
A multi-objective optimization algorithm based on subgroup stratified coarse-grained model and its application. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Comput. Electr. Eng. ![In: Comput. Electr. Eng. 92, pp. 107180, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
38 | Yimin Dou, Kewen Li, Jianbing Zhu, Timing Li, Shaoquan Tan, Zongchao Huang |
Efficient Training of 3D Seismic Image Fault Segmentation Network under Sparse Labels by Weakening Anomaly Annotation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2110.05319, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP BibTeX RDF |
|
38 | Zhengqiu Weng, Timing Chen, Tiantian Zhu, Hang Dong, Dan Zhou, Osama Alfarraj |
TLSmell: Direct Identification on Malicious HTTPs Encryption Traffic with Simple Connection-Specific Indicators. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Comput. Syst. Sci. Eng. ![In: Comput. Syst. Sci. Eng. 37(1), pp. 105-119, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
38 | Kewen Li, Mingxiao Yu, Lu Liu, Timing Li, Jiannan Zhai |
Feature Selection Method Based on Weighted Mutual Information for Imbalanced Data. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Int. J. Softw. Eng. Knowl. Eng. ![In: Int. J. Softw. Eng. Knowl. Eng. 28(8), pp. 1177-1194, 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
38 | Kewen Li, Lu Liu, Jiannan Zhai, Taghi M. Khoshgoftaar, Timing Li |
The improved grey model based on particle swarm optimization algorithm for time series prediction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Eng. Appl. Artif. Intell. ![In: Eng. Appl. Artif. Intell. 55, pp. 285-291, 2016. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
38 | Navin Kashyap, David L. Neuhoff |
Data Synchronization With Timing: The Variable-Rate Case. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Inf. Theory ![In: IEEE Trans. Inf. Theory 55(1), pp. 46-52, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
38 | Seung Joon Lee, Norman C. Beaulieu |
A Novel Pulse Designed to Jointly Optimize Symbol Timing Estimation Performance and the Mean Squared Error of Recovered Data. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Wirel. Commun. ![In: IEEE Trans. Wirel. Commun. 7(11-1), pp. 4064-4069, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
38 | Liu Yang, Sheqin Dong, Yuchun Ma, Xianlong Hong |
Interconnect Power Optimization Based on Timing Analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISVLSI ![In: 2007 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2007), May 9-11, 2007, Porto Alegre, Brazil, pp. 119-124, 2007, IEEE Computer Society, 0-7695-2896-1. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
38 | Yinglong Ma, Beihong Jin, Yuancheng Li, Kehe Wu |
A Timing Analysis Model for Ontology Evolutions Based on Distributed Environments. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PAKDD ![In: Advances in Knowledge Discovery and Data Mining, 11th Pacific-Asia Conference, PAKDD 2007, Nanjing, China, May 22-25, 2007, Proceedings, pp. 183-192, 2007, Springer, 978-3-540-71700-3. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
38 | Zhi Tian, Georgios B. Giannakis |
A GLRT approach to data-aided timing acquisition in UWB radios-Part II: training sequence design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Wirel. Commun. ![In: IEEE Trans. Wirel. Commun. 4(6), pp. 2994-3004, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
38 | Ken Tseng, Mark Horowitz |
False coupling exploration in timing analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 24(11), pp. 1795-1805, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
38 | Rob A. Rutenbar, Li-C. Wang, Kwang-Ting Cheng, Sandip Kundu |
Static statistical timing analysis for latch-based pipeline designs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: 2004 International Conference on Computer-Aided Design, ICCAD 2004, San Jose, CA, USA, November 7-11, 2004, pp. 468-472, 2004, IEEE Computer Society / ACM, 0-7803-8702-3. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
38 | Angela Krstic, Li-C. Wang, Kwang-Ting Cheng, T. M. Mak |
Diagnosis-Based Post-Silicon Timing Validation Using Statistical Tools and Methodologies. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings 2003 International Test Conference (ITC 2003), Breaking Test Interface Bottlenecks, 28 September - 3 October 2003, Charlotte, NC, USA, pp. 339-348, 2003, IEEE Computer Society, 0-7803-8106-8. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
38 | Rita Yu Chen, Paul Yip, Georgios K. Konstadinidis, Andrew Demas, Fabian Klass, Robert E. Mains, Margaret Schmitt, Dina Bistry |
Timing Window Applications in UltraSPARC-IIIi? Microprocessor Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 20th International Conference on Computer Design (ICCD 2002), VLSI in Computers and Processors, 16-18 September 2002, Freiburg, Germany, Proceedings, pp. 158-163, 2002, IEEE Computer Society, 0-7695-1700-5. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
38 | Cho W. Moon, Harish Kriplani, Krishna P. Belkhale |
Timing model extraction of hierarchical blocks by graph reduction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 39th Design Automation Conference, DAC 2002, New Orleans, LA, USA, June 10-14, 2002, pp. 152-157, 2002, ACM, 1-58113-461-4. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
38 | Hsiao-Pin Su, Allen C.-H. Wu, Youn-Long Lin |
A timing-driven soft-macro placement and resynthesis method in interaction with chip floorplanning. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 18(4), pp. 475-483, 1999. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
38 | Rajat Aggarwal, Rajeev Murgai, Masahiro Fujita |
Speeding up technology-independent timing optimization by network partitioning. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: Proceedings of the 1997 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 1997, San Jose, CA, USA, November 9-13, 1997, pp. 83-90, 1997, IEEE Computer Society / ACM, 0-8186-8200-0. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
38 | Louise E. Moser, P. M. Melliar-Smith |
Analysis of Timing Hazards in Ada Programs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Conference on Computer Science ![In: Proceedings of the ACM 21th Conference on Computer Science, CSC '93, Indianapolis, IN, USA, February 16-18, 1993, pp. 326-331, 1993, ACM, 0-89791-558-5. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP DOI BibTeX RDF |
Ada |
38 | Michiaki Muraoka, Hirokazu Iida, Hideyuki Kikuchihara, Michio Murakami, Kazuyuki Hirakawa |
ACTAS: an accurate timing analysis system for VLSI. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 22nd ACM/IEEE conference on Design automation, DAC 1985, Las Vegas, Nevada, USA, 1985., pp. 152-158, 1985, ACM, 0-8186-0635-5. The full citation details ...](Pics/full.jpeg) |
1985 |
DBLP DOI BibTeX RDF |
|
38 | Thomas Lundqvist, Per Stenström |
Timing Anomalies in Dynamically Scheduled Microprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
RTSS ![In: Proceedings of the 20th IEEE Real-Time Systems Symposium, Phoenix, AZ, USA, December 1-3, 1999, pp. 12-21, 1999, IEEE Computer Society, 0-7695-0475-2. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
timing anomaly, Real-time systems, resource allocation, timing analysis, worst-case execution time, out-of-order execution, dynamically scheduled processor |
38 | Hakan Yalcin, John P. Hayes |
Hierarchical timing analysis using conditional delays. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: Proceedings of the 1995 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 1995, San Jose, California, USA, November 5-9, 1995, pp. 371-377, 1995, IEEE Computer Society / ACM, 0-8186-7213-7. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
Hierarchical timing analysis, conditional delays, symbolic analysis, timing modeling, path sensitization, high-level modeling |
38 | Aaron J. Gordon, Raphael A. Finkel |
Handling Timing Errors in Distributed Programs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Software Eng. ![In: IEEE Trans. Software Eng. 14(10), pp. 1525-1535, 1988. The full citation details ...](Pics/full.jpeg) |
1988 |
DBLP DOI BibTeX RDF |
postmortem debugger, history-keeping mechanism, distributed processing, software tools, program testing, directed graph, directed graphs, distributed programs, interprocess communication, TAP, timing errors, timing graph |
37 | Benjamin Carrión Schäfer, Taewhan Kim |
Hotspots Elimination and Temperature Flattening in VLSI Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 16(11), pp. 1475-1487, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
37 | Michel Raynal, Gadi Taubenfeld |
The notion of a timed register and its application to indulgent synchronization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SPAA ![In: SPAA 2007: Proceedings of the 19th Annual ACM Symposium on Parallelism in Algorithms and Architectures, San Diego, California, USA, June 9-11, 2007, pp. 200-209, 2007, ACM, 978-1-59593-667-7. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
test&set, timing assumption, universal object, wait-free implementation, consensus, mutual exclusion, timing constraint, contention manager, process crash, simplicity, atomic register, renaming, concurrent object, asynchronous shared memory system |
36 | Miodrag Vujkovic, David Wadkins, William Swartz, Carl Sechen |
Efficient timing closure without timing driven placement and routing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 41th Design Automation Conference, DAC 2004, San Diego, CA, USA, June 7-11, 2004, pp. 268-273, 2004, ACM, 1-58113-828-8. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
digital design flow, gate sizing, placement and routing, timing closure |
36 | Anders Edman, Christer Svensson |
Timing closure through a globally synchronous, timing partitioned design methodology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 41th Design Automation Conference, DAC 2004, San Diego, CA, USA, June 7-11, 2004, pp. 71-74, 2004, ACM, 1-58113-828-8. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
wire delays, clock skew, timing closure |
36 | Johan Nordlander, Rolf Johansson, Risat Mahmud Pathan |
Unambiguous semantics in automotive timing modeling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EDCC-CARS ![In: 1st Workshop on Critical Automotive Applications: Robustness & Safety, CARS 2010 (EDCC Workshop), Valencia, Spain, 27 April 2010, pp. 39-42, 2010, ACM, 978-1-60558-915-2. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
modeling, synchronization, delay constraints, timing semantics |
36 | Jae-Seok Yang, Krit Athikulwongse, Young-Joon Lee, Sung Kyu Lim, David Z. Pan |
TSV stress aware timing analysis with applications to 3D-IC layout optimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 47th Design Automation Conference, DAC 2010, Anaheim, California, USA, July 13-18, 2010, pp. 803-806, 2010, ACM, 978-1-4503-0002-5. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
mobility variation, timing analysis, stress, TSV, 3DIC |
36 | Samarjit Chakraborty, Tulika Mitra, Abhik Roychoudhury, Lothar Thiele |
Cache-aware timing analysis of streaming applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Real Time Syst. ![In: Real Time Syst. 41(1), pp. 52-85, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
Timing analysis, Instruction cache, Streaming applications |
36 | Vicente Torres-Carot, A. Perez-Pascual, T. Sansaloni, Javier Valls |
Design and FPGA-Implementation of a High Performance Timing Recovery Loop for Broadband Communications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Signal Process. Syst. ![In: J. Signal Process. Syst. 56(1), pp. 17-23, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
Timing recovery, FPGA, Synchronization, SDR, Feedback loop |
36 | Yusuke Okuno, Takayuki Kanda 0001, Michita Imai, Hiroshi Ishiguro, Norihiro Hagita |
Providing route directions: design of robot's utterance, gesture, and timing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HRI ![In: Proceedings of the 4th ACM/IEEE International Conference on Human Robot Interaction, HRI 2009, La Jolla, California, USA, March 9-13, 2009, pp. 53-60, 2009, ACM, 978-1-60558-404-1. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
gesture, timing, route directions |
36 | David D. Ling, Chandu Visweswariah, Peter Feldmann, Soroush Abbaspour |
A moment-based effective characterization waveform for static timing analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 46th Design Automation Conference, DAC 2009, San Francisco, CA, USA, July 26-31, 2009, pp. 19-24, 2009, ACM, 978-1-60558-497-3. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
timing analysis, current source model |
36 | Keith So |
Enforcing long-path timing closure for FPGA routing with path searches on clamped lexicographic spirals. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the ACM/SIGDA 16th International Symposium on Field Programmable Gate Arrays, FPGA 2008, Monterey, California, USA, February 24-26, 2008, pp. 24-34, 2008, ACM, 978-1-59593-934-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
lexicographic search, negotiated congestion, timing-driven routing, FPGA |
36 | Wenyuan Xu 0001, Wade Trappe, Yanyong Zhang |
Anti-jamming timing channels for wireless networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
WISEC ![In: Proceedings of the First ACM Conference on Wireless Network Security, WISEC 2008, Alexandria, VA, USA, March 31 - April 02, 2008, pp. 203-213, 2008, ACM, 978-1-59593-814-5. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
jamming, timing channel, radio interference |
36 | Xiaoxiao Liu, Guangsheng Ma, Qiang Sun |
An Advanced Timing Characterization Method Considering Global False Path. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IMSCCS (2) ![In: Interdisciplinary and Multidisciplinary Research in Computer Science, IEEE CS Proceeding of the First International Multi-Symposium of Computer and Computational Sciences (IMSCCS|06), June 20-24, 2006, Zhejiang University, Hangzhou, China, Vol. 2, pp. 776-779, 2006, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
functional (mode) dependency, timing analysis, false path, Circuit delay |
36 | Joseph Bonneau, Ilya Mironov |
Cache-Collision Timing Attacks Against AES. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2006, 8th International Workshop, Yokohama, Japan, October 10-13, 2006, Proceedings, pp. 201-215, 2006, Springer, 3-540-46559-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
cache, cryptanalysis, AES, side-channel attack, timing attack |
36 | Shuhua Wang, Grace Tsai |
Specification and Timing Analysis of Real-Time Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Real Time Syst. ![In: Real Time Syst. 28(1), pp. 69-90, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
functional and timing requirements, real-time systems, specification, schedulability analysis, allocation |
36 | Masanori Hashimoto, Yuji Yamada, Hidetoshi Onodera |
Capturing crosstalk-induced waveform for accurate static timing analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPD ![In: Proceedings of the 2003 International Symposium on Physical Design, ISPD 2003, Monterey, CA, USA, April 6-9, 2003, pp. 18-23, 2003, ACM, 1-58113-650-1. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
capacitive coupling noise, delay calculation, slope propagation, static timing analysis, crosstalk noise |
36 | Sheng-Tzong Cheng, Ashok K. Agrawala |
Allocation and scheduling of real-time periodic tasks with relative timing constraints. ![Search on Bibsonomy](Pics/bibsonomy.png) |
RTCSA ![In: 2nd International Workshop on Real-Time Computing Systems and Applications, October 25 - 27, 1995, Tokyo, Japan, pp. 210-217, 1995, IEEE Computer Society, 0-8186-7106-8. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
real-time periodic tasks, scheduling, scheduling, real-time systems, real-time systems, resource allocation, task scheduling, processor scheduling, timing constraints, communication scheduling |
36 | Jing Zeng, Magdy S. Abadir, Jacob A. Abraham |
False timing path identification using ATPG techniques and delay-based information. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 39th Design Automation Conference, DAC 2002, New Orleans, LA, USA, June 10-14, 2002, pp. 562-565, 2002, ACM, 1-58113-461-4. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
false timing paths, timing slack, ATPG, static timing analysis |
36 | Vicki H. Allan, Bogong Su, Pantung Wijaya, Jian Wang 0046 |
Foresighted Instruction Scheduling Under Timing Constraints. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 41(9), pp. 1169-1172, 1992. The full citation details ...](Pics/full.jpeg) |
1992 |
DBLP DOI BibTeX RDF |
foresighted instruction scheduling, minimum timing information, foresighted compaction, data dependency graph arcs, data dependency information, maximum timing information, greedy compaction algorithms, scheduling, parallel algorithms, parallel programming, graph theory, timing constraints, programming theory, list scheduling, look ahead |
35 | Yu-Sheng Huang, Chih-wen Hsueh |
Minimizing the maximum end-to-end delay on tree structure using the distributed pinwheel model. ![Search on Bibsonomy](Pics/bibsonomy.png) |
RTCSA ![In: 7th International Workshop on Real-Time Computing and Applications Symposium (RTCSA 2000), 12-14 December 2000, Cheju Island, South Korea, pp. 127-134, 2000, IEEE Computer Society, 0-7695-0930-4. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
maximum end-to-end delay minimisation, distributed pinwheel model, end-to-end timing requirements, tight maximum delay bound, quality of service, Internet, computational complexity, timing, computer networks, heuristic algorithm, processor scheduling, timing constraints, simulation result, distributed real-time systems, tree structure, heuristic programming, NP-hard problems, linear-time algorithm, pipeline structure |
35 | Gary S. H. Tan, Yong Meng Teo |
Experiences in simulating a declarative multiprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Annual Simulation Symposium ![In: Proceedings 28st Annual Simulation Symposium (SS '95), April 25-28, 1995, Santa Barbara, California, USA, pp. 95-104, 1995, IEEE Computer Society, 0-8186-7091-6. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
declarative multiprocessor simulation, declarative programming languages, Flagship parallel reduction machine, packet-based graph reduction model, executional units, timing characteristics, event-driven timing scheme, tightly-coupled processor-store pairs, performance evaluation, performance evaluation, parallel architectures, virtual machines, timing, parallel machines, synchronisation, synchronisation, parallel languages, functional languages, functional languages, functional simulator, parallel computer architectures, MIMD architecture, delta network |
35 | Douglas Niehaus, John A. Stankovic, Krithi Ramamritham |
A real-time system description language. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Real Time Technology and Applications Symposium ![In: 1st IEEE Real-Time Technology and Applications Symposium, Chicago, Illinois, USA, May 15-17, 1995, pp. 104-115, 1995, IEEE Computer Society, 0-8186-6980-2. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
real-time system description language, system design specification, automatic calculation, automatic analysis environment, design and analysis environment, specification changes, layered abstractions, concealed implementation details, timing correctness, robotic pick-and-place circuit board assembly, distributed real-time scheduling simulation, ease of modification, automatic loading, real-time systems, timing, specification languages, timing analysis, SDL, automatic linking, flexible manufacturing |
35 | Habib Youssef, Sadiq M. Sait, Khaled Nassar, Muhammad S. T. Benten |
Performance driven standard-cell placement using the genetic algorithm. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Great Lakes Symposium on VLSI ![In: 5th Great Lakes Symposium on VLSI (GLS-VLSI '95), March 16-18, 1995, The State University of New York at Buffalo, USA, pp. 124-127, 1995, IEEE Computer Society, 0-8186-7035-5. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
connection length, timing-driven placer, /spl alpha/-criticality, delay performance improvement, genetic algorithms, genetic algorithm, delays, timing, logic CAD, circuit layout CAD, cellular arrays, integrated circuit layout, critical paths, area, propagation delays, wire length, timing performance, IC design, standard-cell placement |
35 | |
It's All in the Timing, Papers from the 2010 AAAI Spring Symposium, Technical Report SS-10-06, Stanford, California, USA, March 22-24, 2010 ![Search on Bibsonomy](Pics/bibsonomy.png) |
AAAI Spring Symposium: It's All in the Timing ![AAAI The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP BibTeX RDF |
|
35 | Bastian Hartmann, Ingo Schwab, Norbert Link |
Prototype Optimization for Temporarily and Spatially Distorted Time Series. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AAAI Spring Symposium: It's All in the Timing ![In: It's All in the Timing, Papers from the 2010 AAAI Spring Symposium, Technical Report SS-10-06, Stanford, California, USA, March 22-24, 2010, 2010, AAAI. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP BibTeX RDF |
|
35 | Javier Snaider, Ryan James McCall, Stan Franklin |
The Immediate Present Train Model Time Production and Representation for Cognitive Agents. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AAAI Spring Symposium: It's All in the Timing ![In: It's All in the Timing, Papers from the 2010 AAAI Spring Symposium, Technical Report SS-10-06, Stanford, California, USA, March 22-24, 2010, 2010, AAAI. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP BibTeX RDF |
|
35 | Julie A. Shah, Brian Charles Williams, Cynthia Breazeal |
Dynamic Execution of Temporal Plans for Temporally Fluid Human-Robot Teaming. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AAAI Spring Symposium: It's All in the Timing ![In: It's All in the Timing, Papers from the 2010 AAAI Spring Symposium, Technical Report SS-10-06, Stanford, California, USA, March 22-24, 2010, 2010, AAAI. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP BibTeX RDF |
|
35 | Jonathan K. Alt, Stephen Lieberman, Ahmed Al Rowaei |
Exploring the Implications of Time in Discrete Event Social Simulations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AAAI Spring Symposium: It's All in the Timing ![In: It's All in the Timing, Papers from the 2010 AAAI Spring Symposium, Technical Report SS-10-06, Stanford, California, USA, March 22-24, 2010, 2010, AAAI. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP BibTeX RDF |
|
35 | Frank Förster, Chrystopher L. Nehaniv |
Representations of Time in Symbol Grounding Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AAAI Spring Symposium: It's All in the Timing ![In: It's All in the Timing, Papers from the 2010 AAAI Spring Symposium, Technical Report SS-10-06, Stanford, California, USA, March 22-24, 2010, 2010, AAAI. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP BibTeX RDF |
|
35 | Pinar Wennerberg, Klaus U. Schulz |
An Ontology of Socio-Cultural Time Expressions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AAAI Spring Symposium: It's All in the Timing ![In: It's All in the Timing, Papers from the 2010 AAAI Spring Symposium, Technical Report SS-10-06, Stanford, California, USA, March 22-24, 2010, 2010, AAAI. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP BibTeX RDF |
|
35 | Eric M. Meisner, Selma Sabanovic |
Grounding Communication Without Prior Structure. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AAAI Spring Symposium: It's All in the Timing ![In: It's All in the Timing, Papers from the 2010 AAAI Spring Symposium, Technical Report SS-10-06, Stanford, California, USA, March 22-24, 2010, 2010, AAAI. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP BibTeX RDF |
|
35 | Guy Hoffman |
Anticipation in Human-Robot Interaction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AAAI Spring Symposium: It's All in the Timing ![In: It's All in the Timing, Papers from the 2010 AAAI Spring Symposium, Technical Report SS-10-06, Stanford, California, USA, March 22-24, 2010, 2010, AAAI. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP BibTeX RDF |
|
35 | Ian Horswill, Karl Cheng-Heng Fua, Andrew Ortony |
Conflict and Hesitancy in Virtual Actors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AAAI Spring Symposium: It's All in the Timing ![In: It's All in the Timing, Papers from the 2010 AAAI Spring Symposium, Technical Report SS-10-06, Stanford, California, USA, March 22-24, 2010, 2010, AAAI. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP BibTeX RDF |
|
35 | H. Joe Steinhauer, Sook-Ling Chua, Hans Werner Guesgen, Stephen Marsland |
Utilising Temporal Information in Behaviour Recognition. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AAAI Spring Symposium: It's All in the Timing ![In: It's All in the Timing, Papers from the 2010 AAAI Spring Symposium, Technical Report SS-10-06, Stanford, California, USA, March 22-24, 2010, 2010, AAAI. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP BibTeX RDF |
|
35 | Sonia Chernova, Cynthia Breazeal |
Learning Temporal Plans from Observation of Human Collaborative Behavior. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AAAI Spring Symposium: It's All in the Timing ![In: It's All in the Timing, Papers from the 2010 AAAI Spring Symposium, Technical Report SS-10-06, Stanford, California, USA, March 22-24, 2010, 2010, AAAI. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP BibTeX RDF |
|
35 | Hartmut Messerschmidt |
Separating Moving Objects from Landmarks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AAAI Spring Symposium: It's All in the Timing ![In: It's All in the Timing, Papers from the 2010 AAAI Spring Symposium, Technical Report SS-10-06, Stanford, California, USA, March 22-24, 2010, 2010, AAAI. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP BibTeX RDF |
|
35 | Richard Veale, Matthias Scheutz |
Who Needs Time? Implicit Time Is Sufficient for Some HRI Tasks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AAAI Spring Symposium: It's All in the Timing ![In: It's All in the Timing, Papers from the 2010 AAAI Spring Symposium, Technical Report SS-10-06, Stanford, California, USA, March 22-24, 2010, 2010, AAAI. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP BibTeX RDF |
|
35 | David V. Lu, Annamaria Pileggi, Chris Wilson, William D. Smart |
What Can Actors Teach Robots About Interaction? ![Search on Bibsonomy](Pics/bibsonomy.png) |
AAAI Spring Symposium: It's All in the Timing ![In: It's All in the Timing, Papers from the 2010 AAAI Spring Symposium, Technical Report SS-10-06, Stanford, California, USA, March 22-24, 2010, 2010, AAAI. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP BibTeX RDF |
|
35 | David P. LaPotin, Charles J. Alpert, John Lillis (eds.) |
Proceedings of the 8th ACM/IEEE International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems, Monterey, California, USA, December 2-3, 2002 ![Search on Bibsonomy](Pics/bibsonomy.png) |
Timing Issues in the Specification and Synthesis of Digital Systems ![ACM, 1-58113-526-2 The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP BibTeX RDF |
|
35 | Ei Ando, Masafumi Yamashita, Toshio Nakata, Yusuke Matsunaga |
The statistical longest path problem and its application to delay analysis of logical circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Timing Issues in the Specification and Synthesis of Digital Systems ![In: Proceedings of the 8th ACM/IEEE International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems, Monterey, California, USA, December 2-3, 2002, pp. 134-139, 2002, ACM, 1-58113-526-2. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
35 | Haydar Saaied, Dhamin Al-Khalili, Asim J. Al-Khalili, Mohamed Nekili |
Quadratic deferred-merge embedding algorithm for zero skew clock distribution network. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Timing Issues in the Specification and Synthesis of Digital Systems ![In: Proceedings of the 8th ACM/IEEE International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems, Monterey, California, USA, December 2-3, 2002, pp. 119-125, 2002, ACM, 1-58113-526-2. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
VLSI, clock distribution network, zero skew |
35 | Himanshu Kaul, Dennis Sylvester, David T. Blaauw |
Active shielding of RLC global interconnects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Timing Issues in the Specification and Synthesis of Digital Systems ![In: Proceedings of the 8th ACM/IEEE International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems, Monterey, California, USA, December 2-3, 2002, pp. 98-104, 2002, ACM, 1-58113-526-2. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
35 | Sangyun Kim 0001, Sunan Tugsinavisut, Peter A. Beerel |
Reducing probabilistic timed petri nets for asynchronous architectural analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Timing Issues in the Specification and Synthesis of Digital Systems ![In: Proceedings of the 8th ACM/IEEE International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems, Monterey, California, USA, December 2-3, 2002, pp. 140-147, 2002, ACM, 1-58113-526-2. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
35 | Jun Chen 0008, Lei He 0001 |
Determination of worst-case crosstalk noise for non-switching victims in GHz+ buses. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Timing Issues in the Specification and Synthesis of Digital Systems ![In: Proceedings of the 8th ACM/IEEE International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems, Monterey, California, USA, December 2-3, 2002, pp. 92-97, 2002, ACM, 1-58113-526-2. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
interconnect design |
35 | Min Zhao 0001, Kaushik Gala, Vladimir Zolotov, Yuhong Fu, Rajendran Panda, R. Ramkumar, Bhuwan K. Agrawal |
Worst case clock skew under power supply variations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Timing Issues in the Specification and Synthesis of Digital Systems ![In: Proceedings of the 8th ACM/IEEE International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems, Monterey, California, USA, December 2-3, 2002, pp. 22-28, 2002, ACM, 1-58113-526-2. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
clock skew, power supply noise, clock network |
35 | Paul I. Pénzes, Mika Nyström, Alain J. Martin |
Transistor sizing of energy-delay--efficient circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Timing Issues in the Specification and Synthesis of Digital Systems ![In: Proceedings of the 8th ACM/IEEE International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems, Monterey, California, USA, December 2-3, 2002, pp. 126-133, 2002, ACM, 1-58113-526-2. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
energy-delay optimization, transistor sizing |
35 | Brian A. Floyd, Xiaoling Guo, James Caserta, Timothy O. Dickson, Chih-Ming Hung, Kihong Kim, Kenneth K. O |
Wireless interconnects for clock distribution. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Timing Issues in the Specification and Synthesis of Digital Systems ![In: Proceedings of the 8th ACM/IEEE International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems, Monterey, California, USA, December 2-3, 2002, pp. 105-108, 2002, ACM, 1-58113-526-2. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
integrated antenna, wireless interconnect, wireless communication, interconnect, clock distribution, RF CMOS |
35 | Joni Dambre, Dirk Stroobandt, Jan Van Campenhout |
A probabilistic approach to clock cycle prediction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Timing Issues in the Specification and Synthesis of Digital Systems ![In: Proceedings of the 8th ACM/IEEE International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems, Monterey, California, USA, December 2-3, 2002, pp. 9-15, 2002, ACM, 1-58113-526-2. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
clock cycle prediction, performance modeling, interconnect prediction |
35 | Vasant B. Rao, Jeffrey Soreff, Ravichander Ledalla, Fred L. Yang |
Aggressive crunching of extracted RC netlists. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Timing Issues in the Specification and Synthesis of Digital Systems ![In: Proceedings of the 8th ACM/IEEE International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems, Monterey, California, USA, December 2-3, 2002, pp. 70-77, 2002, ACM, 1-58113-526-2. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
RC reduction, TICER, crunching, node elimination, resistor shorting, time constants, interconnect modeling, elmore delay |
35 | Chandramouli V. Kashyap, Charles J. Alpert, Frank Liu 0001, Anirudh Devgan |
PERI: a technique for extending delay and slew metrics to ramp inputs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Timing Issues in the Specification and Synthesis of Digital Systems ![In: Proceedings of the 8th ACM/IEEE International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems, Monterey, California, USA, December 2-3, 2002, pp. 57-62, 2002, ACM, 1-58113-526-2. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
Elmore, slew, delay, interconnects, PDF, moments, median, skewness, standard deviation |
35 | V. Migairou, Robin Wilson, Sylvain Engels, Zeqin Wu, Nadine Azémard, Philippe Maurine |
A Simple Statistical Timing Analysis Flow and Its Application to Timing Margin Evaluation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PATMOS ![In: Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation, 17th International Workshop, PATMOS 2007, Gothenburg, Sweden, September 3-5, 2007, Proceedings, pp. 138-147, 2007, Springer, 978-3-540-74441-2. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
35 | Lizheng Zhang, Weijen Chen, Yuhen Hu, Charlie Chung-Ping Chen |
Statistical static timing analysis with conditional linear MAX/MIN approximation and extended canonical timing model. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(6), pp. 1183-1191, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
35 | Alexander Maili, Damian Dalton, Christian Steger |
A Generic Timing Mechanism for Using the APPLES Gate-Level Simulator in a Mixed-Level Simulation Environment. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PATMOS ![In: Integrated Circuit and System Design, Power and Timing Modeling, Optimization and Simulation; 14th International Workshop, PATMOS 2004, Santorini, Greece, September 15-17, 2004, Proceedings, pp. 799-808, 2004, Springer, 3-540-23095-5. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
35 | Per Arne Karlsen, Per Torstein Røine |
A Timing Verifier and Timing Profiler for Asynchronous Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASYNC ![In: 5th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC '99), 19-22 April 1999, Barcelona, Spain, pp. 13-, 1999, IEEE Computer Society, 0-7695-0031-5. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
35 | Jeffrey J. P. Tsai, Stephen J. H. Yang, Yao-Hsiung Chang, Eric Y. T. Juan |
Verifying Timing Properties for Distributed Real-Time Systems Using Timing Constraint Petri Nets. ![Search on Bibsonomy](Pics/bibsonomy.png) |
COMPSAC ![In: COMPSAC '96 - 20th Computer Software and Applications Conference, August 19-23, 1996, Seoul, Korea, pp. 36-40, 1996, IEEE Computer Society, 0-8186-7579-9. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
|
35 | Tatsuya Susa, Masahiro Murakawa, Eiichi Takahashi, Tatsumi Furuya, Tetsuya Higuchi |
Post-Fabrication Clock-Timing Adjustment for Digital LSIs Ensuring Operational Timing Margins. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HIS ![In: 8th International Conference on Hybrid Intelligent Systems (HIS 2008), September 10-12, 2008, Barcelona, Spain, pp. 907-910, 2008, IEEE Computer Society, 978-0-7695-3326-1. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Post-fabrication Clock-timing Adjustment, Timing Margin, Digital LSI, Genetic Algorithm, Process Variation |
34 | Marc Schlickling, Markus Pister 0002 |
Semi-automatic derivation of timing models for WCET analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LCTES ![In: Proceedings of the ACM SIGPLAN/SIGBED 2010 conference on Languages, compilers, and tools for embedded systems, LCTES 2010, Stockholm, Sweden, April 13-15, 2010, pp. 67-76, 2010, ACM, 978-1-60558-953-4. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
vhdl, worst-case execution time, hard real-time |
34 | Xiao Li, Yik-Chung Wu, Erchin Serpedin |
Timing Synchronization in Decode-and-Forward Cooperative Communication Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Signal Process. ![In: IEEE Trans. Signal Process. 57(4), pp. 1444-1455, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
34 | Fan-Min Li, Cheng-Hung Lin, An-Yeu Wu |
Unified Convolutional/Turbo Decoder Design Using Tile-Based Timing Analysis of VA/MAP Kernel. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 16(10), pp. 1358-1371, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
34 | Pawel A. Dmochowski, Peter J. McLane |
Timing error detector design and analysis for orthogonal space-time block code receivers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Commun. ![In: IEEE Trans. Commun. 56(11), pp. 1939-1949, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
34 | Christian R. Berger, Shengli Zhou, Zhi Tian, Peter K. Willett |
Performance analysis on an MAP fine timing algorithm in UWB multiband OFDM. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Commun. ![In: IEEE Trans. Commun. 56(10), pp. 1606-1611, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
34 | Daniel Kästner, Reinhard Wilhelm, Reinhold Heckmann, Marc Schlickling, Markus Pister 0002, Marek Jersak, Kai Richter 0001, Christian Ferdinand |
Timing Validation of Automotive Software. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISoLA ![In: Leveraging Applications of Formal Methods, Verification and Validation, Third International Symposium, ISoLA 2008, Porto Sani, Greece, October 13-15, 2008. Proceedings, pp. 93-107, 2008, Springer, 978-3-540-88478-1. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
34 | Yibo Chen, Jin Ouyang, Yuan Xie 0001 |
ILP-based scheme for timing variation-aware scheduling and resource binding. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SoCC ![In: 21st Annual IEEE International SoC Conference, SoCC 2008, September 17-20, 2008, Radisson Hotel, Newport Beach, CA, USA, Proceedings, pp. 27-30, 2008, IEEE, 978-1-4244-2596-9. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
34 | Rupak Samanta, Ganesh Venkataraman, Nimay Shah, Jiang Hu |
Elastic Timing Scheme for Energy-Efficient and Robust Performance. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 9th International Symposium on Quality of Electronic Design (ISQED 2008), 17-19 March 2008, San Jose, CA, USA, pp. 537-542, 2008, IEEE Computer Society, 978-0-7695-3117-5. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Elstic, Razor, Pipeline, Boosting |
34 | Yasamin Mostofi, Donald C. Cox |
A robust timing synchronization design in OFDM systems - part I: low-mobility cases. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Wirel. Commun. ![In: IEEE Trans. Wirel. Commun. 6(12), pp. 4329-4339, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
34 | Debjit Sinha, Narendra V. Shenoy, Hai Zhou 0001 |
Statistical Timing Yield Optimization by Gate Sizing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 14(10), pp. 1140-1146, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
34 | Gadi Taubenfeld |
Computing in the Presence of Timing Failures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICDCS ![In: 26th IEEE International Conference on Distributed Computing Systems (ICDCS 2006), 4-7 July 2006, Lisboa, Portugal, pp. 16, 2006, IEEE Computer Society, 0-7695-2540-7. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
34 | Jin-Tai Yan, Bo-Yi Chiang, Shi-Qin Huang |
Width and Timing-Constrained Wire Sizing for Critical Area Minimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
APCCAS ![In: IEEE Asia Pacific Conference on Circuits and Systems 2006, APCCAS 2006, Singapore, 4-7 December 2006, pp. 1276-1279, 2006, IEEE, 1-4244-0387-1. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
34 | Yu Cao 0001, Xiaodong Yang, Xuejue Huang, Dennis Sylvester |
Switch-factor based loop RLC modeling for efficient timing analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 13(9), pp. 1072-1078, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
34 | Soroush Abbaspour, Hanif Fatemi, Massoud Pedram |
VGTA: Variation Aware Gate Timing Analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 23rd International Conference on Computer Design (ICCD 2005), 2-5 October 2005, San Jose, CA, USA, pp. 351-356, 2005, IEEE Computer Society, 0-7695-2451-6. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
34 | Ingomar Wenzel, Raimund Kirner, Peter P. Puschner, Bernhard Rieder |
Principles of Timing Anomalies in Superscalar Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
QSIC ![In: Fifth International Conference on Quality Software (QSIC 2005), 19-20 September 2005, Melbourne, Australia, pp. 295-306, 2005, IEEE Computer Society, 0-7695-2472-9. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
34 | Jason Helge Anderson, Sudip Nag, Kamal Chaudhary, Sandor Kalman, Chari Madabhushi, Paul Cheng |
Run-Time-Conscious Automatic Timing-Driven FPGA Layout Synthesis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: Field Programmable Logic and Application, 14th International Conference , FPL 2004, Leuven, Belgium, August 30-September 1, 2004, Proceedings, pp. 168-178, 2004, Springer, 3-540-22989-2. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
34 | Leonard Lee, Li-C. Wang, T. M. Mak, Kwang-Ting Cheng |
A path-based methodology for post-silicon timing validation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: 2004 International Conference on Computer-Aided Design, ICCAD 2004, San Jose, CA, USA, November 7-11, 2004, pp. 713-720, 2004, IEEE Computer Society / ACM, 0-7803-8702-3. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
34 | Anirudh Devgan, Chandramouli V. Kashyap |
Block-based Static Timing Analysis with Uncertainty. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: 2003 International Conference on Computer-Aided Design, ICCAD 2003, San Jose, CA, USA, November 9-13, 2003, pp. 607-614, 2003, IEEE Computer Society / ACM, 1-58113-762-1. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
34 | David T. Blaauw, Vladimir Zolotov, Savithri Sundareswaran |
Slope propagation in static timing analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 21(10), pp. 1180-1195, 2002. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
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