Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
17 | Dirhaj Pradhan |
ATPG-based Techniques for Verification. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LATW ![In: 7th Latin American Test Workshop, LATW 2006, Buenos Aires, Argentina, March 26-29, 2006., pp. 125, 2006, IEEE. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP BibTeX RDF |
|
17 | Giuseppe Di Guglielmo, Franco Fummi, Cristina Marconcini, Graziano Pravadelli |
EFSM Manipulation to Increase High-Level ATPG Effectiveness. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 7th International Symposium on Quality of Electronic Design (ISQED 2006), 27-29 March 2006, San Jose, CA, USA, pp. 57-62, 2006, IEEE Computer Society, 0-7695-2523-7. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
17 | Xiaoqing Wen, Seiji Kajihara, Kohei Miyase, Tatsuya Suzuki, Kewal K. Saluja, Laung-Terng Wang, Khader S. Abdel-Hafez, Kozo Kinoshita |
A New ATPG Method for Efficient Capture Power Reduction During Scan Testing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 24th IEEE VLSI Test Symposium (VTS 2006), 30 April - 4 May 2006, Berkeley, California, USA, pp. 58-65, 2006, IEEE Computer Society, 0-7695-2514-8. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
17 | Seiji Kajihara, Shohei Morishima, Akane Takuma, Xiaoqing Wen, Toshiyuki Maeda, Shuji Hamada, Yasuo Sato |
A Framework of High-quality Transition Fault ATPG for Scan Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: 2006 IEEE International Test Conference, ITC 2006, Santa Clara, CA, USA, October 22-27, 2006, pp. 1-6, 2006, IEEE Computer Society, 1-4244-0292-1. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
17 | Roger Nicholson, Cathy Kardach, Bruce Cory |
The Role of ATPG Fault Diagnostics in Driving Physical Analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: 2006 IEEE International Test Conference, ITC 2006, Santa Clara, CA, USA, October 22-27, 2006, pp. 1-7, 2006, IEEE Computer Society, 1-4244-0292-1. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
17 | Xiaoding Chen, Michael S. Hsiao |
Characteristic States and Cooperative Game Based Search for Efficient Sequential ATPG and Design Validation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: 2006 IEEE International Test Conference, ITC 2006, Santa Clara, CA, USA, October 22-27, 2006, pp. 1-10, 2006, IEEE Computer Society, 1-4244-0292-1. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
17 | Xiaoming Yu, Miron Abramovici |
Sequential circuit ATPG using combinational algorithms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 24(8), pp. 1294-1310, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
17 | Jorge Campos, Hussain Al-Asaad |
Search-Space Optimizations for High-Level ATPG. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: Sixth International Workshop on Microprocessor Test and Verification (MTV 2005), Common Challenges and Solutions, 3-4 November 2005, Austin, Texas, USA, pp. 84-89, 2005, IEEE Computer Society, 0-7695-2627-6. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
17 | Franco Fummi, Graziano Pravadelli, Franco Toto |
Coverage of formal properties based on a high-level fault model and functional ATPG. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ETS ![In: 10th European Test Symposium, ETS 2005, Tallinn, Estonia, May 22-25, 2005, pp. 162-167, 2005, IEEE Computer Society, 0-7695-2341-2. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
17 | Jaan Raik, Raimund Ubar, Joachim Sudbrock, Wieslaw Kuzmicz, Witold A. Pleskacz |
DOT: new deterministic defect-oriented ATPG tool. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ETS ![In: 10th European Test Symposium, ETS 2005, Tallinn, Estonia, May 22-25, 2005, pp. 96-101, 2005, IEEE Computer Society, 0-7695-2341-2. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
17 | Qiang Qiang, Daniel G. Saab, Jacob A. Abraham |
An Emulation Model for Sequential ATPG-Based Bounded Model Checking. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: Proceedings of the 2005 International Conference on Field Programmable Logic and Applications (FPL), Tampere, Finland, August 24-26, 2005, pp. 469-474, 2005, IEEE, 0-7803-9362-7. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
17 | Mehrdad Nourani, Arun Radhakrishnan |
Power-supply noise in SoCs: ATPG, estimation and control. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings 2005 IEEE International Test Conference, ITC 2005, Austin, TX, USA, November 8-10, 2005, pp. 10, 2005, IEEE Computer Society, 0-7803-9038-5. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
17 | Nikhil Saluja, Sunil P. Khatri |
Efficient SAT-based combinational ATPG using multi-level don't-cares. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings 2005 IEEE International Test Conference, ITC 2005, Austin, TX, USA, November 8-10, 2005, pp. 10, 2005, IEEE Computer Society, 0-7803-9038-5. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
17 | Scott Davidson 0001 |
A practical look at ATPG. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Des. Test Comput. ![In: IEEE Des. Test Comput. 21(5), pp. 448-449, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
17 | Ismet Bayraktaroglu, Manuel d'Abreu |
ATPG based functional test for data paths: application to a floating point unit. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HLDVT ![In: Ninth IEEE International High-Level Design Validation and Test Workshop 2004, Sonoma Valley, CA, USA, November 10-12, 2004, pp. 37-40, 2004, IEEE Computer Society, 0-7803-8714-7. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
17 | Carlos Eduardo Savioli, Claudio C. Czendrodi, José Vicente Calvano, Antonio Carneiro de Mesquita Filho |
ATPG for fault diagnosis on analog electrical networks using evolutionary techniques. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SBCCI ![In: Proceedings of the 17th Annual Symposium on Integrated Circuits and Systems Design, SBCCI 2004, Pernambuco, Brazil, September 7-11, 2004, pp. 100-104, 2004, ACM. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
genetic algorithms, automatic test pattern generation, fault models, analog and mixed-signal test |
17 | Andreas G. Veneris, Robert Chang, Magdy S. Abadir, Mandana Amiri |
Fault equivalence and diagnostic test generation using ATPG. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (5) ![In: Proceedings of the 2004 International Symposium on Circuits and Systems, ISCAS 2004, Vancouver, BC, Canada, May 23-26, 2004, pp. 221-224, 2004, IEEE, 0-7803-8251-X. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP BibTeX RDF |
|
17 | Qingwei Wu, Michael S. Hsiao |
Efficient ATPG for Design Validation Based On Partitioned State Exploration Histories. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 22nd IEEE VLSI Test Symposium (VTS 2004), 25-29 April 2004, Napa Valley, CA, USA, pp. 389-405, 2004, IEEE Computer Society, 0-7695-2134-7. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
17 | Qingwei Wu, Michael S. Hsiao |
State Variable Extraction to Reduce Problem Complexity for ATPG and Design Validation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings 2004 International Test Conference (ITC 2004), October 26-28, 2004, Charlotte, NC, USA, pp. 820-829, 2004, IEEE Computer Society, 0-7803-8581-0. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
17 | Puneet Gupta, Michael S. Hsiao |
ALAPTF: A new Transition Faultmodel and the ATPG Algorithm. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings 2004 International Test Conference (ITC 2004), October 26-28, 2004, Charlotte, NC, USA, pp. 1053-1060, 2004, IEEE Computer Society, 0-7803-8581-0. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
17 | Xiao Liu 0010 |
ATPG and DFT Algorithms for Delay Fault Testing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
|
2004 |
RDF |
|
17 | Zhigang Yin, Yinghua Min, Xiaowei Li 0001, Huawei Li 0001 |
A Novel RT-Level Behavioral Description Based ATPG Method. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Comput. Sci. Technol. ![In: J. Comput. Sci. Technol. 18(3), pp. 308-317, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
17 | Hideyuki Ichihara, Tomoo Inoue |
A Method of Test Generation for Acyclic Sequential Circuits Using Single Stuck-at Fault Combinational ATPG. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEICE Trans. Fundam. Electron. Commun. Comput. Sci. ![In: IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 86-A(12), pp. 3072-3078, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP BibTeX RDF |
|
17 | Srikanth Arekapudi, Fei Xin, Jinzheng Peng, Ian G. Harris |
ATPG for Timing Errors in Globally Asynchronous Locally Synchronous Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Circuits Syst. Comput. ![In: J. Circuits Syst. Comput. 12(3), pp. 305-332, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
17 | Hideyuki Ichihara, Tomoo Inoue |
Test Generation for Acyclic Sequential Circuits with Single Stuck-at Fault Combinational ATPG. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2003 Design, Automation and Test in Europe Conference and Exposition (DATE 2003), 3-7 March 2003, Munich, Germany, pp. 11180-11181, 2003, IEEE Computer Society, 0-7695-1870-2. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
17 | Kameshwar Chandrasekar, Michael S. Hsiao |
ATPG-based preimage computation: efficient search space pruning with ZBDD. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HLDVT ![In: Eighth IEEE International High-Level Design Validation and Test Workshop 2003, San Francisco, CA, USA, November 12-14, 2003, pp. 117-122, 2003, IEEE Computer Society, 0-7803-8236-6. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
17 | Jishun Kuang, Yu Wang, Xiaofen Wei, Changnian Zhang |
IDDT ATPG Based on Ambiguous Delay Assignments. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asian Test Symposium ![In: 12th Asian Test Symposium (ATS 2003), 17-19 November 2003, Xian, China, pp. 400-405, 2003, IEEE Computer Society, 0-7695-1951-2. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
IDDT testing, delay Assignments, stuck-open fault |
17 | Rahul Kundu, R. D. (Shawn) Blanton |
ATPG for Noise-Induced Switch Failures in Domino Logic. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: 2003 International Conference on Computer-Aided Design, ICCAD 2003, San Jose, CA, USA, November 9-13, 2003, pp. 765-769, 2003, IEEE Computer Society / ACM, 1-58113-762-1. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
17 | Henk D. L. Hollmann, Erik Jan Marinissen, Bart Vermeulen |
Optimal Interconnect ATPG Under a Ground-Bounce Constraint. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings 2003 International Test Conference (ITC 2003), Breaking Test Interface Bottlenecks, 28 September - 3 October 2003, Charlotte, NC, USA, pp. 369-378, 2003, IEEE Computer Society, 0-7803-8106-8. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
17 | Lech Józwiak, Aleksander Slusarczyk, Marek A. Perkowski |
Term Trees in Application to an Effective and Efficient ATPG for AND-EXOR and AND-OR Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: VLSI Design 14(1), pp. 107-122, 2002. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
17 | Yinghua Min |
Why RTL ATPG? ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Comput. Sci. Technol. ![In: J. Comput. Sci. Technol. 17(2), pp. 113-117, 2002. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
17 | Fatih Kocan, Daniel G. Saab |
Correction to "ATPG for combinational circuits on configurable hardware". ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 10(3), pp. 374-374, 2002. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
17 | Srikanth Arekapudi, Fei Xin, Jinzheng Peng, Ian G. Harris |
ATPG for timing-induced functional errors on trigger events in hardware-software systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ETW ![In: 7th European Test Workshop, ETW 2002, Corfu, Greece, May 26-29, 2002, pp. 23-28, 2002, IEEE Computer Society, 0-7695-1715-3. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
17 | Xiao Liu 0010, Michael S. Hsiao, Sreejit Chakravarty, Paul J. Thadikaran |
Novel ATPG algorithms for transition faults. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ETW ![In: 7th European Test Workshop, ETW 2002, Corfu, Greece, May 26-29, 2002, pp. 47-52, 2002, IEEE Computer Society, 0-7695-1715-3. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
17 | Mukul R. Prasad, Michael S. Hsiao, Jawahar Jain |
Improving Sequential ATPG Using SAT Methods. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IWLS ![In: 11th IEEE/ACM International Workshop on Logic & Synthesis, IWLS 2002, June 4-7, 2002, New Orleans, Louisiana, USA., pp. 79-84, 2002. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP BibTeX RDF |
|
17 | Miron Abramovici, Xiaoming Yu, Elizabeth M. Rudnick |
Low-cost sequential ATPG with clock-control DFT. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 39th Design Automation Conference, DAC 2002, New Orleans, LA, USA, June 10-14, 2002, pp. 243-248, 2002, ACM, 1-58113-461-4. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
17 | Takeshi Asakawa, Kazuhiko Iwasaki |
Using ATPG vectors for BIST test pattern generator. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Syst. Comput. Jpn. ![In: Syst. Comput. Jpn. 32(11), pp. 1-8, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
17 | Ashish Giani, Shuo Sheng, Michael S. Hsiao, Vishwani D. Agrawal |
Efficient spectral techniques for sequential ATPG. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: Proceedings of the Conference on Design, Automation and Test in Europe, DATE 2001, Munich, Germany, March 12-16, 2001, pp. 204-208, 2001, IEEE Computer Society, 0-7695-0993-2. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
17 | Michael S. Hsiao, Jawahar Jain |
Practical use of sequential ATPG for model checking: going the extra mile does pay off. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HLDVT ![In: Proceedings of the Sixth IEEE International High-Level Design Validation and Test Workshop 2001, Monterey, California, USA, November 7-9, 2001, pp. 39-44, 2001, IEEE Computer Society, 0-7695-1411-1. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
17 | Ganapathy Parthasarathy, Chung-Yang Huang, Kwang-Ting Cheng |
An analysis of ATPG and SAT algorithms for formal verification. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HLDVT ![In: Proceedings of the Sixth IEEE International High-Level Design Validation and Test Workshop 2001, Monterey, California, USA, November 7-9, 2001, pp. 177-182, 2001, IEEE Computer Society, 0-7695-1411-1. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
17 | Huawei Li 0001, Yinghua Min, Zhongcheng Li |
An RT-Level ATPG Based on Clustering of Circuit States. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asian Test Symposium ![In: 10th Asian Test Symposium (ATS 2001), 19-21 November 2001, Kyoto, Japan, pp. 213-218, 2001, IEEE Computer Society, 0-7695-1378-6. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
cluster of states, automatic test pattern generation, register-transfer level, behavioral descriptions |
17 | Miron Abramovici, Xiaoming Yu, Elizabeth M. Rudnick |
Sequential ATPG Using Combinational Algorithms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LATW ![In: 2nd Latin American Test Workshop, LATW 2001, Cancun, Mexico, February 11-14, 2001., pp. 100-106, 2001, IEEE. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP BibTeX RDF |
|
17 | Ivor Ting, Andreas G. Veneris, Magdy S. Abadir |
ATPG Driven Logic Synthesis for Delay and Power Minimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LATW ![In: 2nd Latin American Test Workshop, LATW 2001, Cancun, Mexico, February 11-14, 2001., pp. 96-99, 2001, IEEE. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP BibTeX RDF |
|
17 | Magdy S. Abadir, Scott Davidson 0001, Vijay Nagasamy, Dhiraj K. Pradhan, Prab Varma |
ATPG for Design Errors-Is It Possible? ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 19th IEEE VLSI Test Symposium (VTS 2001), Test and Diagnosis in a Nanometric World, 29 April - 3 May 2001, Marina Del Rey, CA, USA, pp. 283-285, 2001, IEEE Computer Society, 0-7695-1122-8. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
17 | Rainer Dorsch, Hans-Joachim Wunderlich |
Tailoring ATPG for embedded testing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 2001, Baltimore, MD, USA, 30 October - 1 November 2001, pp. 530-537, 2001, IEEE Computer Society, 0-7803-7169-0. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
17 | Carl Barnhart, Vanessa Brunkhorst, Frank Distler, Owen Farnsworth, Brion L. Keller, Bernd Könemann, Andrej Ferko |
OPMISR: the foundation for compressed ATPG vectors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 2001, Baltimore, MD, USA, 30 October - 1 November 2001, pp. 748-757, 2001, IEEE Computer Society, 0-7803-7169-0. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
17 | Sudip Chakrabarti, Abhijit Chatterjee |
Partial Simulation-Driven ATPG for Detection and Diagnosis of Faults in Analog Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: Proceedings of the 2000 IEEE/ACM International Conference on Computer-Aided Design, 2000, San Jose, California, USA, November 5-9, 2000, pp. 562-567, 2000, IEEE Computer Society, 0-7803-6448-1. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
17 | Jayanta Bhadra, Magdy S. Abadir, Jacob A. Abraham |
A quick and inexpensive method to identify false critical paths using ATPG techniques: an experiment with a PowerPCTM microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CICC ![In: Proceedings of the IEEE 2000 Custom Integrated Circuits Conference, CICC 2000, Orlando, FL, USA, May 21-24, 2000, pp. 71-74, 2000, IEEE, 0-7803-5809-0. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
17 | Yiorgos Makris, Alex Orailoglu, Praveen Vishakantaiah |
Modular test generation and concurrent transparency-based test translation using gate-level ATPG. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CICC ![In: Proceedings of the IEEE 2000 Custom Integrated Circuits Conference, CICC 2000, Orlando, FL, USA, May 21-24, 2000, pp. 75-78, 2000, IEEE, 0-7803-5809-0. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
17 | Jayanta Batra, Magdy S. Abadir, Jacob A. Abraham |
A Quick and Inexpensive Method to Identify False Critical Paths Using ATPG Techniques: an Experiment with a PowerPC Microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LATW ![In: 1st Latin American Test Workshop, LATW 2000, Rio de Janeiro, RJ, Brazil, March 13-15, 2000., pp. 72-76, 2000, IEEE. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP BibTeX RDF |
|
17 | Marcelino B. Santos, João Paulo Teixeira 0001 |
Experiments on RTL ATPG and Fault Simulation for High Defect Coverage in Digital Systems-on-a-Chip. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LATW ![In: 1st Latin American Test Workshop, LATW 2000, Rio de Janeiro, RJ, Brazil, March 13-15, 2000., pp. 66-71, 2000, IEEE. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP BibTeX RDF |
|
17 | Chung-Yang Huang, Bwolen Yang, Huan-Chih Tsai, Kwang-Ting Cheng |
Static property checking using ATPG vs. BDD techniques. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 2000, Atlantic City, NJ, USA, October 2000, pp. 309-316, 2000, IEEE Computer Society, 0-7803-6546-1. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
17 | Dimitri Kagaris |
ATPG and BIST. ![Search on Bibsonomy](Pics/bibsonomy.png) |
The VLSI Handbook ![In: The VLSI Handbook., 1999, CRC Press, 978-0-8493-8593-3. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
17 | Peter Wohl, John A. Waicukauski |
Using Verilog simulation libraries for ATPG. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 1999, Atlantic City, NJ, USA, 27-30 September 1999, pp. 1011-1020, 1999, IEEE Computer Society, 0-7803-5753-1. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
17 | Jennifer Dworak, Michael R. Grimaila, Sooryong Lee, Li-C. Wang, M. Ray Mercer |
Modeling the probability of defect excitation for a commercial IC with implications for stuck-at fault-based ATPG strategies. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 1999, Atlantic City, NJ, USA, 27-30 September 1999, pp. 1031-1037, 1999, IEEE Computer Society, 0-7803-5753-1. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
17 | Scott Davidson 0001 |
Changing our Path to High Level ATPG. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 1999, Atlantic City, NJ, USA, 27-30 September 1999, pp. 1114, 1999, IEEE Computer Society, 0-7803-5753-1. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
17 | Mario Konijnenburg, Hans van der Linden, Jeroen Geuzebroek |
Benchmarking DAT with the ITC'99 ATPG Benchmarks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 1999, Atlantic City, NJ, USA, 27-30 September 1999, pp. 1127, 1999, IEEE Computer Society, 0-7803-5753-1. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
17 | Matteo Sonza Reorda |
High-level ATPG: a real topic or an academic amusement? ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 1999, Atlantic City, NJ, USA, 27-30 September 1999, pp. 1118, 1999, IEEE Computer Society, 0-7803-5753-1. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
17 | Wolfgang Roethig |
High-level ATPG for Early Power Analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 1999, Atlantic City, NJ, USA, 27-30 September 1999, pp. 1119-1120, 1999, IEEE Computer Society, 0-7803-5753-1. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
17 | Kuo-Hui Tsai, Tompson, Janusz Rajski, Malgorzata Marek-Sadowska |
STAR-ATPG: a high speed test pattern generator for large scan designs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 1999, Atlantic City, NJ, USA, 27-30 September 1999, pp. 1021-1030, 1999, IEEE Computer Society, 0-7803-5753-1. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
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17 | Mahesh A. Iyer |
High Time For High Level ATPG. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 1999, Atlantic City, NJ, USA, 27-30 September 1999, pp. 1112, 1999, IEEE Computer Society, 0-7803-5753-1. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
17 | Wu-Tung Cheng |
High time for high level ATPG. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 1999, Atlantic City, NJ, USA, 27-30 September 1999, pp. 1113, 1999, IEEE Computer Society, 0-7803-5753-1. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
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17 | Rohit Kapur |
High level ATPG is important and is on its way! ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 1999, Atlantic City, NJ, USA, 27-30 September 1999, pp. 1115-1116, 1999, IEEE Computer Society, 0-7803-5753-1. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
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17 | Mukul R. Prasad, Philip Chong, Kurt Keutzer |
Why is ATPG Easy? ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 36th Conference on Design Automation, New Orleans, LA, USA, June 21-25, 1999., pp. 22-28, 1999, ACM Press. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
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17 | Seongmoon Wang, Sandeep K. Gupta 0001 |
ATPG for Heat Dissipation Minimization During Test Application. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 47(2), pp. 256-262, 1998. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
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17 | Michael S. Hsiao, Elizabeth M. Rudnick, Janak H. Patel |
Application of genetically engineered finite-state-machine sequences to sequential circuit ATPG. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 17(3), pp. 239-254, 1998. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
17 | Hideo Fujiwara |
Needed: Third-generation ATPG Benchmarks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Des. Test Comput. ![In: IEEE Des. Test Comput. 15(1), pp. 96-, 1998. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP BibTeX RDF |
|
17 | Sam D. Huynh, Seongwon Kim, Mani Soma, Jinyan Zhang |
Testability analysis and multi-frequency ATPG for analog circuits and systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: Proceedings of the 1998 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 1998, San Jose, CA, USA, November 8-12, 1998, pp. 376-383, 1998, ACM / IEEE Computer Society, 1-58113-008-2. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
17 | Fulvio Corno, Janak H. Patel, Elizabeth M. Rudnick, Matteo Sonza Reorda, Roberto Vietti |
Enhancing topological ATPG with high-level information and symbolic techniques. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: International Conference on Computer Design: VLSI in Computers and Processors, ICCD 1998, Proceedings, 5-7 October, 1998, Austin, TX, USA, pp. 504-509, 1998, IEEE Computer Society, 0-8186-9099-2. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
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17 | William E. Dougherty, R. D. (Shawn) Blanton |
Using regression analysis for GA-based ATPG parameter optimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: International Conference on Computer Design: VLSI in Computers and Processors, ICCD 1998, Proceedings, 5-7 October, 1998, Austin, TX, USA, pp. 516-521, 1998, IEEE Computer Society, 0-8186-9099-2. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
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17 | Dimitrios Karayiannis, Spyros Tragoudas |
A Nonenumerative ATPG for Functionally Sensitizable Path Delay Faults. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 16th IEEE VLSI Test Symposium (VTS '98), 28 April - 1 May 1998, Princeton, NJ, USA, pp. 440-445, 1998, IEEE Computer Society, 0-8186-8436-4. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
17 | Peter Wohl, John A. Waicukauski |
Defining ATPG rules checking in STIL. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 1998, Washington, DC, USA, October 18-22, 1998, pp. 971-979, 1998, IEEE Computer Society, 0-7803-5093-6. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
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17 | Sitaram Yadavalli, Sanjay Sengupta |
Impact and Cost of Modeling Memories for ATPG for Partial Scan Designs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 11th International Conference on VLSI Design (VLSI Design 1991), 4-7 January 1998, Chennai, India, pp. 274-278, 1998, IEEE Computer Society, 0-8186-8224-8. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
17 | Wangning Long, Shiyuan Yang, Zhongcheng Li, Yinghua Min |
Memory Efficient ATPG for Path Delay Faults. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asian Test Symposium ![In: 6th Asian Test Symposium (ATS '97), 17-18 November 1997, Akita, Japan, pp. 326-331, 1997, IEEE Computer Society, 0-8186-8209-4. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
Delay Testing, Automatic Test Generation, IC Testing, Path Sensitization |
17 | Andrew Flint |
A Simulation-Based JTAG ATPG Optimized for MCMs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 1997, Washington, DC, USA, November 3-5, 1997, pp. 101-105, 1997, IEEE Computer Society, 0-7803-4209-7. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
17 | Raghuram S. Tupuri, Jacob A. Abraham |
A Novel Functional Test Generation Method for Processors Using Commercial ATPG. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 1997, Washington, DC, USA, November 3-5, 1997, pp. 743-752, 1997, IEEE Computer Society, 0-7803-4209-7. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
17 | Fulvio Corno, Paolo Prinetto, Matteo Sonza Reorda |
Testability Analysis and ATPG on Behavioral RT-Level VHDL. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 1997, Washington, DC, USA, November 3-5, 1997, pp. 753-759, 1997, IEEE Computer Society, 0-7803-4209-7. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
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17 | Thomas E. Marchok, Aiman H. El-Maleh, Wojciech Maly, Janusz Rajski |
A complexity analysis of sequential ATPG. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 15(11), pp. 1409-1423, 1996. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
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17 | Michael S. Hsiao, Elizabeth M. Rudnick, Janak H. Patel |
Alternating Strategies for Sequential Circuit ATPG. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ED&TC ![In: 1996 European Design and Test Conference, ED&TC 1996, Paris, France, March 11-14, 1996, pp. 368-374, 1996, IEEE Computer Society, 0-8186-7423-7. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
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17 | Peter Wohl, John A. Waicukauski |
Test Generation for Ultra-Large Circuits Using ATPG Constraints and Test-Pattern Templates. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 1996, Test and Design Validity, Washington, DC, USA, October 20-25, 1996, pp. 13-20, 1996, IEEE Computer Society, 0-7803-3541-4. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
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17 | Marc E. Levitt |
Formal Verification of the UltraSPARCTM Family of Processors via ATPG Methods. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 1996, Test and Design Validity, Washington, DC, USA, October 20-25, 1996, pp. 849-856, 1996, IEEE Computer Society, 0-7803-3541-4. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
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17 | Shi-Yu Huang, Kwang-Ting Cheng, Kuang-Chien Chen, Uwe Gläser |
An ATPG-Based Framework for Verifying Sequential Equivalence. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 1996, Test and Design Validity, Washington, DC, USA, October 20-25, 1996, pp. 865-874, 1996, IEEE Computer Society, 0-7803-3541-4. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
|
17 | Patrick Girard 0001, Christian Landrault, Serge Pravossoudovitch, B. Rodriguez |
A Diagnostic ATPG for Delay Faults Based on Genetic Algorithms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 1996, Test and Design Validity, Washington, DC, USA, October 20-25, 1996, pp. 286-293, 1996, IEEE Computer Society, 0-7803-3541-4. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
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17 | Fabrizio Ferrandi, Franco Fummi, Enrico Macii, Massimo Poncino, Donatella Sciuto |
Symbolic Optimization of FSM Networks Based on Sequential ATPG Techniques. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 33st Conference on Design Automation, Las Vegas, Nevada, USA, Las Vegas Convention Center, June 3-7, 1996., pp. 467-470, 1996, ACM Press, 0-89791-779-0. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
|
17 | Zhong Zhang |
Simulation of ATPG neural network and its experimental results. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Comput. Sci. Technol. ![In: J. Comput. Sci. Technol. 10(4), pp. 310-324, 1995. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
|
17 | Vishwani D. Agrawal, Srimat T. Chakradhar |
Combinational ATPG theorems for identifying untestable faults in sequential circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 14(9), pp. 1155-1160, 1995. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
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17 | Shang-E Tai, Debashis Bhattacharya |
A three-stage partial scan design method to ease ATPG. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 7(1-2), pp. 95-104, 1995. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
minimum feed back vertex set, design for testability, partial scan design |
17 | Jaehong Park, Chanhee Oh, M. Ray Mercer |
Improved sequential ATPG using functional observation information and new justification methods. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ED&TC ![In: 1995 European Design and Test Conference, ED&TC 1995, Paris, France, March 6-9, 1995, pp. 262-266, 1995, IEEE Computer Society, 0-8186-7039-8. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
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17 | Fulvio Corno, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda |
GARDA: a diagnostic ATPG for large synchronous sequential circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ED&TC ![In: 1995 European Design and Test Conference, ED&TC 1995, Paris, France, March 6-9, 1995, pp. 267-273, 1995, IEEE Computer Society, 0-8186-7039-8. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
|
17 | Thomas E. Marchok, Aiman El-Maleh, Wojciech Maly, Janusz Rajski |
Complexity of sequential ATPG. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ED&TC ![In: 1995 European Design and Test Conference, ED&TC 1995, Paris, France, March 6-9, 1995, pp. 252-261, 1995, IEEE Computer Society, 0-8186-7039-8. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
|
17 | Hannes C. Wittmann, Manfred Henftling |
Path delay ATPG for standard scan design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EURO-DAC ![In: Proceedings EURO-DAC'95, European Design Automation Conference with EURO-VHDL, Brighton, England, UK, September 18-22, 1995, pp. 202-207, 1995, IEEE Computer Society, 0-8186-7156-4. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
|
17 | Manfred Henftling, Hannes C. Wittmann, Kurt Antreich |
A formal non-heuristic ATPG approach. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EURO-DAC ![In: Proceedings EURO-DAC'95, European Design Automation Conference with EURO-VHDL, Brighton, England, UK, September 18-22, 1995, pp. 248-253, 1995, IEEE Computer Society, 0-8186-7156-4. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
|
17 | Jos van Sas, Erik Huyskens, Hans Naert, Fred Schell, Ad J. van de Goor |
Coping with Re-usability Using Sequential ATPG: A Practical Case Study. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 1995, Driving Down the Cost of Test, Washington, DC, USA, October 21-25, 1995, pp. 252-261, 1995, IEEE Computer Society, 0-7803-2992-9. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
|
17 | Ben Mathew, Daniel G. Saab |
DFT & ATPG: Together Again. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 1995, Driving Down the Cost of Test, Washington, DC, USA, October 21-25, 1995, pp. 262-271, 1995, IEEE Computer Society, 0-7803-2992-9. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
|
17 | Akachai Sang-In, Peter Y. K. Cheung |
A Method of Representative Fault Selection in Digital Circuits for ATPG. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30 - June 2, 1994, pp. 73-76, 1994, IEEE, 0-7803-1916-8. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
|
17 | Byung S. So, Charles R. Kime |
ICAT: incremental combinational ATPG. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 12th IEEE VLSI Test Symposium (VTS'94), April 25-28, 1994, Cherry Hill, New Jersey, USA, pp. 106-113, 1994, IEEE Computer Society, 0-8186-5440-6. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
|
17 | Gianpiero Cabodi, Paolo Camurati, Stefano Quer |
Full-Symbolic ATPG for Large Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 1994, TEST: The Next 25 Years, Washington, DC, USA, October 2-6, 1994, pp. 980-988, 1994, IEEE Computer Society, 0-7803-2103-0. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
|
17 | Seongmoon Wang, Sandeep K. Gupta 0001 |
ATPG for Heat Dissipation Minimization During Test Application. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 1994, TEST: The Next 25 Years, Washington, DC, USA, October 2-6, 1994, pp. 250-258, 1994, IEEE Computer Society, 0-7803-2103-0. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
|
17 | Maria José Aguado, Miguel Miranda, Eduardo de la Torre, Carlos A. López-Barrio |
A dynamic communication strategy for the distributed ATPG system DPLATON. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EURO-DAC ![In: Proceedings of the European Design Automation Conference 1993, EURO-DAC '93 with EURO-VHDL'93, Hamburg, Germany, September 20-24, 1993, pp. 271-276, 1993, IEEE Computer Society, 0-8186-4350-1. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP DOI BibTeX RDF |
|
17 | Yasushi Koseko, Takuji Ogihara, Shinichi Murai |
Tri-state bus conflict checking method for ATPG using BDD. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: Proceedings of the 1993 IEEE/ACM International Conference on Computer-Aided Design, 1993, Santa Clara, California, USA, November 7-11, 1993, pp. 512-515, 1993, IEEE Computer Society / ACM, 0-8186-4490-7. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP DOI BibTeX RDF |
|