Search results for "TLB"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
21	Reiley Jeyapaul, Aviral Shrivastava	B2P2: bounds based procedure placement for instruction TLB power reduction in embedded systems.	SCOPES	2010	DBLP DOI BibTeX RDF
21	Zhao Lei, Hui Xu, Daisuke Ikebuchi, Hideharu Amano, Tetsuya Sunata, Mitaro Namiki	Reducing instruction TLB's leakage power consumption for embedded processors.	Green Computing Conference	2010	DBLP DOI BibTeX RDF
21	Dongkyun Ahn, Gyungho Lee	Countering code injection attacks with TLB and I/O monitoring.	ICCD	2010	DBLP DOI BibTeX RDF
21	Jung-Hoon Lee	Low power TLB structure by using dynamic searching algorithm.	Comput. Syst. Sci. Eng.	2009	DBLP BibTeX RDF
21	Abhishek Bhattacharjee, Margaret Martonosi	Characterizing the TLB Behavior of Emerging Parallel Workloads on Chip Multiprocessors.	PACT	2009	DBLP DOI BibTeX RDF
21	Girish Venkatasubramanian, Renato J. O. Figueiredo, Ramesh Illikkal, Donald Newell	TMT - A TLB Tag Management Framework for Virtualized Platforms.	SBAC-PAD	2009	DBLP DOI BibTeX RDF
21	Chang-Jiu Chen, Wei-Min Cheng	Reducing the TLB Context Switching Miss Ratio With Banked and Prefetching Mechanism.	J. Inf. Sci. Eng.	2008	DBLP BibTeX RDF
21	Chinnakrishnan S. Ballapuram, Hsien-Hsin S. Lee	Improving TLB energy for java applications on JVM.	ICSAMOS	2008	DBLP DOI BibTeX RDF
21	Mohsen Sharifi, Mohsen Soryani, Mohammad Hossein Rezvani	A Simulation-Based Study of 2-level TLB and Cache Performance of the SPEC CPU2000 Benchmarks.	IMECS	2007	DBLP BibTeX RDF
21	Norman R. Howes	Distributed System Architecture and Specification with TLB.	FCS	2007	DBLP BibTeX RDF
21	Shashank Shastry, Ajay Bhatia, Sagar Reddy	A Single-Cycle-Access 128-Entry Fully Associative TLB for Multi-Core Multi-Threaded Server-on-a-Chip.	ISSCC	2007	DBLP DOI BibTeX RDF
21	Jung-Hoon Lee, Gi-Ho Park, Shin-Dug Kim	Dynamic and selective low power data TLB system.	Microprocess. Microsystems	2004	DBLP DOI BibTeX RDF
21	Jin-Hyuck Choi, Jung-Hoon Lee, Seh-Woong Jeong, Shin-Dug Kim, Charles C. Weems	A Low Power TLB Structure for Embedded Systems.	IEEE Comput. Archit. Lett.	2002	DBLP DOI BibTeX RDF
21	Cheol Ho Park, Daeyeon Park	Aggressive superpage support with the shadow memory and the partial-subblock TLB.	Microprocess. Microsystems	2001	DBLP DOI BibTeX RDF
21	Jung-Hoon Lee, Jang-Soo Lee, Seh-Woong Jeong, Shin-Dug Kim	A Banked-Promotion TLB for High Performance and Low Power.	ICCD	2001	DBLP DOI BibTeX RDF
21	Ken-ichi Suzuki, Nobuyuki Oba, Shigenori Shimizu, Hiroaki Kobayashi, Tadao Nakamura	Time stamp invalidation of TLB-unified cache and its performance evaluation.	Syst. Comput. Jpn.	1999	DBLP DOI BibTeX RDF
21	Toni Juan, Tomás Lang, Juan J. Navarro	Reducing TLB power requirements.	ISLPED	1997	DBLP DOI BibTeX RDF
21	Rafael H. Saavedra, Alan Jay Smith	Measuring Cache and TLB Performance and Their Effect on Benchmark Runtimes.	IEEE Trans. Computers	1995	DBLP DOI BibTeX RDF	execution time prediction, processor caches, table lookaside buffers, Performance evaluation, memory hierarchy
21	Lishing Liu	Multiple-Page Translation for TLB.	ICCD	1993	DBLP DOI BibTeX RDF
21	J. Bradley Chen, Anita Borg, Norman P. Jouppi	A Simulation Based Study of TLB Performance.	ISCA	1992	DBLP DOI BibTeX RDF
21	Patricia J. Teller	Performance Evaluation of Solutions to the TLB Consistency Problem.		1991	RDF
21	George Taylor, Peter Davies, Michael Farmwald	The TLB Slice - A Low-Cost High-Speed Address Translation Mechanism.	ISCA	1990	DBLP DOI BibTeX RDF
20	Henrik Löf, Sverker Holmgren	affinity-on-next-touch: increasing the performance of an industrial PDE solver on a cc-NUMA system.	ICS	2005	DBLP DOI BibTeX RDF	TLB shoot-down, computational electro-magnetics, large pages, OpenMP, sparse matrices, conjugate gradients, cc-NUMA, page migration
20	William J. Dally	A Fast Translation Method for Paging on top of Segmentation.	IEEE Trans. Computers	1992	DBLP DOI BibTeX RDF	fine grain relocation, one-step translation, virtual address, physical address, TLB reads, fine-grain protection, segmentation, object-oriented programming, paging, virtual storage, translation lookaside buffer
12	Houman Homayoun, Avesta Sasan, Aseem Gupta, Alexander V. Veidenbaum, Fadi J. Kurdahi, Nikil D. Dutt	Multiple sleep modes leakage control in peripheral circuits of a all major SRAM-based processor units.	Conf. Computing Frontiers	2010	DBLP DOI BibTeX RDF	multiple sleep mode, peripheral circuits, sram memory, temperature reduction, leakage power
12	Darshan Desai, Gerolf Hoflehner, Arun Kejariwal, Daniel M. Lavery, Alexandru Nicolau, Alexander V. Veidenbaum, Cameron McNairy	Performance Characterization of Itanium® 2-Based Montecito Processor.	SPEC Benchmark Workshop	2009	DBLP DOI BibTeX RDF
12	John L. Henning	SPECrate2006: Alternatives Considered, Lessons Learned.	SPEC Benchmark Workshop	2009	DBLP DOI BibTeX RDF
12	Panyong Zhang, Bo Li 0009, Zhigang Huo, Dan Meng	Evaluating the Effect of Huge Page on Large Scale Applications.	NAS	2009	DBLP DOI BibTeX RDF
12	Chengliang Zhang, Martin Hirzel	Online Phase-Adaptive Data Layout Selection.	ECOOP	2008	DBLP DOI BibTeX RDF
12	Naomi Seki, Lei Zhao, Jo Kei, Daisuke Ikebuchi, Yu Kojima, Yohei Hasegawa, Hideharu Amano, Toshihiro Kashima, Seidai Takeda, Toshiaki Shirai, Mitsutaka Nakata, Kimiyoshi Usami, Tetsuya Sunata, Jun Kanai, Mitaro Namiki, Masaaki Kondo, Hiroshi Nakamura	A fine-grain dynamic sleep control scheme in MIPS R3000.	ICCD	2008	DBLP DOI BibTeX RDF
12	Jian Zhang, Xiaoyong Li, Haibing Guan	The Optimization of Xen Network Virtualization.	CSSE (3)	2008	DBLP DOI BibTeX RDF
12	Vasily Volkov, James Demmel	Benchmarking GPUs to tune dense linear algebra.	SC	2008	DBLP DOI BibTeX RDF
12	Behram Khan, Matthew Horsnell, Ian Rogers, Mikel Luján, Andrew Dinn, Ian Watson	A first insight into object-aware hardware transactional memory.	SPAA	2008	DBLP DOI BibTeX RDF	object-oriented programming, transactional memory, concurrent programming
12	Youcef Bouchebaba, Bruno Girodias, Fabien Coelho, Gabriela Nicolescu, El Mostapha Aboulhamid	Buffer and Register Allocation for Memory Space Optimization.	J. VLSI Signal Process.	2007	DBLP DOI BibTeX RDF	program transformation, memory hierarchy, data locality, memory optimization
12	Dohun Kim, Jugwan Eom, Chanik Park	L4oprof: a performance-monitoring-unit-based software-profiling framework for the L4 microkernel.	ACM SIGOPS Oper. Syst. Rev.	2007	DBLP DOI BibTeX RDF
12	Denis Barthou, Sébastien Donadio, Patrick Carribault, Alexandre Duchateau, William Jalby	Loop Optimization using Hierarchical Compilation and Kernel Decomposition.	CGO	2007	DBLP DOI BibTeX RDF
12	Jugwan Eom, Dohun Kim, Chanik Park	L4oprof: A System-Wide Profiler Using Hardware PMU in L4 Environment.	ICESS	2007	DBLP DOI BibTeX RDF	L4 microkernel, statistical profiling, hardware PMU, performance analysis, performance measures, performance monitoring
12	Yefim Shuf, Ian M. Steiner	Characterizing a Complex J2EE Workload: A Comprehensive Analysis and Opportunities for Optimizations.	ISPASS	2007	DBLP DOI BibTeX RDF	J2EE workload, Java benchmarks, SPECjvm98, SPECjbb2000, Java 2 Enterprise Edition, SPECjAppServer2004, systems research, software research, cache-to-cache modified data transfers, intelligent thread co-scheduling, Java heap, bursty data cache, Java virtual method calls, optimizations, performance analysis, garbage collection, instruction cache, data prefetching, commercial workload
12	Rubao Lee, Bihui Duan, Taoying Liu	Architectural characterization of XQuery workloads on modern processors.	DaMoN	2007	DBLP DOI BibTeX RDF
12	Chun Chen 0002, Jaewook Shin, Shiva Kintali, Jacqueline Chame, Mary W. Hall	Model-Guided Empirical Optimization for Multimedia Extension Architectures: A Case Study.	IPDPS	2007	DBLP DOI BibTeX RDF
12	Emre Özer 0001, Stuart Biles	Thread Priority-Aware Random Replacement in TLBs for a High-Performance Real-Time SMT Processor.	Asia-Pacific Computer Systems Architecture Conference	2007	DBLP DOI BibTeX RDF
12	Michael Penner, Viktor K. Prasanna	Cache-Friendly implementations of transitive closure.	ACM J. Exp. Algorithmics	2006	DBLP DOI BibTeX RDF	Floyd-Warshall algorithm, systolic array algorithms, Data structures
12	Scott Schneider 0001, Christos D. Antonopoulos, Dimitrios S. Nikolopoulos	Scalable locality-conscious multithreaded memory allocation.	ISMM	2006	DBLP DOI BibTeX RDF	synchronization-free, shared memory, multithreading, memory management, non-blocking
12	Guangming Tan, Ninghui Sun, Dongbo Bu	Improving locality of nonserial polyadic dynamic programming.	IPDPS	2006	DBLP DOI BibTeX RDF
12	Freddy Lécué, Alain Léger	Semantic Web Service Composition through a Matchmaking of Domain.	ECOWS	2006	DBLP DOI BibTeX RDF
12	Keun Soo Yim, Jae Don Lee, Jungkeun Park, Jeong-Joon Yoo, Chaeseok Im, Yeonseung Ryu	A Software Reproduction of Virtual Memory for Deeply Embedded Systems.	ICCSA (1)	2006	DBLP DOI BibTeX RDF	memory system and heap management, Embedded system
12	Padma Apparao, Ravi R. Iyer 0001, Donald Newell	Architectural Characterization of VM Scaling on an SMP Machine.	ISPA Workshops	2006	DBLP DOI BibTeX RDF	architectural characterization, Java, performance, scalability, virtualization, servers, Xen
12	Zarka Cvetanovic	Performance tools - Performance tools for large-scale clusters.	SC	2006	DBLP DOI BibTeX RDF
12	Jaydeep Marathe, Frank Mueller 0001	Hardware profile-guided automatic page placement for ccNUMA systems.	PPoPP	2006	DBLP DOI BibTeX RDF	page placement, NUMA, profile-guided optimization, hardware performance monitoring
12	Stijn Eyerman, Lieven Eeckhout, Tejas Karkhanis, James E. Smith 0001	A performance counter architecture for computing accurate CPI components.	ASPLOS	2006	DBLP DOI BibTeX RDF	hardware performance counter architecture, superscalar processor performance modeling
12	Saumil Shah, Puneet Gupta 0001, Andrew B. Kahng	Standard cell library optimization for leakage reduction.	DAC	2006	DBLP DOI BibTeX RDF	gate-length biasing, library optimization, leakage reduction
12	Xianglong Huang, Brian T. Lewis, Kathryn S. McKinley	Dynamic code management: improving whole program code locality in managed runtimes.	VEE	2006	DBLP DOI BibTeX RDF	locality, virtual machines, code generation, dynamic optimization, performance monitoring, code layout
12	Ravi R. Iyer 0001, Jack Perdue, Lawrence Rauchwerger, Nancy M. Amato, Laxmi N. Bhuyan	An Experimental Evaluation of the HP V-Class and SGI Origin 2000 Multiprocessors using Microbenchmarks and Scientific Applications.	Int. J. Parallel Program.	2005	DBLP DOI BibTeX RDF	performance analysis, Parallel architectures, shared memory
12	Xiaocheng Zhou, Zhigang Huo, Ninghui Sun, Yingchao Zhou	Impact of Page Size on Communication Performance.	IPDPS	2005	DBLP DOI BibTeX RDF
12	Xiangrong Zhou, Peter Petrov	Energy-efficient address translation for virtual memory support in low-power and real-time embedded processors.	CODES+ISSS	2005	DBLP DOI BibTeX RDF
12	Martin Karlsson, Erik Hagersten, Kevin E. Moore, David A. Wood 0001	Exploring Processor Design Options for Java-Based Middleware.	ICPP	2005	DBLP DOI BibTeX RDF	Java, Middleware, CMP, workloads, ILP, Characterization
12	Kostas Magoutis	Memory Management Support for Multi-Programmed Remote Direct Memory Access (RDMA) Systems.	CLUSTER	2005	DBLP DOI BibTeX RDF
12	Aravind Menon, Jose Renato Santos, Yoshio Turner, G. John Janakiraman, Willy Zwaenepoel	Diagnosing performance overheads in the xen virtual machine environment.	VEE	2005	DBLP DOI BibTeX RDF	statistical profiling, performance analysis, virtual machine monitors
12	Naohiko Shimizu, Chiaki Kon	Java object look aside buffer for embedded applications.	SIGARCH Comput. Archit. News	2004	DBLP DOI BibTeX RDF
12	Xiaogang Qiu, Michel Dubois 0001	Tolerating Late Memory Traps in Dynamically Scheduled Processors.	IEEE Trans. Computers	2004	DBLP DOI BibTeX RDF
12	Bin Cui 0001, Beng Chin Ooi, Jianwen Su, Kian-Lee Tan	Main Memory Indexing: The Case for BD-Tree.	IEEE Trans. Knowl. Data Eng.	2004	DBLP DOI BibTeX RDF	BD-tree, {rm{B}}^+{hbox{-}}{rm{tree}}, {rm{CSB}}^+{hbox{-}}{rm{tree}}, Main memory databases
12	Gilberto Contreras, Margaret Martonosi, Jinzhan Peng, Roy Ju, Guei-Yuan Lueh	XTREM: a power simulator for the Intel XScale® core.	LCTES	2004	DBLP DOI BibTeX RDF	XORP, XScale, Java, power modeling, hardware performance counters, power measurements
12	Steven T. Gabriel, David S. Wise	The Opie compiler from row-major source to Morton-ordered matrices.	WMPI	2004	DBLP DOI BibTeX RDF	cache, scientific computing, paging, quadtrees
12	Ali-Reza Adl-Tabatabai, Jay Bharadwaj, Michal Cierniak, Marsha Eng, Jesse Fang, Brian T. Lewis, Brian R. Murphy, James M. Stichnoth	Improving 64-Bit Java IPF Performance by Compressing Heap References.	CGO	2004	DBLP DOI BibTeX RDF
12	Kyounghwan An, Bonghee Hong	Growing Node Policies of a Main Memory Index Structure for Moving Objects Databases.	DEXA	2004	DBLP DOI BibTeX RDF
12	Evangelia Athanasaki, Nectarios Koziris	Fast Indexing for Blocked Array Layouts to Improve Multi-Level Cache Locality.	Interaction between Compilers and Computer Architectures	2004	DBLP DOI BibTeX RDF
12	Gabriel Marin, John M. Mellor-Crummey	Cross-architecture performance predictions for scientific applications using parameterized models.	SIGMETRICS	2004	DBLP DOI BibTeX RDF	modeling, performance analysis, prediction
12	John W. Sias, Sain-Zee Ueng, Geoff A. Kent, Ian M. Steiner, Erik M. Nystrom, Wen-mei W. Hwu	Field-testing IMPACT EPIC research results in Itanium 2.	ISCA	2004	DBLP DOI BibTeX RDF
12	Anthony S. Fong	A computer architecture with access control and cache option tags on individual instruction operands.	SIGARCH Comput. Archit. News	2003	DBLP DOI BibTeX RDF	operand descriptor, optional encaching, system attributes, access control, data coherency
12	Venkata K. Pingali, Sally A. McKee, Wilson C. Hsieh, John B. Carter	Restructuring Computations for Temporal Data Cache Locality.	Int. J. Parallel Program.	2003	DBLP DOI BibTeX RDF	optimization, data structures, Memory performance
12	Daniel Jiménez-González, Juan J. Navarro, Josep Lluís Larriba-Pey	CC-Radix: a Cache Conscious Sorting Based on Radix sort.	PDP	2003	DBLP DOI BibTeX RDF
12	Richard A. Hankins, Jignesh M. Patel	Effect of node size on the performance of cache-conscious B+-trees.	SIGMETRICS	2003	DBLP DOI BibTeX RDF	cache-conscious, index, B+-tree
12	Shigeru Kusakabe, Kentaro Iio, Hideo Taniguchi, Makoto Amamiya	Fine-Grained System-Call Scheduling in CEFOS on Commodity Processors.	PPAM	2003	DBLP DOI BibTeX RDF
12	Jonathan S. Shapiro	Vulnerabilities in Synchronous IPC Designs.	S&P	2003	DBLP DOI BibTeX RDF	capability systems, operating systems, vulnerability, interprocess communication
12	Dirk Grunwald, Soraya Ghiasi	Microarchitectural denial of service: insuring microarchitectural fairness.	MICRO	2002	DBLP DOI BibTeX RDF
12	Huiyang Zhou, Thomas M. Conte	Code Size Efficiency in Global Scheduling for ILP Processors.	Interaction between Compilers and Computer Architectures	2002	DBLP DOI BibTeX RDF	Code Size Efficiency, I-cache Performance, Code Replication, Tail Duplication, Optimal Code Size Efficiency, Diminishing Returns, Quantitative Measure, Instruction Level Parallelism (ILP)
12	Venkata K. Pingali, Sally A. McKee, Wilson C. Hsieh, John B. Carter	Computation regrouping: restructuring programs for temporal data cache locality.	ICS	2002	DBLP DOI BibTeX RDF	optimization, data structures, memory performance
12	Danko Butorac	Project IPSIS - Web Portal and Linux for the Blind.	ICCHP	2002	DBLP DOI BibTeX RDF
12	Luiz De Rose, Kattamuri Ekanadham, Jeffrey K. Hollingsworth, Simone Sbaraglia	SIGMA: a simulator infrastructure to guide memory analysis.	SC	2002	DBLP DOI BibTeX RDF
12	Mani Azimi, Faye A. Briggs, Michel Cekleov, Manoj Khare, Akhilesh Kumar, Lily Pao Looi	Scalability Port: A Coherent Interface for Shared Memory Multiprocessors.	Hot Interconnects	2002	DBLP DOI BibTeX RDF
12	Yu Chen, Xiaoge Wang, Zhenqiang Jiao, Jun Xie, Zhihui Du, Sanli Li	MyVIA: A Design and Implementation of the High Performance Virtual Interface Architecture.	CLUSTER	2002	DBLP DOI BibTeX RDF
12	Yen-Jen Chang, Feipei Lai	Paged cache: an efficient partition architecture for reducing power, area and access time.	APCCAS (2)	2002	DBLP DOI BibTeX RDF
12	Sriram Sellappa, Siddhartha Chatterjee	Cache-Efficient Multigrid Algorithms.	International Conference on Computational Science (1)	2001	DBLP DOI BibTeX RDF
12	Alex Ramírez, Luiz André Barroso, Kourosh Gharachorloo, Robert S. Cohn, Josep Lluís Larriba-Pey, P. Geoffrey Lowney, Mateo Valero	Code layout optimizations for transaction processing workloads.	ISCA	2001	DBLP DOI BibTeX RDF
12	Stefan Manegold, Peter A. Boncz, Martin L. Kersten	Optimizing database architecture for the new bottleneck: memory access.	VLDB J.	2000	DBLP DOI BibTeX RDF	Memory access optimization, Decomposed storage model, Query processing, Main-memory databases, Join algorithms, Implementation techniques
12	Siddhartha Chatterjee, Sandeep Sen	Cache-Efficient Matrix Transposition.	HPCA	2000	DBLP DOI BibTeX RDF
12	Adam Wiggins, Gernot Heiser	Fast Address-Space Switching on the StrongARM SA-1100 Processor.	ACAC	2000	DBLP DOI BibTeX RDF
12	Afzal Malik, Bill Moyer, Dan Cermak	The M·CORETM M340 Unified Cache Architecture.	ICCD	2000	DBLP DOI BibTeX RDF
12	Noboru Tanabe, Junji Yamamoto, Hiroaki Nishi, Tomohiro Kudoh, Yoshihiro Hamada, Hironori Nakajo, Hideharu Amano	On-the-fly Sending: A Low Latency High Bandwidth Message Transfer Mechanism.	ISPAN	2000	DBLP DOI BibTeX RDF
12	Noboru Tanabe, Junji Yamamoto, Hiroaki Nishi, Tomohiro Kudoh, Yoshihiro Hamada, Hironori Nakajo, Hideharu Amano	MEMOnet : Network interface plugged into a memory slot.	CLUSTER	2000	DBLP DOI BibTeX RDF
12	Yonghong Song, Zhiyuan Li 0001	A Compiler Framework for Tiling Imperfectly-Nested Loops.	LCPC	1999	DBLP DOI BibTeX RDF
12	Xiaogang Qiu, Michel Dubois 0001	Tolerating Late Memory Traps in ILP Processors.	ISCA	1999	DBLP DOI BibTeX RDF
12	Larry Carter, Kang Su Gatlin	Towards an Optimal Bit-Reversal Permutation Program.	FOCS	1998	DBLP DOI BibTeX RDF	Transpose, Cache, FFT, Memory hierarchy, Permutations
12	Dawn N. Jutla, Peter Bodorik	Architectural Support for Synchronization of Threads Accessing Variable-Sized Units of Virtual Memory.	HICSS (3)	1998	DBLP DOI BibTeX RDF
12	Yuqun Chen, Angelos Bilas, Stefanos N. Damianakis, Cezary Dubnicki, Kai Li 0001	UTLB: A Mechanism for Address Translation on Network Interfaces.	ASPLOS	1998	DBLP DOI BibTeX RDF
12	Xijun Zhang, Chunming Qiao	Pipelined Transmission Scheduling in All-Optical TDM/WDM Rings.	ICCCN	1997	DBLP DOI BibTeX RDF	TDM/WDM, AAPC, Pipelined transmissions, Scheduling, Ring
12	Srilatha Manne, Dirk Grunwald, Fabio Somenzi	Remembrance of Things Past: Locality and Memory in BDDs.	DAC	1997	DBLP DOI BibTeX RDF
12	Chun Xia, Josep Torrellas	Instruction Prefetching of Systems Codes with Layout Optimized for Reduced Cache Misses.	ISCA	1996	DBLP DOI BibTeX RDF
12	André Seznec	Don't Use the Page Number, But a Pointer To It.	ISCA	1996	DBLP DOI BibTeX RDF	address width, indirect-tagged caches, reduced branch target buffers, tag implementation cost
12	Ben Verghese, Scott Devine, Anoop Gupta, Mendel Rosenblum	Operating System Support for Improving Data Locality on CC-NUMA Compute Servers.	ASPLOS	1996	DBLP DOI BibTeX RDF